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authorJesse Barnes <jesse.barnes@intel.com>2007-07-06 16:36:34 -0700
committerJesse Barnes <jesse.barnes@intel.com>2007-07-06 16:36:34 -0700
commitcecbc71fdc9af832cef23427696f6f654f7d6104 (patch)
tree4d5d0789dce94f9ad4dce2a93d376d353d37e81a /src/i830_display.c
parent4359df9419d2d02a2f9d9adc7f5a49ecf07ddd30 (diff)
Fix debug output in fbc enable/disable routines. Add logic to make sure fbc
isn't enabled twice on two different pipes.
Diffstat (limited to 'src/i830_display.c')
-rw-r--r--src/i830_display.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index c79676da..dc52c0b1 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -708,6 +708,14 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp;
unsigned long interval = 1000;
+ if (INREG(FBC_CONTROL) & FBC_CTL_EN) {
+ char cur_pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on "
+ "pipe %c, not enabling on pipe %c\n", cur_pipe, pipe ? 'b' :
+ 'a');
+ return;
+ }
+
compressed_stride = pI830->compressed_front_buffer->size /
FBC_LL_SIZE;
@@ -730,7 +738,7 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
OUTREG(FBC_CONTROL, fbc_ctl);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on pipe %c\n", pipe ?
- "a" : "b");
+ 'b' : 'a');
}
static void
@@ -739,6 +747,7 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
uint32_t fbc_ctl;
+ char pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';;
/* Disable compression */
fbc_ctl = INREG(FBC_CONTROL);
@@ -748,7 +757,7 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
/* Wait for compressing bit to clear */
while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING)
; /* nothing */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled\n");
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", pipe);
}
static void