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authorAlan Hourihane <alanh@fairlite.demon.co.uk>2005-01-06 14:43:14 +0000
committerAlan Hourihane <alanh@fairlite.demon.co.uk>2005-01-06 14:43:14 +0000
commit076c5116ae5eda1822da70184cbcc8942b470541 (patch)
treeee07fbc884b3374284d12a7dbf7c3b30a7cb0413 /src/i830_dri.c
parentedb9b6fde0948bb1121a8456500ef9f55f734376 (diff)
Add:
- Intel i915GM support to 2D DDX and 3D Mesa drivers. - PanelID identification - DRI suspend/resume support - Detection of monitor changes on VT switches - Support custom video modes if available in the Video BIOS - 3D enhancements: * GL_ARB_texture_cube_map * GL_EXT_blend_equation_separate * GL_ATI_blend_equation_separate * GL_ARB_point_parameters * GL_NV_blend_square * GL_EXT_cull_vertex * GL_ARB_depth_texture * GL_SGIX_depth_texture * GL_ARB_shadow * GL_EXT_shadow_funcs * GL_3DFX_texture_compression_FXT1 By Tungsten Graphics, Keith Whitwell & Alan Hourihane.
Diffstat (limited to 'src/i830_dri.c')
-rw-r--r--src/i830_dri.c58
1 files changed, 57 insertions, 1 deletions
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 25ce9a97..034b0960 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -163,6 +163,24 @@ I830InitDma(ScrnInfoPtr pScrn)
}
static Bool
+I830ResumeDma(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ drmI830Init info;
+
+ memset(&info, 0, sizeof(drmI830Init));
+ info.func = I830_RESUME_DMA;
+
+ if (drmCommandWrite(pI830->drmSubFD, DRM_I830_INIT,
+ &info, sizeof(drmI830Init))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I830 Dma Resume Failed\n");
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
+static Bool
I830SetParam(ScrnInfoPtr pScrn, int param, int value)
{
I830Ptr pI830 = I830PTR(pScrn);
@@ -510,7 +528,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
return FALSE;
}
- /* Check the i830 DRM versioning */
+ /* Check the i915 DRM versioning */
{
drmVersionPtr version;
@@ -568,6 +586,9 @@ I830DRIScreenInit(ScreenPtr pScreen)
drmFreeVersion(version);
return FALSE;
}
+ if (version->version_minor < 2)
+ xf86DrvMsg(pScreen->myNum, X_WARNING,
+ "Resume functionality not available with DRM < 1.2\n");
pI830->drmMinor = version->version_minor;
drmFreeVersion(version);
}
@@ -742,6 +763,41 @@ I830DRIDoMappings(ScreenPtr pScreen)
return TRUE;
}
+Bool
+I830DRIResume(ScreenPtr pScreen)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+ I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
+
+ DPRINTF(PFX, "I830DRIResume\n");
+
+ I830ResumeDma(pScrn);
+
+ {
+ pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
+ ((pciConfigPtr) pI830->
+ PciInfo->thisCard)->busnum,
+ ((pciConfigPtr) pI830->
+ PciInfo->thisCard)->devnum,
+ ((pciConfigPtr) pI830->
+ PciInfo->thisCard)->funcnum);
+
+ if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "[drm] failure adding irq handler\n");
+ pI830DRI->irq = 0;
+ return FALSE;
+ }
+ else
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "[drm] dma control initialized, using IRQ %d\n",
+ pI830DRI->irq);
+ }
+
+ return FALSE;
+}
+
void
I830DRICloseScreen(ScreenPtr pScreen)
{