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authorAlexander Gottwald <alexander.gottwald@s1999.tu-chemnitz.de>2004-09-15 16:34:01 +0000
committerAlexander Gottwald <alexander.gottwald@s1999.tu-chemnitz.de>2004-09-15 16:34:01 +0000
commit26f276bb2fe9d2a38b52968b0604b1b184e95329 (patch)
treea0cb4a8a3b30123b2d20fd2cb18aa6bfb37eeb9c /src/i830_dri.h
parent4db974c9e502fc406973b1d426aeec5a69386932 (diff)
Pull XORG-6_8_0 to CYGWIN branchCYGWIN-6_8_1-MERGECYGWIN-6_8_0-MERGE
Diffstat (limited to 'src/i830_dri.h')
-rw-r--r--src/i830_dri.h91
1 files changed, 10 insertions, 81 deletions
diff --git a/src/i830_dri.h b/src/i830_dri.h
index 6671c2e2..aef93a8b 100644
--- a/src/i830_dri.h
+++ b/src/i830_dri.h
@@ -3,6 +3,7 @@
#ifndef _I830_DRI_H
#define _I830_DRI_H
+#include "xf86dri.h"
#include "xf86drm.h"
#include "i830_common.h"
@@ -15,20 +16,20 @@
#define I830_REG_SIZE 0x80000
typedef struct _I830DRIRec {
- drmHandle regs;
+ drm_handle_t regs;
drmSize regsSize;
drmAddress regsMap;
drmSize backbufferSize;
- drmHandle backbuffer;
+ drm_handle_t backbuffer;
drmSize depthbufferSize;
- drmHandle depthbuffer;
+ drm_handle_t depthbuffer;
- drmHandle textures;
+ drm_handle_t textures;
int textureSize;
- drmHandle agp_buffers;
+ drm_handle_t agp_buffers;
drmSize agp_buf_size;
int deviceID;
@@ -37,24 +38,19 @@ typedef struct _I830DRIRec {
int mem;
int cpp;
int bitsPerPixel;
+
int fbOffset;
int fbStride;
int backOffset;
- int depthOffset;
+ int backPitch;
- int auxPitch;
- int auxPitchBits;
+ int depthOffset;
+ int depthPitch;
int logTextureGranularity;
int textureOffset;
- /* For non-dma direct rendering.
- */
- int ringOffset;
- int ringSize;
-
- drmBufMapPtr drmBufs;
int irq;
int sarea_priv_offset;
} I830DRIRec, *I830DRIPtr;
@@ -69,72 +65,5 @@ typedef struct {
int dummy;
} I830DRIContextRec, *I830DRIContextPtr;
-/* Warning: If you change the SAREA structure you must change the kernel
- * structure as well */
-
-typedef struct _I830SAREA {
- unsigned int ContextState[I830_CTX_SETUP_SIZE];
- unsigned int BufferState[I830_DEST_SETUP_SIZE];
- unsigned int TexState[I830_TEXTURE_COUNT][I830_TEX_SETUP_SIZE];
- unsigned int TexBlendState[I830_TEXBLEND_COUNT][I830_TEXBLEND_SIZE];
- unsigned int TexBlendStateWordsUsed[I830_TEXBLEND_COUNT];
- unsigned int Palette[2][256];
- unsigned int dirty;
-
- unsigned int nbox;
- XF86DRIClipRectRec boxes[I830_NR_SAREA_CLIPRECTS];
-
- /* Maintain an LRU of contiguous regions of texture space. If
- * you think you own a region of texture memory, and it has an
- * age different to the one you set, then you are mistaken and
- * it has been stolen by another client. If global texAge
- * hasn't changed, there is no need to walk the list.
- *
- * These regions can be used as a proxy for the fine-grained
- * texture information of other clients - by maintaining them
- * in the same lru which is used to age their own textures,
- * clients have an approximate lru for the whole of global
- * texture space, and can make informed decisions as to which
- * areas to kick out. There is no need to choose whether to
- * kick out your own texture or someone else's - simply eject
- * them all in LRU order.
- */
-
- drmTextureRegion texList[I830_NR_TEX_REGIONS + 1];
- /* Last elt is sentinal */
- int texAge; /* last time texture was uploaded */
- int last_enqueue; /* last time a buffer was enqueued */
- int last_dispatch; /* age of the most recently dispatched buffer */
- int last_quiescent; /* */
- int ctxOwner; /* last context to upload state */
-
- int vertex_prim;
-
- int pf_enabled; /* is pageflipping allowed? */
- int pf_active; /* is pageflipping active right now? */
- int pf_current_page; /* which buffer is being displayed? */
-
- int perf_boxes; /* performance boxes to be displayed */
-
- /* Here's the state for texunits 2,3:
- */
- unsigned int TexState2[I830_TEX_SETUP_SIZE];
- unsigned int TexBlendState2[I830_TEXBLEND_SIZE];
- unsigned int TexBlendStateWordsUsed2;
-
- unsigned int TexState3[I830_TEX_SETUP_SIZE];
- unsigned int TexBlendState3[I830_TEXBLEND_SIZE];
- unsigned int TexBlendStateWordsUsed3;
-
- unsigned int StippleState[I830_STP_SETUP_SIZE];
-} I830SAREARec, *I830SAREAPtr;
-
-/* Flags for perf_boxes
- */
-#define I830_BOX_RING_EMPTY 0x1 /* populated by kernel */
-#define I830_BOX_FLIP 0x2 /* populated by kernel */
-#define I830_BOX_WAIT 0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD 0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT 0x10 /* populated by client */
#endif