diff options
| author | Hong Liu <hong.liu@intel.com> | 2008-06-04 16:56:50 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-06-04 16:56:50 +0800 |
| commit | c7fee208fd46e143965ea173984d284e1eec2a9b (patch) | |
| tree | 5f22d91e9a24a8a0f18b2c15498aa1088a13e8ce /src/i830_driver.c | |
| parent | 64ccc8a036a1d80fc918e9b124d24ce0d26bdbbb (diff) | |
Fix DSPARB change on 965G
From the spec, only 965GM and IGD_GM have 128 FIFO entries.
With DSPARB change introduced by commit bd137a, I've got PIPE B
underrun when dual-headed on G35 platform.
Diffstat (limited to 'src/i830_driver.c')
| -rw-r--r-- | src/i830_driver.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c index 1041fe3b..426b20f4 100644 --- a/src/i830_driver.c +++ b/src/i830_driver.c @@ -1964,12 +1964,12 @@ SetHWOperatingState(ScrnInfoPtr pScrn) * FIFO RAM entries equally between planes A and B. */ if (IS_I9XX(pI830)) { - if (IS_I915GM(pI830) || IS_I915G(pI830)) - OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) | - (48 << DSPARB_BSTART_SHIFT)); - else + if (IS_I965GM(pI830) || IS_IGD_GM(pI830)) OUTREG(DSPARB, (127 << DSPARB_CSTART_SHIFT) | (64 << DSPARB_BSTART_SHIFT)); + else + OUTREG(DSPARB, (95 << DSPARB_CSTART_SHIFT) | + (48 << DSPARB_BSTART_SHIFT)); } else { OUTREG(DSPARB, 254 << DSPARB_BEND_SHIFT | 128 << DSPARB_AEND_SHIFT); } |