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authorChris Wilson <chris@chris-wilson.co.uk>2009-11-29 22:42:03 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2009-11-29 22:42:03 +0000
commit285f286597df5af13ac3f3d366f2fc9d0468dafa (patch)
treea102dea2bc7b253781ca10a0cc7faef5400a7e8d /src/i830_driver.c
parent2c3aee2b570dadd9270a08d8ff675d07ac405e33 (diff)
batch: Track pixmap domains.
In order to detect when we require cache flushes we need to track which domains the pixmap currently belongs to. So to do so we create a device private structure to hold the extra information and hook it up. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/i830_driver.c')
-rw-r--r--src/i830_driver.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 5069142a..94837eb8 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -985,20 +985,19 @@ I830BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
screen->BlockHandler = I830BlockHandler;
if (scrn->vtSema) {
- Bool flushed = FALSE;
+ Bool flush = FALSE;
+
/* Emit a flush of the rendering cache, or on the 965 and beyond
* rendering results may not hit the framebuffer until significantly
* later.
*/
- if (intel->need_mi_flush || intel->batch_used) {
- flushed = TRUE;
- I830EmitFlush(scrn);
- }
+ if (intel->need_mi_flush || intel->batch_used)
+ flush = TRUE;
/* Flush the batch, so that any rendering is executed in a timely
* fashion.
*/
- intel_batch_flush(scrn, flushed);
+ intel_batch_flush(scrn, flush);
drmCommandNone(intel->drmSubFD, DRM_I915_GEM_THROTTLE);
intel->need_mi_flush = FALSE;
@@ -1138,6 +1137,9 @@ void i830_init_bufmgr(ScrnInfoPtr scrn)
intel->bufmgr = intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+
+ list_init(&intel->batch_pixmaps);
+ list_init(&intel->flush_pixmaps);
}
Bool i830_crtc_on(xf86CrtcPtr crtc)