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authorKeith Packard <keithp@keithp.com>2008-10-14 14:38:05 -0700
committerKeith Packard <keithp@keithp.com>2008-10-19 14:46:12 -0700
commit546e2aca5b8b5d9f486d119ea2872ccd2b056054 (patch)
treec0767ad275359ddc59fb0b3618261063336b5e08 /src/i830_driver.c
parent9b91cdf7ac88982880c887ffb0811c92157a7945 (diff)
Reduce incidence of MI_FLUSH usage.
This tracks whether the last command in each batch is an MI_FLUSH command and avoids appending another MI_FLUSH in the non-GEM cases. Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'src/i830_driver.c')
-rw-r--r--src/i830_driver.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 2e503afd..6597bd1c 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -2674,17 +2674,21 @@ I830BlockHandler(int i,
pScreen->BlockHandler = I830BlockHandler;
if (pScrn->vtSema && pI830->accel != ACCEL_NONE) {
+ Bool flushed = FALSE;
/* Emit a flush of the rendering cache, or on the 965 and beyond
* rendering results may not hit the framebuffer until significantly
* later.
*/
if (pI830->accel != ACCEL_NONE && (pI830->need_mi_flush || pI830->batch_used))
+ {
+ flushed = TRUE;
I830EmitFlush(pScrn);
+ }
/* Flush the batch, so that any rendering is executed in a timely
* fashion.
*/
- intel_batch_flush(pScrn);
+ intel_batch_flush(pScrn, flushed);
#ifdef XF86DRI
if (pI830->memory_manager)
drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);