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authorEric Anholt <eric@anholt.net>2008-12-29 13:42:44 -0800
committerZhenyu Wang <zhenyu.z.wang@intel.com>2008-12-31 23:09:04 +0800
commit8dfbd9ea1733768bf528e04a660a1ac478c3249e (patch)
tree65471335a39d5f63fd0a6cde17dcecf89c95cba0 /src/i830_exa.c
parentd00c69f9cb95bb9bbe5dcb5f7a740e3bd2c00e2a (diff)
Don't touch the pipestat regs for detecting FIFO underrun. The kernel owns them.
Since we don't perform any synchronization with the kernel on these regs, we could race with the kernel to write stale values and end up not having vblank interrupts enabled when somebody was waiting on one. (cherry picked from commit 830bf916724afd21b7947f797c22a8c8aab7a0a4)
Diffstat (limited to 'src/i830_exa.c')
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