A few more assorted lvds bits just to keep us the same as kms.

doesn't change anything here.

1 files changed, 17 insertions, 2 deletions

diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 8f7044d9..eaba664c 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -725,6 +725,10 @@ i830_lvds_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
 	goto out;
     }
 
+    /* only full screen scale for now */
+    if (IS_IGDNG(intel))
+	goto out;
+
     /* 965+ wants fuzzy fitting */
     if (IS_I965G(intel))
 	pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
@@ -751,8 +755,10 @@ i830_lvds_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
      * register description and PRM.
      */
     /* Change the value here to see the borders for debugging */
-    OUTREG(BCLRPAT_A, 0);
-    OUTREG(BCLRPAT_B, 0);
+    if (!IS_IDGNG(intel)) {
+	    OUTREG(BCLRPAT_A, 0);
+	    OUTREG(BCLRPAT_B, 0);
+    }
     switch (dev_priv->fitting_mode) {
     case CENTER:
 	/*
@@ -958,6 +964,15 @@ i830_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     intel_screen_private    *intel = intel_get_screen_private(scrn);
 
     /*
+     * The LVDS pin pair will already have been turned on in the
+     * main modesetting function since it has a large impact on the
+     * DPLL settings.
+     */
+
+    if (IS_IGDNG(intel))
+	return;
+
+    /*
      * PFIT must be enabled/disabled while LVDS is on but pipes are still off
      */
     OUTREG(PFIT_PGM_RATIOS, dev_priv->pfit_pgm_ratios);