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authorAlan Hourihane <alanh@fairlite.demon.co.uk>2005-05-31 17:58:26 +0000
committerAlan Hourihane <alanh@fairlite.demon.co.uk>2005-05-31 17:58:26 +0000
commit27feb0f3474c1e21557225e10b13558e002c0ebf (patch)
tree0870aeaa1ebb94256db68c70e9ce015fbdcca4a1 /src/i830_memory.c
parent2d10e8dc8184b0514e8ac9f835a06b85d609bb1b (diff)
Add Intel(R) 945G support
Diffstat (limited to 'src/i830_memory.c')
-rw-r--r--src/i830_memory.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 301c55b6..e8f04258 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -1235,7 +1235,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
i830Reg->Fence[nr] = 0;
- if (IS_I915G(pI830) || IS_I915GM(pI830))
+ if (IS_I915G(pI830) || IS_I915GM(pI830) || IS_I945G(pI830))
fence_mask = ~I915G_FENCE_START_MASK;
else
fence_mask = ~I830_FENCE_START_MASK;
@@ -1243,7 +1243,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
if (start & fence_mask) {
xf86DrvMsg(X_WARNING, pScrn->scrnIndex,
"SetFence: %d: start (0x%08x) is not %s aligned\n",
- nr, start, (IS_I915G(pI830) || IS_I915GM(pI830)) ? "1MB" : "512k");
+ nr, start, (IS_I915G(pI830) || IS_I915GM(pI830) || IS_I945G(pI830)) ? "1MB" : "512k");
return;
}
@@ -1263,7 +1263,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
val = (start | FENCE_X_MAJOR | FENCE_VALID);
- if (IS_I915G(pI830) || IS_I915GM(pI830)) {
+ if (IS_I915G(pI830) || IS_I915GM(pI830) || IS_I945G(pI830)) {
switch (size) {
case MB(1):
val |= I915G_FENCE_SIZE_1M;
@@ -1324,7 +1324,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
}
}
- if (IS_I915G(pI830) || IS_I915GM(pI830))
+ if (IS_I915G(pI830) || IS_I915GM(pI830) || IS_I945G(pI830))
fence_pitch = pitch / 512;
else
fence_pitch = pitch / 128;