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authorEric Anholt <eric@anholt.net>2006-10-24 17:47:47 -0700
committerEric Anholt <eric@anholt.net>2006-10-25 12:21:57 -0700
commitcd2f0d948a6cae61b0d77d2c7184ed8d695be8c3 (patch)
tree507e677ad3d09d176c8124595221f2ca130f6ca8 /src/i830_sdvo.c
parentcd9c6e29146e1debaba4b0b9ad0d241f07bdbc14 (diff)
Clean up SDVO code, moving the private structure internal and cleaning up caps.
All the SDVO code should now be in lower case rather than StudlyCaps. This also adjusts the I2C setup to create a bus per SDVO output we set up. The previous setup with shared buses was failing in some circumstances, which is probably due to the lack of refcounting in xf86i2c.c.
Diffstat (limited to 'src/i830_sdvo.c')
-rw-r--r--src/i830_sdvo.c971
1 files changed, 547 insertions, 424 deletions
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 76080dfa..e028a9bb 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -23,6 +23,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
**************************************************************************/
+/** @file
+ * SDVO support for i915 and newer chipsets.
+ *
+ * The SDVO outputs send digital display data out over the PCIE bus to display
+ * cards implementing a defined interface. These cards may have DVI, TV, CRT,
+ * or other outputs on them.
+ *
+ * The system has two SDVO channels, which may be used for SDVO chips on the
+ * motherboard, or in the external cards. The two channels may also be used
+ * in a ganged mode to provide higher bandwidth to a single output. Currently,
+ * this code doesn't deal with either ganged mode or more than one SDVO output.
+ */
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
@@ -37,26 +50,58 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "i810_reg.h"
#include "i830_sdvo_regs.h"
+/** SDVO driver private structure. */
+struct i830_sdvo_priv {
+ /** SDVO device on SDVO I2C bus. */
+ I2CDevRec d;
+ /** Temporary storage for reg read/writes */
+ unsigned char sdvo_regs[20];
+ /** Register for the SDVO device: SDVOB or SDVOC */
+ int output_device;
+ /**
+ * Capabilities of the SDVO device returned by i830_sdvo_get_capabilities()
+ */
+ i830_sdvo_caps caps;
+ /** Pixel clock limitations reported by the SDVO device */
+ CARD16 pixel_clock_min, pixel_clock_max;
+
+ /** State for save/restore */
+ /** @{ */
+ int save_sdvo_mult;
+ Bool save_sdvo_active_1, save_sdvo_active_2;
+ i830_sdvo_dtd save_input_dtd_1, save_input_dtd_2;
+ i830_sdvo_dtd save_output_dtd_1, save_output_dtd_2;
+ CARD32 save_SDVOX;
+ /** @} */
+};
+
CARD16 curr_table[6];
-/* SDVO support for i9xx chipsets */
-static Bool sReadByte(I830SDVOPtr s, int addr, unsigned char *ch)
+/** Read a single byte from the given address on the SDVO device. */
+static Bool i830_sdvo_read_byte(I830OutputPtr output, int addr,
+ unsigned char *ch)
{
- if (!xf86I2CReadByte(&s->d, addr, ch)) {
- xf86DrvMsg(s->d.pI2CBus->scrnIndex, X_ERROR,
- "Unable to read from %s Slave %d.\n", s->d.pI2CBus->BusName,
- s->d.SlaveAddr);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ if (!xf86I2CReadByte(&dev_priv->d, addr, ch)) {
+ xf86DrvMsg(output->pI2CBus->scrnIndex, X_ERROR,
+ "Unable to read from %s slave %d.\n",
+ output->pI2CBus->BusName, dev_priv->d.SlaveAddr);
return FALSE;
}
return TRUE;
}
-static Bool sWriteByte(I830SDVOPtr s, int addr, unsigned char ch)
+/** Write a single byte to the given address on the SDVO device. */
+static Bool i830_sdvo_write_byte(I830OutputPtr output,
+ int addr, unsigned char ch)
{
- if (!xf86I2CWriteByte(&s->d, addr, ch)) {
- xf86DrvMsg(s->d.pI2CBus->scrnIndex, X_ERROR,
- "Unable to write to %s Slave %d.\n", s->d.pI2CBus->BusName,
- s->d.SlaveAddr);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ if (!xf86I2CWriteByte(&dev_priv->d, addr, ch)) {
+ xf86DrvMsg(output->pI2CBus->scrnIndex, X_ERROR,
+ "Unable to write to %s Slave %d.\n",
+ output->pI2CBus->BusName, dev_priv->d.SlaveAddr);
return FALSE;
}
return TRUE;
@@ -64,6 +109,7 @@ static Bool sWriteByte(I830SDVOPtr s, int addr, unsigned char ch)
#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
+/** Mapping of command numbers to names, for debug output */
const struct _sdvo_cmd_name {
CARD8 cmd;
char *name;
@@ -106,19 +152,21 @@ const struct _sdvo_cmd_name {
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_RESOLUTION_SUPPORT),
SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
};
+
/* following on from tracing the intel BIOS i2c routines */
static void
-I830SDVOWriteOutputs(I830SDVOPtr s, int num_out)
+i830_sdvo_write_outputs(I830OutputPtr output, int num_out)
{
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
int i;
- ErrorF("SDVO: W: %02X ", s->sdvo_regs[SDVO_I2C_OPCODE]);
+ ErrorF("SDVO: W: %02X ", dev_priv->sdvo_regs[SDVO_I2C_OPCODE]);
for (i = SDVO_I2C_ARG_0; i > SDVO_I2C_ARG_0 - num_out; i--)
- ErrorF("%02X ", s->sdvo_regs[i]);
+ ErrorF("%02X ", dev_priv->sdvo_regs[i]);
for (; i > SDVO_I2C_ARG_7; i--)
ErrorF(" ");
for (i = 0; i < sizeof(sdvo_cmd_names) / sizeof(sdvo_cmd_names[0]); i++) {
- if (s->sdvo_regs[SDVO_I2C_OPCODE] == sdvo_cmd_names[i].cmd) {
+ if (dev_priv->sdvo_regs[SDVO_I2C_OPCODE] == sdvo_cmd_names[i].cmd) {
ErrorF("(%s)", sdvo_cmd_names[i].name);
break;
}
@@ -127,10 +175,11 @@ I830SDVOWriteOutputs(I830SDVOPtr s, int num_out)
/* blast the output regs */
for (i = SDVO_I2C_ARG_0; i > SDVO_I2C_ARG_0 - num_out; i--) {
- sWriteByte(s, i, s->sdvo_regs[i]);
+ i830_sdvo_write_byte(output, i, dev_priv->sdvo_regs[i]);
}
/* blast the command reg */
- sWriteByte(s, SDVO_I2C_OPCODE, s->sdvo_regs[SDVO_I2C_OPCODE]);
+ i830_sdvo_write_byte(output, SDVO_I2C_OPCODE,
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE]);
}
static const char *cmd_status_names[] = {
@@ -144,29 +193,43 @@ static const char *cmd_status_names[] = {
};
static void
-I830SDVOReadInputRegs(I830SDVOPtr s)
+i830_sdvo_read_input_regs(I830OutputPtr output)
{
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
int i;
/* follow BIOS ordering */
- sReadByte(s, SDVO_I2C_CMD_STATUS, &s->sdvo_regs[SDVO_I2C_CMD_STATUS]);
-
- sReadByte(s, SDVO_I2C_RETURN_3, &s->sdvo_regs[SDVO_I2C_RETURN_3]);
- sReadByte(s, SDVO_I2C_RETURN_2, &s->sdvo_regs[SDVO_I2C_RETURN_2]);
- sReadByte(s, SDVO_I2C_RETURN_1, &s->sdvo_regs[SDVO_I2C_RETURN_1]);
- sReadByte(s, SDVO_I2C_RETURN_0, &s->sdvo_regs[SDVO_I2C_RETURN_0]);
- sReadByte(s, SDVO_I2C_RETURN_7, &s->sdvo_regs[SDVO_I2C_RETURN_7]);
- sReadByte(s, SDVO_I2C_RETURN_6, &s->sdvo_regs[SDVO_I2C_RETURN_6]);
- sReadByte(s, SDVO_I2C_RETURN_5, &s->sdvo_regs[SDVO_I2C_RETURN_5]);
- sReadByte(s, SDVO_I2C_RETURN_4, &s->sdvo_regs[SDVO_I2C_RETURN_4]);
+ i830_sdvo_read_byte(output, SDVO_I2C_CMD_STATUS,
+ &dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS]);
+
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_3,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_3]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_2,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_2]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_1,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_1]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_0,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_0]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_7,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_7]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_6,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_6]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_5,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_5]);
+ i830_sdvo_read_byte(output, SDVO_I2C_RETURN_4,
+ &dev_priv->sdvo_regs[SDVO_I2C_RETURN_4]);
ErrorF("SDVO: R: ");
for (i = SDVO_I2C_RETURN_0; i <= SDVO_I2C_RETURN_7; i++)
- ErrorF("%02X ", s->sdvo_regs[i]);
- if (s->sdvo_regs[SDVO_I2C_CMD_STATUS] <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
- ErrorF("(%s)", cmd_status_names[s->sdvo_regs[SDVO_I2C_CMD_STATUS]]);
- else
- ErrorF("(??? %d)", s->sdvo_regs[SDVO_I2C_CMD_STATUS]);
+ ErrorF("%02X ", dev_priv->sdvo_regs[i]);
+ if (dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS] <=
+ SDVO_CMD_STATUS_SCALING_NOT_SUPP)
+ {
+ ErrorF("(%s)",
+ cmd_status_names[dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS]]);
+ } else {
+ ErrorF("(??? %d)", dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS]);
+ }
ErrorF("\n");
}
@@ -186,355 +249,395 @@ i830_sdvo_get_pixel_multiplier(DisplayModePtr pMode)
* STOP. PROM access is terminated by accessing an internal register.
*/
static Bool
-I830SDVOSetControlBusSwitch(I830SDVOPtr s, CARD8 target)
+i830_sdvo_set_control_bus_switch(I830OutputPtr output, CARD8 target)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
- s->sdvo_regs[SDVO_I2C_ARG_0] = target;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_CONTROL_BUS_SWITCH;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = target;
- I830SDVOWriteOutputs(s, 1);
+ i830_sdvo_write_outputs(output, 1);
return TRUE;
}
static Bool
-I830SDVOSetTargetInput(I830SDVOPtr s, Bool target_1, Bool target_2)
+i830_sdvo_set_target_input(I830OutputPtr output, Bool target_1, Bool target_2)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_TARGET_INPUT;
- s->sdvo_regs[SDVO_I2C_ARG_0] = target_1;
- s->sdvo_regs[SDVO_I2C_ARG_1] = target_2;
+ memset(dev_priv->sdvo_regs, 0, 9);
- I830SDVOWriteOutputs(s, 2);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_TARGET_INPUT;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = target_1;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = target_2;
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 2);
+
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOGetTrainedInputs(I830SDVOPtr s)
+i830_sdvo_get_trained_inputs(I830OutputPtr output)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_TRAINED_INPUTS;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_TRAINED_INPUTS;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOGetActiveOutputs(I830SDVOPtr s, Bool *on_1, Bool *on_2)
+i830_sdvo_get_active_outputs(I830OutputPtr output, Bool *on_1, Bool *on_2)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_ACTIVE_OUTPUTS;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_ACTIVE_OUTPUTS;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
- *on_1 = s->sdvo_regs[SDVO_I2C_RETURN_0];
- *on_2 = s->sdvo_regs[SDVO_I2C_RETURN_1];
+ *on_1 = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0];
+ *on_2 = dev_priv->sdvo_regs[SDVO_I2C_RETURN_1];
return TRUE;
}
static Bool
-I830SDVOSetActiveOutputs(I830SDVOPtr s, Bool on_1, Bool on_2)
+i830_sdvo_set_active_outputs(I830OutputPtr output, Bool on_1, Bool on_2)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_ACTIVE_OUTPUTS;
- s->sdvo_regs[SDVO_I2C_ARG_0] = on_1;
- s->sdvo_regs[SDVO_I2C_ARG_1] = on_2;
+ memset(dev_priv->sdvo_regs, 0, 9);
- I830SDVOWriteOutputs(s, 2);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_ACTIVE_OUTPUTS;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = on_1;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = on_2;
+
+ i830_sdvo_write_outputs(output, 2);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOGetInputPixelClockRange(I830SDVOPtr s, CARD16 *clock_min,
- CARD16 *clock_max)
+i830_sdvo_get_input_pixel_clock_range(I830OutputPtr output, CARD16 *clock_min,
+ CARD16 *clock_max)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] =
+ SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
- *clock_min = s->sdvo_regs[SDVO_I2C_RETURN_0] |
- (s->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
- *clock_max = s->sdvo_regs[SDVO_I2C_RETURN_2] |
- (s->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
+ *clock_min = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
+ *clock_max = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
return TRUE;
}
static Bool
-I830SDVOSetTargetOutput(I830SDVOPtr s, Bool target_1, Bool target_2)
+i830_sdvo_set_target_output(I830OutputPtr output, Bool target_1, Bool target_2)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_TARGET_OUTPUT;
- s->sdvo_regs[SDVO_I2C_ARG_0] = target_1;
- s->sdvo_regs[SDVO_I2C_ARG_1] = target_2;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_TARGET_OUTPUT;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = target_1;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = target_2;
- I830SDVOWriteOutputs(s, 2);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 2);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
/* Fetches either input or output timings to *dtd, depending on cmd. */
static Bool
-I830SDVOGetTimings(I830SDVOPtr s, i830_sdvo_dtd *dtd, CARD8 cmd)
+i830_sdvo_get_timings(I830OutputPtr output, i830_sdvo_dtd *dtd, CARD8 cmd)
{
- memset(s->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
-
- dtd->clock = s->sdvo_regs[SDVO_I2C_RETURN_0] |
- (s->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
- dtd->h_active = s->sdvo_regs[SDVO_I2C_RETURN_2];
- dtd->h_blank = s->sdvo_regs[SDVO_I2C_RETURN_3];
- dtd->h_high = s->sdvo_regs[SDVO_I2C_RETURN_4];
- dtd->v_active = s->sdvo_regs[SDVO_I2C_RETURN_5];
- dtd->v_blank = s->sdvo_regs[SDVO_I2C_RETURN_6];
- dtd->v_high = s->sdvo_regs[SDVO_I2C_RETURN_7];
-
- memset(s->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd + 1;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
-
- dtd->h_sync_off = s->sdvo_regs[SDVO_I2C_RETURN_0];
- dtd->h_sync_width = s->sdvo_regs[SDVO_I2C_RETURN_1];
- dtd->v_sync_off_width = s->sdvo_regs[SDVO_I2C_RETURN_2];
- dtd->sync_off_width_high = s->sdvo_regs[SDVO_I2C_RETURN_3];
- dtd->dtd_flags = s->sdvo_regs[SDVO_I2C_RETURN_4];
- dtd->sdvo_flags = s->sdvo_regs[SDVO_I2C_RETURN_5];
- dtd->v_sync_off_high = s->sdvo_regs[SDVO_I2C_RETURN_6];
- dtd->reserved = s->sdvo_regs[SDVO_I2C_RETURN_7];
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
+
+ dtd->clock = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
+ dtd->h_active = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2];
+ dtd->h_blank = dev_priv->sdvo_regs[SDVO_I2C_RETURN_3];
+ dtd->h_high = dev_priv->sdvo_regs[SDVO_I2C_RETURN_4];
+ dtd->v_active = dev_priv->sdvo_regs[SDVO_I2C_RETURN_5];
+ dtd->v_blank = dev_priv->sdvo_regs[SDVO_I2C_RETURN_6];
+ dtd->v_high = dev_priv->sdvo_regs[SDVO_I2C_RETURN_7];
+
+ memset(dev_priv->sdvo_regs, 0, 9);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd + 1;
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
+
+ dtd->h_sync_off = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0];
+ dtd->h_sync_width = dev_priv->sdvo_regs[SDVO_I2C_RETURN_1];
+ dtd->v_sync_off_width = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2];
+ dtd->sync_off_width_high = dev_priv->sdvo_regs[SDVO_I2C_RETURN_3];
+ dtd->dtd_flags = dev_priv->sdvo_regs[SDVO_I2C_RETURN_4];
+ dtd->sdvo_flags = dev_priv->sdvo_regs[SDVO_I2C_RETURN_5];
+ dtd->v_sync_off_high = dev_priv->sdvo_regs[SDVO_I2C_RETURN_6];
+ dtd->reserved = dev_priv->sdvo_regs[SDVO_I2C_RETURN_7];
return TRUE;
}
/* Sets either input or output timings to *dtd, depending on cmd. */
static Bool
-I830SDVOSetTimings(I830SDVOPtr s, i830_sdvo_dtd *dtd, CARD8 cmd)
+i830_sdvo_set_timings(I830OutputPtr output, i830_sdvo_dtd *dtd, CARD8 cmd)
{
- memset(s->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
- s->sdvo_regs[SDVO_I2C_ARG_0] = dtd->clock & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_1] = dtd->clock >> 8;
- s->sdvo_regs[SDVO_I2C_ARG_2] = dtd->h_active;
- s->sdvo_regs[SDVO_I2C_ARG_3] = dtd->h_blank;
- s->sdvo_regs[SDVO_I2C_ARG_4] = dtd->h_high;
- s->sdvo_regs[SDVO_I2C_ARG_5] = dtd->v_active;
- s->sdvo_regs[SDVO_I2C_ARG_6] = dtd->v_blank;
- s->sdvo_regs[SDVO_I2C_ARG_7] = dtd->v_high;
- I830SDVOWriteOutputs(s, 8);
- I830SDVOReadInputRegs(s);
-
- memset(s->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd + 1;
- s->sdvo_regs[SDVO_I2C_ARG_0] = dtd->h_sync_off;
- s->sdvo_regs[SDVO_I2C_ARG_1] = dtd->h_sync_width;
- s->sdvo_regs[SDVO_I2C_ARG_2] = dtd->v_sync_off_width;
- s->sdvo_regs[SDVO_I2C_ARG_3] = dtd->sync_off_width_high;
- s->sdvo_regs[SDVO_I2C_ARG_4] = dtd->dtd_flags;
- s->sdvo_regs[SDVO_I2C_ARG_5] = dtd->sdvo_flags;
- s->sdvo_regs[SDVO_I2C_ARG_6] = dtd->v_sync_off_high;
- s->sdvo_regs[SDVO_I2C_ARG_7] = dtd->reserved;
- I830SDVOWriteOutputs(s, 7);
- I830SDVOReadInputRegs(s);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = dtd->clock & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = dtd->clock >> 8;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_2] = dtd->h_active;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_3] = dtd->h_blank;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_4] = dtd->h_high;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_5] = dtd->v_active;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_6] = dtd->v_blank;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_7] = dtd->v_high;
+ i830_sdvo_write_outputs(output, 8);
+ i830_sdvo_read_input_regs(output);
+
+ memset(dev_priv->sdvo_regs, 0, 9);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd + 1;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = dtd->h_sync_off;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = dtd->h_sync_width;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_2] = dtd->v_sync_off_width;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_3] = dtd->sync_off_width_high;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_4] = dtd->dtd_flags;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_5] = dtd->sdvo_flags;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_6] = dtd->v_sync_off_high;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_7] = dtd->reserved;
+ i830_sdvo_write_outputs(output, 7);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOSetTimingsPart1(I830SDVOPtr s, char cmd, CARD16 clock, CARD16 magic1,
- CARD16 magic2, CARD16 magic3)
+i830_sdvo_set_timings_part1(I830OutputPtr output, char cmd, CARD16 clock,
+ CARD16 magic1, CARD16 magic2, CARD16 magic3)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
+ memset(dev_priv->sdvo_regs, 0, 9);
+
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
/* set clock regs */
- s->sdvo_regs[SDVO_I2C_ARG_0] = clock & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_1] = (clock >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_2] = magic3 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_3] = (magic3 >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_4] = magic2 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_5] = (magic2 >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_6] = magic1 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_7] = (magic1 >> 8) & 0xff;
-
- I830SDVOWriteOutputs(s, 8);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = clock & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = (clock >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_2] = magic3 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_3] = (magic3 >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_4] = magic2 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_5] = (magic2 >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_6] = magic1 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_7] = (magic1 >> 8) & 0xff;
+
+ i830_sdvo_write_outputs(output, 8);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOSetInputTimingsPart1(I830SDVOPtr s, CARD16 clock,
- CARD16 magic1, CARD16 magic2, CARD16 magic3)
+i830_sdvo_set_input_timings_part1(I830OutputPtr output, CARD16 clock,
+ CARD16 magic1, CARD16 magic2, CARD16 magic3)
{
- return I830SDVOSetTimingsPart1(s, SDVO_CMD_SET_INPUT_TIMINGS_PART1,
- clock, magic1, magic2, magic3);
+ return i830_sdvo_set_timings_part1(output,
+ SDVO_CMD_SET_INPUT_TIMINGS_PART1,
+ clock, magic1, magic2, magic3);
}
static Bool
-I830SDVOSetOutputTimingsPart1(I830SDVOPtr s, CARD16 clock, CARD16 magic1,
- CARD16 magic2, CARD16 magic3)
+i830_sdvo_set_output_timings_part1(I830OutputPtr output, CARD16 clock,
+ CARD16 magic1, CARD16 magic2, CARD16 magic3)
{
- return I830SDVOSetTimingsPart1(s, SDVO_CMD_SET_OUTPUT_TIMINGS_PART1,
- clock, magic1, magic2, magic3);
+ return i830_sdvo_set_timings_part1(output,
+ SDVO_CMD_SET_OUTPUT_TIMINGS_PART1,
+ clock, magic1, magic2, magic3);
}
static Bool
-I830SDVOSetTimingsPart2(I830SDVOPtr s, CARD8 cmd, CARD16 magic4, CARD16 magic5,
- CARD16 magic6)
+i830_sdvo_set_timings_part2(I830OutputPtr output, CARD8 cmd,
+ CARD16 magic4, CARD16 magic5, CARD16 magic6)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = cmd;
/* set clock regs */
- s->sdvo_regs[SDVO_I2C_ARG_0] = magic4 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_1] = (magic4 >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_2] = magic5 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_3] = (magic5 >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_4] = magic6 & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_5] = (magic6 >> 8) & 0xff;
-
- I830SDVOWriteOutputs(s, 8);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = magic4 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = (magic4 >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_2] = magic5 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_3] = (magic5 >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_4] = magic6 & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_5] = (magic6 >> 8) & 0xff;
+
+ i830_sdvo_write_outputs(output, 8);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOSetInputTimingsPart2(I830SDVOPtr s, CARD16 magic4, CARD16 magic5,
- CARD16 magic6)
+i830_sdvo_set_input_timings_part2(I830OutputPtr output,
+ CARD16 magic4, CARD16 magic5, CARD16 magic6)
{
- return I830SDVOSetTimingsPart2(s, SDVO_CMD_SET_INPUT_TIMINGS_PART2, magic4,
- magic5, magic6);
+ return i830_sdvo_set_timings_part2(output,
+ SDVO_CMD_SET_INPUT_TIMINGS_PART2,
+ magic4, magic5, magic6);
}
static Bool
-I830SDVOSetOutputTimingsPart2(I830SDVOPtr s, CARD16 magic4, CARD16 magic5,
- CARD16 magic6)
+i830_sdvo_set_output_timings_part2(I830OutputPtr output,
+ CARD16 magic4, CARD16 magic5, CARD16 magic6)
{
- return I830SDVOSetTimingsPart2(s, SDVO_CMD_SET_OUTPUT_TIMINGS_PART2, magic4,
- magic5, magic6);
+ return i830_sdvo_set_timings_part2(output,
+ SDVO_CMD_SET_OUTPUT_TIMINGS_PART2,
+ magic4, magic5, magic6);
}
static Bool
-I830SDVOCreatePreferredInputTiming(I830SDVOPtr s, CARD16 clock, CARD16 width,
- CARD16 height)
+i830_sdvo_create_preferred_input_timing(I830OutputPtr output, CARD16 clock,
+ CARD16 width, CARD16 height)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING;
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_ARG_0] = clock & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_1] = (clock >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_2] = width & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_3] = (width >> 8) & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_4] = height & 0xff;
- s->sdvo_regs[SDVO_I2C_ARG_5] = (height >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] =
+ SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING;
- I830SDVOWriteOutputs(s, 7);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = clock & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_1] = (clock >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_2] = width & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_3] = (width >> 8) & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_4] = height & 0xff;
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_5] = (height >> 8) & 0xff;
+
+ i830_sdvo_write_outputs(output, 7);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static Bool
-I830SDVOGetPreferredInputTimingPart1(I830SDVOPtr s)
+i830_sdvo_get_preferred_input_timing_part1(I830OutputPtr output)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] =
+ SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
- curr_table[0] = s->sdvo_regs[SDVO_I2C_RETURN_6] |
- (s->sdvo_regs[SDVO_I2C_RETURN_7] << 8);
- curr_table[1] = s->sdvo_regs[SDVO_I2C_RETURN_4] |
- (s->sdvo_regs[SDVO_I2C_RETURN_5] << 8);
- curr_table[2] = s->sdvo_regs[SDVO_I2C_RETURN_2] |
- (s->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
+ curr_table[0] = dev_priv->sdvo_regs[SDVO_I2C_RETURN_6] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_7] << 8);
+ curr_table[1] = dev_priv->sdvo_regs[SDVO_I2C_RETURN_4] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_5] << 8);
+ curr_table[2] = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
return TRUE;
}
static Bool
-I830SDVOGetPreferredInputTimingPart2(I830SDVOPtr s)
+i830_sdvo_get_preferred_input_timing_part2(I830OutputPtr output)
{
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2;
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] =
+ SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
- curr_table[3] = s->sdvo_regs[SDVO_I2C_RETURN_0] |
- (s->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
- curr_table[4] = s->sdvo_regs[SDVO_I2C_RETURN_2] |
- (s->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
+ curr_table[3] = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_1] << 8);
+ curr_table[4] = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2] |
+ (dev_priv->sdvo_regs[SDVO_I2C_RETURN_3] << 8);
curr_table[5] = 0x1e;
return TRUE;
}
static int
-I830SDVOGetClockRateMult(I830SDVOPtr s)
+i830_sdvo_get_clock_rate_mult(I830OutputPtr output)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_CLOCK_RATE_MULT;
+ memset(dev_priv->sdvo_regs, 0, 9);
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_CLOCK_RATE_MULT;
- if (s->sdvo_regs[SDVO_I2C_CMD_STATUS] != SDVO_CMD_STATUS_SUCCESS) {
- xf86DrvMsg(s->d.pI2CBus->scrnIndex, X_ERROR,
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
+
+ if (dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS] != SDVO_CMD_STATUS_SUCCESS) {
+ xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_ERROR,
"Couldn't get SDVO clock rate multiplier\n");
return SDVO_CLOCK_RATE_MULT_1X;
} else {
- xf86DrvMsg(s->d.pI2CBus->scrnIndex, X_INFO,
+ xf86DrvMsg(dev_priv->d.pI2CBus->scrnIndex, X_INFO,
"Current clock rate multiplier: %d\n",
- s->sdvo_regs[SDVO_I2C_RETURN_0]);
+ dev_priv->sdvo_regs[SDVO_I2C_RETURN_0]);
}
- return s->sdvo_regs[SDVO_I2C_RETURN_0];
+ return dev_priv->sdvo_regs[SDVO_I2C_RETURN_0];
}
static Bool
-I830SDVOSetClockRateMult(I830SDVOPtr s, CARD8 val)
+i830_sdvo_set_clock_rate_mult(I830OutputPtr output, CARD8 val)
{
- memset(s->sdvo_regs, 0, 9);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_CLOCK_RATE_MULT;
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_SET_CLOCK_RATE_MULT;
- s->sdvo_regs[SDVO_I2C_ARG_0] = val;
- I830SDVOWriteOutputs(s, 1);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_ARG_0] = val;
+ i830_sdvo_write_outputs(output, 1);
+ i830_sdvo_read_input_regs(output);
return TRUE;
}
static void
i830_sdvo_pre_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
- DisplayModePtr mode)
+ DisplayModePtr mode)
{
I830Ptr pI830 = I830PTR(pScrn);
CARD16 clock = mode->Clock/10, width = mode->CrtcHDisplay;
@@ -546,7 +649,6 @@ i830_sdvo_pre_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
CARD8 c17a[8];
CARD16 out_timings[6];
Bool out1, out2;
- I830SDVOPtr s = output->sdvo_drv;
/* do some mode translations */
h_blank_len = mode->CrtcHBlankEnd - mode->CrtcHBlankStart;
@@ -586,42 +688,44 @@ i830_sdvo_pre_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
out_timings[4] = c17a[5] | ((short)c17a[4] << 8);
out_timings[5] = c17a[3] | ((short)c17a[2] << 8);
- I830SDVOSetTargetInput(s, FALSE, FALSE);
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
- I830SDVOGetActiveOutputs(s, &out1, &out2);
+ i830_sdvo_get_active_outputs(output, &out1, &out2);
- I830SDVOSetActiveOutputs(s, FALSE, FALSE);
+ i830_sdvo_set_active_outputs(output, FALSE, FALSE);
- I830SDVOSetTargetOutput(s, TRUE, FALSE);
- I830SDVOSetOutputTimingsPart1(s, clock, out_timings[0], out_timings[1],
- out_timings[2]);
- I830SDVOSetOutputTimingsPart2(s, out_timings[3], out_timings[4],
- out_timings[5]);
+ i830_sdvo_set_target_output(output, TRUE, FALSE);
+ i830_sdvo_set_output_timings_part1(output, clock,
+ out_timings[0], out_timings[1],
+ out_timings[2]);
+ i830_sdvo_set_output_timings_part2(output, out_timings[3], out_timings[4],
+ out_timings[5]);
- I830SDVOSetTargetInput (s, FALSE, FALSE);
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
- I830SDVOCreatePreferredInputTiming(s, clock, width, height);
- I830SDVOGetPreferredInputTimingPart1(s);
- I830SDVOGetPreferredInputTimingPart2(s);
+ i830_sdvo_create_preferred_input_timing(output, clock, width, height);
+ i830_sdvo_get_preferred_input_timing_part1(output);
+ i830_sdvo_get_preferred_input_timing_part2(output);
- I830SDVOSetTargetInput (s, FALSE, FALSE);
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
- I830SDVOSetInputTimingsPart1(s, clock, curr_table[0], curr_table[1],
- curr_table[2]);
- I830SDVOSetInputTimingsPart2(s, curr_table[3], curr_table[4],
- out_timings[5]);
+ i830_sdvo_set_input_timings_part1(output, clock,
+ curr_table[0], curr_table[1],
+ curr_table[2]);
+ i830_sdvo_set_input_timings_part2(output, curr_table[3], curr_table[4],
+ out_timings[5]);
- I830SDVOSetTargetInput (s, FALSE, FALSE);
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
switch (i830_sdvo_get_pixel_multiplier(mode)) {
case 1:
- I830SDVOSetClockRateMult(s, SDVO_CLOCK_RATE_MULT_1X);
+ i830_sdvo_set_clock_rate_mult(output, SDVO_CLOCK_RATE_MULT_1X);
break;
case 2:
- I830SDVOSetClockRateMult(s, SDVO_CLOCK_RATE_MULT_2X);
+ i830_sdvo_set_clock_rate_mult(output, SDVO_CLOCK_RATE_MULT_2X);
break;
case 4:
- I830SDVOSetClockRateMult(s, SDVO_CLOCK_RATE_MULT_4X);
+ i830_sdvo_set_clock_rate_mult(output, SDVO_CLOCK_RATE_MULT_4X);
break;
}
@@ -634,31 +738,31 @@ i830_sdvo_post_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
DisplayModePtr mode)
{
I830Ptr pI830 = I830PTR(pScrn);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
Bool ret = TRUE;
Bool out1, out2;
CARD32 dpll, sdvob, sdvoc;
int dpll_reg = (output->pipe == 0) ? DPLL_A : DPLL_B;
int sdvo_pixel_multiply;
- I830SDVOPtr s = output->sdvo_drv;
/* the BIOS writes out 6 commands post mode set */
/* two 03s, 04 05, 10, 1d */
/* these contain the height and mode clock / 10 by the looks of it */
- I830SDVOGetTrainedInputs(s);
+ i830_sdvo_get_trained_inputs(output);
/* THIS IS A DIRTY HACK - sometimes for some reason on startup
* the BIOS doesn't find my DVI monitor -
* without this hack the driver doesn't work.. this causes the modesetting
* to be re-run
*/
- if (s->sdvo_regs[SDVO_I2C_RETURN_0] != 0x1) {
+ if (dev_priv->sdvo_regs[SDVO_I2C_RETURN_0] != 0x1) {
ret = FALSE;
}
- I830SDVOGetActiveOutputs (s, &out1, &out2);
- I830SDVOSetActiveOutputs(s, TRUE, FALSE);
- I830SDVOSetTargetInput (s, FALSE, FALSE);
+ i830_sdvo_get_active_outputs(output, &out1, &out2);
+ i830_sdvo_set_active_outputs(output, TRUE, FALSE);
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
/* Set the SDVO control regs. */
sdvob = INREG(SDVOB) & SDVOB_PRESERVE_MASK;
@@ -686,13 +790,12 @@ static void
i830_sdvo_dpms(ScrnInfoPtr pScrn, I830OutputPtr output, int mode)
{
I830Ptr pI830 = I830PTR(pScrn);
- I830SDVOPtr sdvo = output->sdvo_drv;
if (mode != DPMSModeOn) {
- I830SDVOSetActiveOutputs(sdvo, FALSE, FALSE);
+ i830_sdvo_set_active_outputs(output, FALSE, FALSE);
OUTREG(SDVOB, INREG(SDVOB) & ~SDVO_ENABLE);
} else {
- I830SDVOSetActiveOutputs(sdvo, TRUE, FALSE);
+ i830_sdvo_set_active_outputs(output, TRUE, FALSE);
OUTREG(SDVOB, INREG(SDVOB) | SDVO_ENABLE);
}
}
@@ -701,115 +804,118 @@ static void
i830_sdvo_save(ScrnInfoPtr pScrn, I830OutputPtr output)
{
I830Ptr pI830 = I830PTR(pScrn);
- I830SDVOPtr sdvo = output->sdvo_drv;
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- sdvo->save_sdvo_mult = I830SDVOGetClockRateMult(sdvo);
- I830SDVOGetActiveOutputs(sdvo, &sdvo->save_sdvo_active_1,
- &sdvo->save_sdvo_active_2);
+ dev_priv->save_sdvo_mult = i830_sdvo_get_clock_rate_mult(output);
+ i830_sdvo_get_active_outputs(output, &dev_priv->save_sdvo_active_1,
+ &dev_priv->save_sdvo_active_2);
- if (sdvo->caps.caps & 0x1) {
- I830SDVOSetTargetInput(sdvo, FALSE, FALSE);
- I830SDVOGetTimings(sdvo, &sdvo->save_input_dtd_1,
- SDVO_CMD_GET_INPUT_TIMINGS_PART1);
+ if (dev_priv->caps.caps & 0x1) {
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
+ i830_sdvo_get_timings(output, &dev_priv->save_input_dtd_1,
+ SDVO_CMD_GET_INPUT_TIMINGS_PART1);
}
- if (sdvo->caps.caps & 0x2) {
- I830SDVOSetTargetInput(sdvo, FALSE, TRUE);
- I830SDVOGetTimings(sdvo, &sdvo->save_input_dtd_2,
- SDVO_CMD_GET_INPUT_TIMINGS_PART1);
+ if (dev_priv->caps.caps & 0x2) {
+ i830_sdvo_set_target_input(output, FALSE, TRUE);
+ i830_sdvo_get_timings(output, &dev_priv->save_input_dtd_2,
+ SDVO_CMD_GET_INPUT_TIMINGS_PART1);
}
- if (sdvo->caps.output_0_supported) {
- I830SDVOSetTargetOutput(sdvo, TRUE, FALSE);
- I830SDVOGetTimings(sdvo, &sdvo->save_output_dtd_1,
- SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
+ if (dev_priv->caps.output_0_supported) {
+ i830_sdvo_set_target_output(output, TRUE, FALSE);
+ i830_sdvo_get_timings(output, &dev_priv->save_output_dtd_1,
+ SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
}
- if (sdvo->caps.output_1_supported) {
- I830SDVOSetTargetOutput(sdvo, FALSE, TRUE);
- I830SDVOGetTimings(sdvo, &sdvo->save_output_dtd_2,
- SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
+ if (dev_priv->caps.output_1_supported) {
+ i830_sdvo_set_target_output(output, FALSE, TRUE);
+ i830_sdvo_get_timings(output, &dev_priv->save_output_dtd_2,
+ SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
}
- sdvo->save_SDVOX = INREG(sdvo->output_device);
+ dev_priv->save_SDVOX = INREG(dev_priv->output_device);
}
static void
i830_sdvo_restore(ScrnInfoPtr pScrn, I830OutputPtr output)
{
I830Ptr pI830 = I830PTR(pScrn);
- I830SDVOPtr sdvo = output->sdvo_drv;
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- if (sdvo->caps.caps & 0x1) {
- I830SDVOSetTargetInput(sdvo, FALSE, FALSE);
- I830SDVOSetTimings(sdvo, &sdvo->save_input_dtd_1,
- SDVO_CMD_SET_INPUT_TIMINGS_PART1);
+ if (dev_priv->caps.caps & 0x1) {
+ i830_sdvo_set_target_input(output, FALSE, FALSE);
+ i830_sdvo_set_timings(output, &dev_priv->save_input_dtd_1,
+ SDVO_CMD_SET_INPUT_TIMINGS_PART1);
}
- if (sdvo->caps.caps & 0x2) {
- I830SDVOSetTargetInput(sdvo, FALSE, TRUE);
- I830SDVOSetTimings(sdvo, &sdvo->save_input_dtd_2,
- SDVO_CMD_SET_INPUT_TIMINGS_PART1);
+ if (dev_priv->caps.caps & 0x2) {
+ i830_sdvo_set_target_input(output, FALSE, TRUE);
+ i830_sdvo_set_timings(output, &dev_priv->save_input_dtd_2,
+ SDVO_CMD_SET_INPUT_TIMINGS_PART1);
}
- if (sdvo->caps.output_0_supported) {
- I830SDVOSetTargetOutput(sdvo, TRUE, FALSE);
- I830SDVOSetTimings(sdvo, &sdvo->save_output_dtd_1,
- SDVO_CMD_SET_OUTPUT_TIMINGS_PART1);
+ if (dev_priv->caps.output_0_supported) {
+ i830_sdvo_set_target_output(output, TRUE, FALSE);
+ i830_sdvo_set_timings(output, &dev_priv->save_output_dtd_1,
+ SDVO_CMD_SET_OUTPUT_TIMINGS_PART1);
}
- if (sdvo->caps.output_1_supported) {
- I830SDVOSetTargetOutput(sdvo, FALSE, TRUE);
- I830SDVOSetTimings(sdvo, &sdvo->save_output_dtd_2,
- SDVO_CMD_SET_OUTPUT_TIMINGS_PART1);
+ if (dev_priv->caps.output_1_supported) {
+ i830_sdvo_set_target_output(output, FALSE, TRUE);
+ i830_sdvo_set_timings(output, &dev_priv->save_output_dtd_2,
+ SDVO_CMD_SET_OUTPUT_TIMINGS_PART1);
}
- I830SDVOSetClockRateMult(sdvo, sdvo->save_sdvo_mult);
+ i830_sdvo_set_clock_rate_mult(output, dev_priv->save_sdvo_mult);
- OUTREG(sdvo->output_device, sdvo->save_SDVOX);
+ OUTREG(dev_priv->output_device, dev_priv->save_SDVOX);
- I830SDVOSetActiveOutputs(sdvo, sdvo->save_sdvo_active_1,
- sdvo->save_sdvo_active_2);
+ i830_sdvo_set_active_outputs(output, dev_priv->save_sdvo_active_1,
+ dev_priv->save_sdvo_active_2);
}
static int
i830_sdvo_mode_valid(ScrnInfoPtr pScrn, I830OutputPtr output,
DisplayModePtr pMode)
{
- I830SDVOPtr sdvo = output->sdvo_drv;
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- if (sdvo->pixel_clock_min > pMode->Clock)
+ if (dev_priv->pixel_clock_min > pMode->Clock)
return MODE_CLOCK_HIGH;
- if (sdvo->pixel_clock_max < pMode->Clock)
+ if (dev_priv->pixel_clock_max < pMode->Clock)
return MODE_CLOCK_LOW;
return MODE_OK;
}
static void
-I830SDVOGetCapabilities(I830SDVOPtr s, i830_sdvo_caps *caps)
+i830_sdvo_get_capabilities(I830OutputPtr output, i830_sdvo_caps *caps)
{
- memset(s->sdvo_regs, 0, 9);
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_DEVICE_CAPS;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
-
- caps->vendor_id = s->sdvo_regs[SDVO_I2C_RETURN_0];
- caps->device_id = s->sdvo_regs[SDVO_I2C_RETURN_1];
- caps->device_rev_id = s->sdvo_regs[SDVO_I2C_RETURN_2];
- caps->sdvo_version_major = s->sdvo_regs[SDVO_I2C_RETURN_3];
- caps->sdvo_version_minor = s->sdvo_regs[SDVO_I2C_RETURN_4];
- caps->caps = s->sdvo_regs[SDVO_I2C_RETURN_5];
- caps->output_0_supported = s->sdvo_regs[SDVO_I2C_RETURN_6];
- caps->output_1_supported = s->sdvo_regs[SDVO_I2C_RETURN_7];
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, 9);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_DEVICE_CAPS;
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
+
+ caps->vendor_id = dev_priv->sdvo_regs[SDVO_I2C_RETURN_0];
+ caps->device_id = dev_priv->sdvo_regs[SDVO_I2C_RETURN_1];
+ caps->device_rev_id = dev_priv->sdvo_regs[SDVO_I2C_RETURN_2];
+ caps->sdvo_version_major = dev_priv->sdvo_regs[SDVO_I2C_RETURN_3];
+ caps->sdvo_version_minor = dev_priv->sdvo_regs[SDVO_I2C_RETURN_4];
+ caps->caps = dev_priv->sdvo_regs[SDVO_I2C_RETURN_5];
+ caps->output_0_supported = dev_priv->sdvo_regs[SDVO_I2C_RETURN_6];
+ caps->output_1_supported = dev_priv->sdvo_regs[SDVO_I2C_RETURN_7];
}
+/** Forces the device over to the real I2C bus and uses its GetByte */
static Bool
-I830SDVODDCI2CGetByte(I2CDevPtr d, I2CByte *data, Bool last)
+i830_sdvo_ddc_i2c_get_byte(I2CDevPtr d, I2CByte *data, Bool last)
{
- I830SDVOPtr sdvo = d->pI2CBus->DriverPrivate.ptr;
- I2CBusPtr i2cbus = sdvo->d.pI2CBus, savebus;
+ I830OutputPtr output = d->pI2CBus->DriverPrivate.ptr;
+ I2CBusPtr i2cbus = output->pI2CBus, savebus;
Bool ret;
savebus = d->pI2CBus;
@@ -820,11 +926,12 @@ I830SDVODDCI2CGetByte(I2CDevPtr d, I2CByte *data, Bool last)
return ret;
}
+/** Forces the device over to the real I2C bus and uses its PutByte */
static Bool
-I830SDVODDCI2CPutByte(I2CDevPtr d, I2CByte c)
+i830_sdvo_ddc_i2c_put_byte(I2CDevPtr d, I2CByte c)
{
- I830SDVOPtr sdvo = d->pI2CBus->DriverPrivate.ptr;
- I2CBusPtr i2cbus = sdvo->d.pI2CBus, savebus;
+ I830OutputPtr output = d->pI2CBus->DriverPrivate.ptr;
+ I2CBusPtr i2cbus = output->pI2CBus, savebus;
Bool ret;
savebus = d->pI2CBus;
@@ -835,21 +942,29 @@ I830SDVODDCI2CPutByte(I2CDevPtr d, I2CByte c)
return ret;
}
+/**
+ * Sets the control bus over to DDC before sending the start on the real I2C
+ * bus.
+ *
+ * The control bus will flip back at the stop following the start executed
+ * here.
+ */
static Bool
-I830SDVODDCI2CStart(I2CBusPtr b, int timeout)
+i830_sdvo_ddc_i2c_start(I2CBusPtr b, int timeout)
{
- I830SDVOPtr sdvo = b->DriverPrivate.ptr;
- I2CBusPtr i2cbus = sdvo->d.pI2CBus;
+ I830OutputPtr output = b->DriverPrivate.ptr;
+ I2CBusPtr i2cbus = output->pI2CBus;
- I830SDVOSetControlBusSwitch(sdvo, SDVO_CONTROL_BUS_DDC2);
+ i830_sdvo_set_control_bus_switch(output, SDVO_CONTROL_BUS_DDC2);
return i2cbus->I2CStart(i2cbus, timeout);
}
+/** Forces the device over to the real SDVO bus and sends a stop to it. */
static void
-I830SDVODDCI2CStop(I2CDevPtr d)
+i830_sdvo_ddc_i2c_stop(I2CDevPtr d)
{
- I830SDVOPtr sdvo = d->pI2CBus->DriverPrivate.ptr;
- I2CBusPtr i2cbus = sdvo->d.pI2CBus, savebus;
+ I830OutputPtr output = d->pI2CBus->DriverPrivate.ptr;
+ I2CBusPtr i2cbus = output->pI2CBus, savebus;
savebus = d->pI2CBus;
d->pI2CBus = i2cbus;
@@ -857,11 +972,15 @@ I830SDVODDCI2CStop(I2CDevPtr d)
d->pI2CBus = savebus;
}
-/* It's a shame that xf86i2c.c's I2CAddress() doesn't use the bus's pointers,
- * so it's useless to us here.
+/**
+ * Mirrors xf86i2c I2CAddress, using the bus's (wrapped) methods rather than
+ * the default methods.
+ *
+ * This ensures that our start commands always get wrapped with control bus
+ * switches. xf86i2c should probably be fixed to do this.
*/
static Bool
-I830SDVODDCI2CAddress(I2CDevPtr d, I2CSlaveAddr addr)
+i830_sdvo_ddc_i2c_address(I2CDevPtr d, I2CSlaveAddr addr)
{
if (d->pI2CBus->I2CStart(d->pI2CBus, d->StartTimeout)) {
if (d->pI2CBus->I2CPutByte(d, addr & 0xFF)) {
@@ -880,50 +999,54 @@ I830SDVODDCI2CAddress(I2CDevPtr d, I2CSlaveAddr addr)
}
static void
-I830DumpSDVOCmd (I830SDVOPtr s, int opcode)
+i830_sdvo_dump_cmd(I830OutputPtr output, int opcode)
{
- memset (s->sdvo_regs, 0, sizeof (s->sdvo_regs));
- s->sdvo_regs[SDVO_I2C_OPCODE] = opcode;
- I830SDVOWriteOutputs (s, 0);
- I830SDVOReadInputRegs (s);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ memset(dev_priv->sdvo_regs, 0, sizeof(dev_priv->sdvo_regs));
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = opcode;
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
}
static void
-I830DumpOneSDVO (I830SDVOPtr s)
+i830_sdvo_dump_device(I830OutputPtr output)
{
- ErrorF ("Dump %s\n", s->d.DevName);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_DEVICE_CAPS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_FIRMWARE_REV);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_TRAINED_INPUTS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_ACTIVE_OUTPUTS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_IN_OUT_MAP);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_ATTACHED_DISPLAYS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_HOT_PLUG_SUPPORT);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_ACTIVE_HOT_PLUG);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_INTR_EVENT_SOURCE);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_INPUT_TIMINGS_PART1);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_INPUT_TIMINGS_PART2);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_OUTPUT_TIMINGS_PART2);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_CLOCK_RATE_MULT);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_SUPPORTED_TV_FORMATS);
- I830DumpSDVOCmd (s, SDVO_CMD_GET_TV_FORMAT);
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
+
+ ErrorF("Dump %s\n", dev_priv->d.DevName);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_DEVICE_CAPS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_FIRMWARE_REV);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_TRAINED_INPUTS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_ACTIVE_OUTPUTS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_IN_OUT_MAP);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_ATTACHED_DISPLAYS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_HOT_PLUG_SUPPORT);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_ACTIVE_HOT_PLUG);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_INTR_EVENT_SOURCE);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_INPUT_TIMINGS_PART1);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_INPUT_TIMINGS_PART2);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_OUTPUT_TIMINGS_PART1);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_OUTPUT_TIMINGS_PART2);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_CLOCK_RATE_MULT);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_SUPPORTED_TV_FORMATS);
+ i830_sdvo_dump_cmd(output, SDVO_CMD_GET_TV_FORMAT);
}
-
+
void
-I830DumpSDVO (ScrnInfoPtr pScrn)
+i830_sdvo_dump(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
int i;
for (i = 0; i < pI830->num_outputs; i++) {
if (pI830->output[i].type == I830_OUTPUT_SDVO)
- I830DumpOneSDVO (pI830->output[i].sdvo_drv);
+ i830_sdvo_dump_device(&pI830->output[i]);
}
}
@@ -937,73 +1060,74 @@ I830DumpSDVO (ScrnInfoPtr pScrn)
* Takes 14ms on average on my i945G.
*/
Bool
-I830DetectSDVODisplays(ScrnInfoPtr pScrn, int output_index)
+i830_sdvo_detect_displays(ScrnInfoPtr pScrn, I830OutputPtr output)
{
- I830Ptr pI830 = I830PTR(pScrn);
- I830SDVOPtr s = pI830->output[output_index].sdvo_drv;
+ struct i830_sdvo_priv *dev_priv = output->dev_priv;
- s->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_ATTACHED_DISPLAYS;
- I830SDVOWriteOutputs(s, 0);
- I830SDVOReadInputRegs(s);
+ dev_priv->sdvo_regs[SDVO_I2C_OPCODE] = SDVO_CMD_GET_ATTACHED_DISPLAYS;
+ i830_sdvo_write_outputs(output, 0);
+ i830_sdvo_read_input_regs(output);
- if (s->sdvo_regs[SDVO_I2C_CMD_STATUS] != SDVO_CMD_STATUS_SUCCESS)
+ if (dev_priv->sdvo_regs[SDVO_I2C_CMD_STATUS] != SDVO_CMD_STATUS_SUCCESS)
return FALSE;
- return (s->sdvo_regs[SDVO_I2C_RETURN_0] != 0 ||
- s->sdvo_regs[SDVO_I2C_RETURN_1] != 0);
+ return (dev_priv->sdvo_regs[SDVO_I2C_RETURN_0] != 0 ||
+ dev_priv->sdvo_regs[SDVO_I2C_RETURN_1] != 0);
}
void
i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
{
I830Ptr pI830 = I830PTR(pScrn);
- I830SDVOPtr sdvo;
+ I830OutputPtr output = &pI830->output[pI830->num_outputs];
+ struct i830_sdvo_priv *dev_priv;
int i;
unsigned char ch[0x40];
I2CBusPtr i2cbus = NULL, ddcbus;
- pI830->output[pI830->num_outputs].type = I830_OUTPUT_SDVO;
- pI830->output[pI830->num_outputs].dpms = i830_sdvo_dpms;
- pI830->output[pI830->num_outputs].save = i830_sdvo_save;
- pI830->output[pI830->num_outputs].restore = i830_sdvo_restore;
- pI830->output[pI830->num_outputs].mode_valid = i830_sdvo_mode_valid;
- pI830->output[pI830->num_outputs].pre_set_mode = i830_sdvo_pre_set_mode;
- pI830->output[pI830->num_outputs].post_set_mode = i830_sdvo_post_set_mode;
+ output->type = I830_OUTPUT_SDVO;
+ output->dpms = i830_sdvo_dpms;
+ output->save = i830_sdvo_save;
+ output->restore = i830_sdvo_restore;
+ output->mode_valid = i830_sdvo_mode_valid;
+ output->pre_set_mode = i830_sdvo_pre_set_mode;
+ output->post_set_mode = i830_sdvo_post_set_mode;
+
+ /* While it's the same bus, we just initialize a new copy to avoid trouble
+ * with tracking refcounting ourselves, since the XFree86 DDX bits don't.
+ */
+ if (output_device == SDVOB)
+ I830I2CInit(pScrn, &i2cbus, GPIOE, "SDVOCTRL_E for SDVOB");
+ else
+ I830I2CInit(pScrn, &i2cbus, GPIOE, "SDVOCTRL_E for SDVOC");
- /* Find an existing SDVO I2CBus from another output, or allocate it. */
- for (i = 0; i < pI830->num_outputs; i++) {
- if (pI830->output[i].type == I830_OUTPUT_SDVO)
- i2cbus = pI830->output[i].pI2CBus;
- }
- if (i2cbus == NULL)
- I830I2CInit(pScrn, &i2cbus, GPIOE, "SDVOCTRL_E");
if (i2cbus == NULL)
return;
/* Allocate the SDVO output private data */
- sdvo = xcalloc(1, sizeof(I830SDVORec));
- if (sdvo == NULL) {
+ dev_priv = xcalloc(1, sizeof(struct i830_sdvo_priv));
+ if (dev_priv == NULL) {
xf86DestroyI2CBusRec(i2cbus, TRUE, TRUE);
return;
}
if (output_device == SDVOB) {
- sdvo->d.DevName = "SDVO Controller B";
- sdvo->d.SlaveAddr = 0x70;
+ dev_priv->d.DevName = "SDVO Controller B";
+ dev_priv->d.SlaveAddr = 0x70;
} else {
- sdvo->d.DevName = "SDVO Controller C";
- sdvo->d.SlaveAddr = 0x72;
+ dev_priv->d.DevName = "SDVO Controller C";
+ dev_priv->d.SlaveAddr = 0x72;
}
- sdvo->d.pI2CBus = i2cbus;
- sdvo->d.DriverPrivate.ptr = sdvo;
- sdvo->output_device = output_device;
+ dev_priv->d.pI2CBus = i2cbus;
+ dev_priv->d.DriverPrivate.ptr = output;
+ dev_priv->output_device = output_device;
- if (!xf86I2CDevInit(&sdvo->d)) {
+ if (!xf86I2CDevInit(&dev_priv->d)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Failed to initialize SDVO I2C device %s\n",
output_device == SDVOB ? "SDVOB" : "SDVOC");
xf86DestroyI2CBusRec(i2cbus, TRUE, TRUE);
- xfree(sdvo);
+ xfree(dev_priv);
return;
}
@@ -1014,9 +1138,9 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
*/
ddcbus = xf86CreateI2CBusRec();
if (ddcbus == NULL) {
- xf86DestroyI2CDevRec(&sdvo->d, FALSE);
+ xf86DestroyI2CDevRec(&dev_priv->d, FALSE);
xf86DestroyI2CBusRec(i2cbus, TRUE, TRUE);
- xfree(sdvo);
+ xfree(dev_priv);
return;
}
if (output_device == SDVOB)
@@ -1024,47 +1148,46 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
else
ddcbus->BusName = "SDVOC DDC Bus";
ddcbus->scrnIndex = i2cbus->scrnIndex;
- ddcbus->I2CGetByte = I830SDVODDCI2CGetByte;
- ddcbus->I2CPutByte = I830SDVODDCI2CPutByte;
- ddcbus->I2CStart = I830SDVODDCI2CStart;
- ddcbus->I2CStop = I830SDVODDCI2CStop;
- ddcbus->I2CAddress = I830SDVODDCI2CAddress;
- ddcbus->DriverPrivate.ptr = sdvo;
+ ddcbus->I2CGetByte = i830_sdvo_ddc_i2c_get_byte;
+ ddcbus->I2CPutByte = i830_sdvo_ddc_i2c_put_byte;
+ ddcbus->I2CStart = i830_sdvo_ddc_i2c_start;
+ ddcbus->I2CStop = i830_sdvo_ddc_i2c_stop;
+ ddcbus->I2CAddress = i830_sdvo_ddc_i2c_address;
+ ddcbus->DriverPrivate.ptr = &pI830->output[pI830->num_outputs];
if (!xf86I2CBusInit(ddcbus)) {
- xf86DestroyI2CDevRec(&sdvo->d, FALSE);
+ xf86DestroyI2CDevRec(&dev_priv->d, FALSE);
xf86DestroyI2CBusRec(i2cbus, TRUE, TRUE);
- xfree(sdvo);
+ xfree(dev_priv);
return;
}
- pI830->output[pI830->num_outputs].pI2CBus = i2cbus;
- pI830->output[pI830->num_outputs].pDDCBus = ddcbus;
- pI830->output[pI830->num_outputs].sdvo_drv = sdvo;
+ output->pI2CBus = i2cbus;
+ output->pDDCBus = ddcbus;
+ output->dev_priv = dev_priv;
/* Read the regs to test if we can talk to the device */
for (i = 0; i < 0x40; i++) {
- if (!sReadByte(sdvo, i, &ch[i])) {
- xf86DestroyI2CBusRec(pI830->output[pI830->num_outputs].pDDCBus,
- FALSE, FALSE);
- xf86DestroyI2CDevRec(&sdvo->d, FALSE);
+ if (!i830_sdvo_read_byte(output, i, &ch[i])) {
+ xf86DestroyI2CBusRec(output->pDDCBus, FALSE, FALSE);
+ xf86DestroyI2CDevRec(&dev_priv->d, FALSE);
xf86DestroyI2CBusRec(i2cbus, TRUE, TRUE);
- xfree(sdvo);
+ xfree(dev_priv);
return;
}
}
- I830SDVOGetCapabilities(sdvo, &sdvo->caps);
+ i830_sdvo_get_capabilities(output, &dev_priv->caps);
- I830SDVOGetInputPixelClockRange(sdvo, &sdvo->pixel_clock_min,
- &sdvo->pixel_clock_max);
+ i830_sdvo_get_input_pixel_clock_range(output, &dev_priv->pixel_clock_min,
+ &dev_priv->pixel_clock_max);
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"SDVO device VID/DID: %02X:%02X.%02X, %02X,"
"output 1: %c, output 2: %c\n",
- sdvo->caps.vendor_id, sdvo->caps.device_id,
- sdvo->caps.device_rev_id, sdvo->caps.caps,
- sdvo->caps.output_0_supported ? 'Y' : 'N',
- sdvo->caps.output_1_supported ? 'Y' : 'N');
+ dev_priv->caps.vendor_id, dev_priv->caps.device_id,
+ dev_priv->caps.device_rev_id, dev_priv->caps.caps,
+ dev_priv->caps.output_0_supported ? 'Y' : 'N',
+ dev_priv->caps.output_1_supported ? 'Y' : 'N');
pI830->num_outputs++;
}