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authorEric Anholt <eric@anholt.net>2007-08-06 17:01:37 -0700
committerEric Anholt <eric@anholt.net>2007-08-07 15:13:10 -0700
commitda82a47a558597f3653e2b33bc6adbab18574b57 (patch)
treed651a7ea7b521fa2611afd2f6892d1d87357a8d3 /src/i830_xaa.c
parent3510d5728fa972b36d022b4f9189d46ff98d7b16 (diff)
Fix EXA rendering with tiled front buffer on pre-965.
The 915 and earlier appear to respect the fence registers, while only the 965 requires the per-operation tiling setting and pitch shifting. This will also fix issues with rendering on the 965 involving multiple cliprects, where the pitch would get divided repeatedly. This removes the offset < 4096 fallback, which essentially resulted in no acceleration to tiled buffers, hiding the issues.
Diffstat (limited to 'src/i830_xaa.c')
-rw-r--r--src/i830_xaa.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index ec8a8794..aa06a80c 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -126,7 +126,6 @@ I830XAAInit(ScreenPtr pScreen)
if (!infoPtr)
return FALSE;
- pI830->bufferOffset = 0;
infoPtr->Flags = LINEAR_FRAMEBUFFER | OFFSCREEN_PIXMAPS | PIXMAP_CACHE;
/* Use the same sync function as the I830.
@@ -235,6 +234,7 @@ I830XAAInit(ScreenPtr pScreen)
infoPtr->RestoreAccelState = I830RestoreAccelState;
}
+ /* Set up pI830->bufferOffset */
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
if (!XAAInit(pScreen, infoPtr))