diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2014-05-15 11:23:16 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2014-05-16 10:02:16 +0100 |
| commit | b21fc65b23fcbb2b9a04eb92e3719d88e2d026dc (patch) | |
| tree | 2754ad745cd99e99150b2ce94709cc855222f304 /src/i915_pciids.h | |
| parent | 2afeef0c3ffeae768198fc08c9f365ccd28b7f5d (diff) | |
intel: Update PCI IDs for Cherryview
Copied from kernel commit 7d87a7f709650bde4d7d63117f25ee1c095da5dd
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Wed Apr 9 18:19:04 2014 +0300
srm/i915/chv: Add Cherryview PCI IDs
and also includes non-functional changes from
commit fd3c269f8ff940cc0fbb3b7f7e84c0572f6f759a
Author: Zhao Yakui <yakui.zhao@intel.com>
Date: Thu Apr 17 10:37:35 2014 +0800
drm/i915: Split the BDW device definition to prepare for dual BSD rings on BDW GT3
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/i915_pciids.h')
| -rw-r--r-- | src/i915_pciids.h | 32 |
1 files changed, 25 insertions, 7 deletions
diff --git a/src/i915_pciids.h b/src/i915_pciids.h index 940ece49..05720356 100644 --- a/src/i915_pciids.h +++ b/src/i915_pciids.h @@ -191,8 +191,8 @@ INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ - INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ - INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ + INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ @@ -223,14 +223,32 @@ _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \ _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */ -#define INTEL_BDW_M_IDS(info) \ +#define INTEL_BDW_GT12M_IDS(info) \ _INTEL_BDW_M_IDS(1, info), \ - _INTEL_BDW_M_IDS(2, info), \ - _INTEL_BDW_M_IDS(3, info) + _INTEL_BDW_M_IDS(2, info) -#define INTEL_BDW_D_IDS(info) \ +#define INTEL_BDW_GT12D_IDS(info) \ _INTEL_BDW_D_IDS(1, info), \ - _INTEL_BDW_D_IDS(2, info), \ + _INTEL_BDW_D_IDS(2, info) + +#define INTEL_BDW_GT3M_IDS(info) \ + _INTEL_BDW_M_IDS(3, info) + +#define INTEL_BDW_GT3D_IDS(info) \ _INTEL_BDW_D_IDS(3, info) +#define INTEL_BDW_M_IDS(info) \ + INTEL_BDW_GT12M_IDS(info), \ + INTEL_BDW_GT3M_IDS(info) + +#define INTEL_BDW_D_IDS(info) \ + INTEL_BDW_GT12D_IDS(info), \ + INTEL_BDW_GT3D_IDS(info) + +#define INTEL_CHV_IDS(info) \ + INTEL_VGA_DEVICE(0x22b0, info), \ + INTEL_VGA_DEVICE(0x22b1, info), \ + INTEL_VGA_DEVICE(0x22b2, info), \ + INTEL_VGA_DEVICE(0x22b3, info) + #endif /* _I915_PCIIDS_H */ |