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authorChris Wilson <chris@chris-wilson.co.uk>2012-03-10 09:26:10 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2012-03-15 12:43:12 +0000
commit219467ac8bfab98bca82108b22eae8af3fc0bf36 (patch)
tree6b19f0d26f9b7f62f482703d60081df8d1f2ef61 /src/i915_render.c
parentbd8fafe0c48df7f138459f590a0e9e8d0c3267b7 (diff)
uxa: Simplify flush tracking
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/i915_render.c')
-rw-r--r--src/i915_render.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/src/i915_render.c b/src/i915_render.c
index 6210035c..9d8b8ac8 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -743,11 +743,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
intel->i915_render_state.op = op;
- /* BUF_INFO is an implicit flush */
- if (dest != intel->render_current_dest)
- intel_batch_do_flush(scrn);
- else if((source && intel_pixmap_is_dirty(source)) ||
- (mask && intel_pixmap_is_dirty(mask)))
+ if (intel_pixmap_is_dirty(source) || intel_pixmap_is_dirty(mask))
intel_batch_emit_flush(scrn);
intel->needs_render_state_emit = TRUE;
@@ -906,8 +902,6 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
if (1 || dest != intel->render_current_dest) {
uint32_t tiling_bits;
- intel_batch_do_flush(scrn);
-
if (intel_pixmap_tiled(dest)) {
tiling_bits = BUF_3D_TILED_SURFACE;
if (intel_get_pixmap_private(dest)->tiling