Major cleanup of 3D invariant state, fixing hangs with rotation and render.exa

Now, the generic invariant state is always set while the X Server is active,
and happens automatically when the X Server grabs the DRI lock.  More 3D state
is moved to the generic code.

Then, the 3D consumers (video, rotation, render) set last_3d to their enum
entry, and can update their own invariant state when another consumer was
active.

1 files changed, 3 insertions, 50 deletions

diff --git a/src/i915_video.c b/src/i915_video.c
index 0833d508..aa192aff 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -89,35 +89,9 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
     */
    *pI830->used3D |= 1 << 30;
 
-   BEGIN_LP_RING(44);
+   pI830->last_3d = LAST_3D_VIDEO;
 
-   /* invarient state */
-   OUT_RING(MI_NOOP);
-   OUT_RING(_3DSTATE_AA_CMD |
-	    AA_LINE_ECAAR_WIDTH_ENABLE | AA_LINE_ECAAR_WIDTH_1_0 |
-	    AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
-
-   OUT_RING(_3DSTATE_DFLT_DIFFUSE_CMD);
-   OUT_RING(0x00000000);
-
-   OUT_RING(_3DSTATE_DFLT_SPEC_CMD);
-   OUT_RING(0x00000000);
-
-   OUT_RING(_3DSTATE_DFLT_Z_CMD);
-   OUT_RING(0x00000000);
-
-   OUT_RING(_3DSTATE_COORD_SET_BINDINGS | CSB_TCB(0, 0) | CSB_TCB(1, 1) |
-	    CSB_TCB(2,2) | CSB_TCB(3,3) | CSB_TCB(4,4) | CSB_TCB(5,5) |
-	    CSB_TCB(6,6) | CSB_TCB(7,7));
-
-   OUT_RING(_3DSTATE_RASTER_RULES_CMD |
-	    ENABLE_TRI_FAN_PROVOKE_VRTX | TRI_FAN_PROVOKE_VRTX(2) |
-	    ENABLE_LINE_STRIP_PROVOKE_VRTX | LINE_STRIP_PROVOKE_VRTX(1) |
-	    ENABLE_TEXKILL_3D_4D | TEXKILL_4D |
-	    ENABLE_POINT_RASTER_RULE | OGL_POINT_RASTER_RULE);
-
-   OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 1);
-   OUT_RING(0x00000000); /* texture coordinate wrap */
+   BEGIN_LP_RING(24);
 
    /* flush map & render cache */
    OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
@@ -132,25 +106,13 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
    OUT_RING(0x00000000);	/* yorigin, xorigin */
    OUT_RING(MI_NOOP);
 
-   /* scissor */
-   OUT_RING(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
-   OUT_RING(_3DSTATE_SCISSOR_RECT_0_CMD);
-   OUT_RING(0x00000000);	/* ymin, xmin */
-   OUT_RING(0x00000000);	/* ymax, xmax */
-
    OUT_RING(0x7c000003);	/* unknown command */
    OUT_RING(0x7d070000);
    OUT_RING(0x00000000);
    OUT_RING(0x68000002);
 
-   /* context setup */
-   OUT_RING(_3DSTATE_MODES_4_CMD |
-	    ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
-	    ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
-	    ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
-
    OUT_RING(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
-	    I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 4);
+	    I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
    s2 = S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D);
    if (planar)
       s2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_2D);
@@ -171,12 +133,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
 	    (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE |
 	    (2 << S6_TRISTRIP_PV_SHIFT));
 
-   OUT_RING(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
-	    IAB_MODIFY_ENABLE |
-	    IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
-	    IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) |
-	    IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT));
-
    OUT_RING(_3DSTATE_CONST_BLEND_COLOR_CMD);
    OUT_RING(0x00000000);
 
@@ -189,9 +145,6 @@ I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
    OUT_RING(LOD_PRECLAMP_OGL |
      DSTORG_HORT_BIAS(0x80) | DSTORG_VERT_BIAS(0x80) | format);
 
-   OUT_RING(_3DSTATE_STIPPLE);
-   OUT_RING(0x00000000);
-
    /* front buffer, pitch, offset */
    OUT_RING(_3DSTATE_BUF_INFO_CMD);
    OUT_RING(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |