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| author | Eric Anholt <eric@anholt.net> | 2009-08-07 18:05:29 -0700 |
|---|---|---|
| committer | Carl Worth <cworth@cworth.org> | 2009-08-13 13:09:42 -0700 |
| commit | b0aa94fb63e8bc4be991f6dcadc66613054b0ddd (patch) | |
| tree | bb80277dfbd9810380c2726db89a59fa5135a88e /src/i965_render.c | |
| parent | 24638652704f66c97a5f093231182868e638da57 (diff) | |
Align tiled pixmap height so we don't address beyond the end of our buffers (plus fix)
Original alignment patch
(cherry picked from commit 222b52ef16895823fbf3a0fc0be4eb23b930ed1b)
with subsequent "Fix math in the tiling alignment fix" squashed
(cherry picked from commit e8f0763d405a8152c74c28792c52fe12c1d41dd5)
Diffstat (limited to 'src/i965_render.c')
| -rw-r--r-- | src/i965_render.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/i965_render.c b/src/i965_render.c index eeb23e12..1a8075bc 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -251,8 +251,6 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, } -#define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) -#define MIN(a,b) ((a) < (b) ? (a) : (b)) #define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) /* Set up a default static partitioning of the URB, which is supposed to |