diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2009-11-10 11:05:20 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2009-11-10 15:19:08 +0000 |
| commit | 67af5a99253b1295f8dc09b28863eb7dc8b59e1d (patch) | |
| tree | a434b1f310c45d00affad115ede2ae92708d5a83 /src/i965_video.c | |
| parent | 998d6b3d8c549086fbc8a9f0e309694b23398d8d (diff) | |
Check that batch buffers are atomic.
Since batch buffers are rarely emitted by themselves but as part of a
sequence of state and vertices, the whole sequence is emitted atomically.
Here we just enforce that batches are marked as being part of an atomic
sequence as appropriate.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/i965_video.c')
| -rw-r--r-- | src/i965_video.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/i965_video.c b/src/i965_video.c index 89d5eef8..6225aa48 100644 --- a/src/i965_video.c +++ b/src/i965_video.c @@ -779,7 +779,7 @@ i965_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo * bind_bo, int n_src_surf) urb_cs_start = urb_sf_start + urb_sf_size; urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE; - BEGIN_BATCH(2); + ATOMIC_BATCH(2); OUT_BATCH(MI_FLUSH | MI_STATE_INSTRUCTION_CACHE_FLUSH | BRW_MI_GLOBAL_SNAPSHOT_RESET); @@ -788,9 +788,9 @@ i965_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo * bind_bo, int n_src_surf) /* brw_debug (scrn, "before base address modify"); */ if (IS_IGDNG(intel)) - BEGIN_BATCH(14); + ATOMIC_BATCH(14); else - BEGIN_BATCH(12); + ATOMIC_BATCH(12); /* Match Mesa driver setup */ if (IS_G4X(intel) || IS_IGDNG(intel)) OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D); @@ -844,7 +844,7 @@ i965_emit_video_setup(ScrnInfoPtr scrn, drm_intel_bo * bind_bo, int n_src_surf) else pipe_ctl = BRW_PIPE_CONTROL_NOWRITE | BRW_PIPE_CONTROL_IS_FLUSH; - BEGIN_BATCH(38); + ATOMIC_BATCH(38); OUT_BATCH(MI_NOOP); @@ -1220,7 +1220,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn, i965_emit_video_setup(scrn, bind_bo, n_src_surf); - BEGIN_BATCH(12); + ATOMIC_BATCH(12); /* Set up the pointer to our vertex buffer */ OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3); /* four 32-bit floats per vertex */ |