diff options
author | Adam Jackson <ajax@redhat.com> | 2011-02-17 15:26:35 -0500 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-02-17 20:36:45 +0000 |
commit | 0ca595e9d533019b241666d29b421c7b36f9647a (patch) | |
tree | 1faa47e4a7035897471cfd048d15eba88e3ed3e3 /src/intel_driver.h | |
parent | 4c66b28870b050493ad96f7b0fe2d70d7ee539c7 (diff) |
Fix IGD and IGDNG constants to be comprehensible
Since, with GPU-on-package, it's hard to talk about a model number for
a specific chipset like 855GM, just use the platform names.
Signed-off-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/intel_driver.h')
-rw-r--r-- | src/intel_driver.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/src/intel_driver.h b/src/intel_driver.h index be8ec5f5..d7f5dfa1 100644 --- a/src/intel_driver.h +++ b/src/intel_driver.h @@ -76,11 +76,11 @@ #define PCI_CHIP_I945_GME_BRIDGE 0x27AC #endif -#ifndef PCI_CHIP_IGD_GM -#define PCI_CHIP_IGD_GM 0xA011 -#define PCI_CHIP_IGD_GM_BRIDGE 0xA010 -#define PCI_CHIP_IGD_G 0xA001 -#define PCI_CHIP_IGD_G_BRIDGE 0xA000 +#ifndef PCI_CHIP_PINEVIEW_M +#define PCI_CHIP_PINEVIEW_M 0xA011 +#define PCI_CHIP_PINEVIEW_M_BRIDGE 0xA010 +#define PCI_CHIP_PINEVIEW_G 0xA001 +#define PCI_CHIP_PINEVIEW_G_BRIDGE 0xA000 #endif #ifndef PCI_CHIP_G35_G @@ -133,9 +133,9 @@ #define PCI_CHIP_GM45_BRIDGE 0x2A40 #endif -#ifndef PCI_CHIP_IGD_E_G -#define PCI_CHIP_IGD_E_G 0x2E02 -#define PCI_CHIP_IGD_E_G_BRIDGE 0x2E00 +#ifndef PCI_CHIP_G45_E_G +#define PCI_CHIP_G45_E_G 0x2E02 +#define PCI_CHIP_G45_E_G_BRIDGE 0x2E00 #endif #ifndef PCI_CHIP_G45_G @@ -163,14 +163,14 @@ #define PCI_CHIP_B43_G1_BRIDGE 0x2E90 #endif -#ifndef PCI_CHIP_IGDNG_D_G -#define PCI_CHIP_IGDNG_D_G 0x0042 -#define PCI_CHIP_IGDNG_D_G_BRIDGE 0x0040 +#ifndef PCI_CHIP_IRONLAKE_D_G +#define PCI_CHIP_IRONLAKE_D_G 0x0042 +#define PCI_CHIP_IRONLAKE_D_G_BRIDGE 0x0040 #endif -#ifndef PCI_CHIP_IGDNG_M_G -#define PCI_CHIP_IGDNG_M_G 0x0046 -#define PCI_CHIP_IGDNG_M_G_BRIDGE 0x0044 +#ifndef PCI_CHIP_IRONLAKE_M_G +#define PCI_CHIP_IRONLAKE_M_G 0x0046 +#define PCI_CHIP_IRONLAKE_M_G_BRIDGE 0x0044 #endif #ifndef PCI_CHIP_SANDYBRIDGE_BRIDGE |