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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-09-07 14:17:05 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2010-09-07 14:17:05 +0800
commit53767cc0d0a58d36cd445da3a31c65b349eebbba (patch)
tree9a1ad173572a03f222dc624da29393dc724daeff /src/intel_driver.h
parent00f6af2c8ec899258ffab60dc2d9d80c4d9daec8 (diff)
Add more sandybridge graphics device ids
New ids for GT2 and GT2+ on desktop and mobile sandybridge, and server sandybridge device ids.
Diffstat (limited to 'src/intel_driver.h')
-rw-r--r--src/intel_driver.h27
1 files changed, 18 insertions, 9 deletions
diff --git a/src/intel_driver.h b/src/intel_driver.h
index 00e8488a..50f176ad 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -168,12 +168,17 @@
#define PCI_CHIP_IGDNG_M_G_BRIDGE 0x0044
#endif
-#ifndef PCI_CHIP_SANDYBRIDGE
-#define PCI_CHIP_SANDYBRIDGE 0x0102
-#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100
-#define PCI_CHIP_SANDYBRIDGE_M 0x0106
-#define PCI_CHIP_SANDYBRIDGE_M_D0 0x0126
-#define PCI_CHIP_SANDYBRIDGE_BRIDGE_M 0x0104
+#ifndef PCI_CHIP_SANDYBRIDGE_BRIDGE
+#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100 /* Desktop */
+#define PCI_CHIP_SANDYBRIDGE_GT1 0x0102
+#define PCI_CHIP_SANDYBRIDGE_GT2 0x0112
+#define PCI_CHIP_SANDYBRIDGE_GT2_PLUS 0x0122
+#define PCI_CHIP_SANDYBRIDGE_BRIDGE_M 0x0104 /* Mobile */
+#define PCI_CHIP_SANDYBRIDGE_M_GT1 0x0106
+#define PCI_CHIP_SANDYBRIDGE_M_GT2 0x0116
+#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
+#define PCI_CHIP_SANDYBRIDGE_BRIDGE_S 0x0108 /* Server */
+#define PCI_CHIP_SANDYBRIDGE_S_GT 0x010A
#endif
#define I85X_CAPID 0x44
@@ -242,9 +247,13 @@
#define IS_I915(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_G33CLASS(pI810))
-#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE || \
- (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M ||\
- (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M_D0)
+#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_GT1 || \
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_GT2 || \
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_GT2_PLUS || \
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M_GT1 ||\
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M_GT2 || \
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS ||\
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_S_GT)
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_GM45(pI810) || IS_IGD(pI810) || IS_IGDNG_M(pI810))
/* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */