summaryrefslogtreecommitdiff
path: root/src/intel_module.c
diff options
context:
space:
mode:
authorChris Wilson <chris@chris-wilson.co.uk>2011-11-24 17:00:18 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2011-11-24 22:04:48 +0000
commite0a4492c8b51d6ae09cde0b895da6177284e95e0 (patch)
treea85d2833858fc9b307acf5f534c51d2ad421ba97 /src/intel_module.c
parent7e4a1b7ed25a881113e197acde62b07f26f2d6ef (diff)
sna: Use Y-tiling for source pixmaps
Y-tiling is slightly faster with RENDER operations, so attempt to allocate source-only pixmaps using this tiling mode. Actually using Y-tiling is a delicate balance because it then prevents the use of the BLT. For instance, enabling Y-tiling by default gives a 30% performance improvement on the fish-demo (compositing benchmark) at 2560x1440 on Ironlake but regresses tiger-demo by 2x (spans benchmark). So experiment with this compromise and allow for changing the default tiling. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/intel_module.c')
-rw-r--r--src/intel_module.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intel_module.c b/src/intel_module.c
index 80b5da88..f452e1b7 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -56,7 +56,7 @@ static const struct intel_device_info intel_i855_info = {
.gen = 21,
};
static const struct intel_device_info intel_i865_info = {
- .gen = 21,
+ .gen = 22,
};
static const struct intel_device_info intel_i915_info = {