diff options
author | Matt Turner <mattst88@gmail.com> | 2010-08-21 17:32:25 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-08-22 09:52:54 +0100 |
commit | 7f86e5b5da88201e5443e26619c35a1a9745cf68 (patch) | |
tree | 0300ffd42d13feb120162f541897e15b5c590ccd /src/intel_uxa.c | |
parent | b611bced15c30f7bcd03106ce90668b684c1ada6 (diff) |
Replace ROUND_* macros with ALIGN.
Signed-off-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/intel_uxa.c')
-rw-r--r-- | src/intel_uxa.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/intel_uxa.c b/src/intel_uxa.c index 3c03ca77..b51c4eb3 100644 --- a/src/intel_uxa.c +++ b/src/intel_uxa.c @@ -142,7 +142,7 @@ intel_uxa_pixmap_compute_size(PixmapPtr pixmap, if (*tiling != I915_TILING_NONE) { /* First check whether tiling is necessary. */ pitch = (w * pixmap->drawable.bitsPerPixel + 7) / 8; - pitch = ROUND_TO(pitch, intel->accel_pixmap_pitch_alignment); + pitch = ALIGN(pitch, intel->accel_pixmap_pitch_alignment); size = pitch * ALIGN (h, 2); if (!IS_I965G(intel)) { /* Older hardware requires fences to be pot size @@ -179,7 +179,7 @@ intel_uxa_pixmap_compute_size(PixmapPtr pixmap, aligned_h = ALIGN(h, 32); *stride = intel_get_fence_pitch(intel, - ROUND_TO(pitch, 512), + ALIGN(pitch, 512), *tiling); /* Round the object up to the size of the fence it will live in @@ -199,7 +199,7 @@ intel_uxa_pixmap_compute_size(PixmapPtr pixmap, * subspan doesn't address an invalid page offset beyond the * end of the GTT. */ - *stride = ROUND_TO(pitch, intel->accel_pixmap_pitch_alignment); + *stride = ALIGN(pitch, intel->accel_pixmap_pitch_alignment); size = *stride * ALIGN(h, 2); } |