diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2011-07-01 08:50:58 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-07-01 21:41:23 +0100 |
| commit | ecbf6bbd27b1205dcf76cfe34ae2a7a3f5ec195a (patch) | |
| tree | 3567b6c62c9f23a22e5136867074a0fd34f2b1e9 /src/sna/gen2_render.h | |
| parent | c89b37d7b43c9e588097b7fadcba3bc13a03f8bc (diff) | |
sna/gen2: Implement composite-spans
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/sna/gen2_render.h')
| -rw-r--r-- | src/sna/gen2_render.h | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/sna/gen2_render.h b/src/sna/gen2_render.h index 945cd846..a1767ad0 100644 --- a/src/sna/gen2_render.h +++ b/src/sna/gen2_render.h @@ -447,9 +447,8 @@ #define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) #define ENABLE_SPRITE_POINT_TEX (1<<23) #define SPRITE_POINT_TEX_ON (1<<22) -#define SPRITE_POINT_TEX_OFF 0 -#define FLUSH_RENDER_CACHE (1<<18) -#define FLUSH_TEXTURE_CACHE (1<<16) +#define PIPELINE_FLUSH_RENDER_CACHE (1<<18) +#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) #define FIXED_LINE_WIDTH_MASK 0xfc00 #define ENABLE_FIXED_LINE_WIDTH (1<<15) #define FIXED_LINE_WIDTH(x) ((x)<<10) @@ -735,7 +734,8 @@ #define TB0C_RESULT_SCALE_1X (0 << 29) #define TB0C_RESULT_SCALE_2X (1 << 29) #define TB0C_RESULT_SCALE_4X (2 << 29) -#define TB0C_OP_MODULE (3 << 25) +#define TB0C_OP_ARG1 (1 << 25) +#define TB0C_OP_MODULATE (3 << 25) #define TB0C_OUTPUT_WRITE_CURRENT (0 << 24) #define TB0C_OUTPUT_WRITE_ACCUM (1 << 24) #define TB0C_ARG3_REPLICATE_ALPHA (1<<23) @@ -752,6 +752,7 @@ #define TB0C_ARG1_REPLICATE_ALPHA (1<<11) #define TB0C_ARG1_INVERT (1<<10) #define TB0C_ARG1_SEL_ONE (0 << 6) +#define TB0C_ARG1_SEL_DIFFUSE (3 << 6) #define TB0C_ARG1_SEL_TEXEL0 (6 << 6) #define TB0C_ARG1_SEL_TEXEL1 (7 << 6) #define TB0C_ARG1_SEL_TEXEL2 (8 << 6) @@ -763,7 +764,8 @@ #define TB0A_RESULT_SCALE_1X (0 << 29) #define TB0A_RESULT_SCALE_2X (1 << 29) #define TB0A_RESULT_SCALE_4X (2 << 29) -#define TB0A_OP_MODULE (3 << 25) +#define TB0A_OP_ARG1 (1 << 25) +#define TB0A_OP_MODULATE (3 << 25) #define TB0A_OUTPUT_WRITE_CURRENT (0<<24) #define TB0A_OUTPUT_WRITE_ACCUM (1<<24) #define TB0A_CTR_STAGE_SEL_BITS_XXX @@ -771,12 +773,14 @@ #define TB0A_ARG3_INVERT (1<<17) #define TB0A_ARG2_INVERT (1<<16) #define TB0A_ARG2_SEL_ONE (0 << 12) +#define TB0A_ARG2_SEL_DIFFUSE (3 << 12) #define TB0A_ARG2_SEL_TEXEL0 (6 << 12) #define TB0A_ARG2_SEL_TEXEL1 (7 << 12) #define TB0A_ARG2_SEL_TEXEL2 (8 << 12) #define TB0A_ARG2_SEL_TEXEL3 (9 << 12) #define TB0A_ARG1_INVERT (1<<10) #define TB0A_ARG1_SEL_ONE (0 << 6) +#define TB0A_ARG1_SEL_DIFFUSE (3 << 6) #define TB0A_ARG1_SEL_TEXEL0 (6 << 6) #define TB0A_ARG1_SEL_TEXEL1 (7 << 6) #define TB0A_ARG1_SEL_TEXEL2 (8 << 6) |