Convert generation counter to octal

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

26 files changed, 264 insertions, 263 deletions

diff --git a/src/sna/brw/brw_disasm.c b/src/sna/brw/brw_disasm.c
index e6da1745..ea6155c8 100644
--- a/src/sna/brw/brw_disasm.c
+++ b/src/sna/brw/brw_disasm.c
@@ -875,16 +875,17 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 		string(file, ")");
 	}
 
-	if (inst->header.opcode == BRW_OPCODE_SEND && gen < 60)
+	if (inst->header.opcode == BRW_OPCODE_SEND && gen < 060)
 		format(file, " %d", inst->header.destreg__conditionalmod);
 
 	if (opcode[inst->header.opcode].ndst > 0) {
 		pad(file, 16);
 		dest(file, inst);
-	} else if (gen >= 60 && (inst->header.opcode == BRW_OPCODE_IF ||
-				 inst->header.opcode == BRW_OPCODE_ELSE ||
-				 inst->header.opcode == BRW_OPCODE_ENDIF ||
-				 inst->header.opcode == BRW_OPCODE_WHILE)) {
+	} else if (gen >= 060 &&
+		   (inst->header.opcode == BRW_OPCODE_IF ||
+		    inst->header.opcode == BRW_OPCODE_ELSE ||
+		    inst->header.opcode == BRW_OPCODE_ENDIF ||
+		    inst->header.opcode == BRW_OPCODE_WHILE)) {
 		format(file, " %d", inst->bits1.branch_gen6.jump_count);
 	}
 
@@ -901,9 +902,9 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 	    inst->header.opcode == BRW_OPCODE_SENDC) {
 		enum brw_message_target target;
 
-		if (gen >= 60)
+		if (gen >= 060)
 			target = inst->header.destreg__conditionalmod;
-		else if (gen >= 50)
+		else if (gen >= 050)
 			target = inst->bits2.send_gen5.sfid;
 		else
 			target = inst->bits3.generic.msg_target;
@@ -912,7 +913,7 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 		pad (file, 16);
 		space = 0;
 
-		if (gen >= 60) {
+		if (gen >= 060) {
 			control (file, "target function", target_function_gen6,
 				 target, &space);
 		} else {
@@ -934,19 +935,19 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 				 inst->bits3.math.precision, &space);
 			break;
 		case BRW_SFID_SAMPLER:
-			if (gen >= 70) {
+			if (gen >= 070) {
 				format (file, " (%d, %d, %d, %d)",
 					inst->bits3.sampler_gen7.binding_table_index,
 					inst->bits3.sampler_gen7.sampler,
 					inst->bits3.sampler_gen7.msg_type,
 					inst->bits3.sampler_gen7.simd_mode);
-			} else if (gen >= 50) {
+			} else if (gen >= 050) {
 				format (file, " (%d, %d, %d, %d)",
 					inst->bits3.sampler_gen5.binding_table_index,
 					inst->bits3.sampler_gen5.sampler,
 					inst->bits3.sampler_gen5.msg_type,
 					inst->bits3.sampler_gen5.simd_mode);
-			} else if (gen >= 45) {
+			} else if (gen >= 045) {
 				format (file, " (%d, %d)",
 					inst->bits3.sampler_g4x.binding_table_index,
 					inst->bits3.sampler_g4x.sampler);
@@ -961,13 +962,13 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 			}
 			break;
 		case BRW_SFID_DATAPORT_READ:
-			if (gen >= 60) {
+			if (gen >= 060) {
 				format (file, " (%d, %d, %d, %d)",
 					inst->bits3.gen6_dp.binding_table_index,
 					inst->bits3.gen6_dp.msg_control,
 					inst->bits3.gen6_dp.msg_type,
 					inst->bits3.gen6_dp.send_commit_msg);
-			} else if (gen >= 45) {
+			} else if (gen >= 045) {
 				format (file, " (%d, %d, %d)",
 					inst->bits3.dp_read_gen5.binding_table_index,
 					inst->bits3.dp_read_gen5.msg_control,
@@ -981,7 +982,7 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 			break;
 
 		case BRW_SFID_DATAPORT_WRITE:
-			if (gen >= 70) {
+			if (gen >= 070) {
 				format (file, " (");
 
 				control (file, "DP rc message type",
@@ -992,7 +993,7 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 					inst->bits3.gen7_dp.binding_table_index,
 					inst->bits3.gen7_dp.msg_control,
 					inst->bits3.gen7_dp.msg_type);
-			} else if (gen >= 60) {
+			} else if (gen >= 060) {
 				format (file, " (");
 
 				control (file, "DP rc message type",
@@ -1015,14 +1016,14 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 			break;
 
 		case BRW_SFID_URB:
-			if (gen >= 50) {
+			if (gen >= 050) {
 				format (file, " %d", inst->bits3.urb_gen5.offset);
 			} else {
 				format (file, " %d", inst->bits3.urb.offset);
 			}
 
 			space = 1;
-			if (gen >= 50) {
+			if (gen >= 050) {
 				control (file, "urb opcode", urb_opcode,
 					 inst->bits3.urb_gen5.opcode, &space);
 			}
@@ -1051,7 +1052,7 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 		}
 		if (space)
 			string (file, " ");
-		if (gen >= 50) {
+		if (gen >= 050) {
 			format (file, "mlen %d",
 				inst->bits3.generic_gen5.msg_length);
 			format (file, " rlen %d",
@@ -1068,13 +1069,13 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 		string(file, "{");
 		space = 1;
 		control(file, "access mode", access_mode, inst->header.access_mode, &space);
-		if (gen >= 60)
+		if (gen >= 060)
 			control(file, "write enable control", wectrl, inst->header.mask_control, &space);
 		else
 			control(file, "mask control", mask_ctrl, inst->header.mask_control, &space);
 		control(file, "dependency control", dep_ctrl, inst->header.dependency_control, &space);
 
-		if (gen >= 60)
+		if (gen >= 060)
 			qtr_ctrl(file, inst);
 		else {
 			if (inst->header.compression_control == BRW_COMPRESSION_COMPRESSED &&
@@ -1089,7 +1090,7 @@ void brw_disasm(FILE *file, const struct brw_instruction *inst, int gen)
 		}
 
 		control(file, "thread control", thread_ctrl, inst->header.thread_control, &space);
-		if (gen >= 60)
+		if (gen >= 060)
 			control(file, "acc write control", accwr, inst->header.acc_wr_control, &space);
 		if (inst->header.opcode == BRW_OPCODE_SEND ||
 		    inst->header.opcode == BRW_OPCODE_SENDC)
diff --git a/src/sna/brw/brw_eu.c b/src/sna/brw/brw_eu.c
index 7c32ea19..9bd8ba5d 100644
--- a/src/sna/brw/brw_eu.c
+++ b/src/sna/brw/brw_eu.c
@@ -79,7 +79,7 @@ void brw_set_compression_control(struct brw_compile *p,
 {
 	p->compressed = (compression_control == BRW_COMPRESSION_COMPRESSED);
 
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		/* Since we don't use the 32-wide support in gen6, we translate
 		 * the pre-gen6 compression control here.
 		 */
diff --git a/src/sna/brw/brw_eu.h b/src/sna/brw/brw_eu.h
index 65e66d5e..24ab599a 100644
--- a/src/sna/brw/brw_eu.h
+++ b/src/sna/brw/brw_eu.h
@@ -1862,7 +1862,7 @@ static inline void brw_set_saturate(struct brw_compile *p, unsigned value)
 
 static inline void brw_set_acc_write_control(struct brw_compile *p, unsigned value)
 {
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		p->current->header.acc_wr_control = value;
 }
 
@@ -1938,7 +1938,7 @@ static inline void brw_##OP(struct brw_compile *p,			\
 	rnd = brw_next_insn(p, BRW_OPCODE_##OP);			\
 	brw_set_dest(p, rnd, dest);					\
 	brw_set_src0(p, rnd, src);					\
-	if (p->gen < 60) {						\
+	if (p->gen < 060) {						\
 		/* turn on round-increments */				\
 		rnd->header.destreg__conditionalmod = BRW_CONDITIONAL_R; \
 		add = brw_ADD(p, dest, dest, brw_imm_f(1.0f));		\
diff --git a/src/sna/brw/brw_eu_emit.c b/src/sna/brw/brw_eu_emit.c
index 3f01ae7b..5c0b3065 100644
--- a/src/sna/brw/brw_eu_emit.c
+++ b/src/sna/brw/brw_eu_emit.c
@@ -61,7 +61,7 @@ gen6_resolve_implied_move(struct brw_compile *p,
 			  struct brw_reg *src,
 			  unsigned msg_reg_nr)
 {
-	if (p->gen < 60)
+	if (p->gen < 060)
 		return;
 
 	if (src->file == BRW_MESSAGE_REGISTER_FILE)
@@ -88,7 +88,7 @@ gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg)
 	 * Since we're pretending to have 16 MRFs anyway, we may as well use the
 	 * registers required for messages with EOT.
 	 */
-	if (p->gen >= 70 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
+	if (p->gen >= 070 && reg->file == BRW_MESSAGE_REGISTER_FILE) {
 		reg->file = BRW_GENERAL_REGISTER_FILE;
 		reg->nr += 111;
 	}
@@ -378,13 +378,13 @@ brw_set_message_descriptor(struct brw_compile *p,
 {
 	brw_set_src1(p, inst, brw_imm_d(0));
 
-	if (p->gen >= 50) {
+	if (p->gen >= 050) {
 		inst->bits3.generic_gen5.header_present = header_present;
 		inst->bits3.generic_gen5.response_length = response_length;
 		inst->bits3.generic_gen5.msg_length = msg_length;
 		inst->bits3.generic_gen5.end_of_thread = end_of_thread;
 
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			/* On Gen6+ Message target/SFID goes in bits 27:24 of the header */
 			inst->header.destreg__conditionalmod = sfid;
 		} else {
@@ -439,7 +439,7 @@ static void brw_set_math_message(struct brw_compile *p,
 	brw_set_message_descriptor(p, insn, BRW_SFID_MATH,
 				   msg_length, response_length,
 				   false, false);
-	if (p->gen == 50) {
+	if (p->gen == 050) {
 		insn->bits3.math_gen5.function = function;
 		insn->bits3.math_gen5.int_type = integer_type;
 		insn->bits3.math_gen5.precision = low_precision;
@@ -485,7 +485,7 @@ static void brw_set_urb_message(struct brw_compile *p,
 {
 	brw_set_message_descriptor(p, insn, BRW_SFID_URB,
 				   msg_length, response_length, true, end_of_thread);
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		insn->bits3.urb_gen7.opcode = 0;	/* URB_WRITE_HWORD */
 		insn->bits3.urb_gen7.offset = offset;
 		assert(swizzle_control != BRW_URB_SWIZZLE_TRANSPOSE);
@@ -493,7 +493,7 @@ static void brw_set_urb_message(struct brw_compile *p,
 		/* per_slot_offset = 0 makes it ignore offsets in message header */
 		insn->bits3.urb_gen7.per_slot_offset = 0;
 		insn->bits3.urb_gen7.complete = complete;
-	} else if (p->gen >= 50) {
+	} else if (p->gen >= 050) {
 		insn->bits3.urb_gen5.opcode = 0;	/* URB_WRITE */
 		insn->bits3.urb_gen5.offset = offset;
 		insn->bits3.urb_gen5.swizzle_control = swizzle_control;
@@ -525,13 +525,13 @@ brw_set_dp_write_message(struct brw_compile *p,
 {
 	unsigned sfid;
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		/* Use the Render Cache for RT writes; otherwise use the Data Cache */
 		if (msg_type == GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE)
 			sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
 		else
 			sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
-	} else if (p->gen >= 60) {
+	} else if (p->gen >= 060) {
 		/* Use the render cache for all write messages. */
 		sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
 	} else {
@@ -542,18 +542,18 @@ brw_set_dp_write_message(struct brw_compile *p,
 				   msg_length, response_length,
 				   header_present, end_of_thread);
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		insn->bits3.gen7_dp.binding_table_index = binding_table_index;
 		insn->bits3.gen7_dp.msg_control = msg_control;
 		insn->bits3.gen7_dp.last_render_target = last_render_target;
 		insn->bits3.gen7_dp.msg_type = msg_type;
-	} else if (p->gen >= 60) {
+	} else if (p->gen >= 060) {
 		insn->bits3.gen6_dp.binding_table_index = binding_table_index;
 		insn->bits3.gen6_dp.msg_control = msg_control;
 		insn->bits3.gen6_dp.last_render_target = last_render_target;
 		insn->bits3.gen6_dp.msg_type = msg_type;
 		insn->bits3.gen6_dp.send_commit_msg = send_commit_msg;
-	} else if (p->gen >= 50) {
+	} else if (p->gen >= 050) {
 		insn->bits3.dp_write_gen5.binding_table_index = binding_table_index;
 		insn->bits3.dp_write_gen5.msg_control = msg_control;
 		insn->bits3.dp_write_gen5.last_render_target = last_render_target;
@@ -580,9 +580,9 @@ brw_set_dp_read_message(struct brw_compile *p,
 {
 	unsigned sfid;
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		sfid = GEN7_SFID_DATAPORT_DATA_CACHE;
-	} else if (p->gen >= 60) {
+	} else if (p->gen >= 060) {
 		if (target_cache == BRW_DATAPORT_READ_TARGET_RENDER_CACHE)
 			sfid = GEN6_SFID_DATAPORT_RENDER_CACHE;
 		else
@@ -595,23 +595,23 @@ brw_set_dp_read_message(struct brw_compile *p,
 				   msg_length, response_length,
 				   true, false);
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		insn->bits3.gen7_dp.binding_table_index = binding_table_index;
 		insn->bits3.gen7_dp.msg_control = msg_control;
 		insn->bits3.gen7_dp.last_render_target = 0;
 		insn->bits3.gen7_dp.msg_type = msg_type;
-	} else if (p->gen >= 60) {
+	} else if (p->gen >= 060) {
 		insn->bits3.gen6_dp.binding_table_index = binding_table_index;
 		insn->bits3.gen6_dp.msg_control = msg_control;
 		insn->bits3.gen6_dp.last_render_target = 0;
 		insn->bits3.gen6_dp.msg_type = msg_type;
 		insn->bits3.gen6_dp.send_commit_msg = 0;
-	} else if (p->gen >= 50) {
+	} else if (p->gen >= 050) {
 		insn->bits3.dp_read_gen5.binding_table_index = binding_table_index;
 		insn->bits3.dp_read_gen5.msg_control = msg_control;
 		insn->bits3.dp_read_gen5.msg_type = msg_type;
 		insn->bits3.dp_read_gen5.target_cache = target_cache;
-	} else if (p->gen >= 45) {
+	} else if (p->gen >= 045) {
 		insn->bits3.dp_read_g4x.binding_table_index = binding_table_index; /*0:7*/
 		insn->bits3.dp_read_g4x.msg_control = msg_control;  /*8:10*/
 		insn->bits3.dp_read_g4x.msg_type = msg_type;  /*11:13*/
@@ -638,17 +638,17 @@ static void brw_set_sampler_message(struct brw_compile *p,
 				   msg_length, response_length,
 				   header_present, false);
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		insn->bits3.sampler_gen7.binding_table_index = binding_table_index;
 		insn->bits3.sampler_gen7.sampler = sampler;
 		insn->bits3.sampler_gen7.msg_type = msg_type;
 		insn->bits3.sampler_gen7.simd_mode = simd_mode;
-	} else if (p->gen >= 50) {
+	} else if (p->gen >= 050) {
 		insn->bits3.sampler_gen5.binding_table_index = binding_table_index;
 		insn->bits3.sampler_gen5.sampler = sampler;
 		insn->bits3.sampler_gen5.msg_type = msg_type;
 		insn->bits3.sampler_gen5.simd_mode = simd_mode;
-	} else if (p->gen >= 45) {
+	} else if (p->gen >= 045) {
 		insn->bits3.sampler_g4x.binding_table_index = binding_table_index;
 		insn->bits3.sampler_g4x.sampler = sampler;
 		insn->bits3.sampler_g4x.msg_type = msg_type;
@@ -706,11 +706,11 @@ brw_IF(struct brw_compile *p, unsigned execute_size)
 	insn = brw_next_insn(p, BRW_OPCODE_IF);
 
 	/* Override the defaults for this instruction: */
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_set_dest(p, insn, brw_ip_reg());
 		brw_set_src0(p, insn, brw_ip_reg());
 		brw_set_src1(p, insn, brw_imm_d(0x0));
-	} else if (p->gen < 70) {
+	} else if (p->gen < 070) {
 		brw_set_dest(p, insn, brw_imm_w(0));
 		insn->bits1.branch_gen6.jump_count = 0;
 		brw_set_src0(p, insn, __retype_d(brw_null_reg()));
@@ -827,7 +827,7 @@ patch_IF_ELSE(struct brw_compile *p,
 	/* Jump count is for 64bit data chunk each, so one 128bit instruction
 	 * requires 2 chunks.
 	 */
-	if (p->gen >= 50)
+	if (p->gen >= 050)
 		br = 2;
 
 	assert(endif_inst->header.opcode == BRW_OPCODE_ENDIF);
@@ -835,7 +835,7 @@ patch_IF_ELSE(struct brw_compile *p,
 
 	if (else_inst == NULL) {
 		/* Patch IF -> ENDIF */
-		if (p->gen < 60) {
+		if (p->gen < 060) {
 			/* Turn it into an IFF, which means no mask stack operations for
 			 * all-false and jumping past the ENDIF.
 			 */
@@ -843,7 +843,7 @@ patch_IF_ELSE(struct brw_compile *p,
 			if_inst->bits3.if_else.jump_count = br * (endif_inst - if_inst + 1);
 			if_inst->bits3.if_else.pop_count = 0;
 			if_inst->bits3.if_else.pad0 = 0;
-		} else if (p->gen < 70) {
+		} else if (p->gen < 070) {
 			/* As of gen6, there is no IFF and IF must point to the ENDIF. */
 			if_inst->bits1.branch_gen6.jump_count = br * (endif_inst - if_inst);
 		} else {
@@ -854,23 +854,23 @@ patch_IF_ELSE(struct brw_compile *p,
 		else_inst->header.execution_size = if_inst->header.execution_size;
 
 		/* Patch IF -> ELSE */
-		if (p->gen < 60) {
+		if (p->gen < 060) {
 			if_inst->bits3.if_else.jump_count = br * (else_inst - if_inst);
 			if_inst->bits3.if_else.pop_count = 0;
 			if_inst->bits3.if_else.pad0 = 0;
-		} else if (p->gen <= 70) {
+		} else if (p->gen <= 070) {
 			if_inst->bits1.branch_gen6.jump_count = br * (else_inst - if_inst + 1);
 		}
 
 		/* Patch ELSE -> ENDIF */
-		if (p->gen < 60) {
+		if (p->gen < 060) {
 			/* BRW_OPCODE_ELSE pre-gen6 should point just past the
 			 * matching ENDIF.
 			 */
 			else_inst->bits3.if_else.jump_count = br*(endif_inst - else_inst + 1);
 			else_inst->bits3.if_else.pop_count = 1;
 			else_inst->bits3.if_else.pad0 = 0;
-		} else if (p->gen < 70) {
+		} else if (p->gen < 070) {
 			/* BRW_OPCODE_ELSE on gen6 should point to the matching ENDIF. */
 			else_inst->bits1.branch_gen6.jump_count = br*(endif_inst - else_inst);
 		} else {
@@ -890,11 +890,11 @@ brw_ELSE(struct brw_compile *p)
 
 	insn = brw_next_insn(p, BRW_OPCODE_ELSE);
 
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_set_dest(p, insn, brw_ip_reg());
 		brw_set_src0(p, insn, brw_ip_reg());
 		brw_set_src1(p, insn, brw_imm_d(0x0));
-	} else if (p->gen < 70) {
+	} else if (p->gen < 070) {
 		brw_set_dest(p, insn, brw_imm_w(0));
 		insn->bits1.branch_gen6.jump_count = 0;
 		brw_set_src0(p, insn, __retype_d(brw_null_reg()));
@@ -938,11 +938,11 @@ brw_ENDIF(struct brw_compile *p)
 
 	insn = brw_next_insn(p, BRW_OPCODE_ENDIF);
 
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_set_dest(p, insn, __retype_ud(brw_vec4_grf(0,0)));
 		brw_set_src0(p, insn, __retype_ud(brw_vec4_grf(0,0)));
 		brw_set_src1(p, insn, brw_imm_d(0x0));
-	} else if (p->gen < 70) {
+	} else if (p->gen < 070) {
 		brw_set_dest(p, insn, brw_imm_w(0));
 		brw_set_src0(p, insn, __retype_d(brw_null_reg()));
 		brw_set_src1(p, insn, __retype_d(brw_null_reg()));
@@ -957,11 +957,11 @@ brw_ENDIF(struct brw_compile *p)
 	insn->header.thread_control = BRW_THREAD_SWITCH;
 
 	/* Also pop item off the stack in the endif instruction: */
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		insn->bits3.if_else.jump_count = 0;
 		insn->bits3.if_else.pop_count = 1;
 		insn->bits3.if_else.pad0 = 0;
-	} else if (p->gen < 70) {
+	} else if (p->gen < 070) {
 		insn->bits1.branch_gen6.jump_count = 2;
 	} else {
 		insn->bits3.break_cont.jip = 2;
@@ -974,7 +974,7 @@ struct brw_instruction *brw_BREAK(struct brw_compile *p, int pop_count)
 	struct brw_instruction *insn;
 
 	insn = brw_next_insn(p, BRW_OPCODE_BREAK);
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		brw_set_dest(p, insn, __retype_d(brw_null_reg()));
 		brw_set_src0(p, insn, __retype_d(brw_null_reg()));
 		brw_set_src1(p, insn, brw_imm_d(0x0));
@@ -1041,7 +1041,7 @@ struct brw_instruction *brw_CONT(struct brw_compile *p, int pop_count)
  */
 struct brw_instruction *brw_DO(struct brw_compile *p, unsigned execute_size)
 {
-	if (p->gen >= 60 || p->single_program_flow) {
+	if (p->gen >= 060 || p->single_program_flow) {
 		return &p->store[p->nr_insn];
 	} else {
 		struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_DO);
@@ -1068,10 +1068,10 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p,
 	struct brw_instruction *insn;
 	unsigned br = 1;
 
-	if (p->gen >= 50)
+	if (p->gen >= 050)
 		br = 2;
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		insn = brw_next_insn(p, BRW_OPCODE_WHILE);
 
 		brw_set_dest(p, insn, __retype_d(brw_null_reg()));
@@ -1080,7 +1080,7 @@ struct brw_instruction *brw_WHILE(struct brw_compile *p,
 		insn->bits3.break_cont.jip = br * (do_insn - insn);
 
 		insn->header.execution_size = BRW_EXECUTE_8;
-	} else if (p->gen >= 60) {
+	} else if (p->gen >= 060) {
 		insn = brw_next_insn(p, BRW_OPCODE_WHILE);
 
 		brw_set_dest(p, insn, brw_imm_w(0));
@@ -1126,7 +1126,7 @@ void brw_land_fwd_jump(struct brw_compile *p,
 	struct brw_instruction *landing = &p->store[p->nr_insn];
 	unsigned jmpi = 1;
 
-	if (p->gen >= 50)
+	if (p->gen >= 050)
 		jmpi = 2;
 
 	assert(jmp_insn->header.opcode == BRW_OPCODE_JMPI);
@@ -1195,7 +1195,7 @@ void brw_math(struct brw_compile *p,
 	      unsigned data_type,
 	      unsigned precision)
 {
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		struct brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_MATH);
 
 		assert(dest.file == BRW_GENERAL_REGISTER_FILE);
@@ -1294,7 +1294,7 @@ void brw_math_16(struct brw_compile *p,
 {
 	struct brw_instruction *insn;
 
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		insn = brw_next_insn(p, BRW_OPCODE_MATH);
 
 		/* Math is the same ISA format as other opcodes, except that CondModifier
@@ -1362,7 +1362,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
 	uint32_t msg_control, msg_type;
 	int mlen;
 
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		offset /= 16;
 
 	mrf = __retype_ud(mrf);
@@ -1418,7 +1418,7 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
 		 * protection.  Our use of DP writes is all about register
 		 * spilling within a thread.
 		 */
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			dest = __retype_uw(vec16(brw_null_reg()));
 			send_commit_msg = 0;
 		} else {
@@ -1427,13 +1427,13 @@ void brw_oword_block_write_scratch(struct brw_compile *p,
 		}
 
 		brw_set_dest(p, insn, dest);
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_set_src0(p, insn, mrf);
 		} else {
 			brw_set_src0(p, insn, brw_null_reg());
 		}
 
-		if (p->gen >= 60)
+		if (p->gen >= 060)
 			msg_type = GEN6_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE;
 		else
 			msg_type = BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE;
@@ -1470,7 +1470,7 @@ brw_oword_block_read_scratch(struct brw_compile *p,
 	uint32_t msg_control;
 	int rlen;
 
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		offset /= 16;
 
 	mrf = __retype_ud(mrf);
@@ -1507,7 +1507,7 @@ brw_oword_block_read_scratch(struct brw_compile *p,
 		insn->header.destreg__conditionalmod = mrf.nr;
 
 		brw_set_dest(p, insn, dest); /* UW? */
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_set_src0(p, insn, mrf);
 		} else {
 			brw_set_src0(p, insn, brw_null_reg());
@@ -1538,7 +1538,7 @@ void brw_oword_block_read(struct brw_compile *p,
 	struct brw_instruction *insn;
 
 	/* On newer hardware, offset is in units of owords. */
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		offset /= 16;
 
 	mrf = __retype_ud(mrf);
@@ -1562,7 +1562,7 @@ void brw_oword_block_read(struct brw_compile *p,
 	dest = __retype_uw(vec8(dest));
 
 	brw_set_dest(p, insn, dest);
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		brw_set_src0(p, insn, mrf);
 	} else {
 		brw_set_src0(p, insn, brw_null_reg());
@@ -1634,7 +1634,7 @@ void brw_dp_READ_4_vs(struct brw_compile *p,
 	struct brw_instruction *insn;
 	unsigned msg_reg_nr = 1;
 
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		location /= 16;
 
 	/* Setup MRF[1] with location/offset into const buffer */
@@ -1655,7 +1655,7 @@ void brw_dp_READ_4_vs(struct brw_compile *p,
 	insn->header.mask_control = BRW_MASK_DISABLE;
 
 	brw_set_dest(p, insn, dest);
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		brw_set_src0(p, insn, brw_message_reg(msg_reg_nr));
 	} else {
 		brw_set_src0(p, insn, brw_null_reg());
@@ -1710,9 +1710,9 @@ void brw_dp_READ_4_vs_relative(struct brw_compile *p,
 	brw_set_dest(p, insn, dest);
 	brw_set_src0(p, insn, src);
 
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
-	else if (p->gen >= 45)
+	else if (p->gen >= 045)
 		msg_type = G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
 	else
 		msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
@@ -1747,7 +1747,7 @@ void brw_fb_WRITE(struct brw_compile *p,
 	else
 		dest = __retype_uw(vec8(brw_null_reg()));
 
-	if (p->gen >= 60 && binding_table_index == 0) {
+	if (p->gen >= 060 && binding_table_index == 0) {
 		insn = brw_next_insn(p, BRW_OPCODE_SENDC);
 	} else {
 		insn = brw_next_insn(p, BRW_OPCODE_SEND);
@@ -1756,7 +1756,7 @@ void brw_fb_WRITE(struct brw_compile *p,
 	insn->header.predicate_control = 0;
 	insn->header.compression_control = BRW_COMPRESSION_NONE;
 
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		/* headerless version, just submit color payload */
 		src0 = brw_message_reg(msg_reg_nr);
 
@@ -1802,7 +1802,7 @@ void brw_SAMPLE(struct brw_compile *p,
 {
 	assert(writemask);
 
-	if (p->gen < 50 || writemask != WRITEMASK_XYZW) {
+	if (p->gen < 050 || writemask != WRITEMASK_XYZW) {
 		struct brw_reg m1 = brw_message_reg(msg_reg_nr);
 
 		writemask = ~writemask & WRITEMASK_XYZW;
@@ -1828,7 +1828,7 @@ void brw_SAMPLE(struct brw_compile *p,
 		insn = brw_next_insn(p, BRW_OPCODE_SEND);
 		insn->header.predicate_control = 0; /* XXX */
 		insn->header.compression_control = BRW_COMPRESSION_NONE;
-		if (p->gen < 60)
+		if (p->gen < 060)
 			insn->header.destreg__conditionalmod = msg_reg_nr;
 
 		brw_set_dest(p, insn, dest);
@@ -1865,7 +1865,7 @@ void brw_urb_WRITE(struct brw_compile *p,
 
 	gen6_resolve_implied_move(p, &src0, msg_reg_nr);
 
-	if (p->gen >= 70) {
+	if (p->gen >= 070) {
 		/* Enable Channel Masks in the URB_WRITE_HWORD message header */
 		brw_push_insn_state(p);
 		brw_set_access_mode(p, BRW_ALIGN_1);
@@ -1883,7 +1883,7 @@ void brw_urb_WRITE(struct brw_compile *p,
 	brw_set_src0(p, insn, src0);
 	brw_set_src1(p, insn, brw_imm_d(0));
 
-	if (p->gen <= 60)
+	if (p->gen <= 060)
 		insn->header.destreg__conditionalmod = msg_reg_nr;
 
 	brw_set_urb_message(p,
@@ -1931,7 +1931,7 @@ brw_find_loop_end(struct brw_compile *p, int start)
 		struct brw_instruction *insn = &p->store[ip];
 
 		if (insn->header.opcode == BRW_OPCODE_WHILE) {
-			int jip = p->gen <= 70 ? insn->bits1.branch_gen6.jump_count
+			int jip = p->gen <= 070 ? insn->bits1.branch_gen6.jump_count
 				: insn->bits3.break_cont.jip;
 			if (ip + jip / br <= start)
 				return ip;
@@ -1950,7 +1950,7 @@ brw_set_uip_jip(struct brw_compile *p)
 	int ip;
 	int br = 2;
 
-	if (p->gen <= 60)
+	if (p->gen <= 060)
 		return;
 
 	for (ip = 0; ip < p->nr_insn; ip++) {
@@ -1961,7 +1961,7 @@ brw_set_uip_jip(struct brw_compile *p)
 			insn->bits3.break_cont.jip = br * (brw_find_next_block_end(p, ip) - ip);
 			/* Gen7 UIP points to WHILE; Gen6 points just after it */
 			insn->bits3.break_cont.uip =
-				br * (brw_find_loop_end(p, ip) - ip + (p->gen <= 70 ? 1 : 0));
+				br * (brw_find_loop_end(p, ip) - ip + (p->gen <= 070 ? 1 : 0));
 			break;
 		case BRW_OPCODE_CONTINUE:
 			insn->bits3.break_cont.jip = br * (brw_find_next_block_end(p, ip) - ip);
@@ -1991,7 +1991,7 @@ void brw_ff_sync(struct brw_compile *p,
 	brw_set_src0(p, insn, src0);
 	brw_set_src1(p, insn, brw_imm_d(0));
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		insn->header.destreg__conditionalmod = msg_reg_nr;
 
 	brw_set_ff_sync_message(p,
diff --git a/src/sna/brw/brw_wm.c b/src/sna/brw/brw_wm.c
index af047a20..e8dc6ac4 100644
--- a/src/sna/brw/brw_wm.c
+++ b/src/sna/brw/brw_wm.c
@@ -41,15 +41,15 @@ static void brw_wm_affine_st(struct brw_compile *p, int dw,
 
 	if (dw == 16) {
 		brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
-		uv = p->gen >= 60 ? 6 : 3;
+		uv = p->gen >= 060 ? 6 : 3;
 	} else {
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-		uv = p->gen >= 60 ? 4 : 3;
+		uv = p->gen >= 060 ? 4 : 3;
 	}
 	uv += 2*channel;
 
 	msg++;
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		brw_PLN(p,
 			brw_message_reg(msg),
 			brw_vec1_grf(uv, 0),
@@ -96,7 +96,7 @@ static int brw_wm_sample(struct brw_compile *p, int dw,
 	int len;
 
 	len = dw == 16 ? 4 : 2;
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		header = false;
 		src0 = brw_message_reg(++msg);
 	} else {
@@ -125,7 +125,7 @@ static int brw_wm_sample__alpha(struct brw_compile *p, int dw,
 		rlen = 2;
 	}
 
-	if (p->gen >= 60)
+	if (p->gen >= 060)
 		src0 = brw_message_reg(msg);
 	else
 		src0 = brw_vec8_grf(0, 0);
@@ -182,7 +182,7 @@ static void brw_fb_write(struct brw_compile *p, int dw)
 		msg_len = 4;
 	}
 
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_push_insn_state(p);
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 		brw_set_mask_control(p, BRW_MASK_DISABLE);
@@ -197,7 +197,7 @@ static void brw_fb_write(struct brw_compile *p, int dw)
 	insn->header.predicate_control = 0;
 	insn->header.compression_control = BRW_COMPRESSION_NONE;
 
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		msg_type = GEN6_DATAPORT_WRITE_MESSAGE_RENDER_TARGET_WRITE;
 		src0 = brw_message_reg(2);
 		header = false;
@@ -219,7 +219,7 @@ static void brw_wm_write(struct brw_compile *p, int dw, int src)
 {
 	int n;
 
-	if (dw == 8 && p->gen >= 60) {
+	if (dw == 8 && p->gen >= 060) {
 		/* XXX pixel execution mask? */
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 
@@ -233,11 +233,11 @@ static void brw_wm_write(struct brw_compile *p, int dw, int src)
 	brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
 	for (n = 0; n < 4; n++) {
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_MOV(p,
 				brw_message_reg(2 + 2*n),
 				brw_vec8_grf(src + 2*n, 0));
-		} else if (p->gen >= 45 && dw == 16) {
+		} else if (p->gen >= 045 && dw == 16) {
 			brw_MOV(p,
 				brw_message_reg(2 + n + BRW_MRF_COMPR4),
 				brw_vec8_grf(src + 2*n, 0));
@@ -265,7 +265,7 @@ static void brw_wm_write__mask(struct brw_compile *p, int dw,
 {
 	int n;
 
-	if (dw == 8 && p->gen >= 60) {
+	if (dw == 8 && p->gen >= 060) {
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 
 		brw_MUL(p,
@@ -291,12 +291,12 @@ static void brw_wm_write__mask(struct brw_compile *p, int dw,
 	brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
 	for (n = 0; n < 4; n++) {
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_MUL(p,
 				brw_message_reg(2 + 2*n),
 				brw_vec8_grf(src + 2*n, 0),
 				brw_vec8_grf(mask, 0));
-		} else if (p->gen >= 45 && dw == 16) {
+		} else if (p->gen >= 045 && dw == 16) {
 			brw_MUL(p,
 				brw_message_reg(2 + n + BRW_MRF_COMPR4),
 				brw_vec8_grf(src + 2*n, 0),
@@ -327,7 +327,7 @@ static void brw_wm_write__opacity(struct brw_compile *p, int dw,
 {
 	int n;
 
-	if (dw == 8 && p->gen >= 60) {
+	if (dw == 8 && p->gen >= 060) {
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 
 		brw_MUL(p,
@@ -353,12 +353,12 @@ static void brw_wm_write__opacity(struct brw_compile *p, int dw,
 	brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
 	for (n = 0; n < 4; n++) {
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_MUL(p,
 				brw_message_reg(2 + 2*n),
 				brw_vec8_grf(src + 2*n, 0),
 				brw_vec1_grf(mask, 3));
-		} else if (p->gen >= 45 && dw == 16) {
+		} else if (p->gen >= 045 && dw == 16) {
 			brw_MUL(p,
 				brw_message_reg(2 + n + BRW_MRF_COMPR4),
 				brw_vec8_grf(src + 2*n, 0),
@@ -389,7 +389,7 @@ static void brw_wm_write__mask_ca(struct brw_compile *p, int dw,
 {
 	int n;
 
-	if (dw == 8 && p->gen >= 60) {
+	if (dw == 8 && p->gen >= 060) {
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
 
 		brw_MUL(p,
@@ -415,12 +415,12 @@ static void brw_wm_write__mask_ca(struct brw_compile *p, int dw,
 	brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
 
 	for (n = 0; n < 4; n++) {
-		if (p->gen >= 60) {
+		if (p->gen >= 060) {
 			brw_MUL(p,
 				brw_message_reg(2 + 2*n),
 				brw_vec8_grf(src + 2*n, 0),
 				brw_vec8_grf(mask + 2*n, 0));
-		} else if (p->gen >= 45 && dw == 16) {
+		} else if (p->gen >= 045 && dw == 16) {
 			brw_MUL(p,
 				brw_message_reg(2 + n + BRW_MRF_COMPR4),
 				brw_vec8_grf(src + 2*n, 0),
@@ -449,7 +449,7 @@ done:
 bool
 brw_wm_kernel__affine(struct brw_compile *p, int dispatch)
 {
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 	brw_wm_write(p, dispatch, brw_wm_affine(p, dispatch, 0, 1, 12));
 
@@ -461,7 +461,7 @@ brw_wm_kernel__affine_mask(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_affine(p, dispatch, 0, 1, 12);
@@ -476,7 +476,7 @@ brw_wm_kernel__affine_mask_ca(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_affine(p, dispatch, 0, 1, 12);
@@ -491,7 +491,7 @@ brw_wm_kernel__affine_mask_sa(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_affine__alpha(p, dispatch, 0, 1, 12);
@@ -510,15 +510,15 @@ static void brw_wm_projective_st(struct brw_compile *p, int dw,
 
 	if (dw == 16) {
 		brw_set_compression_control(p, BRW_COMPRESSION_COMPRESSED);
-		uv = p->gen >= 60 ? 6 : 3;
+		uv = p->gen >= 060 ? 6 : 3;
 	} else {
 		brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-		uv = p->gen >= 60 ? 4 : 3;
+		uv = p->gen >= 060 ? 4 : 3;
 	}
 	uv += 2*channel;
 
 	msg++;
-	if (p->gen >= 60) {
+	if (p->gen >= 060) {
 		/* First compute 1/z */
 		brw_PLN(p,
 			brw_message_reg(msg),
@@ -594,7 +594,7 @@ static int brw_wm_projective__alpha(struct brw_compile *p, int dw,
 bool
 brw_wm_kernel__projective(struct brw_compile *p, int dispatch)
 {
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 	brw_wm_write(p, dispatch, brw_wm_projective(p, dispatch, 0, 1, 12));
 
@@ -606,7 +606,7 @@ brw_wm_kernel__projective_mask(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_projective(p, dispatch, 0, 1, 12);
@@ -621,7 +621,7 @@ brw_wm_kernel__projective_mask_ca(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_projective(p, dispatch, 0, 1, 12);
@@ -636,7 +636,7 @@ brw_wm_kernel__projective_mask_sa(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60)
+	if (p->gen < 060)
 		brw_wm_xy(p, dispatch);
 
 	src = brw_wm_projective__alpha(p, dispatch, 0, 1, 12);
@@ -651,7 +651,7 @@ brw_wm_kernel__affine_opacity(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_wm_xy(p, dispatch);
 		mask = 5;
 	} else
@@ -668,7 +668,7 @@ brw_wm_kernel__projective_opacity(struct brw_compile *p, int dispatch)
 {
 	int src, mask;
 
-	if (p->gen < 60) {
+	if (p->gen < 060) {
 		brw_wm_xy(p, dispatch);
 		mask = 5;
 	} else
diff --git a/src/sna/g4x_render.c b/src/sna/g4x_render.c
index 49eb1787..70faab7e 100644
--- a/src/sna/g4x_render.c
+++ b/src/sna/g4x_render.c
@@ -629,7 +629,7 @@ g4x_bind_bo(struct sna *sna,
 	uint32_t domains;
 	uint16_t offset;
 
-	assert(sna->kgem.gen != 40 || !kgem_bo_is_snoop(bo));
+	assert(sna->kgem.gen != 040 || !kgem_bo_is_snoop(bo));
 
 	/* After the first bind, we manage the cache domains within the batch */
 	offset = kgem_bo_get_binding(bo, format);
@@ -1153,7 +1153,7 @@ g4x_emit_invariant(struct sna *sna)
 {
 	assert(sna->kgem.surface == sna->kgem.batch_size);
 
-	if (sna->kgem.gen >= 45)
+	if (sna->kgem.gen >= 045)
 		OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
 	else
 		OUT_BATCH(GEN4_PIPELINE_SELECT | PIPELINE_SELECT_3D);
diff --git a/src/sna/gen2_render.c b/src/sna/gen2_render.c
index 31074af0..b37af9b9 100644
--- a/src/sna/gen2_render.c
+++ b/src/sna/gen2_render.c
@@ -175,7 +175,7 @@ gen2_get_card_format(struct sna *sna, uint32_t format)
 		if (i8xx_tex_formats[i].fmt == format)
 			return i8xx_tex_formats[i].card_fmt;
 
-	if (sna->kgem.gen < 21) {
+	if (sna->kgem.gen < 021) {
 		/* Whilst these are not directly supported on 830/845,
 		 * we only enable them when we can implicitly convert
 		 * them to a supported variant through the texture
@@ -203,7 +203,7 @@ gen2_check_format(struct sna *sna, PicturePtr p)
 		if (i8xx_tex_formats[i].fmt == p->format)
 			return true;
 
-	if (sna->kgem.gen > 21) {
+	if (sna->kgem.gen > 021) {
 		for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++)
 			if (i85x_tex_formats[i].fmt == p->format)
 				return true;
@@ -1317,7 +1317,7 @@ gen2_check_card_format(struct sna *sna,
 
 	for (i = 0; i < ARRAY_SIZE(i85x_tex_formats); i++) {
 		if (i85x_tex_formats[i].fmt == format) {
-			if (sna->kgem.gen >= 21)
+			if (sna->kgem.gen >= 021)
 				return true;
 
 			if (source_is_covered(picture, x, y, w,h)) {
diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index 5134bb92..0484af84 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -644,7 +644,7 @@ gen4_bind_bo(struct sna *sna,
 	uint32_t domains;
 	uint16_t offset;
 
-	assert(sna->kgem.gen != 40 || !kgem_bo_is_snoop(bo));
+	assert(sna->kgem.gen != 040 || !kgem_bo_is_snoop(bo));
 
 	/* After the first bind, we manage the cache domains within the batch */
 	offset = kgem_bo_get_binding(bo, format);
@@ -1169,7 +1169,7 @@ gen4_emit_invariant(struct sna *sna)
 {
 	assert(sna->kgem.surface == sna->kgem.batch_size);
 
-	if (sna->kgem.gen >= 45)
+	if (sna->kgem.gen >= 045)
 		OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
 	else
 		OUT_BATCH(GEN4_PIPELINE_SELECT | PIPELINE_SELECT_3D);
diff --git a/src/sna/gen7_render.c b/src/sna/gen7_render.c
index 50d1b301..9d4e1a29 100644
--- a/src/sna/gen7_render.c
+++ b/src/sna/gen7_render.c
@@ -1373,7 +1373,7 @@ gen7_bind_bo(struct sna *sna,
 	ss[5] = is_dst && bo->scanout ? 0 : 3 << 16;
 	ss[6] = 0;
 	ss[7] = 0;
-	if (sna->kgem.gen == 75)
+	if (sna->kgem.gen == 075)
 		ss[7] |= HSW_SURFACE_SWIZZLE(RED, GREEN, BLUE, ALPHA);
 
 	kgem_bo_set_binding(bo, format, offset);
@@ -4258,14 +4258,14 @@ static bool gen7_render_setup(struct sna *sna)
 	struct gen7_sampler_state *ss;
 	int i, j, k, l, m;
 
-	if (sna->kgem.gen == 70) {
+	if (sna->kgem.gen == 070) {
 		state->info = &ivb_gt_info;
 		if (DEVICE_ID(sna->PciInfo) & 0xf) {
 			state->info = &ivb_gt1_info;
 			if (DEVICE_ID(sna->PciInfo) & 0x20)
 				state->info = &ivb_gt2_info; /* XXX requires GT_MODE WiZ disabled */
 		}
-	} else if (sna->kgem.gen == 75) {
+	} else if (sna->kgem.gen == 075) {
 		state->info = &hsw_gt_info;
 	} else
 		return false;
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 32187b1c..59b5d24a 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -601,7 +601,7 @@ agp_aperture_size(struct pci_device *dev, unsigned gen)
 	/* XXX assume that only future chipsets are unknown and follow
 	 * the post gen2 PCI layout.
 	 */
-	return dev->regions[gen < 30 ? 0 : 2].size;
+	return dev->regions[gen < 030 ? 0 : 2].size;
 }
 
 static size_t
@@ -734,12 +734,12 @@ static bool is_hw_supported(struct kgem *kgem,
 	 * hw acceleration.
 	 */
 
-	if (kgem->gen == 60 && dev->revision < 8) {
+	if (kgem->gen == 060 && dev->revision < 8) {
 		/* pre-production SNB with dysfunctional BLT */
 		return false;
 	}
 
-	if (kgem->gen >= 60) /* Only if the kernel supports the BLT ring */
+	if (kgem->gen >= 060) /* Only if the kernel supports the BLT ring */
 		return kgem->has_blt;
 
 	return true;
@@ -747,7 +747,7 @@ static bool is_hw_supported(struct kgem *kgem,
 
 static bool test_has_relaxed_fencing(struct kgem *kgem)
 {
-	if (kgem->gen < 40) {
+	if (kgem->gen < 040) {
 		if (DBG_NO_RELAXED_FENCING)
 			return false;
 
@@ -768,7 +768,7 @@ static bool test_has_llc(struct kgem *kgem)
 #endif
 	if (has_llc == -1) {
 		DBG(("%s: no kernel/drm support for HAS_LLC, assuming support for LLC based on GPU generation\n", __FUNCTION__));
-		has_llc = kgem->gen >= 60;
+		has_llc = kgem->gen >= 060;
 	}
 
 	return has_llc;
@@ -783,7 +783,7 @@ static bool test_has_cacheing(struct kgem *kgem)
 		return false;
 
 	/* Incoherent blt and sampler hangs the GPU */
-	if (kgem->gen == 40)
+	if (kgem->gen == 040)
 		return false;
 
 	handle = gem_create(kgem->fd, 1);
@@ -805,7 +805,7 @@ static bool test_has_userptr(struct kgem *kgem)
 		return false;
 
 	/* Incoherent blt and sampler hangs the GPU */
-	if (kgem->gen == 40)
+	if (kgem->gen == 040)
 		return false;
 
 	ptr = malloc(PAGE_SIZE);
@@ -886,7 +886,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	DBG(("%s: semaphores enabled? %d\n", __FUNCTION__,
 	     kgem->has_semaphores));
 
-	kgem->can_blt_cpu = gen >= 30;
+	kgem->can_blt_cpu = gen >= 030;
 	DBG(("%s: can blt to cpu? %d\n", __FUNCTION__,
 	     kgem->can_blt_cpu));
 
@@ -905,10 +905,10 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	}
 
 	kgem->batch_size = ARRAY_SIZE(kgem->batch);
-	if (gen == 22)
+	if (gen == 022)
 		/* 865g cannot handle a batch spanning multiple pages */
 		kgem->batch_size = PAGE_SIZE / sizeof(uint32_t);
-	if (gen >= 70 && gen < 80)
+	if ((gen >> 3) == 7)
 		kgem->batch_size = 16*1024;
 	if (!kgem->has_relaxed_delta && kgem->batch_size > 4*1024)
 		kgem->batch_size = 4*1024;
@@ -917,7 +917,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	     kgem->batch_size));
 
 	kgem->min_alignment = 4;
-	if (gen < 40)
+	if (gen < 040)
 		kgem->min_alignment = 64;
 
 	kgem->half_cpu_cache_pages = cpu_cache_size() >> 13;
@@ -960,7 +960,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	kgem->aperture_total = aperture.aper_size;
 	kgem->aperture_high = aperture.aper_size * 3/4;
 	kgem->aperture_low = aperture.aper_size * 1/3;
-	if (gen < 33) {
+	if (gen < 033) {
 		/* Severe alignment penalties */
 		kgem->aperture_high /= 2;
 		kgem->aperture_low /= 2;
@@ -986,7 +986,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 	kgem->max_gpu_size = kgem->max_object_size;
 	if (!kgem->has_llc)
 		kgem->max_gpu_size = MAX_CACHE_SIZE;
-	if (gen < 40) {
+	if (gen < 040) {
 		/* If we have to use fences for blitting, we have to make
 		 * sure we can fit them into the aperture.
 		 */
@@ -1008,7 +1008,7 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, int gen)
 		kgem->max_gpu_size = totalram / 4;
 
 	half_gpu_max = kgem->max_gpu_size / 2;
-	if (kgem->gen >= 40)
+	if (kgem->gen >= 040)
 		kgem->max_cpu_size = half_gpu_max;
 	else
 		kgem->max_cpu_size = kgem->max_object_size;
@@ -1085,9 +1085,9 @@ static uint32_t kgem_untiled_pitch(struct kgem *kgem,
 void kgem_get_tile_size(struct kgem *kgem, int tiling,
 			int *tile_width, int *tile_height, int *tile_size)
 {
-	if (kgem->gen <= 30) {
+	if (kgem->gen <= 030) {
 		if (tiling) {
-			if (kgem->gen < 30) {
+			if (kgem->gen < 030) {
 				*tile_width = 128;
 				*tile_height = 16;
 				*tile_size = 2048;
@@ -1136,9 +1136,9 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
 	assert(width <= MAXSHORT);
 	assert(height <= MAXSHORT);
 
-	if (kgem->gen <= 30) {
+	if (kgem->gen <= 030) {
 		if (tiling) {
-			if (kgem->gen < 30) {
+			if (kgem->gen < 030) {
 				tile_width = 128;
 				tile_height = 16;
 			} else {
@@ -1173,7 +1173,7 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
 
 	*pitch = ALIGN(width * bpp / 8, tile_width);
 	height = ALIGN(height, tile_height);
-	if (kgem->gen >= 40)
+	if (kgem->gen >= 040)
 		return PAGE_ALIGN(*pitch * height);
 
 	/* If it is too wide for the blitter, don't even bother.  */
@@ -1194,7 +1194,7 @@ static uint32_t kgem_surface_size(struct kgem *kgem,
 		return PAGE_ALIGN(size);
 
 	/*  We need to allocate a pot fence region for a tiled buffer. */
-	if (kgem->gen < 30)
+	if (kgem->gen < 030)
 		tile_width = 512 * 1024;
 	else
 		tile_width = 1024 * 1024;
@@ -1208,8 +1208,8 @@ static uint32_t kgem_aligned_height(struct kgem *kgem,
 {
 	uint32_t tile_height;
 
-	if (kgem->gen <= 30) {
-		tile_height = tiling ? kgem->gen < 30 ? 16 : 8 : 1;
+	if (kgem->gen <= 030) {
+		tile_height = tiling ? kgem->gen < 030 ? 16 : 8 : 1;
 	} else switch (tiling) {
 		/* XXX align to an even tile row */
 	default:
@@ -2770,7 +2770,7 @@ search_linear_cache(struct kgem *kgem, unsigned int num_pages, unsigned flags)
 			continue;
 
 		if (use_active &&
-		    kgem->gen <= 40 &&
+		    kgem->gen <= 040 &&
 		    bo->tiling != I915_TILING_NONE)
 			continue;
 
@@ -2985,7 +2985,7 @@ int kgem_choose_tiling(struct kgem *kgem, int tiling, int width, int height, int
 	if (DBG_NO_TILING)
 		return tiling < 0 ? tiling : I915_TILING_NONE;
 
-	if (kgem->gen < 40) {
+	if (kgem->gen < 040) {
 		if (tiling && width * bpp > 8192 * 8) {
 			DBG(("%s: pitch too large for tliing [%d]\n",
 			     __FUNCTION__, width*bpp/8));
@@ -2994,7 +2994,7 @@ int kgem_choose_tiling(struct kgem *kgem, int tiling, int width, int height, int
 		}
 	} else {
 		/* XXX rendering to I915_TILING_Y seems broken? */
-		if (kgem->gen < 50 && tiling == I915_TILING_Y)
+		if (kgem->gen < 050 && tiling == I915_TILING_Y)
 			tiling = I915_TILING_X;
 
 		if (width*bpp > (MAXSHORT-512) * 8) {
@@ -3147,9 +3147,9 @@ inline int kgem_bo_fenced_size(struct kgem *kgem, struct kgem_bo *bo)
 	unsigned int size;
 
 	assert(bo->tiling);
-	assert(kgem->gen < 40);
+	assert(kgem->gen < 040);
 
-	if (kgem->gen < 30)
+	if (kgem->gen < 030)
 		size = 512 * 1024;
 	else
 		size = 1024 * 1024;
@@ -3206,7 +3206,7 @@ struct kgem_bo *kgem_create_2d(struct kgem *kgem,
 			assert(bo->refcnt == 0);
 			assert(bo->reusable);
 
-			if (kgem->gen < 40) {
+			if (kgem->gen < 040) {
 				if (bo->pitch < pitch) {
 					DBG(("tiled and pitch too small: tiling=%d, (want %d), pitch=%d, need %d\n",
 					     bo->tiling, tiling,
@@ -3348,7 +3348,7 @@ search_again:
 			assert(bo->reusable);
 			assert(bo->tiling == tiling);
 
-			if (kgem->gen < 40) {
+			if (kgem->gen < 040) {
 				if (bo->pitch < pitch) {
 					DBG(("tiled and pitch too small: tiling=%d, (want %d), pitch=%d, need %d\n",
 					     bo->tiling, tiling,
@@ -3406,7 +3406,7 @@ search_again:
 	}
 
 	if (--retry && flags & CREATE_EXACT) {
-		if (kgem->gen >= 40) {
+		if (kgem->gen >= 040) {
 			for (i = I915_TILING_NONE; i <= I915_TILING_Y; i++) {
 				if (i == tiling)
 					continue;
@@ -3772,7 +3772,7 @@ bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo)
 	while (bo->proxy)
 		bo = bo->proxy;
 	if (bo->exec) {
-		if (kgem->gen < 40 &&
+		if (kgem->gen < 040 &&
 		    bo->tiling != I915_TILING_NONE &&
 		    (bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) {
 			if (kgem->nfence >= kgem->fence_max)
@@ -3796,7 +3796,7 @@ bool kgem_check_bo_fenced(struct kgem *kgem, struct kgem_bo *bo)
 	if (kgem->aperture + num_pages(bo) > kgem->aperture_high)
 		return false;
 
-	if (kgem->gen < 40 && bo->tiling != I915_TILING_NONE) {
+	if (kgem->gen < 040 && bo->tiling != I915_TILING_NONE) {
 		if (kgem->nfence >= kgem->fence_max)
 			return false;
 
@@ -3829,7 +3829,7 @@ bool kgem_check_many_bo_fenced(struct kgem *kgem, ...)
 		while (bo->proxy)
 			bo = bo->proxy;
 		if (bo->exec) {
-			if (kgem->gen >= 40 || bo->tiling == I915_TILING_NONE)
+			if (kgem->gen >= 040 || bo->tiling == I915_TILING_NONE)
 				continue;
 
 			if ((bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) {
@@ -3842,7 +3842,7 @@ bool kgem_check_many_bo_fenced(struct kgem *kgem, ...)
 
 		num_pages += num_pages(bo);
 		num_exec++;
-		if (kgem->gen < 40 && bo->tiling) {
+		if (kgem->gen < 040 && bo->tiling) {
 			fenced_size += kgem_bo_fenced_size(kgem, bo);
 			num_fence++;
 		}
@@ -3916,7 +3916,7 @@ uint32_t kgem_add_reloc(struct kgem *kgem,
 			kgem_add_bo(kgem, bo);
 		assert(bo->rq == kgem->next_request);
 
-		if (kgem->gen < 40 && read_write_domain & KGEM_RELOC_FENCED) {
+		if (kgem->gen < 040 && read_write_domain & KGEM_RELOC_FENCED) {
 			if (bo->tiling &&
 			    (bo->exec->flags & EXEC_OBJECT_NEEDS_FENCE) == 0) {
 				assert(kgem->nfence < kgem->fence_max);
@@ -4072,7 +4072,7 @@ void *kgem_bo_map(struct kgem *kgem, struct kgem_bo *bo)
 	ptr = bo->map;
 	if (ptr == NULL) {
 		assert(kgem_bo_size(bo) <= kgem->aperture_mappable / 2);
-		assert(kgem->gen != 21 || bo->tiling != I915_TILING_Y);
+		assert(kgem->gen != 021 || bo->tiling != I915_TILING_Y);
 
 		kgem_trim_vma_cache(kgem, MAP_GTT, bucket(bo));
 
@@ -4439,7 +4439,7 @@ static inline bool
 use_snoopable_buffer(struct kgem *kgem, uint32_t flags)
 {
 	if ((flags & KGEM_BUFFER_WRITE) == 0)
-		return kgem->gen >= 30;
+		return kgem->gen >= 030;
 
 	return true;
 }
@@ -5202,7 +5202,7 @@ kgem_replace_bo(struct kgem *kgem,
 	br00 = XY_SRC_COPY_BLT_CMD;
 	br13 = pitch;
 	pitch = src->pitch;
-	if (kgem->gen >= 40 && src->tiling) {
+	if (kgem->gen >= 040 && src->tiling) {
 		br00 |= BLT_SRC_TILED;
 		pitch >>= 2;
 	}
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index c20b4f30..63b3857b 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -460,7 +460,7 @@ static inline bool kgem_bo_blt_pitch_is_ok(struct kgem *kgem,
 					   struct kgem_bo *bo)
 {
 	int pitch = bo->pitch;
-	if (kgem->gen >= 40 && bo->tiling)
+	if (kgem->gen >= 040 && bo->tiling)
 		pitch /= 4;
 	if (pitch > MAXSHORT) {
 		DBG(("%s: can not blt to handle=%d, adjusted pitch=%d\n",
@@ -489,7 +489,7 @@ static inline bool __kgem_bo_is_mappable(struct kgem *kgem,
 	if (bo->domain == DOMAIN_GTT)
 		return true;
 
-	if (kgem->gen < 40 && bo->tiling &&
+	if (kgem->gen < 040 && bo->tiling &&
 	    bo->presumed_offset & (kgem_bo_fenced_size(kgem, bo) - 1))
 		return false;
 
@@ -528,7 +528,7 @@ static inline bool kgem_bo_can_map(struct kgem *kgem, struct kgem_bo *bo)
 	if (!bo->tiling && kgem->has_llc)
 		return true;
 
-	if (kgem->gen == 21 && bo->tiling == I915_TILING_Y)
+	if (kgem->gen == 021 && bo->tiling == I915_TILING_Y)
 		return false;
 
 	return kgem_bo_size(bo) <= kgem->aperture_mappable / 4;
diff --git a/src/sna/kgem_debug.c b/src/sna/kgem_debug.c
index 2dc1b456..595c20f6 100644
--- a/src/sna/kgem_debug.c
+++ b/src/sna/kgem_debug.c
@@ -273,7 +273,7 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
 				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
 		kgem_debug_print(data, offset, 5, "color\n");
-		assert(kgem->gen >= 40 ||
+		assert(kgem->gen >= 040 ||
 		       kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
 		return len;
 
@@ -321,7 +321,7 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 				 reloc->read_domains, reloc->write_domain,
 				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
 				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
-		assert(kgem->gen >= 40 ||
+		assert(kgem->gen >= 040 ||
 		       kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
 
 		kgem_debug_print(data, offset, 5, "src (%d,%d)\n",
@@ -336,7 +336,7 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 				 reloc->read_domains, reloc->write_domain,
 				 kgem_debug_handle_is_fenced(kgem, reloc->target_handle),
 				 kgem_debug_handle_tiling(kgem, reloc->target_handle));
-		assert(kgem->gen >= 40 ||
+		assert(kgem->gen >= 040 ||
 		       kgem_debug_handle_is_fenced(kgem, reloc->target_handle));
 
 		return len;
@@ -368,18 +368,18 @@ decode_2d(struct kgem *kgem, uint32_t offset)
 
 static int (*decode_3d(int gen))(struct kgem*, uint32_t)
 {
-	if (gen >= 80) {
-	} else if (gen >= 70) {
+	if (gen >= 0100) {
+	} else if (gen >= 070) {
 		return kgem_gen7_decode_3d;
-	} else if (gen >= 60) {
+	} else if (gen >= 060) {
 		return kgem_gen6_decode_3d;
-	} else if (gen >= 50) {
+	} else if (gen >= 050) {
 		return kgem_gen5_decode_3d;
-	} else if (gen >= 40) {
+	} else if (gen >= 040) {
 		return kgem_gen4_decode_3d;
-	} else if (gen >= 30) {
+	} else if (gen >= 030) {
 		return kgem_gen3_decode_3d;
-	} else if (gen >= 20) {
+	} else if (gen >= 020) {
 		return kgem_gen2_decode_3d;
 	}
 	assert(0);
@@ -387,18 +387,18 @@ static int (*decode_3d(int gen))(struct kgem*, uint32_t)
 
 static void (*finish_state(int gen))(struct kgem*)
 {
-	if (gen >= 80) {
-	} else if (gen >= 70) {
+	if (gen >= 0100) {
+	} else if (gen >= 070) {
 		return kgem_gen7_finish_state;
-	} else if (gen >= 60) {
+	} else if (gen >= 060) {
 		return kgem_gen6_finish_state;
-	} else if (gen >= 50) {
+	} else if (gen >= 050) {
 		return kgem_gen5_finish_state;
-	} else if (gen >= 40) {
+	} else if (gen >= 040) {
 		return kgem_gen4_finish_state;
-	} else if (gen >= 30) {
+	} else if (gen >= 030) {
 		return kgem_gen3_finish_state;
-	} else if (gen >= 20) {
+	} else if (gen >= 020) {
 		return kgem_gen2_finish_state;
 	}
 	assert(0);
diff --git a/src/sna/kgem_debug_gen6.c b/src/sna/kgem_debug_gen6.c
index e0b09d55..fd3f789a 100644
--- a/src/sna/kgem_debug_gen6.c
+++ b/src/sna/kgem_debug_gen6.c
@@ -643,7 +643,7 @@ int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset)
 	case 0x6101:
 		i = 0;
 		kgem_debug_print(data, offset, i++, "STATE_BASE_ADDRESS\n");
-		if (kgem->gen >= 60) {
+		if (kgem->gen >= 060) {
 			assert(len == 10);
 
 			state_base_out(data, offset, i++, "general");
@@ -658,7 +658,7 @@ int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset)
 			state_max_out(data, offset, i++, "instruction");
 
 			gen6_update_dynamic_buffer(kgem, offset + 3);
-		} else if (kgem->gen >= 50) {
+		} else if (kgem->gen >= 050) {
 			assert(len == 8);
 
 			state_base_out(data, offset, i++, "general");
@@ -674,7 +674,7 @@ int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset)
 		return len;
 
 	case 0x7801:
-		if (kgem->gen >= 60) {
+		if (kgem->gen >= 060) {
 			assert(len == 4);
 
 			kgem_debug_print(data, offset, 0,
@@ -686,7 +686,7 @@ int kgem_gen6_decode_3d(struct kgem *kgem, uint32_t offset)
 			kgem_debug_print(data, offset, 1, "VS binding table\n");
 			kgem_debug_print(data, offset, 2, "GS binding table\n");
 			kgem_debug_print(data, offset, 3, "WM binding table\n");
-		} else if (kgem->gen >= 40) {
+		} else if (kgem->gen >= 040) {
 			assert(len == 6);
 
 			kgem_debug_print(data, offset, 0,
diff --git a/src/sna/sna_accel.c b/src/sna/sna_accel.c
index 79514c52..ca28b061 100644
--- a/src/sna/sna_accel.c
+++ b/src/sna/sna_accel.c
@@ -496,14 +496,14 @@ static inline uint32_t default_tiling(PixmapPtr pixmap,
 	struct sna *sna = to_sna_from_pixmap(pixmap);
 
 	/* Try to avoid hitting the Y-tiling GTT mapping bug on 855GM */
-	if (sna->kgem.gen == 21)
+	if (sna->kgem.gen == 021)
 		return I915_TILING_X;
 
 	/* Only on later generations was the render pipeline
 	 * more flexible than the BLT. So on gen2/3, prefer to
 	 * keep large objects accessible through the BLT.
 	 */
-	if (sna->kgem.gen < 40 &&
+	if (sna->kgem.gen < 040 &&
 	    (pixmap->drawable.width  > sna->render.max_3d_size ||
 	     pixmap->drawable.height > sna->render.max_3d_size))
 		return I915_TILING_X;
@@ -3848,7 +3848,7 @@ sna_put_xybitmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region,
 		b[0] = XY_MONO_SRC_COPY | 3 << 20;
 		b[0] |= ((box->x1 - x) & 7) << 17;
 		b[1] = bo->pitch;
-		if (sna->kgem.gen >= 40 && bo->tiling) {
+		if (sna->kgem.gen >= 040 && bo->tiling) {
 			b[0] |= BLT_DST_TILED;
 			b[1] >>= 2;
 		}
@@ -3976,7 +3976,7 @@ sna_put_xypixmap_blt(DrawablePtr drawable, GCPtr gc, RegionPtr region,
 			b[0] = XY_FULL_MONO_PATTERN_MONO_SRC_BLT | 3 << 20;
 			b[0] |= ((box->x1 - x) & 7) << 17;
 			b[1] = bo->pitch;
-			if (sna->kgem.gen >= 40 && bo->tiling) {
+			if (sna->kgem.gen >= 040 && bo->tiling) {
 				b[0] |= BLT_DST_TILED;
 				b[1] >>= 2;
 			}
@@ -6128,7 +6128,7 @@ sna_copy_bitmap_blt(DrawablePtr _bitmap, DrawablePtr drawable, GCPtr gc,
 
 	br00 = 3 << 20;
 	br13 = arg->bo->pitch;
-	if (sna->kgem.gen >= 40 && arg->bo->tiling) {
+	if (sna->kgem.gen >= 040 && arg->bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -6292,7 +6292,7 @@ sna_copy_plane_blt(DrawablePtr source, DrawablePtr drawable, GCPtr gc,
 
 	br00 = XY_MONO_SRC_COPY | 3 << 20;
 	br13 = arg->bo->pitch;
-	if (sna->kgem.gen >= 40 && arg->bo->tiling) {
+	if (sna->kgem.gen >= 040 && arg->bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -9900,7 +9900,7 @@ sna_poly_fill_rect_tiled_8x8_blt(DrawablePtr drawable,
 
 	br00 = XY_SCANLINE_BLT;
 	br13 = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -10504,7 +10504,7 @@ sna_poly_fill_rect_stippled_8x8_blt(DrawablePtr drawable,
 		DBG(("%s: pat offset (%d, %d)\n", __FUNCTION__ ,px, py));
 		br00 = XY_SCANLINE_BLT | px << 12 | py << 8 | 3 << 20;
 		br13 = bo->pitch;
-		if (sna->kgem.gen >= 40 && bo->tiling) {
+		if (sna->kgem.gen >= 040 && bo->tiling) {
 			br00 |= BLT_DST_TILED;
 			br13 >>= 2;
 		}
@@ -10804,7 +10804,7 @@ sna_poly_fill_rect_stippled_1_blt(DrawablePtr drawable,
 
 	br00 = 3 << 20;
 	br13 = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -11500,7 +11500,7 @@ sna_poly_fill_rect_stippled_n_blt__imm(DrawablePtr drawable,
 
 	br00 = XY_MONO_SRC_COPY_IMM | 3 << 20;
 	br13 = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -11645,7 +11645,7 @@ sna_poly_fill_rect_stippled_n_blt(DrawablePtr drawable,
 
 	br00 = XY_MONO_SRC_COPY | 3 << 20;
 	br13 = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		br00 |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -12298,7 +12298,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPtr gc,
 	b = sna->kgem.batch + sna->kgem.nbatch;
 	b[0] = XY_SETUP_BLT | 3 << 20;
 	b[1] = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		b[0] |= BLT_DST_TILED;
 		b[1] >>= 2;
 	}
@@ -12316,7 +12316,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPtr gc,
 	sna->kgem.nbatch += 8;
 
 	br00 = XY_TEXT_IMMEDIATE_BLT;
-	if (bo->tiling && sna->kgem.gen >= 40)
+	if (bo->tiling && sna->kgem.gen >= 040)
 		br00 |= BLT_DST_TILED;
 
 	do {
@@ -12361,7 +12361,7 @@ sna_glyph_blt(DrawablePtr drawable, GCPtr gc,
 				b = sna->kgem.batch + sna->kgem.nbatch;
 				b[0] = XY_SETUP_BLT | 3 << 20;
 				b[1] = bo->pitch;
-				if (sna->kgem.gen >= 40 && bo->tiling) {
+				if (sna->kgem.gen >= 040 && bo->tiling) {
 					b[0] |= BLT_DST_TILED;
 					b[1] >>= 2;
 				}
@@ -12942,7 +12942,7 @@ sna_reversed_glyph_blt(DrawablePtr drawable, GCPtr gc,
 	b = sna->kgem.batch + sna->kgem.nbatch;
 	b[0] = XY_SETUP_BLT | 1 << 20;
 	b[1] = bo->pitch;
-	if (sna->kgem.gen >= 40 && bo->tiling) {
+	if (sna->kgem.gen >= 040 && bo->tiling) {
 		b[0] |= BLT_DST_TILED;
 		b[1] >>= 2;
 	}
@@ -13023,7 +13023,7 @@ sna_reversed_glyph_blt(DrawablePtr drawable, GCPtr gc,
 				b = sna->kgem.batch + sna->kgem.nbatch;
 				b[0] = XY_SETUP_BLT | 1 << 20;
 				b[1] = bo->pitch;
-				if (sna->kgem.gen >= 40 && bo->tiling) {
+				if (sna->kgem.gen >= 040 && bo->tiling) {
 					b[0] |= BLT_DST_TILED;
 					b[1] >>= 2;
 				}
@@ -13046,7 +13046,7 @@ sna_reversed_glyph_blt(DrawablePtr drawable, GCPtr gc,
 			sna->kgem.nbatch += 3 + len;
 
 			b[0] = XY_TEXT_IMMEDIATE_BLT | (1 + len);
-			if (bo->tiling && sna->kgem.gen >= 40)
+			if (bo->tiling && sna->kgem.gen >= 040)
 				b[0] |= BLT_DST_TILED;
 			b[1] = (uint16_t)y1 << 16 | (uint16_t)x1;
 			b[2] = (uint16_t)(y1+h) << 16 | (uint16_t)(x1+w);
@@ -13358,7 +13358,7 @@ sna_push_pixels_solid_blt(GCPtr gc,
 		b[0] = XY_MONO_SRC_COPY | 3 << 20;
 		b[0] |= ((box->x1 - region->extents.x1) & 7) << 17;
 		b[1] = bo->pitch;
-		if (sna->kgem.gen >= 40 && bo->tiling) {
+		if (sna->kgem.gen >= 040 && bo->tiling) {
 			b[0] |= BLT_DST_TILED;
 			b[1] >>= 2;
 		}
@@ -14275,26 +14275,26 @@ bool sna_accel_init(ScreenPtr screen, struct sna *sna)
 	no_render_init(sna);
 
 #if !DEBUG_NO_RENDER
-	if (sna->info->gen >= 80) {
-	} else if (sna->info->gen >= 70) {
+	if (sna->info->gen >= 0100) {
+	} else if (sna->info->gen >= 070) {
 		if ((sna->have_render = gen7_render_init(sna)))
 			backend = "IvyBridge";
-	} else if (sna->info->gen >= 60) {
+	} else if (sna->info->gen >= 060) {
 		if ((sna->have_render = gen6_render_init(sna)))
 			backend = "SandyBridge";
-	} else if (sna->info->gen >= 50) {
+	} else if (sna->info->gen >= 050) {
 		if ((sna->have_render = gen5_render_init(sna)))
 			backend = "Ironlake";
-	} else if (sna->info->gen >= 45) {
+	} else if (sna->info->gen >= 045) {
 		if ((sna->have_render = g4x_render_init(sna)))
 			backend = "Eaglelake/Cantiga";
-	} else if (sna->info->gen >= 40) {
+	} else if (sna->info->gen >= 040) {
 		if ((sna->have_render = gen4_render_init(sna)))
 			backend = "Broadwater/Crestline";
-	} else if (sna->info->gen >= 30) {
+	} else if (sna->info->gen >= 030) {
 		if ((sna->have_render = gen3_render_init(sna)))
 			backend = "gen3";
-	} else if (sna->info->gen >= 20) {
+	} else if (sna->info->gen >= 020) {
 		if ((sna->have_render = gen2_render_init(sna)))
 			backend = "gen2";
 	}
diff --git a/src/sna/sna_blt.c b/src/sna/sna_blt.c
index a2604237..ef8b4f1a 100644
--- a/src/sna/sna_blt.c
+++ b/src/sna/sna_blt.c
@@ -119,7 +119,7 @@ static bool sna_blt_fill_init(struct sna *sna,
 
 	blt->br13 = bo->pitch;
 	blt->cmd = XY_SCANLINE_BLT;
-	if (kgem->gen >= 40 && bo->tiling) {
+	if (kgem->gen >= 040 && bo->tiling) {
 		blt->cmd |= BLT_DST_TILED;
 		blt->br13 >>= 2;
 	}
@@ -267,14 +267,14 @@ static bool sna_blt_copy_init(struct sna *sna,
 		blt->cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB;
 
 	blt->pitch[0] = src->pitch;
-	if (kgem->gen >= 40 && src->tiling) {
+	if (kgem->gen >= 040 && src->tiling) {
 		blt->cmd |= BLT_SRC_TILED;
 		blt->pitch[0] >>= 2;
 	}
 	assert(blt->pitch[0] <= MAXSHORT);
 
 	blt->pitch[1] = dst->pitch;
-	if (kgem->gen >= 40 && dst->tiling) {
+	if (kgem->gen >= 040 && dst->tiling) {
 		blt->cmd |= BLT_DST_TILED;
 		blt->pitch[1] >>= 2;
 	}
@@ -317,14 +317,14 @@ static bool sna_blt_alpha_fixup_init(struct sna *sna,
 
 	blt->cmd = XY_FULL_MONO_PATTERN_BLT;
 	blt->pitch[0] = src->pitch;
-	if (kgem->gen >= 40 && src->tiling) {
+	if (kgem->gen >= 040 && src->tiling) {
 		blt->cmd |= BLT_SRC_TILED;
 		blt->pitch[0] >>= 2;
 	}
 	assert(blt->pitch[0] <= MAXSHORT);
 
 	blt->pitch[1] = dst->pitch;
-	if (kgem->gen >= 40 && dst->tiling) {
+	if (kgem->gen >= 040 && dst->tiling) {
 		blt->cmd |= BLT_DST_TILED;
 		blt->pitch[1] >>= 2;
 	}
@@ -1256,7 +1256,7 @@ prepare_blt_copy(struct sna *sna,
 
 	DBG(("%s\n", __FUNCTION__));
 
-	if (sna->kgem.gen >= 60)
+	if (sna->kgem.gen >= 060)
 		op->done = gen6_blt_copy_done;
 	else
 		op->done = nop_done;
@@ -1942,7 +1942,7 @@ static void convert_done(struct sna *sna, const struct sna_composite_op *op)
 {
 	struct kgem *kgem = &sna->kgem;
 
-	if (kgem->gen >= 60 && kgem_check_batch(kgem, 3)) {
+	if (kgem->gen >= 060 && kgem_check_batch(kgem, 3)) {
 		uint32_t *b = kgem->batch + kgem->nbatch;
 		b[0] = XY_SETUP_CLIP;
 		b[1] = b[2] = 0;
@@ -2185,7 +2185,7 @@ bool sna_blt_copy(struct sna *sna, uint8_t alu,
 		return false;
 
 	op->blt  = sna_blt_copy_op_blt;
-	if (sna->kgem.gen >= 60)
+	if (sna->kgem.gen >= 060)
 		op->done = gen6_blt_copy_op_done;
 	else
 		op->done = sna_blt_copy_op_done;
@@ -2211,7 +2211,7 @@ static bool sna_blt_fill_box(struct sna *sna, uint8_t alu,
 
 	cmd = XY_COLOR_BLT;
 	br13 = bo->pitch;
-	if (kgem->gen >= 40 && bo->tiling) {
+	if (kgem->gen >= 040 && bo->tiling) {
 		cmd |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -2325,7 +2325,7 @@ bool sna_blt_fill_boxes(struct sna *sna, uint8_t alu,
 
 	br13 = bo->pitch;
 	cmd = XY_SCANLINE_BLT;
-	if (kgem->gen >= 40 && bo->tiling) {
+	if (kgem->gen >= 040 && bo->tiling) {
 		cmd |= 1 << 11;
 		br13 >>= 2;
 	}
@@ -2479,14 +2479,14 @@ bool sna_blt_copy_boxes(struct sna *sna, uint8_t alu,
 		cmd |= BLT_WRITE_ALPHA | BLT_WRITE_RGB;
 
 	src_pitch = src_bo->pitch;
-	if (kgem->gen >= 40 && src_bo->tiling) {
+	if (kgem->gen >= 040 && src_bo->tiling) {
 		cmd |= BLT_SRC_TILED;
 		src_pitch >>= 2;
 	}
 	assert(src_pitch <= MAXSHORT);
 
 	br13 = dst_bo->pitch;
-	if (kgem->gen >= 40 && dst_bo->tiling) {
+	if (kgem->gen >= 040 && dst_bo->tiling) {
 		cmd |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -2632,7 +2632,7 @@ bool sna_blt_copy_boxes(struct sna *sna, uint8_t alu,
 		} while (1);
 	}
 
-	if (kgem->gen >= 60 && kgem_check_batch(kgem, 3)) {
+	if (kgem->gen >= 060 && kgem_check_batch(kgem, 3)) {
 		uint32_t *b = kgem->batch + kgem->nbatch;
 		b[0] = XY_SETUP_CLIP;
 		b[1] = b[2] = 0;
diff --git a/src/sna/sna_display.c b/src/sna/sna_display.c
index cec2af3b..8dc1058f 100644
--- a/src/sna/sna_display.c
+++ b/src/sna/sna_display.c
@@ -2919,13 +2919,13 @@ sna_wait_for_scanline(struct sna *sna,
 	DBG(("%s: pipe=%d, y1=%d, y2=%d, full_height?=%d\n",
 	     __FUNCTION__, pipe, y1, y2, full_height));
 
-	if (sna->kgem.gen >= 80)
+	if (sna->kgem.gen >= 0100)
 		ret = false;
-	else if (sna->kgem.gen >= 70)
+	else if (sna->kgem.gen >= 070)
 		ret = sna_emit_wait_for_scanline_gen7(sna, pipe, y1, y2, full_height);
-	else if (sna->kgem.gen >= 60)
+	else if (sna->kgem.gen >= 060)
 		ret =sna_emit_wait_for_scanline_gen6(sna, pipe, y1, y2, full_height);
-	else if (sna->kgem.gen >= 40)
+	else if (sna->kgem.gen >= 040)
 		ret = sna_emit_wait_for_scanline_gen4(sna, pipe, y1, y2, full_height);
 	else
 		ret = sna_emit_wait_for_scanline_gen2(sna, pipe, y1, y2, full_height);
diff --git a/src/sna/sna_dri.c b/src/sna/sna_dri.c
index 82d9485f..2568c6b0 100644
--- a/src/sna/sna_dri.c
+++ b/src/sna/sna_dri.c
@@ -497,7 +497,7 @@ static void sna_dri_select_mode(struct sna *sna, struct kgem_bo *src, bool sync)
 	struct drm_i915_gem_busy busy;
 	int mode;
 
-	if (sna->kgem.gen < 60) {
+	if (sna->kgem.gen < 060) {
 		kgem_set_mode(&sna->kgem, KGEM_BLT);
 		return;
 	}
@@ -2419,7 +2419,7 @@ static const char *dri_driver_name(struct sna *sna)
 	Bool dummy;
 
 	if (s == NULL || xf86getBoolValue(&dummy, s))
-		return (sna->kgem.gen && sna->kgem.gen < 40) ? "i915" : "i965";
+		return (sna->kgem.gen && sna->kgem.gen < 040) ? "i915" : "i965";
 
 	return s;
 }
diff --git a/src/sna/sna_driver.c b/src/sna/sna_driver.c
index 086be6a8..7ac44d24 100644
--- a/src/sna/sna_driver.c
+++ b/src/sna/sna_driver.c
@@ -813,7 +813,7 @@ sna_register_all_privates(void)
 static size_t
 agp_aperture_size(struct pci_device *dev, int gen)
 {
-	return dev->regions[gen < 30 ? 0 : 2].size;
+	return dev->regions[gen < 030 ? 0 : 2].size;
 }
 
 static Bool
diff --git a/src/sna/sna_glyphs.c b/src/sna/sna_glyphs.c
index be1ce835..f6c68166 100644
--- a/src/sna/sna_glyphs.c
+++ b/src/sna/sna_glyphs.c
@@ -1091,7 +1091,7 @@ next_image:
 					     (int)this_atlas->format,
 					     (int)(format->depth << 24 | format->format)));
 					if (this_atlas->format == (format->depth << 24 | format->format) &&
-					    sna->kgem.gen != 45) { /* XXX cache corruption? how? */
+					    sna->kgem.gen != 045) { /* XXX cache corruption? how? */
 						ok = sna->render.composite(sna, PictOpAdd,
 									   this_atlas, NULL, mask,
 									   0, 0, 0, 0, 0, 0,
diff --git a/src/sna/sna_io.c b/src/sna/sna_io.c
index 2038e5df..bb7f9f9d 100644
--- a/src/sna/sna_io.c
+++ b/src/sna/sna_io.c
@@ -364,7 +364,7 @@ fallback:
 
 	cmd = XY_SRC_COPY_BLT_CMD;
 	src_pitch = src_bo->pitch;
-	if (kgem->gen >= 40 && src_bo->tiling) {
+	if (kgem->gen >= 040 && src_bo->tiling) {
 		cmd |= BLT_SRC_TILED;
 		src_pitch >>= 2;
 	}
@@ -483,7 +483,7 @@ fallback:
 
 static bool upload_inplace__tiled(struct kgem *kgem, struct kgem_bo *bo)
 {
-	if (kgem->gen < 50) /* bit17 swizzling :( */
+	if (kgem->gen < 050) /* bit17 swizzling :( */
 		return false;
 
 	if (bo->tiling != I915_TILING_X)
@@ -811,7 +811,7 @@ tile:
 
 	cmd = XY_SRC_COPY_BLT_CMD;
 	br13 = dst_bo->pitch;
-	if (kgem->gen >= 40 && dst_bo->tiling) {
+	if (kgem->gen >= 040 && dst_bo->tiling) {
 		cmd |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
@@ -1180,7 +1180,7 @@ tile:
 
 	cmd = XY_SRC_COPY_BLT_CMD;
 	br13 = dst_bo->pitch;
-	if (kgem->gen >= 40 && dst_bo->tiling) {
+	if (kgem->gen >= 040 && dst_bo->tiling) {
 		cmd |= BLT_DST_TILED;
 		br13 >>= 2;
 	}
diff --git a/src/sna/sna_render.c b/src/sna/sna_render.c
index 0a2856e3..27168ac6 100644
--- a/src/sna/sna_render.c
+++ b/src/sna/sna_render.c
@@ -1865,7 +1865,7 @@ sna_render_composite_redirect(struct sna *sna,
 
 			offset = box.x1 * op->dst.pixmap->drawable.bitsPerPixel / 8 / tile_width * tile_size;
 		} else {
-			if (sna->kgem.gen < 40) {
+			if (sna->kgem.gen < 040) {
 				box.y1 = box.y1 & ~3;
 				box.y2 = ALIGN(box.y2, 4);
 
diff --git a/src/sna/sna_video.c b/src/sna/sna_video.c
index 7bf20e96..43454549 100644
--- a/src/sna/sna_video.c
+++ b/src/sna/sna_video.c
@@ -197,12 +197,12 @@ sna_video_frame_init(struct sna *sna,
 	if (video->textured) {
 		align = 4;
 	} else {
-		if (sna->kgem.gen >= 40)
+		if (sna->kgem.gen >= 040)
 			/* Actually the alignment is 64 bytes, too. But the
 			 * stride must be at least 512 bytes. Take the easy fix
 			 * and align on 512 bytes unconditionally. */
 			align = 512;
-		else if (sna->kgem.gen < 21)
+		else if (sna->kgem.gen < 021)
 			/* Harsh, errata on these chipsets limit the stride
 			 * to be a multiple of 256 bytes.
 			 */
@@ -213,7 +213,7 @@ sna_video_frame_init(struct sna *sna,
 
 #if SNA_XVMC
 	/* for i915 xvmc, hw requires 1kb aligned surfaces */
-	if (id == FOURCC_XVMC && sna->kgem.gen < 40)
+	if (id == FOURCC_XVMC && sna->kgem.gen < 040)
 		align = 1024;
 #endif
 
diff --git a/src/sna/sna_video_hwmc.c b/src/sna/sna_video_hwmc.c
index b0e8d25d..0eaf051c 100644
--- a/src/sna/sna_video_hwmc.c
+++ b/src/sna/sna_video_hwmc.c
@@ -71,14 +71,14 @@ static int create_context(ScrnInfoPtr scrn, XvMCContextPtr pContext,
 
 	*num_priv = sizeof(struct sna_xvmc_hw_context) >> 2;
 
-	if (sna->kgem.gen >= 40) {
-		if (sna->kgem.gen >= 45)
+	if (sna->kgem.gen >= 040) {
+		if (sna->kgem.gen >= 045)
 			contextRec->type = XVMC_I965_MPEG2_VLD;
 		else
 			contextRec->type = XVMC_I965_MPEG2_MC;
-		contextRec->i965.is_g4x = sna->kgem.gen == 45;
+		contextRec->i965.is_g4x = sna->kgem.gen == 045;
 		contextRec->i965.is_965_q = IS_965_Q(sna);
-		contextRec->i965.is_igdng = sna->kgem.gen == 50;
+		contextRec->i965.is_igdng = sna->kgem.gen == 050;
 	} else {
 		contextRec->type = XVMC_I915_MPEG2_MC;
 		contextRec->i915.use_phys_addr = 0;
@@ -196,11 +196,11 @@ Bool sna_video_xvmc_setup(struct sna *sna,
 	char buf[64];
 
 	/* Needs KMS support. */
-	if (sna->kgem.gen < 31)
+	if (sna->kgem.gen < 031)
 		return FALSE;
 
 	/* Not implemented */
-	if (sna->kgem.gen >= 60)
+	if (sna->kgem.gen >= 060)
 		return FALSE;
 
 	pAdapt = calloc(1, sizeof(XF86MCAdaptorRec));
@@ -217,11 +217,11 @@ Bool sna_video_xvmc_setup(struct sna *sna,
 	pAdapt->CreateSubpicture =  create_subpicture;
 	pAdapt->DestroySubpicture = destroy_subpicture;
 
-	if (sna->kgem.gen >= 45) {
+	if (sna->kgem.gen >= 045) {
 		name = "xvmc_vld",
 		pAdapt->num_surfaces = ARRAY_SIZE(surface_info_vld);
 		pAdapt->surfaces = surface_info_vld;
-	} else if (sna->kgem.gen >= 40) {
+	} else if (sna->kgem.gen >= 040) {
 		name = "i965_xvmc",
 		pAdapt->num_surfaces = ARRAY_SIZE(surface_info_i965);
 		pAdapt->surfaces = surface_info_i965;
diff --git a/src/sna/sna_video_overlay.c b/src/sna/sna_video_overlay.c
index a1cc4b98..a1a905a6 100644
--- a/src/sna/sna_video_overlay.c
+++ b/src/sna/sna_video_overlay.c
@@ -41,7 +41,7 @@
 
 #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
 
-#define HAS_GAMMA(sna) ((sna)->kgem.gen >= 30)
+#define HAS_GAMMA(sna) ((sna)->kgem.gen >= 030)
 
 static Atom xvBrightness, xvContrast, xvSaturation, xvColorKey, xvPipe;
 static Atom xvGamma0, xvGamma1, xvGamma2, xvGamma3, xvGamma4, xvGamma5;
@@ -296,7 +296,7 @@ sna_video_overlay_query_best_size(ScrnInfoPtr scrn,
 		drw_h = vid_h >> 1;
 	}
 
-	if (sna->kgem.gen < 21) {
+	if (sna->kgem.gen < 021) {
 		max_w = IMAGE_MAX_WIDTH_LEGACY;
 		max_h = IMAGE_MAX_HEIGHT_LEGACY;
 	} else {
@@ -555,7 +555,7 @@ sna_video_overlay_query_video_attributes(ScrnInfoPtr scrn,
 
 	DBG(("%s: w is %d, h is %d\n", __FUNCTION__, *w, *h));
 
-	if (sna->kgem.gen < 21) {
+	if (sna->kgem.gen < 021) {
 		if (*w > IMAGE_MAX_WIDTH_LEGACY)
 			*w = IMAGE_MAX_WIDTH_LEGACY;
 		if (*h > IMAGE_MAX_HEIGHT_LEGACY)
@@ -665,7 +665,7 @@ XF86VideoAdaptorPtr sna_video_overlay_setup(struct sna *sna,
 	adaptor->nEncodings = 1;
 	adaptor->pEncodings = xnfalloc(sizeof(DummyEncoding));
 	memcpy(adaptor->pEncodings, DummyEncoding, sizeof(DummyEncoding));
-	if (sna->kgem.gen < 21) {
+	if (sna->kgem.gen < 021) {
 		adaptor->pEncodings->width = IMAGE_MAX_WIDTH_LEGACY;
 		adaptor->pEncodings->height = IMAGE_MAX_HEIGHT_LEGACY;
 	}
diff --git a/src/sna/sna_video_sprite.c b/src/sna/sna_video_sprite.c
index d4eae913..b51bf162 100644
--- a/src/sna/sna_video_sprite.c
+++ b/src/sna/sna_video_sprite.c
@@ -118,7 +118,7 @@ static void sna_video_sprite_best_size(ScrnInfoPtr scrn, Bool motion,
 {
 	struct sna *sna = to_sna(scrn);
 
-	if (sna->kgem.gen == 75) {
+	if (sna->kgem.gen == 075) {
 		*p_w = vid_w;
 		*p_h = vid_h;
 	} else {
diff --git a/src/sna/sna_video_textured.c b/src/sna/sna_video_textured.c
index 01977bac..f420769a 100644
--- a/src/sna/sna_video_textured.c
+++ b/src/sna/sna_video_textured.c
@@ -254,7 +254,7 @@ sna_video_textured_put_image(ScrnInfoPtr scrn,
 		DBG(("%s: using passthough, name=%d\n",
 		     __FUNCTION__, *(uint32_t *)buf));
 
-		if (sna->kgem.gen < 31) {
+		if (sna->kgem.gen < 031) {
 			/* XXX: i915 is not support and needs some
 			 * serious care.  grep for KMS in i915_hwmc.c */
 			return BadAlloc;