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authorChris Wilson <chris@chris-wilson.co.uk>2013-07-26 10:14:11 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2013-07-28 14:49:07 +0100
commita12c352b56e742b8f8aca4d8ca9efa26f268817b (patch)
tree253c33a212c3a1d0fa8c29d97736b9fb64e5d8cc /src/uxa
parente94f66c951ae9e0d4304cf8005537a147bda5d79 (diff)
intel: Remove some unused macros
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src/uxa')
-rw-r--r--src/uxa/intel.h12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/uxa/intel.h b/src/uxa/intel.h
index 2b1ff5e2..9b696cd8 100644
--- a/src/uxa/intel.h
+++ b/src/uxa/intel.h
@@ -364,14 +364,14 @@ typedef struct intel_screen_private {
#define IS_HSW(intel) (INTEL_INFO(intel)->gen == 075)
/* Some chips have specific errata (or limits) that we need to workaround. */
-#define IS_I830(intel) (DEVICE_ID((intel)->PciInfo) == PCI_CHIP_I830_M)
-#define IS_845G(intel) (DEVICE_ID((intel)->PciInfo) == PCI_CHIP_845_G)
-#define IS_I865G(intel) (DEVICE_ID((intel)->PciInfo) == PCI_CHIP_I865_G)
+#define IS_I830(intel) ((intel)->PciInfo->device_id == PCI_CHIP_I830_M)
+#define IS_845G(intel) ((intel)->PciInfo->device_id == PCI_CHIP_845_G)
+#define IS_I865G(intel) ((intel)->PciInfo->device_id == PCI_CHIP_I865_G)
-#define IS_I915G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM)
+#define IS_I915G(pI810) ((intel)->PciInfo->device_id == PCI_CHIP_I915_G || (intel)->PciInfo->device_id == PCI_CHIP_E7221_G)
+#define IS_I915GM(pI810) ((intel)->PciInfo->device_id == PCI_CHIP_I915_GM)
-#define IS_965_Q(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q)
+#define IS_965_Q(pI810) ((intel)->PciInfo->device_id == PCI_CHIP_I965_Q)
/* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
#define SUPPORTS_YTILING(pI810) (INTEL_INFO(intel)->gen >= 040)