Move to kernel coding style.

We've talked about doing this since the start of the project, putting it off
until "some convenient time".  Just after removing a third of the driver seems
like a convenient time, when backporting's probably not happening much anyway.

61 files changed, 19268 insertions, 18861 deletions

diff --git a/src/bios_reader/bios_dumper.c b/src/bios_reader/bios_dumper.c
index 1353edaa..53293ebd 100644
--- a/src/bios_reader/bios_dumper.c
+++ b/src/bios_reader/bios_dumper.c
@@ -37,68 +37,71 @@
 #include <err.h>
 
 #ifndef DEFFILEMODE
-#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) /* 0666*/
+#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH)	/* 0666 */
 #endif
 
 static void usage(void)
 {
-    fprintf(stderr, "usage: bios_dumper <filename>\n");
-    exit(1);
+	fprintf(stderr, "usage: bios_dumper <filename>\n");
+	exit(1);
 }
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev;
-    void *bios;
-    int err, fd;
+	struct pci_device *dev;
+	void *bios;
+	int err, fd;
 
-    if (argc != 2)
-	usage();
+	if (argc != 2)
+		usage();
 
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
 
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
 
-    bios = malloc(dev->rom_size);
-    if (bios == NULL)
-	errx(1, "Couldn't allocate memory for BIOS data\n");
+	bios = malloc(dev->rom_size);
+	if (bios == NULL)
+		errx(1, "Couldn't allocate memory for BIOS data\n");
 
-    err = pci_device_read_rom(dev, bios);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't read graphics card ROM: %s\n",
-		strerror(err));
-	exit(1);
-    }
+	err = pci_device_read_rom(dev, bios);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't read graphics card ROM: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC, DEFFILEMODE);
-    if (fd < 0) {
-	fprintf(stderr, "Couldn't open output: %s\n", strerror(errno));
-	exit(1);
-    }
+	fd = open(argv[1], O_RDWR | O_CREAT | O_TRUNC, DEFFILEMODE);
+	if (fd < 0) {
+		fprintf(stderr, "Couldn't open output: %s\n", strerror(errno));
+		exit(1);
+	}
 
-    if (write(fd, bios, dev->rom_size) < dev->rom_size) {
-	fprintf(stderr, "Couldn't write BIOS data: %s\n", strerror(errno));
-	exit(1);
-    }
+	if (write(fd, bios, dev->rom_size) < dev->rom_size) {
+		fprintf(stderr, "Couldn't write BIOS data: %s\n",
+			strerror(errno));
+		exit(1);
+	}
 
-    close(fd);
-    pci_system_cleanup();
+	close(fd);
+	pci_system_cleanup();
 
-    return 0;
+	return 0;
 }
diff --git a/src/bios_reader/bios_reader.c b/src/bios_reader/bios_reader.c
index 88467395..ee1e3f56 100644
--- a/src/bios_reader/bios_reader.c
+++ b/src/bios_reader/bios_reader.c
@@ -35,7 +35,6 @@
 #include <sys/stat.h>
 #include <sys/types.h>
 
-
 #include "../i830_bios.h"
 
 #include <X11/Xfuncproto.h>
@@ -43,10 +42,9 @@
 #define _PARSE_EDID_
 #include "edid.h"
 
-
 /* Make a fake pI830 so we can easily pull i830_bios.c code in here. */
 struct _fake_i830 {
-    uint8_t *VBIOS;
+	uint8_t *VBIOS;
 };
 struct _fake_i830 I830;
 struct _fake_i830 *pI830 = &I830;
@@ -62,9 +60,9 @@ struct _fake_i830 *pI830 = &I830;
 #define YESNO(val) ((val) ? "yes" : "no")
 
 struct bdb_block {
-    uint8_t id;
-    uint16_t size;
-    void *data;
+	uint8_t id;
+	uint16_t size;
+	void *data;
 };
 
 struct bdb_header *bdb;
@@ -74,492 +72,516 @@ static int panel_type;
 
 static struct bdb_block *find_section(int section_id)
 {
-    struct bdb_block *block;
-    unsigned char *base = (unsigned char *)bdb;
-    int index = 0;
-    uint16_t total, current_size;
-    unsigned char current_id;
-
-    /* skip to first section */
-    index += bdb->header_size;
-    total = bdb->bdb_size;
-
-    block = malloc(sizeof(*block));
-    if (!block) {
-	fprintf(stderr, "out of memory\n");
-	exit(-1);
-    }
-
-    /* walk the sections looking for section_id */
-    while (index < total) {
-	current_id = *(base + index);
-	index++;
-	current_size = *((uint16_t *)(base + index));
-	index += 2;
-	if (current_id == section_id) {
-	    block->id = current_id;
-	    block->size = current_size;
-	    block->data = base + index;
-	    return block;
+	struct bdb_block *block;
+	unsigned char *base = (unsigned char *)bdb;
+	int index = 0;
+	uint16_t total, current_size;
+	unsigned char current_id;
+
+	/* skip to first section */
+	index += bdb->header_size;
+	total = bdb->bdb_size;
+
+	block = malloc(sizeof(*block));
+	if (!block) {
+		fprintf(stderr, "out of memory\n");
+		exit(-1);
+	}
+
+	/* walk the sections looking for section_id */
+	while (index < total) {
+		current_id = *(base + index);
+		index++;
+		current_size = *((uint16_t *) (base + index));
+		index += 2;
+		if (current_id == section_id) {
+			block->id = current_id;
+			block->size = current_size;
+			block->data = base + index;
+			return block;
+		}
+		index += current_size;
 	}
-	index += current_size;
-    }
 
-    free(block);
-    return NULL;
+	free(block);
+	return NULL;
 }
 
 static void dump_general_features(void)
 {
-    struct bdb_general_features *features;
-    struct bdb_block *block;
-
-    block = find_section(BDB_GENERAL_FEATURES);
-
-    if (!block)
-	return;
-
-    features = block->data;
-
-    printf("General features block:\n");
-
-    printf("\tPanel fitting: ");
-    switch (features->panel_fitting) {
-    case 0:
-	printf("disabled\n");
-	break;
-    case 1:
-	printf("text only\n");
-	break;
-    case 2:
-	printf("graphics only\n");
-	break;
-    case 3:
-	printf("text & graphics\n");
-	break;
-    }
-    printf("\tFlexaim: %s\n", YESNO(features->flexaim));
-    printf("\tMessage: %s\n", YESNO(features->msg_enable));
-    printf("\tClear screen: %d\n", features->clear_screen);
-    printf("\tDVO color flip required: %s\n", YESNO(features->color_flip));
-    printf("\tExternal VBT: %s\n", YESNO(features->download_ext_vbt));
-    printf("\tEnable SSC: %s\n", YESNO(features->enable_ssc));
-    if (features->enable_ssc)
-	printf("\tSSC frequency: %s\n", features->ssc_freq ?
-	       "100 MHz (66 MHz on 855)" : "96 MHz (48 MHz on 855)");
-    printf("\tLFP on override: %s\n", YESNO(features->enable_lfp_on_override));
-    printf("\tDisable SSC on clone: %s\n", YESNO(features->disable_ssc_ddt));
-    printf("\tDisable smooth vision: %s\n",
-	   YESNO(features->disable_smooth_vision));
-    printf("\tSingle DVI for CRT/DVI: %s\n", YESNO(features->single_dvi));
-    printf("\tLegacy monitor detect: %s\n",
-	   YESNO(features->legacy_monitor_detect));
-    printf("\tIntegrated CRT: %s\n", YESNO(features->int_crt_support));
-    printf("\tIntegrated TV: %s\n", YESNO(features->int_tv_support));
-
-    tv_present = 1; /* should be based on whether TV DAC exists */
-    lvds_present = 1; /* should be based on IS_MOBILE() */
-
-    free(block);
+	struct bdb_general_features *features;
+	struct bdb_block *block;
+
+	block = find_section(BDB_GENERAL_FEATURES);
+
+	if (!block)
+		return;
+
+	features = block->data;
+
+	printf("General features block:\n");
+
+	printf("\tPanel fitting: ");
+	switch (features->panel_fitting) {
+	case 0:
+		printf("disabled\n");
+		break;
+	case 1:
+		printf("text only\n");
+		break;
+	case 2:
+		printf("graphics only\n");
+		break;
+	case 3:
+		printf("text & graphics\n");
+		break;
+	}
+	printf("\tFlexaim: %s\n", YESNO(features->flexaim));
+	printf("\tMessage: %s\n", YESNO(features->msg_enable));
+	printf("\tClear screen: %d\n", features->clear_screen);
+	printf("\tDVO color flip required: %s\n", YESNO(features->color_flip));
+	printf("\tExternal VBT: %s\n", YESNO(features->download_ext_vbt));
+	printf("\tEnable SSC: %s\n", YESNO(features->enable_ssc));
+	if (features->enable_ssc)
+		printf("\tSSC frequency: %s\n", features->ssc_freq ?
+		       "100 MHz (66 MHz on 855)" : "96 MHz (48 MHz on 855)");
+	printf("\tLFP on override: %s\n",
+	       YESNO(features->enable_lfp_on_override));
+	printf("\tDisable SSC on clone: %s\n",
+	       YESNO(features->disable_ssc_ddt));
+	printf("\tDisable smooth vision: %s\n",
+	       YESNO(features->disable_smooth_vision));
+	printf("\tSingle DVI for CRT/DVI: %s\n", YESNO(features->single_dvi));
+	printf("\tLegacy monitor detect: %s\n",
+	       YESNO(features->legacy_monitor_detect));
+	printf("\tIntegrated CRT: %s\n", YESNO(features->int_crt_support));
+	printf("\tIntegrated TV: %s\n", YESNO(features->int_tv_support));
+
+	tv_present = 1;		/* should be based on whether TV DAC exists */
+	lvds_present = 1;	/* should be based on IS_MOBILE() */
+
+	free(block);
 }
 
 static void dump_backlight_info(void)
 {
-    struct bdb_block *block;
-    struct bdb_lvds_backlight *backlight;
-    struct blc_struct *blc;
+	struct bdb_block *block;
+	struct bdb_lvds_backlight *backlight;
+	struct blc_struct *blc;
 
-    block = find_section(BDB_LVDS_BACKLIGHT);
+	block = find_section(BDB_LVDS_BACKLIGHT);
 
-    if (!block)
-	return;
+	if (!block)
+		return;
 
-    backlight = block->data;
+	backlight = block->data;
 
-    printf("Backlight info block (len %d):\n", block->size);
+	printf("Backlight info block (len %d):\n", block->size);
 
-    if (sizeof(struct blc_struct) != backlight->blcstruct_size) {
-	printf("\tBacklight struct sizes don't match (expected %d, got %d), skipping\n",
-	       sizeof(struct blc_struct), backlight->blcstruct_size);
-	return;
-    }
+	if (sizeof(struct blc_struct) != backlight->blcstruct_size) {
+		printf
+		    ("\tBacklight struct sizes don't match (expected %d, got %d), skipping\n",
+		     sizeof(struct blc_struct), backlight->blcstruct_size);
+		return;
+	}
 
-    blc = &backlight->panels[panel_type];
+	blc = &backlight->panels[panel_type];
 
-    printf("\tInverter type: %d\n", blc->inverter_type);
-    printf("\t     polarity: %d\n", blc->inverter_polarity);
-    printf("\t    GPIO pins: %d\n", blc->gpio_pins);
-    printf("\t  GMBUS speed: %d\n", blc->gmbus_speed);
-    printf("\t     PWM freq: %d\n", blc->pwm_freq);
-    printf("\tMinimum brightness: %d\n", blc->min_brightness);
-    printf("\tI2C slave addr: 0x%02x\n", blc->i2c_slave_addr);
-    printf("\tI2C command: 0x%02x\n", blc->i2c_cmd);
+	printf("\tInverter type: %d\n", blc->inverter_type);
+	printf("\t     polarity: %d\n", blc->inverter_polarity);
+	printf("\t    GPIO pins: %d\n", blc->gpio_pins);
+	printf("\t  GMBUS speed: %d\n", blc->gmbus_speed);
+	printf("\t     PWM freq: %d\n", blc->pwm_freq);
+	printf("\tMinimum brightness: %d\n", blc->min_brightness);
+	printf("\tI2C slave addr: 0x%02x\n", blc->i2c_slave_addr);
+	printf("\tI2C command: 0x%02x\n", blc->i2c_cmd);
 }
 
 static void dump_general_definitions(void)
 {
-    struct bdb_block *block;
-    struct bdb_general_definitions *defs;
-    struct child_device_config *child;
-    int i;
-    char child_id[11];
-    int child_device_num;
-
-    block = find_section(BDB_GENERAL_DEFINITIONS);
-
-    if (!block)
-	return;
-
-    defs = block->data;
-
-    printf("General definitions block:\n");
-
-    printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin);
-    printf("\tUse ACPI DPMS CRT power states: %s\n", YESNO(defs->dpms_acpi));
-    printf("\tSkip CRT detect at boot: %s\n",
-	   YESNO(defs->skip_boot_crt_detect));
-    printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim));
-    printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1],
-	   defs->boot_display[0]);
-    printf("\tTV data block present: %s\n", YESNO(tv_present));
-    child_device_num = (block->size - sizeof(*defs)) / sizeof(*child);
-    for (i = 0; i < child_device_num; i++) {
-	child = &defs->devices[i];
-	if (!child->device_type) {
-	    printf("\tChild device %d not present\n", i);
-	    continue;
+	struct bdb_block *block;
+	struct bdb_general_definitions *defs;
+	struct child_device_config *child;
+	int i;
+	char child_id[11];
+	int child_device_num;
+
+	block = find_section(BDB_GENERAL_DEFINITIONS);
+
+	if (!block)
+		return;
+
+	defs = block->data;
+
+	printf("General definitions block:\n");
+
+	printf("\tCRT DDC GMBUS addr: 0x%02x\n", defs->crt_ddc_gmbus_pin);
+	printf("\tUse ACPI DPMS CRT power states: %s\n",
+	       YESNO(defs->dpms_acpi));
+	printf("\tSkip CRT detect at boot: %s\n",
+	       YESNO(defs->skip_boot_crt_detect));
+	printf("\tUse DPMS on AIM devices: %s\n", YESNO(defs->dpms_aim));
+	printf("\tBoot display type: 0x%02x%02x\n", defs->boot_display[1],
+	       defs->boot_display[0]);
+	printf("\tTV data block present: %s\n", YESNO(tv_present));
+	child_device_num = (block->size - sizeof(*defs)) / sizeof(*child);
+	for (i = 0; i < child_device_num; i++) {
+		child = &defs->devices[i];
+		if (!child->device_type) {
+			printf("\tChild device %d not present\n", i);
+			continue;
+		}
+		strncpy(child_id, (char *)child->device_id, 10);
+		child_id[10] = 0;
+		printf("\tChild %d device info:\n", i);
+		printf("\t\tSignature: %s\n", child_id);
+		printf("\t\tAIM offset: %d\n", child->addin_offset);
+		printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
 	}
-	strncpy(child_id, (char *)child->device_id, 10);
-	child_id[10] = 0;
-	printf("\tChild %d device info:\n", i);
-	printf("\t\tSignature: %s\n", child_id);
-	printf("\t\tAIM offset: %d\n", child->addin_offset);
-	printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
-    }
-
-    free(block);
+
+	free(block);
 }
 
 #if 0
 static void dump_child_devices(void)
 {
-    struct bdb_block *block;
-    struct bdb_child_devices *child_devs;
-    struct child_device_config *child;
-    int i;
-
-    block = find_section(BDB_CHILD_DEVICE_TABLE);
-    if (!block) {
-	printf("No child device table found\n");
-	return;
-    }
-
-    child_devs = block->data;
-
-    printf("Child devices block:\n");
-    for (i = 0; i < DEVICE_CHILD_SIZE; i++) {
-	child = &child_devs->children[i];
-	/* Skip nonexistent children */
-	if (!child->device_type)
-	    continue;
-	printf("\tChild device %d\n", i);
-	printf("\t\tType: 0x%04x\n", child->device_type);
-	printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
-	printf("\t\tI2C pin: 0x%02x\n", child->i2c_pin);
-	printf("\t\tSlave addr: 0x%02x\n", child->slave_addr);
-	printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin);
-	printf("\t\tDVO config: 0x%02x\n", child->dvo_cfg);
-	printf("\t\tDVO wiring: 0x%02x\n", child->dvo_wiring);
-    }
-
-    free(block);
+	struct bdb_block *block;
+	struct bdb_child_devices *child_devs;
+	struct child_device_config *child;
+	int i;
+
+	block = find_section(BDB_CHILD_DEVICE_TABLE);
+	if (!block) {
+		printf("No child device table found\n");
+		return;
+	}
+
+	child_devs = block->data;
+
+	printf("Child devices block:\n");
+	for (i = 0; i < DEVICE_CHILD_SIZE; i++) {
+		child = &child_devs->children[i];
+		/* Skip nonexistent children */
+		if (!child->device_type)
+			continue;
+		printf("\tChild device %d\n", i);
+		printf("\t\tType: 0x%04x\n", child->device_type);
+		printf("\t\tDVO port: 0x%02x\n", child->dvo_port);
+		printf("\t\tI2C pin: 0x%02x\n", child->i2c_pin);
+		printf("\t\tSlave addr: 0x%02x\n", child->slave_addr);
+		printf("\t\tDDC pin: 0x%02x\n", child->ddc_pin);
+		printf("\t\tDVO config: 0x%02x\n", child->dvo_cfg);
+		printf("\t\tDVO wiring: 0x%02x\n", child->dvo_wiring);
+	}
+
+	free(block);
 }
 #endif
 
 static void dump_lvds_options(void)
 {
-    struct bdb_block *block;
-    struct bdb_lvds_options *options;
-
-    block = find_section(BDB_LVDS_OPTIONS);
-    if (!block) {
-	printf("No LVDS options block\n");
-	return;
-    }
-
-    options = block->data;
-
-    printf("LVDS options block:\n");
-
-    panel_type = options->panel_type;
-    printf("\tPanel type: %d\n", panel_type);
-    printf("\tLVDS EDID available: %s\n", YESNO(options->lvds_edid));
-    printf("\tPixel dither: %s\n", YESNO(options->pixel_dither));
-    printf("\tPFIT auto ratio: %s\n", YESNO(options->pfit_ratio_auto));
-    printf("\tPFIT enhanced graphics mode: %s\n",
-	   YESNO(options->pfit_gfx_mode_enhanced));
-    printf("\tPFIT enhanced text mode: %s\n",
-	   YESNO(options->pfit_text_mode_enhanced));
-    printf("\tPFIT mode: %d\n", options->pfit_mode);
-
-    free(block);
+	struct bdb_block *block;
+	struct bdb_lvds_options *options;
+
+	block = find_section(BDB_LVDS_OPTIONS);
+	if (!block) {
+		printf("No LVDS options block\n");
+		return;
+	}
+
+	options = block->data;
+
+	printf("LVDS options block:\n");
+
+	panel_type = options->panel_type;
+	printf("\tPanel type: %d\n", panel_type);
+	printf("\tLVDS EDID available: %s\n", YESNO(options->lvds_edid));
+	printf("\tPixel dither: %s\n", YESNO(options->pixel_dither));
+	printf("\tPFIT auto ratio: %s\n", YESNO(options->pfit_ratio_auto));
+	printf("\tPFIT enhanced graphics mode: %s\n",
+	       YESNO(options->pfit_gfx_mode_enhanced));
+	printf("\tPFIT enhanced text mode: %s\n",
+	       YESNO(options->pfit_text_mode_enhanced));
+	printf("\tPFIT mode: %d\n", options->pfit_mode);
+
+	free(block);
 }
 
 static void dump_lvds_ptr_data(void)
 {
-    struct bdb_block *block;
-    struct bdb_lvds_lfp_data *lvds_data;
-    struct bdb_lvds_lfp_data_ptrs *ptrs;
-    struct lvds_fp_timing *fp_timing;
-    struct bdb_lvds_lfp_data_entry *entry;
-    int lfp_data_size;
-
-    block = find_section(BDB_LVDS_LFP_DATA_PTRS);
-    if (!block) {
-	printf("No LFP data pointers block\n");
-	return;
-    }
-    ptrs = block->data;
-
-    block = find_section(BDB_LVDS_LFP_DATA);
-    if (!block) {
-	printf("No LVDS data block\n");
-	return;
-    }
-    lvds_data = block->data;
-
-    lfp_data_size = ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset;
-    entry = (struct bdb_lvds_lfp_data_entry *)((uint8_t *)lvds_data->data +
+	struct bdb_block *block;
+	struct bdb_lvds_lfp_data *lvds_data;
+	struct bdb_lvds_lfp_data_ptrs *ptrs;
+	struct lvds_fp_timing *fp_timing;
+	struct bdb_lvds_lfp_data_entry *entry;
+	int lfp_data_size;
+
+	block = find_section(BDB_LVDS_LFP_DATA_PTRS);
+	if (!block) {
+		printf("No LFP data pointers block\n");
+		return;
+	}
+	ptrs = block->data;
+
+	block = find_section(BDB_LVDS_LFP_DATA);
+	if (!block) {
+		printf("No LVDS data block\n");
+		return;
+	}
+	lvds_data = block->data;
+
+	lfp_data_size =
+	    ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset;
+	entry =
+	    (struct bdb_lvds_lfp_data_entry *)((uint8_t *) lvds_data->data +
 					       (lfp_data_size * panel_type));
-    fp_timing = &entry->fp_timing;
+	fp_timing = &entry->fp_timing;
 
-    printf("LVDS timing pointer data:\n");
-    printf("  Number of entries: %d\n", ptrs->lvds_entries);
+	printf("LVDS timing pointer data:\n");
+	printf("  Number of entries: %d\n", ptrs->lvds_entries);
 
-    printf("\tpanel type %02i: %dx%d\n", panel_type, fp_timing->x_res,
-	   fp_timing->y_res);
+	printf("\tpanel type %02i: %dx%d\n", panel_type, fp_timing->x_res,
+	       fp_timing->y_res);
 
-    free(block);
+	free(block);
 }
 
 static void dump_lvds_data(void)
 {
-    struct bdb_block *block;
-    struct bdb_lvds_lfp_data *lvds_data;
-    struct bdb_lvds_lfp_data_ptrs *ptrs;
-    int num_entries;
-    int i;
-    int hdisplay, hsyncstart, hsyncend, htotal;
-    int vdisplay, vsyncstart, vsyncend, vtotal;
-    float clock;
-    int lfp_data_size, dvo_offset;
-
-    block = find_section(BDB_LVDS_LFP_DATA_PTRS);
-    if (!block) {
-	printf("No LVDS ptr block\n");
-        return;
-    }
-    ptrs = block->data;
-    lfp_data_size = ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset;
-    dvo_offset = ptrs->ptr[0].dvo_timing_offset - ptrs->ptr[0].fp_timing_offset;
-    free(block);
-
-    block = find_section(BDB_LVDS_LFP_DATA);
-    if (!block) {
-	printf("No LVDS data block\n");
-	return;
-    }
-
-    lvds_data = block->data;
-    num_entries = block->size / lfp_data_size;
-
-    printf("LVDS panel data block (preferred block marked with '*'):\n");
-    printf("  Number of entries: %d\n", num_entries);
-
-    for (i = 0; i < num_entries; i++) {
-	uint8_t *lfp_data_ptr = (uint8_t *)lvds_data->data + lfp_data_size * i;
-	uint8_t *timing_data = lfp_data_ptr + dvo_offset;
-	struct bdb_lvds_lfp_data_entry *lfp_data =
-			(struct bdb_lvds_lfp_data_entry *)lfp_data_ptr;
-	char marker;
-
-	if (i == panel_type)
-	    marker = '*';
-	else
-	    marker = ' ';
-
-	hdisplay   = _H_ACTIVE(timing_data);
-	hsyncstart = hdisplay + _H_SYNC_OFF(timing_data);
-	hsyncend   = hsyncstart + _H_SYNC_WIDTH(timing_data);
-	htotal     = hdisplay + _H_BLANK(timing_data);
-
-	vdisplay   = _V_ACTIVE(timing_data);
-	vsyncstart = vdisplay + _V_SYNC_OFF(timing_data);
-	vsyncend   = vsyncstart + _V_SYNC_WIDTH(timing_data);
-	vtotal     = vdisplay + _V_BLANK(timing_data);
-	clock      = _PIXEL_CLOCK(timing_data) / 1000;
-
-	printf("%c\tpanel type %02i: %dx%d clock %d\n", marker,
-	       i, lfp_data->fp_timing.x_res, lfp_data->fp_timing.y_res,
-	       _PIXEL_CLOCK(timing_data));
-	printf("\t\tinfo:\n");
-	printf("\t\t  LVDS: 0x%08lx\n",
-	       (unsigned long)lfp_data->fp_timing.lvds_reg_val);
-	printf("\t\t  PP_ON_DELAYS: 0x%08lx\n",
-	       (unsigned long)lfp_data->fp_timing.pp_on_reg_val);
-	printf("\t\t  PP_OFF_DELAYS: 0x%08lx\n",
-	       (unsigned long)lfp_data->fp_timing.pp_off_reg_val);
-	printf("\t\t  PP_DIVISOR: 0x%08lx\n",
-	       (unsigned long)lfp_data->fp_timing.pp_cycle_reg_val);
-	printf("\t\t  PFIT: 0x%08lx\n",
-	       (unsigned long)lfp_data->fp_timing.pfit_reg_val);
-	printf("\t\ttimings: %d %d %d %d %d %d %d %d %.2f (%s)\n",
-	       hdisplay, hsyncstart, hsyncend, htotal,
-	       vdisplay, vsyncstart, vsyncend, vtotal, clock,
-	       (hsyncend > htotal || vsyncend > vtotal) ?
-	       "BAD!" : "good");
-    }
-    free(block);
+	struct bdb_block *block;
+	struct bdb_lvds_lfp_data *lvds_data;
+	struct bdb_lvds_lfp_data_ptrs *ptrs;
+	int num_entries;
+	int i;
+	int hdisplay, hsyncstart, hsyncend, htotal;
+	int vdisplay, vsyncstart, vsyncend, vtotal;
+	float clock;
+	int lfp_data_size, dvo_offset;
+
+	block = find_section(BDB_LVDS_LFP_DATA_PTRS);
+	if (!block) {
+		printf("No LVDS ptr block\n");
+		return;
+	}
+	ptrs = block->data;
+	lfp_data_size =
+	    ptrs->ptr[1].fp_timing_offset - ptrs->ptr[0].fp_timing_offset;
+	dvo_offset =
+	    ptrs->ptr[0].dvo_timing_offset - ptrs->ptr[0].fp_timing_offset;
+	free(block);
+
+	block = find_section(BDB_LVDS_LFP_DATA);
+	if (!block) {
+		printf("No LVDS data block\n");
+		return;
+	}
+
+	lvds_data = block->data;
+	num_entries = block->size / lfp_data_size;
+
+	printf("LVDS panel data block (preferred block marked with '*'):\n");
+	printf("  Number of entries: %d\n", num_entries);
+
+	for (i = 0; i < num_entries; i++) {
+		uint8_t *lfp_data_ptr =
+		    (uint8_t *) lvds_data->data + lfp_data_size * i;
+		uint8_t *timing_data = lfp_data_ptr + dvo_offset;
+		struct bdb_lvds_lfp_data_entry *lfp_data =
+		    (struct bdb_lvds_lfp_data_entry *)lfp_data_ptr;
+		char marker;
+
+		if (i == panel_type)
+			marker = '*';
+		else
+			marker = ' ';
+
+		hdisplay = _H_ACTIVE(timing_data);
+		hsyncstart = hdisplay + _H_SYNC_OFF(timing_data);
+		hsyncend = hsyncstart + _H_SYNC_WIDTH(timing_data);
+		htotal = hdisplay + _H_BLANK(timing_data);
+
+		vdisplay = _V_ACTIVE(timing_data);
+		vsyncstart = vdisplay + _V_SYNC_OFF(timing_data);
+		vsyncend = vsyncstart + _V_SYNC_WIDTH(timing_data);
+		vtotal = vdisplay + _V_BLANK(timing_data);
+		clock = _PIXEL_CLOCK(timing_data) / 1000;
+
+		printf("%c\tpanel type %02i: %dx%d clock %d\n", marker,
+		       i, lfp_data->fp_timing.x_res, lfp_data->fp_timing.y_res,
+		       _PIXEL_CLOCK(timing_data));
+		printf("\t\tinfo:\n");
+		printf("\t\t  LVDS: 0x%08lx\n",
+		       (unsigned long)lfp_data->fp_timing.lvds_reg_val);
+		printf("\t\t  PP_ON_DELAYS: 0x%08lx\n",
+		       (unsigned long)lfp_data->fp_timing.pp_on_reg_val);
+		printf("\t\t  PP_OFF_DELAYS: 0x%08lx\n",
+		       (unsigned long)lfp_data->fp_timing.pp_off_reg_val);
+		printf("\t\t  PP_DIVISOR: 0x%08lx\n",
+		       (unsigned long)lfp_data->fp_timing.pp_cycle_reg_val);
+		printf("\t\t  PFIT: 0x%08lx\n",
+		       (unsigned long)lfp_data->fp_timing.pfit_reg_val);
+		printf("\t\ttimings: %d %d %d %d %d %d %d %d %.2f (%s)\n",
+		       hdisplay, hsyncstart, hsyncend, htotal,
+		       vdisplay, vsyncstart, vsyncend, vtotal, clock,
+		       (hsyncend > htotal || vsyncend > vtotal) ?
+		       "BAD!" : "good");
+	}
+	free(block);
 }
 
 static void dump_driver_feature(void)
 {
-    struct bdb_block *block;
-    struct bdb_driver_feature *feature;
-
-    block = find_section(BDB_DRIVER_FEATURES);
-    if (!block) {
-	printf("No Driver feature data block\n");
-	return;
-    }
-    feature = block->data;
-
-    printf("Driver feature Data Block:\n");
-    printf("\tBoot Device Algorithm: %s\n", feature->boot_dev_algorithm ?
-	    "driver default": "os default");
-    printf("\tBlock display switching when DVD active: %s\n",
-	    YESNO(feature->block_display_switch));
-    printf("\tAllow display switching when in Full Screen DOS: %s\n",
-	    YESNO(feature->allow_display_switch));
-    printf("\tHot Plug DVO: %s\n", YESNO(feature->hotplug_dvo));
-    printf("\tDual View Zoom: %s\n", YESNO(feature->dual_view_zoom));
-    printf("\tDriver INT 15h hook: %s\n", YESNO(feature->int15h_hook));
-    printf("\tEnable Sprite in Clone Mode: %s\n", YESNO(feature->sprite_in_clone));
-    printf("\tUse 00000110h ID for Primary LFP: %s\n", YESNO(feature->primary_lfp_id));
-    printf("\tBoot Mode X: %u\n", feature->boot_mode_x);
-    printf("\tBoot Mode Y: %u\n", feature->boot_mode_y);
-    printf("\tBoot Mode Bpp: %u\n", feature->boot_mode_bpp);
-    printf("\tBoot Mode Refresh: %u\n", feature->boot_mode_refresh);
-    printf("\tEnable LFP as primary: %s\n", YESNO(feature->enable_lfp_primary));
-    printf("\tSelective Mode Pruning: %s\n", YESNO(feature->selective_mode_pruning));
-    printf("\tDual-Frequency Graphics Technology: %s\n", YESNO(feature->dual_frequency));
-    printf("\tDefault Render Clock Frequency: %s\n", feature->render_clock_freq ? "low" : "high");
-    printf("\tNT 4.0 Dual Display Clone Support: %s\n", YESNO(feature->nt_clone_support));
-    printf("\tDefault Power Scheme user interface: %s\n", feature->power_scheme_ui ? "3rd party":"CUI");
-    printf("\tSprite Display Assignment when Overlay is Active in Clone Mode: %s\n",
-	    feature->sprite_display_assign ? "primary" : "secondary");
-    printf("\tDisplay Maintain Aspect Scaling via CUI: %s\n", YESNO(feature->cui_aspect_scaling));
-    printf("\tPreserve Aspect Ratio: %s\n", YESNO(feature->preserve_aspect_ratio));
-    printf("\tEnable SDVO device power down: %s\n", YESNO(feature->sdvo_device_power_down));
-    printf("\tCRT hotplug: %s\n", YESNO(feature->crt_hotplug));
-    printf("\tLVDS config: ");
-    switch (feature->lvds_config) {
+	struct bdb_block *block;
+	struct bdb_driver_feature *feature;
+
+	block = find_section(BDB_DRIVER_FEATURES);
+	if (!block) {
+		printf("No Driver feature data block\n");
+		return;
+	}
+	feature = block->data;
+
+	printf("Driver feature Data Block:\n");
+	printf("\tBoot Device Algorithm: %s\n", feature->boot_dev_algorithm ?
+	       "driver default" : "os default");
+	printf("\tBlock display switching when DVD active: %s\n",
+	       YESNO(feature->block_display_switch));
+	printf("\tAllow display switching when in Full Screen DOS: %s\n",
+	       YESNO(feature->allow_display_switch));
+	printf("\tHot Plug DVO: %s\n", YESNO(feature->hotplug_dvo));
+	printf("\tDual View Zoom: %s\n", YESNO(feature->dual_view_zoom));
+	printf("\tDriver INT 15h hook: %s\n", YESNO(feature->int15h_hook));
+	printf("\tEnable Sprite in Clone Mode: %s\n",
+	       YESNO(feature->sprite_in_clone));
+	printf("\tUse 00000110h ID for Primary LFP: %s\n",
+	       YESNO(feature->primary_lfp_id));
+	printf("\tBoot Mode X: %u\n", feature->boot_mode_x);
+	printf("\tBoot Mode Y: %u\n", feature->boot_mode_y);
+	printf("\tBoot Mode Bpp: %u\n", feature->boot_mode_bpp);
+	printf("\tBoot Mode Refresh: %u\n", feature->boot_mode_refresh);
+	printf("\tEnable LFP as primary: %s\n",
+	       YESNO(feature->enable_lfp_primary));
+	printf("\tSelective Mode Pruning: %s\n",
+	       YESNO(feature->selective_mode_pruning));
+	printf("\tDual-Frequency Graphics Technology: %s\n",
+	       YESNO(feature->dual_frequency));
+	printf("\tDefault Render Clock Frequency: %s\n",
+	       feature->render_clock_freq ? "low" : "high");
+	printf("\tNT 4.0 Dual Display Clone Support: %s\n",
+	       YESNO(feature->nt_clone_support));
+	printf("\tDefault Power Scheme user interface: %s\n",
+	       feature->power_scheme_ui ? "3rd party" : "CUI");
+	printf
+	    ("\tSprite Display Assignment when Overlay is Active in Clone Mode: %s\n",
+	     feature->sprite_display_assign ? "primary" : "secondary");
+	printf("\tDisplay Maintain Aspect Scaling via CUI: %s\n",
+	       YESNO(feature->cui_aspect_scaling));
+	printf("\tPreserve Aspect Ratio: %s\n",
+	       YESNO(feature->preserve_aspect_ratio));
+	printf("\tEnable SDVO device power down: %s\n",
+	       YESNO(feature->sdvo_device_power_down));
+	printf("\tCRT hotplug: %s\n", YESNO(feature->crt_hotplug));
+	printf("\tLVDS config: ");
+	switch (feature->lvds_config) {
 	case BDB_DRIVER_NO_LVDS:
-	    printf("No LVDS\n");
-	    break;
+		printf("No LVDS\n");
+		break;
 	case BDB_DRIVER_INT_LVDS:
-	    printf("Integrated LVDS\n");
-	    break;
+		printf("Integrated LVDS\n");
+		break;
 	case BDB_DRIVER_SDVO_LVDS:
-	    printf("SDVO LVDS\n");
-	    break;
+		printf("SDVO LVDS\n");
+		break;
 	case BDB_DRIVER_EDP:
-	    printf("Embedded DisplayPort\n");
-	    break;
-    }
-    printf("\tDefine Display statically: %s\n", YESNO(feature->static_display));
-    printf("\tLegacy CRT max X: %d\n", feature->legacy_crt_max_x);
-    printf("\tLegacy CRT max Y: %d\n", feature->legacy_crt_max_y);
-    printf("\tLegacy CRT max refresh: %d\n", feature->legacy_crt_max_refresh);
-    free(block);
+		printf("Embedded DisplayPort\n");
+		break;
+	}
+	printf("\tDefine Display statically: %s\n",
+	       YESNO(feature->static_display));
+	printf("\tLegacy CRT max X: %d\n", feature->legacy_crt_max_x);
+	printf("\tLegacy CRT max Y: %d\n", feature->legacy_crt_max_y);
+	printf("\tLegacy CRT max refresh: %d\n",
+	       feature->legacy_crt_max_refresh);
+	free(block);
 }
 
 int main(int argc, char **argv)
 {
-    int fd;
-    struct vbt_header *vbt = NULL;
-    int vbt_off, bdb_off, i;
-    char *filename = "bios";
-    struct stat finfo;
-    struct bdb_block *block;
-    char signature[17];
-
-    if (argc != 2) {
-	printf("usage: %s <rom file>\n", argv[0]);
-	return 1;
-    }
-
-    filename = argv[1];
-
-    fd = open(filename, O_RDONLY);
-    if (fd == -1) {
-	printf("Couldn't open \"%s\": %s\n", filename, strerror(errno));
-	return 1;
-    }
-
-    if (stat(filename, &finfo)) {
-	printf("failed to stat \"%s\": %s\n", filename, strerror(errno));
-	return 1;
-    }
-
-    pI830->VBIOS = mmap(NULL, finfo.st_size, PROT_READ, MAP_SHARED, fd, 0);
-    if (pI830->VBIOS == MAP_FAILED) {
-	printf("failed to map \"%s\": %s\n", filename, strerror(errno));
-	return 1;
-    }
-
-    /* Scour memory looking for the VBT signature */
-    for (i = 0; i + 4 < finfo.st_size; i++) {
-	if (!memcmp(pI830->VBIOS + i, "$VBT", 4)) {
-	    vbt_off = i;
-	    vbt = (struct vbt_header *)(pI830->VBIOS + i);
-	    break;
+	int fd;
+	struct vbt_header *vbt = NULL;
+	int vbt_off, bdb_off, i;
+	char *filename = "bios";
+	struct stat finfo;
+	struct bdb_block *block;
+	char signature[17];
+
+	if (argc != 2) {
+		printf("usage: %s <rom file>\n", argv[0]);
+		return 1;
 	}
-    }
 
-    if (!vbt) {
-	printf("VBT signature missing\n");
-	return 1;
-    }
+	filename = argv[1];
 
-    printf("VBT vers: %d.%d\n", vbt->version / 100, vbt->version % 100);
+	fd = open(filename, O_RDONLY);
+	if (fd == -1) {
+		printf("Couldn't open \"%s\": %s\n", filename, strerror(errno));
+		return 1;
+	}
 
-    bdb_off = vbt_off + vbt->bdb_offset;
-    bdb = (struct bdb_header *)(pI830->VBIOS + bdb_off);
-    strncpy(signature, (char *)bdb->signature, 16);
-    signature[16] = 0;
-    printf("BDB sig: %s\n", signature);
-    printf("BDB vers: %d.%d\n", bdb->version / 100, bdb->version % 100);
+	if (stat(filename, &finfo)) {
+		printf("failed to stat \"%s\": %s\n", filename,
+		       strerror(errno));
+		return 1;
+	}
 
-    printf("Available sections: ");
-    for (i = 0; i < 256; i++) {
-	block = find_section(i);
-	if (!block)
-	    continue;
-	printf("%d ", i);
-	free(block);
-    }
-    printf("\n");
+	pI830->VBIOS = mmap(NULL, finfo.st_size, PROT_READ, MAP_SHARED, fd, 0);
+	if (pI830->VBIOS == MAP_FAILED) {
+		printf("failed to map \"%s\": %s\n", filename, strerror(errno));
+		return 1;
+	}
+
+	/* Scour memory looking for the VBT signature */
+	for (i = 0; i + 4 < finfo.st_size; i++) {
+		if (!memcmp(pI830->VBIOS + i, "$VBT", 4)) {
+			vbt_off = i;
+			vbt = (struct vbt_header *)(pI830->VBIOS + i);
+			break;
+		}
+	}
+
+	if (!vbt) {
+		printf("VBT signature missing\n");
+		return 1;
+	}
+
+	printf("VBT vers: %d.%d\n", vbt->version / 100, vbt->version % 100);
+
+	bdb_off = vbt_off + vbt->bdb_offset;
+	bdb = (struct bdb_header *)(pI830->VBIOS + bdb_off);
+	strncpy(signature, (char *)bdb->signature, 16);
+	signature[16] = 0;
+	printf("BDB sig: %s\n", signature);
+	printf("BDB vers: %d.%d\n", bdb->version / 100, bdb->version % 100);
+
+	printf("Available sections: ");
+	for (i = 0; i < 256; i++) {
+		block = find_section(i);
+		if (!block)
+			continue;
+		printf("%d ", i);
+		free(block);
+	}
+	printf("\n");
 
-    dump_general_features();
-    dump_general_definitions();
+	dump_general_features();
+	dump_general_definitions();
 //    dump_child_devices();
-    dump_lvds_options();
-    dump_lvds_data();
-    dump_lvds_ptr_data();
-    dump_backlight_info();
+	dump_lvds_options();
+	dump_lvds_data();
+	dump_lvds_ptr_data();
+	dump_backlight_info();
 
-    dump_driver_feature();
+	dump_driver_feature();
 
-    return 0;
+	return 0;
 }
diff --git a/src/bios_reader/swf_dumper.c b/src/bios_reader/swf_dumper.c
index a6cf0468..e904495b 100644
--- a/src/bios_reader/swf_dumper.c
+++ b/src/bios_reader/swf_dumper.c
@@ -41,70 +41,72 @@
 #include "../i830_bios.h"
 
 #ifndef DEFFILEMODE
-#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH) /* 0666*/
+#define DEFFILEMODE (S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP|S_IROTH|S_IWOTH)	/* 0666 */
 #endif
 
 static uint32_t read32(void *base, int reg)
 {
-    uint32_t *addr = (uint32_t *)((unsigned char *)(base) + reg);
+	uint32_t *addr = (uint32_t *) ((unsigned char *)(base) + reg);
 
-    return *addr;
+	return *addr;
 }
 
 #if 0
 static void write32(void *base, int reg, uint32_t val)
 {
-    uint32_t *addr = (uint32_t *)((unsigned char *)(base) + reg);
-    *addr = val;
+	uint32_t *addr = (uint32_t *) ((unsigned char *)(base) + reg);
+	*addr = val;
 }
 #endif
 
 static void usage(void)
 {
-    fprintf(stderr, "usage: swf_dumper\n");
-    exit(1);
+	fprintf(stderr, "usage: swf_dumper\n");
+	exit(1);
 }
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev;
-    int err;
-    void *addr;
-
-    if (argc != 1)
-	usage();
-
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
-
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
-
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
-
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
-
-    err = pci_device_map_range(dev, dev->regions[0].base_addr,
-			       dev->regions[0].size,
-			       PCI_DEV_MAP_FLAG_WRITABLE, &addr);
-    if (err) {
-	fprintf(stderr, "Couldn't map MMIO space: %s\n", strerror(err));
-	exit(1);
-    }
-
-    printf("SWF14: 0x%08x\n", read32(addr, SWF14));
-
-    pci_system_cleanup();
-
-    return 0;
+	struct pci_device *dev;
+	int err;
+	void *addr;
+
+	if (argc != 1)
+		usage();
+
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
+
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
+
+	err = pci_device_map_range(dev, dev->regions[0].base_addr,
+				   dev->regions[0].size,
+				   PCI_DEV_MAP_FLAG_WRITABLE, &addr);
+	if (err) {
+		fprintf(stderr, "Couldn't map MMIO space: %s\n", strerror(err));
+		exit(1);
+	}
+
+	printf("SWF14: 0x%08x\n", read32(addr, SWF14));
+
+	pci_system_cleanup();
+
+	return 0;
 }
diff --git a/src/i830.h b/src/i830.h
index fbc5a276..474333bb 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -73,12 +73,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "uxa.h"
 Bool i830_uxa_init(ScreenPtr pScreen);
 void i830_uxa_create_screen_resources(ScreenPtr pScreen);
-void i830_uxa_block_handler (ScreenPtr pScreen);
-Bool i830_get_aperture_space(ScrnInfoPtr pScrn, drm_intel_bo **bo_table,
+void i830_uxa_block_handler(ScreenPtr pScreen);
+Bool i830_get_aperture_space(ScrnInfoPtr pScrn, drm_intel_bo ** bo_table,
 			     int num_bos);
 
-dri_bo *i830_get_pixmap_bo (PixmapPtr pixmap);
-void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo);
+dri_bo *i830_get_pixmap_bo(PixmapPtr pixmap);
+void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
 
 typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
 
@@ -95,18 +95,18 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
 
 typedef struct _I830Rec *I830Ptr;
 
-typedef void (*I830WriteIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
-                                         uint8_t index, uint8_t value);
-typedef uint8_t(*I830ReadIndexedByteFunc)(I830Ptr pI830, IOADDRESS addr,
-					  uint8_t index);
-typedef void (*I830WriteByteFunc)(I830Ptr pI830, IOADDRESS addr,
-				  uint8_t value);
-typedef uint8_t(*I830ReadByteFunc)(I830Ptr pI830, IOADDRESS addr);
+typedef void (*I830WriteIndexedByteFunc) (I830Ptr pI830, IOADDRESS addr,
+					  uint8_t index, uint8_t value);
+typedef uint8_t(*I830ReadIndexedByteFunc) (I830Ptr pI830, IOADDRESS addr,
+					   uint8_t index);
+typedef void (*I830WriteByteFunc) (I830Ptr pI830, IOADDRESS addr,
+				   uint8_t value);
+typedef uint8_t(*I830ReadByteFunc) (I830Ptr pI830, IOADDRESS addr);
 
 enum tile_format {
-    TILE_NONE,
-    TILE_XMAJOR,
-    TILE_YMAJOR
+	TILE_NONE,
+	TILE_XMAJOR,
+	TILE_YMAJOR
 };
 
 #define PITCH_NONE 0
@@ -114,280 +114,282 @@ enum tile_format {
 /** Record of a linear allocation in the aperture. */
 typedef struct _i830_memory i830_memory;
 struct _i830_memory {
-    /** Offset of the allocation in card VM */
-    unsigned long offset;
-    /** End of the allocation in card VM */
-    unsigned long end;
-    /**
-     * Requested size of the allocation: doesn't count padding.
-     *
-     * Any bound memory will cover offset to (offset + size).
-     */
-    unsigned long size;
-
-    enum tile_format tiling;
-    /** Pitch value in bytes for tiled surfaces */
-    unsigned int pitch;
-
-    /** Description of the allocation, for logging */
-    char *name;
-
-    /** @{
-     * Memory allocator linked list pointers
-     */
-    i830_memory *next;
-    i830_memory *prev;
-    /** @} */
-
-    dri_bo *bo;
-    uint32_t alignment;
-    uint32_t gem_name;
+	/** Offset of the allocation in card VM */
+	unsigned long offset;
+	/** End of the allocation in card VM */
+	unsigned long end;
+	/**
+	 * Requested size of the allocation: doesn't count padding.
+	 *
+	 * Any bound memory will cover offset to (offset + size).
+	 */
+	unsigned long size;
+
+	enum tile_format tiling;
+	/** Pitch value in bytes for tiled surfaces */
+	unsigned int pitch;
+
+	/** Description of the allocation, for logging */
+	char *name;
+
+	/** @{
+	 * Memory allocator linked list pointers
+	 */
+	i830_memory *next;
+	i830_memory *prev;
+	/** @} */
+
+	dri_bo *bo;
+	uint32_t alignment;
+	uint32_t gem_name;
 };
 
 typedef struct _I830CrtcPrivateRec {
-    int			    pipe;
-    int			    plane;
+	int pipe;
+	int plane;
 
-    Bool    		    enabled;
-    
-    int			    dpms_mode;
-    
-    int			    x, y;
+	Bool enabled;
 
-    /* Lookup table values to be set when the CRTC is enabled */
-    uint8_t lut_r[256], lut_g[256], lut_b[256];
+	int dpms_mode;
+
+	int x, y;
+
+	/* Lookup table values to be set when the CRTC is enabled */
+	uint8_t lut_r[256], lut_g[256], lut_b[256];
 } I830CrtcPrivateRec, *I830CrtcPrivatePtr;
 
 #define I830CrtcPrivate(c) ((I830CrtcPrivatePtr) (c)->driver_private)
 
 /** enumeration of 3d consumers so some can maintain invariant state. */
 enum last_3d {
-    LAST_3D_OTHER,
-    LAST_3D_VIDEO,
-    LAST_3D_RENDER,
-    LAST_3D_ROTATION
+	LAST_3D_OTHER,
+	LAST_3D_VIDEO,
+	LAST_3D_RENDER,
+	LAST_3D_ROTATION
 };
 
 enum dri_type {
-    DRI_DISABLED,
-    DRI_NONE,
-    DRI_DRI2
+	DRI_DISABLED,
+	DRI_NONE,
+	DRI_DRI2
 };
 
 typedef struct _I830Rec {
-   unsigned char *MMIOBase;
-   int cpp;
-
-   unsigned int bufferOffset;		/* for I830SelectBuffer */
-
-   /* These are set in PreInit and never changed. */
-   long FbMapSize;
-   long GTTMapSize;
-
-   /**
-    * Linked list of video memory allocations.  The head and tail are
-    * dummy entries that bound the allocation area.
-    */
-   i830_memory *memory_list;
-   /** Linked list of buffer object memory allocations */
-   i830_memory *bo_list;
-
-   i830_memory *front_buffer;
-   /* One big buffer for all cursors for kernels that support this */
-   i830_memory *cursor_mem_argb[2];
-
-   dri_bufmgr *bufmgr;
-
-   uint8_t *batch_ptr;
-   /** Byte offset in batch_ptr for the next dword to be emitted. */
-   unsigned int batch_used;
-   /** Position in batch_ptr at the start of the current BEGIN_BATCH */
-   unsigned int batch_emit_start;
-   /** Number of bytes to be emitted in the current BEGIN_BATCH. */
-   uint32_t batch_emitting;
-   dri_bo *batch_bo;
-   dri_bo *last_batch_bo;
-   /** Whether we're in a section of code that can't tolerate flushing */
-   Bool in_batch_atomic;
-   /** Ending batch_used that was verified by i830_start_batch_atomic() */
-   int batch_atomic_limit;
-
-   /* For Xvideo */
-   Bool use_drmmode_overlay;
+	unsigned char *MMIOBase;
+	int cpp;
+
+	unsigned int bufferOffset;	/* for I830SelectBuffer */
+
+	/* These are set in PreInit and never changed. */
+	long FbMapSize;
+	long GTTMapSize;
+
+	/**
+	 * Linked list of video memory allocations.  The head and tail are
+	 * dummy entries that bound the allocation area.
+	 */
+	i830_memory *memory_list;
+	/** Linked list of buffer object memory allocations */
+	i830_memory *bo_list;
+
+	i830_memory *front_buffer;
+	/* One big buffer for all cursors for kernels that support this */
+	i830_memory *cursor_mem_argb[2];
+
+	dri_bufmgr *bufmgr;
+
+	uint8_t *batch_ptr;
+	/** Byte offset in batch_ptr for the next dword to be emitted. */
+	unsigned int batch_used;
+	/** Position in batch_ptr at the start of the current BEGIN_BATCH */
+	unsigned int batch_emit_start;
+	/** Number of bytes to be emitted in the current BEGIN_BATCH. */
+	uint32_t batch_emitting;
+	dri_bo *batch_bo;
+	dri_bo *last_batch_bo;
+	/** Whether we're in a section of code that can't tolerate flushing */
+	Bool in_batch_atomic;
+	/** Ending batch_used that was verified by i830_start_batch_atomic() */
+	int batch_atomic_limit;
+
+	/* For Xvideo */
+	Bool use_drmmode_overlay;
 #ifdef INTEL_XVMC
-   /* For XvMC */
-   Bool XvMCEnabled;
+	/* For XvMC */
+	Bool XvMCEnabled;
 #endif
 
-   CreateScreenResourcesProcPtr    CreateScreenResources;
-
-   Bool need_mi_flush;
-
-   Bool tiling;
-   Bool swapbuffers_wait;
-
-   int Chipset;
-   unsigned long LinearAddr;
-   EntityInfoPtr pEnt;
-   struct pci_device *PciInfo;
-   uint8_t variant;
-
-   unsigned int BR[20];
-
-   CloseScreenProcPtr CloseScreen;
-
-   void (*batch_flush_notify)(ScrnInfoPtr pScrn);
-
-   uxa_driver_t *uxa_driver;
-   Bool need_flush;
-   PixmapPtr pSrcPixmap;
-   int accel_pixmap_pitch_alignment;
-   int accel_pixmap_offset_alignment;
-   int accel_max_x;
-   int accel_max_y;
-   int max_gtt_map_size;
-
-   Bool XvDisabled;			/* Xv disabled in PreInit. */
-   Bool XvEnabled;			/* Xv enabled for this generation. */
-   Bool XvPreferOverlay;
-
-   int colorKey;
-   XF86VideoAdaptorPtr adaptor;
-   ScreenBlockHandlerProcPtr BlockHandler;
-   Bool overlayOn;
-
-   struct {
-      drm_intel_bo *gen4_vs_bo;
-      drm_intel_bo *gen4_sf_bo;
-      drm_intel_bo *gen4_wm_packed_bo;
-      drm_intel_bo *gen4_wm_planar_bo;
-      drm_intel_bo *gen4_cc_bo;
-      drm_intel_bo *gen4_cc_vp_bo;
-      drm_intel_bo *gen4_sampler_bo;
-      drm_intel_bo *gen4_sip_kernel_bo;
-   } video;
-
-   /* Render accel state */
-   float scale_units[2][2];
-  /** Transform pointers for src/mask, or NULL if identity */
-   PictTransform *transform[2];
-   float dst_coord_adjust;
-   float src_coord_adjust;
-   float mask_coord_adjust;
-
-   /* i830 render accel state */
-   PixmapPtr render_src, render_mask, render_dst;
-   PicturePtr render_src_picture, render_mask_picture, render_dst_picture;
-   uint32_t render_dst_format;
-   Bool needs_render_state_emit;
-   uint32_t cblend, ablend, s8_blendctl;
-
-   /* i915 render accel state */
-   uint32_t mapstate[6];
-   uint32_t samplerstate[6];
-
-   struct {
-      int op;
-      uint32_t dst_format;
-      Bool needs_emit;
-   } i915_render_state;
-
-   /* 965 render acceleration state */
-   struct gen4_render_state *gen4_render_state;
-
-   enum dri_type directRenderingType;	/* DRI enabled this generation. */
-
-   Bool directRenderingOpen;
-   int drmSubFD;
-   char deviceName[64];
-
-   /* Broken-out options. */
-   OptionInfoPtr Options;
-
-   /* Driver phase/state information */
-   Bool suspended;
-
-   uint32_t saveDSPARB;
-   uint32_t saveDSPACNTR;
-   uint32_t saveDSPBCNTR;
-   uint32_t savePIPEACONF;
-   uint32_t savePIPEBCONF;
-   uint32_t savePIPEASRC;
-   uint32_t savePIPEBSRC;
-   uint32_t saveFPA0;
-   uint32_t saveFPA1;
-   uint32_t saveDPLL_A;
-   uint32_t saveDPLL_A_MD;
-   uint32_t saveHTOTAL_A;
-   uint32_t saveHBLANK_A;
-   uint32_t saveHSYNC_A;
-   uint32_t saveVTOTAL_A;
-   uint32_t saveVBLANK_A;
-   uint32_t saveVSYNC_A;
-   uint32_t saveBCLRPAT_A;
-   uint32_t saveDSPASTRIDE;
-   uint32_t saveDSPASIZE;
-   uint32_t saveDSPAPOS;
-   uint32_t saveDSPABASE;
-   uint32_t saveDSPASURF;
-   uint32_t saveDSPATILEOFF;
-   uint32_t saveFPB0;
-   uint32_t saveFPB1;
-   uint32_t saveDPLL_B;
-   uint32_t saveDPLL_B_MD;
-   uint32_t saveHTOTAL_B;
-   uint32_t saveHBLANK_B;
-   uint32_t saveHSYNC_B;
-   uint32_t saveVTOTAL_B;
-   uint32_t saveVBLANK_B;
-   uint32_t saveVSYNC_B;
-   uint32_t saveBCLRPAT_B;
-   uint32_t saveDSPBSTRIDE;
-   uint32_t saveDSPBSIZE;
-   uint32_t saveDSPBPOS;
-   uint32_t saveDSPBBASE;
-   uint32_t saveDSPBSURF;
-   uint32_t saveDSPBTILEOFF;
-   uint32_t saveVCLK_DIVISOR_VGA0;
-   uint32_t saveVCLK_DIVISOR_VGA1;
-   uint32_t saveVCLK_POST_DIV;
-   uint32_t saveVGACNTRL;
-   uint32_t saveCURSOR_A_CONTROL;
-   uint32_t saveCURSOR_A_BASE;
-   uint32_t saveCURSOR_A_POSITION;
-   uint32_t saveCURSOR_B_CONTROL;
-   uint32_t saveCURSOR_B_BASE;
-   uint32_t saveCURSOR_B_POSITION;
-   uint32_t saveADPA;
-   uint32_t saveLVDS;
-   uint32_t saveDVOA;
-   uint32_t saveDVOB;
-   uint32_t saveDVOC;
-   uint32_t savePP_ON;
-   uint32_t savePP_OFF;
-   uint32_t savePP_CONTROL;
-   uint32_t savePP_DIVISOR;
-   uint32_t savePFIT_CONTROL;
-   uint32_t savePaletteA[256];
-   uint32_t savePaletteB[256];
-   uint32_t saveSWF[17];
-   uint32_t saveBLC_PWM_CTL;
-   uint32_t saveBLC_PWM_CTL2;
-   uint32_t saveFBC_CFB_BASE;
-   uint32_t saveFBC_LL_BASE;
-   uint32_t saveFBC_CONTROL2;
-   uint32_t saveFBC_CONTROL;
-   uint32_t saveFBC_FENCE_OFF;
-   uint32_t saveRENCLK_GATE_D1;
-   uint32_t saveRENCLK_GATE_D2;
-   uint32_t saveDSPCLK_GATE_D;
-   uint32_t saveRAMCLK_GATE_D;
-   uint32_t savePWRCTXA;
-
-   enum last_3d last_3d;
-
-    /** User option to print acceleration fallback info to the server log. */
-   Bool fallback_debug;
+	CreateScreenResourcesProcPtr CreateScreenResources;
+
+	Bool need_mi_flush;
+
+	Bool tiling;
+	Bool swapbuffers_wait;
+
+	int Chipset;
+	unsigned long LinearAddr;
+	EntityInfoPtr pEnt;
+	struct pci_device *PciInfo;
+	uint8_t variant;
+
+	unsigned int BR[20];
+
+	CloseScreenProcPtr CloseScreen;
+
+	void (*batch_flush_notify) (ScrnInfoPtr pScrn);
+
+	uxa_driver_t *uxa_driver;
+	Bool need_flush;
+	PixmapPtr pSrcPixmap;
+	int accel_pixmap_pitch_alignment;
+	int accel_pixmap_offset_alignment;
+	int accel_max_x;
+	int accel_max_y;
+	int max_gtt_map_size;
+
+	Bool XvDisabled;	/* Xv disabled in PreInit. */
+	Bool XvEnabled;		/* Xv enabled for this generation. */
+	Bool XvPreferOverlay;
+
+	int colorKey;
+	XF86VideoAdaptorPtr adaptor;
+	ScreenBlockHandlerProcPtr BlockHandler;
+	Bool overlayOn;
+
+	struct {
+		drm_intel_bo *gen4_vs_bo;
+		drm_intel_bo *gen4_sf_bo;
+		drm_intel_bo *gen4_wm_packed_bo;
+		drm_intel_bo *gen4_wm_planar_bo;
+		drm_intel_bo *gen4_cc_bo;
+		drm_intel_bo *gen4_cc_vp_bo;
+		drm_intel_bo *gen4_sampler_bo;
+		drm_intel_bo *gen4_sip_kernel_bo;
+	} video;
+
+	/* Render accel state */
+	float scale_units[2][2];
+	/** Transform pointers for src/mask, or NULL if identity */
+	PictTransform *transform[2];
+	float dst_coord_adjust;
+	float src_coord_adjust;
+	float mask_coord_adjust;
+
+	/* i830 render accel state */
+	PixmapPtr render_src, render_mask, render_dst;
+	PicturePtr render_src_picture, render_mask_picture, render_dst_picture;
+	uint32_t render_dst_format;
+	Bool needs_render_state_emit;
+	uint32_t cblend, ablend, s8_blendctl;
+
+	/* i915 render accel state */
+	uint32_t mapstate[6];
+	uint32_t samplerstate[6];
+
+	struct {
+		int op;
+		uint32_t dst_format;
+		Bool needs_emit;
+	} i915_render_state;
+
+	/* 965 render acceleration state */
+	struct gen4_render_state *gen4_render_state;
+
+	enum dri_type directRenderingType;	/* DRI enabled this generation. */
+
+	Bool directRenderingOpen;
+	int drmSubFD;
+	char deviceName[64];
+
+	/* Broken-out options. */
+	OptionInfoPtr Options;
+
+	/* Driver phase/state information */
+	Bool suspended;
+
+	uint32_t saveDSPARB;
+	uint32_t saveDSPACNTR;
+	uint32_t saveDSPBCNTR;
+	uint32_t savePIPEACONF;
+	uint32_t savePIPEBCONF;
+	uint32_t savePIPEASRC;
+	uint32_t savePIPEBSRC;
+	uint32_t saveFPA0;
+	uint32_t saveFPA1;
+	uint32_t saveDPLL_A;
+	uint32_t saveDPLL_A_MD;
+	uint32_t saveHTOTAL_A;
+	uint32_t saveHBLANK_A;
+	uint32_t saveHSYNC_A;
+	uint32_t saveVTOTAL_A;
+	uint32_t saveVBLANK_A;
+	uint32_t saveVSYNC_A;
+	uint32_t saveBCLRPAT_A;
+	uint32_t saveDSPASTRIDE;
+	uint32_t saveDSPASIZE;
+	uint32_t saveDSPAPOS;
+	uint32_t saveDSPABASE;
+	uint32_t saveDSPASURF;
+	uint32_t saveDSPATILEOFF;
+	uint32_t saveFPB0;
+	uint32_t saveFPB1;
+	uint32_t saveDPLL_B;
+	uint32_t saveDPLL_B_MD;
+	uint32_t saveHTOTAL_B;
+	uint32_t saveHBLANK_B;
+	uint32_t saveHSYNC_B;
+	uint32_t saveVTOTAL_B;
+	uint32_t saveVBLANK_B;
+	uint32_t saveVSYNC_B;
+	uint32_t saveBCLRPAT_B;
+	uint32_t saveDSPBSTRIDE;
+	uint32_t saveDSPBSIZE;
+	uint32_t saveDSPBPOS;
+	uint32_t saveDSPBBASE;
+	uint32_t saveDSPBSURF;
+	uint32_t saveDSPBTILEOFF;
+	uint32_t saveVCLK_DIVISOR_VGA0;
+	uint32_t saveVCLK_DIVISOR_VGA1;
+	uint32_t saveVCLK_POST_DIV;
+	uint32_t saveVGACNTRL;
+	uint32_t saveCURSOR_A_CONTROL;
+	uint32_t saveCURSOR_A_BASE;
+	uint32_t saveCURSOR_A_POSITION;
+	uint32_t saveCURSOR_B_CONTROL;
+	uint32_t saveCURSOR_B_BASE;
+	uint32_t saveCURSOR_B_POSITION;
+	uint32_t saveADPA;
+	uint32_t saveLVDS;
+	uint32_t saveDVOA;
+	uint32_t saveDVOB;
+	uint32_t saveDVOC;
+	uint32_t savePP_ON;
+	uint32_t savePP_OFF;
+	uint32_t savePP_CONTROL;
+	uint32_t savePP_DIVISOR;
+	uint32_t savePFIT_CONTROL;
+	uint32_t savePaletteA[256];
+	uint32_t savePaletteB[256];
+	uint32_t saveSWF[17];
+	uint32_t saveBLC_PWM_CTL;
+	uint32_t saveBLC_PWM_CTL2;
+	uint32_t saveFBC_CFB_BASE;
+	uint32_t saveFBC_LL_BASE;
+	uint32_t saveFBC_CONTROL2;
+	uint32_t saveFBC_CONTROL;
+	uint32_t saveFBC_FENCE_OFF;
+	uint32_t saveRENCLK_GATE_D1;
+	uint32_t saveRENCLK_GATE_D2;
+	uint32_t saveDSPCLK_GATE_D;
+	uint32_t saveRAMCLK_GATE_D;
+	uint32_t savePWRCTXA;
+
+	enum last_3d last_3d;
+
+	/**
+	 * User option to print acceleration fallback info to the server log.
+	 */
+	Bool fallback_debug;
 } I830Rec;
 
 #define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
@@ -410,9 +412,8 @@ extern void I915EmitInvarientState(ScrnInfoPtr pScrn);
 extern void I830EmitFlush(ScrnInfoPtr pScrn);
 
 extern void I830InitVideo(ScreenPtr pScreen);
-extern xf86CrtcPtr i830_covering_crtc (ScrnInfoPtr pScrn, BoxPtr box,
-				       xf86CrtcPtr desired,
-				       BoxPtr crtc_box_ret);
+extern xf86CrtcPtr i830_covering_crtc(ScrnInfoPtr pScrn, BoxPtr box,
+				      xf86CrtcPtr desired, BoxPtr crtc_box_ret);
 
 extern xf86CrtcPtr i830_pipe_to_crtc(ScrnInfoPtr pScrn, int pipe);
 
@@ -420,11 +421,11 @@ Bool I830DRI2ScreenInit(ScreenPtr pScreen);
 void I830DRI2CloseScreen(ScreenPtr pScreen);
 
 extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, int fd, int cpp);
-extern int drmmode_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, xf86CrtcPtr crtc);
+extern int drmmode_get_pipe_from_crtc_id(drm_intel_bufmgr * bufmgr,
+					 xf86CrtcPtr crtc);
 extern int drmmode_output_dpms_status(xf86OutputPtr output);
 extern int drmmode_crtc_id(xf86CrtcPtr crtc);
-void
-drmmode_crtc_set_cursor_bo(xf86CrtcPtr crtc, dri_bo *cursor);
+void drmmode_crtc_set_cursor_bo(xf86CrtcPtr crtc, dri_bo * cursor);
 
 extern Bool i830_crtc_on(xf86CrtcPtr crtc);
 extern int i830_crtc_to_pipe(xf86CrtcPtr crtc);
@@ -432,38 +433,37 @@ extern Bool I830AccelInit(ScreenPtr pScreen);
 
 Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long size);
 void i830_allocator_fini(ScrnInfoPtr pScrn);
-i830_memory * i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
-				   unsigned long size, unsigned long pitch,
-				   unsigned long alignment, int flags,
-				   enum tile_format tile_format);
+i830_memory *i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
+				  unsigned long size, unsigned long pitch,
+				  unsigned long alignment, int flags,
+				  enum tile_format tile_format);
 void i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity,
 			       const char *prefix);
 void i830_reset_allocations(ScrnInfoPtr pScrn);
 void i830_free_3d_memory(ScrnInfoPtr pScrn);
-void i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem);
+void i830_free_memory(ScrnInfoPtr pScrn, i830_memory * mem);
 Bool i830_allocate_2d_memory(ScrnInfoPtr pScrn);
 Bool i830_allocate_3d_memory(ScrnInfoPtr pScrn);
 void i830_init_bufmgr(ScrnInfoPtr pScrn);
 #ifdef INTEL_XVMC
 Bool i830_allocate_xvmc_buffer(ScrnInfoPtr pScrn, const char *name,
-                               i830_memory **buffer, unsigned long size, int flags);
-void i830_free_xvmc_buffer(ScrnInfoPtr pScrn, i830_memory *buffer);
+			       i830_memory ** buffer, unsigned long size,
+			       int flags);
+void i830_free_xvmc_buffer(ScrnInfoPtr pScrn, i830_memory * buffer);
 #endif
 
-Bool
-i830_tiled_width(I830Ptr i830, int *width, int cpp);
+Bool i830_tiled_width(I830Ptr i830, int *width, int cpp);
 
-int
-i830_pad_drawable_width(int width, int cpp);
+int i830_pad_drawable_width(int width, int cpp);
 
 /* i830_memory.c */
 Bool i830_bind_all_memory(ScrnInfoPtr pScrn);
 unsigned long i830_get_fence_size(I830Ptr pI830, unsigned long size);
-unsigned long i830_get_fence_pitch(I830Ptr pI830, unsigned long pitch, int format);
+unsigned long i830_get_fence_pitch(I830Ptr pI830, unsigned long pitch,
+				   int format);
 void i830_set_max_gtt_map_size(ScrnInfoPtr pScrn);
 
-i830_memory *
-i830_allocate_framebuffer(ScrnInfoPtr pScrn);
+i830_memory *i830_allocate_framebuffer(ScrnInfoPtr pScrn);
 
 /* i830_render.c */
 Bool i830_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
@@ -471,8 +471,7 @@ Bool i830_check_composite(int op, PicturePtr pSrc, PicturePtr pMask,
 Bool i830_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
 			    PicturePtr pDst, PixmapPtr pSrcPixmap,
 			    PixmapPtr pMaskPixmap, PixmapPtr pDstPixmap);
-Bool
-i830_transform_is_affine (PictTransformPtr t);
+Bool i830_transform_is_affine(PictTransformPtr t);
 
 void i830_composite(PixmapPtr pDst, int srcX, int srcY,
 		    int maskX, int maskY, int dstX, int dstY, int w, int h);
@@ -499,8 +498,7 @@ Bool i965_prepare_composite(int op, PicturePtr pSrc, PicturePtr pMask,
 void i965_composite(PixmapPtr pDst, int srcX, int srcY,
 		    int maskX, int maskY, int dstX, int dstY, int w, int h);
 
-void
-i965_batch_flush_notify(ScrnInfoPtr pScrn);
+void i965_batch_flush_notify(ScrnInfoPtr pScrn);
 
 Bool
 i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
@@ -541,29 +539,30 @@ Bool i830_pixmap_tiled(PixmapPtr p);
  * If only we'd done this before settling on the library API.
  */
 static inline uint32_t
-intel_emit_reloc(drm_intel_bo *bo, uint32_t offset,
-		 drm_intel_bo *target_bo, uint32_t target_offset,
+intel_emit_reloc(drm_intel_bo * bo, uint32_t offset,
+		 drm_intel_bo * target_bo, uint32_t target_offset,
 		 uint32_t read_domains, uint32_t write_domain)
 {
-    drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
-			    read_domains, write_domain);
+	drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset,
+				read_domains, write_domain);
 
-    return target_bo->offset + target_offset;
+	return target_bo->offset + target_offset;
 }
 
-static inline drm_intel_bo *
-intel_bo_alloc_for_data(ScrnInfoPtr scrn, void *data, unsigned int size,
-			char *name)
+static inline drm_intel_bo *intel_bo_alloc_for_data(ScrnInfoPtr scrn,
+						    void *data,
+						    unsigned int size,
+						    char *name)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *bo;
 
-    bo = drm_intel_bo_alloc(pI830->bufmgr, name, size, 4096);
-    if (!bo)
-	return NULL;
-    drm_intel_bo_subdata(bo, 0, size, data);
+	bo = drm_intel_bo_alloc(pI830->bufmgr, name, size, 4096);
+	if (!bo)
+		return NULL;
+	drm_intel_bo_subdata(bo, 0, size, data);
 
-    return bo;
+	return bo;
 }
 
 extern const int I830PatternROP[16];
@@ -582,37 +581,33 @@ extern const int I830CopyROP[16];
  * Compare to CREATE_PIXMAP_USAGE_* in the server.
  */
 enum {
-    INTEL_CREATE_PIXMAP_TILING_X = 0x10000000,
-    INTEL_CREATE_PIXMAP_TILING_Y,
+	INTEL_CREATE_PIXMAP_TILING_X = 0x10000000,
+	INTEL_CREATE_PIXMAP_TILING_Y,
 };
 
 #if (ALWAYS_FLUSH | ALWAYS_SYNC)
-void
-i830_debug_sync(ScrnInfoPtr scrn);
+void i830_debug_sync(ScrnInfoPtr scrn);
 #else
-static inline void
-i830_debug_sync(ScrnInfoPtr scrn)
+static inline void i830_debug_sync(ScrnInfoPtr scrn)
 {
 }
 #endif
 
-static inline PixmapPtr
-get_drawable_pixmap(DrawablePtr drawable)
+static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable)
 {
-    ScreenPtr screen = drawable->pScreen;
+	ScreenPtr screen = drawable->pScreen;
 
-    if (drawable->type == DRAWABLE_PIXMAP)
-	return (PixmapPtr)drawable;
-    else
-	return screen->GetWindowPixmap((WindowPtr)drawable);
+	if (drawable->type == DRAWABLE_PIXMAP)
+		return (PixmapPtr) drawable;
+	else
+		return screen->GetWindowPixmap((WindowPtr) drawable);
 }
 
-static inline Bool
-pixmap_is_scanout(PixmapPtr pixmap)
+static inline Bool pixmap_is_scanout(PixmapPtr pixmap)
 {
-    ScreenPtr screen = pixmap->drawable.pScreen;
+	ScreenPtr screen = pixmap->drawable.pScreen;
 
-    return pixmap == screen->GetScreenPixmap(screen);
+	return pixmap == screen->GetScreenPixmap(screen);
 }
 
 #endif /* _I830_H_ */
diff --git a/src/i830_3d.c b/src/i830_3d.c
index ee17f25d..871b45b2 100644
--- a/src/i830_3d.c
+++ b/src/i830_3d.c
@@ -34,219 +34,194 @@
 
 #include "i830_reg.h"
 
-void I830EmitInvarientState( ScrnInfoPtr pScrn )
+void I830EmitInvarientState(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   BEGIN_BATCH(58);
-
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2));
-   OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3));
-
-   OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_FOG_MODE_CMD);
-   OUT_BATCH(FOGFUNC_ENABLE |
-	     FOG_LINEAR_CONST | 
-	     FOGSRC_INDEX_Z | 
-	     ENABLE_FOG_DENSITY);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(0) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(0) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0));
-   OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(1) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(1) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1));
-   OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(2) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(2) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2));
-   OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
-	     MAP_UNIT(3) |
-	     DISABLE_TEX_STREAM_BUMP |
-	     ENABLE_TEX_STREAM_COORD_SET |
-	     TEX_STREAM_COORD_SET(3) |
-	     ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
-
-   OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
-   OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0));
-   OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
-   OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(1));
-   OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
-   OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(2));
-   OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
-   OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
-
-   OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
-	     ENABLE_POINT_RASTER_RULE |
-	     OGL_POINT_RASTER_RULE |
-	     ENABLE_LINE_STRIP_PROVOKE_VRTX |
-	     ENABLE_TRI_FAN_PROVOKE_VRTX |
-	     ENABLE_TRI_STRIP_PROVOKE_VRTX |
-	     LINE_STRIP_PROVOKE_VRTX(1) |
-	     TRI_FAN_PROVOKE_VRTX(2) | 
-	     TRI_STRIP_PROVOKE_VRTX(2));
-
-   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD |
-	     DISABLE_SCISSOR_RECT);
-
-   OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM);
-   OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE);
-
-   OUT_BATCH(_3DSTATE_W_STATE_CMD);
-   OUT_BATCH(MAGIC_W_STATE_DWORD1);
-   OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ );
-
-   OUT_BATCH(_3DSTATE_COLOR_FACTOR_CMD);
-   OUT_BATCH(0x80808080);	/* .5 required in alpha for GL_DOT3_RGBA_EXT */
-
-   OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD);
-   OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
-	     TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
-	     TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
-	     TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
-
-   /* copy from mesa */
-   OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD |
-	     DISABLE_INDPT_ALPHA_BLEND |
-	     ENABLE_ALPHA_BLENDFUNC |
-	     ABLENDFUNC_ADD);
-
-   OUT_BATCH(_3DSTATE_FOG_COLOR_CMD |
-	     FOG_COLOR_RED(0) |
-	     FOG_COLOR_GREEN(0) |
-	     FOG_COLOR_BLUE(0));
-
-   OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_MODES_1_CMD |
-	     ENABLE_COLR_BLND_FUNC |
-	     BLENDFUNC_ADD |
-	     ENABLE_SRC_BLND_FACTOR |
-	     SRC_BLND_FACT(BLENDFACTOR_ONE) |
-	     ENABLE_DST_BLND_FACTOR |
-	     DST_BLND_FACT(BLENDFACTOR_ZERO));
-   OUT_BATCH(_3DSTATE_MODES_2_CMD |
-	     ENABLE_GLOBAL_DEPTH_BIAS |
-	     GLOBAL_DEPTH_BIAS(0) |
-	     ENABLE_ALPHA_TEST_FUNC|
-	     ALPHA_TEST_FUNC(0) | /* always */
-	     ALPHA_REF_VALUE(0));
-   OUT_BATCH(_3DSTATE_MODES_3_CMD |
-	     ENABLE_DEPTH_TEST_FUNC |
-	     DEPTH_TEST_FUNC(0x2) | /* COMPAREFUNC_LESS */
-	     ENABLE_ALPHA_SHADE_MODE |
-	     ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
-	     ENABLE_FOG_SHADE_MODE |
-	     FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
-	     ENABLE_SPEC_SHADE_MODE |
-	     SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
-	     ENABLE_COLOR_SHADE_MODE |
-	     COLOR_SHADE_MODE(SHADE_MODE_LINEAR) |
-	     ENABLE_CULL_MODE | CULLMODE_NONE);
-
-   OUT_BATCH(_3DSTATE_MODES_4_CMD |
-	     ENABLE_LOGIC_OP_FUNC |
-	     LOGIC_OP_FUNC(LOGICOP_COPY) |
-	     ENABLE_STENCIL_TEST_MASK |
-	     STENCIL_TEST_MASK(0xff) |
-	     ENABLE_STENCIL_WRITE_MASK |
-	     STENCIL_WRITE_MASK(0xff));
-
-   OUT_BATCH(_3DSTATE_STENCIL_TEST_CMD |
-	     ENABLE_STENCIL_PARMS |
-	     STENCIL_FAIL_OP(0) | /* STENCILOP_KEEP */
-	     STENCIL_PASS_DEPTH_FAIL_OP(0) | /* STENCILOP_KEEP */
-	     STENCIL_PASS_DEPTH_PASS_OP(0) | /* STENCILOP_KEEP */
-	     ENABLE_STENCIL_TEST_FUNC |
-	     STENCIL_TEST_FUNC(0) | /* COMPAREFUNC_ALWAYS */
-	     ENABLE_STENCIL_REF_VALUE |
-	     STENCIL_REF_VALUE(0));
-
-   OUT_BATCH(_3DSTATE_MODES_5_CMD |
-	     FLUSH_TEXTURE_CACHE |
-	     ENABLE_SPRITE_POINT_TEX |
-	     SPRITE_POINT_TEX_OFF |
-	     ENABLE_FIXED_LINE_WIDTH |
-	     FIXED_LINE_WIDTH(0x2) |       /* 1.0 */
-	     ENABLE_FIXED_POINT_WIDTH |
-	     FIXED_POINT_WIDTH(1));
-
-   OUT_BATCH(_3DSTATE_ENABLES_1_CMD |
-	     DISABLE_LOGIC_OP |
-	     DISABLE_STENCIL_TEST |
-	     DISABLE_DEPTH_BIAS |
-	     DISABLE_SPEC_ADD |
-	     DISABLE_FOG |
-	     DISABLE_ALPHA_TEST |
-	     ENABLE_COLOR_BLEND |
-	     DISABLE_DEPTH_TEST);
-   OUT_BATCH(_3DSTATE_ENABLES_2_CMD |
-	     DISABLE_STENCIL_WRITE |
-	     ENABLE_TEX_CACHE |
-	     DISABLE_DITHER |
-	     ENABLE_COLOR_MASK |
-	     ENABLE_COLOR_WRITE |
-	     DISABLE_DEPTH_WRITE);
-
-   OUT_BATCH(_3DSTATE_STIPPLE);
-
-   /* Set default blend state */
-   OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) |
-	     TEXPIPE_COLOR |
-	     ENABLE_TEXOUTPUT_WRT_SEL |
-	     TEXOP_OUTPUT_CURRENT |
-	     DISABLE_TEX_CNTRL_STAGE |
-	     TEXOP_SCALE_1X |
-	     TEXOP_MODIFY_PARMS |
-	     TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
-   OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) |
-	     TEXPIPE_ALPHA |
-	     ENABLE_TEXOUTPUT_WRT_SEL |
-	     TEXOP_OUTPUT_CURRENT |
-	     TEXOP_SCALE_1X |
-	     TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
-   OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
-	     TEXPIPE_COLOR |
-	     TEXBLEND_ARG1 |
-	     TEXBLENDARG_MODIFY_PARMS |
-	     TEXBLENDARG_DIFFUSE);
-   OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
-	     TEXPIPE_ALPHA |
-	     TEXBLEND_ARG1 |
-	     TEXBLENDARG_MODIFY_PARMS |
-	     TEXBLENDARG_DIFFUSE);
-
-   OUT_BATCH(_3DSTATE_AA_CMD |
-	     AA_LINE_ECAAR_WIDTH_ENABLE |
-	     AA_LINE_ECAAR_WIDTH_1_0 |
-	     AA_LINE_REGION_WIDTH_ENABLE |
-	     AA_LINE_REGION_WIDTH_1_0 |
-	     AA_LINE_DISABLE);
-
-   ADVANCE_BATCH();
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	BEGIN_BATCH(58);
+
+	OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0));
+	OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1));
+	OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2));
+	OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3));
+
+	OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_FOG_MODE_CMD);
+	OUT_BATCH(FOGFUNC_ENABLE |
+		  FOG_LINEAR_CONST | FOGSRC_INDEX_Z | ENABLE_FOG_DENSITY);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
+		  MAP_UNIT(0) |
+		  DISABLE_TEX_STREAM_BUMP |
+		  ENABLE_TEX_STREAM_COORD_SET |
+		  TEX_STREAM_COORD_SET(0) |
+		  ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0));
+	OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
+		  MAP_UNIT(1) |
+		  DISABLE_TEX_STREAM_BUMP |
+		  ENABLE_TEX_STREAM_COORD_SET |
+		  TEX_STREAM_COORD_SET(1) |
+		  ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1));
+	OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
+		  MAP_UNIT(2) |
+		  DISABLE_TEX_STREAM_BUMP |
+		  ENABLE_TEX_STREAM_COORD_SET |
+		  TEX_STREAM_COORD_SET(2) |
+		  ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2));
+	OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD |
+		  MAP_UNIT(3) |
+		  DISABLE_TEX_STREAM_BUMP |
+		  ENABLE_TEX_STREAM_COORD_SET |
+		  TEX_STREAM_COORD_SET(3) |
+		  ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3));
+
+	OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
+	OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0));
+	OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
+	OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(1));
+	OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
+	OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(2));
+	OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM);
+	OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3));
+
+	OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
+		  ENABLE_POINT_RASTER_RULE |
+		  OGL_POINT_RASTER_RULE |
+		  ENABLE_LINE_STRIP_PROVOKE_VRTX |
+		  ENABLE_TRI_FAN_PROVOKE_VRTX |
+		  ENABLE_TRI_STRIP_PROVOKE_VRTX |
+		  LINE_STRIP_PROVOKE_VRTX(1) |
+		  TRI_FAN_PROVOKE_VRTX(2) | TRI_STRIP_PROVOKE_VRTX(2));
+
+	OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
+
+	OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM);
+	OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE);
+
+	OUT_BATCH(_3DSTATE_W_STATE_CMD);
+	OUT_BATCH(MAGIC_W_STATE_DWORD1);
+	OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ );
+
+	OUT_BATCH(_3DSTATE_COLOR_FACTOR_CMD);
+	OUT_BATCH(0x80808080);	/* .5 required in alpha for GL_DOT3_RGBA_EXT */
+
+	OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD);
+	OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
+		  TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
+		  TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
+		  TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
+
+	/* copy from mesa */
+	OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD |
+		  DISABLE_INDPT_ALPHA_BLEND |
+		  ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD);
+
+	OUT_BATCH(_3DSTATE_FOG_COLOR_CMD |
+		  FOG_COLOR_RED(0) | FOG_COLOR_GREEN(0) | FOG_COLOR_BLUE(0));
+
+	OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_MODES_1_CMD |
+		  ENABLE_COLR_BLND_FUNC |
+		  BLENDFUNC_ADD |
+		  ENABLE_SRC_BLND_FACTOR |
+		  SRC_BLND_FACT(BLENDFACTOR_ONE) |
+		  ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO));
+	OUT_BATCH(_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(0) |	/* always */
+		  ALPHA_REF_VALUE(0));
+	OUT_BATCH(_3DSTATE_MODES_3_CMD |
+		  ENABLE_DEPTH_TEST_FUNC |
+		  DEPTH_TEST_FUNC(0x2) |	/* COMPAREFUNC_LESS */
+		  ENABLE_ALPHA_SHADE_MODE |
+		  ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
+		  ENABLE_FOG_SHADE_MODE |
+		  FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
+		  ENABLE_SPEC_SHADE_MODE |
+		  SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
+		  ENABLE_COLOR_SHADE_MODE |
+		  COLOR_SHADE_MODE(SHADE_MODE_LINEAR) |
+		  ENABLE_CULL_MODE | CULLMODE_NONE);
+
+	OUT_BATCH(_3DSTATE_MODES_4_CMD |
+		  ENABLE_LOGIC_OP_FUNC |
+		  LOGIC_OP_FUNC(LOGICOP_COPY) |
+		  ENABLE_STENCIL_TEST_MASK |
+		  STENCIL_TEST_MASK(0xff) |
+		  ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff));
+
+	OUT_BATCH(_3DSTATE_STENCIL_TEST_CMD |
+		  ENABLE_STENCIL_PARMS |
+		  STENCIL_FAIL_OP(0) |	/* STENCILOP_KEEP */
+		  STENCIL_PASS_DEPTH_FAIL_OP(0) |	/* STENCILOP_KEEP */
+		  STENCIL_PASS_DEPTH_PASS_OP(0) |	/* STENCILOP_KEEP */
+		  ENABLE_STENCIL_TEST_FUNC |
+		  STENCIL_TEST_FUNC(0) |	/* COMPAREFUNC_ALWAYS */
+		  ENABLE_STENCIL_REF_VALUE |
+		  STENCIL_REF_VALUE(0));
+
+	OUT_BATCH(_3DSTATE_MODES_5_CMD |
+		  FLUSH_TEXTURE_CACHE |
+		  ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF |
+		  ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */
+		  ENABLE_FIXED_POINT_WIDTH | FIXED_POINT_WIDTH(1));
+
+	OUT_BATCH(_3DSTATE_ENABLES_1_CMD |
+		  DISABLE_LOGIC_OP |
+		  DISABLE_STENCIL_TEST |
+		  DISABLE_DEPTH_BIAS |
+		  DISABLE_SPEC_ADD |
+		  DISABLE_FOG |
+		  DISABLE_ALPHA_TEST | ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST);
+	OUT_BATCH(_3DSTATE_ENABLES_2_CMD |
+		  DISABLE_STENCIL_WRITE |
+		  ENABLE_TEX_CACHE |
+		  DISABLE_DITHER |
+		  ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE);
+
+	OUT_BATCH(_3DSTATE_STIPPLE);
+
+	/* Set default blend state */
+	OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+		  TEXPIPE_COLOR |
+		  ENABLE_TEXOUTPUT_WRT_SEL |
+		  TEXOP_OUTPUT_CURRENT |
+		  DISABLE_TEX_CNTRL_STAGE |
+		  TEXOP_SCALE_1X |
+		  TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
+	OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) |
+		  TEXPIPE_ALPHA |
+		  ENABLE_TEXOUTPUT_WRT_SEL |
+		  TEXOP_OUTPUT_CURRENT |
+		  TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
+	OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+		  TEXPIPE_COLOR |
+		  TEXBLEND_ARG1 |
+		  TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE);
+	OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) |
+		  TEXPIPE_ALPHA |
+		  TEXBLEND_ARG1 |
+		  TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE);
+
+	OUT_BATCH(_3DSTATE_AA_CMD |
+		  AA_LINE_ECAAR_WIDTH_ENABLE |
+		  AA_LINE_ECAAR_WIDTH_1_0 |
+		  AA_LINE_REGION_WIDTH_ENABLE |
+		  AA_LINE_REGION_WIDTH_1_0 | AA_LINE_DISABLE);
+
+	ADVANCE_BATCH();
 }
diff --git a/src/i830_accel.c b/src/i830_accel.c
index a298db62..bc71611b 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -49,54 +49,49 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "i830_ring.h"
 #include "i915_drm.h"
 
-unsigned long
-intel_get_pixmap_pitch(PixmapPtr pPix)
+unsigned long intel_get_pixmap_pitch(PixmapPtr pPix)
 {
-    return (unsigned long)pPix->devKind;
+	return (unsigned long)pPix->devKind;
 }
 
-void
-I830Sync(ScrnInfoPtr pScrn)
+void I830Sync(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-   if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC))
-      ErrorF("I830Sync\n");
+	if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC))
+		ErrorF("I830Sync\n");
 
-   if (!pScrn->vtSema || !pI830->batch_bo)
-       return;
+	if (!pScrn->vtSema || !pI830->batch_bo)
+		return;
 
-   I830EmitFlush(pScrn);
+	I830EmitFlush(pScrn);
 
-   intel_batch_flush(pScrn, TRUE);
-   intel_batch_wait_last(pScrn);
+	intel_batch_flush(pScrn, TRUE);
+	intel_batch_wait_last(pScrn);
 }
 
-void
-I830EmitFlush(ScrnInfoPtr pScrn)
+void I830EmitFlush(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-   int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
 
-   if (IS_I965G(pI830))
-      flags = 0;
+	if (IS_I965G(pI830))
+		flags = 0;
 
-   {
-       BEGIN_BATCH(1);
-       OUT_BATCH(MI_FLUSH | flags);
-       ADVANCE_BATCH();
-   }
+	{
+		BEGIN_BATCH(1);
+		OUT_BATCH(MI_FLUSH | flags);
+		ADVANCE_BATCH();
+	}
 }
 
-
 #if (ALWAYS_SYNC || ALWAYS_FLUSH)
-void
-i830_debug_sync(ScrnInfoPtr scrn)
+void i830_debug_sync(ScrnInfoPtr scrn)
 {
-    if (ALWAYS_SYNC)
-	I830Sync(scrn);
-    else
-	intel_batch_flush(scrn, FALSE);
+	if (ALWAYS_SYNC)
+		I830Sync(scrn);
+	else
+		intel_batch_flush(scrn, FALSE);
 }
 #endif
 
@@ -104,61 +99,60 @@ i830_debug_sync(ScrnInfoPtr scrn)
  * from the FbInit() function in the SVGA driver, or before ScreenInit
  * in a monolithic server.
  */
-Bool
-I830AccelInit(ScreenPtr pScreen)
+Bool I830AccelInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    /* Limits are described in the BLT engine chapter under Graphics Data Size
-     * Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO,
-     * 3DSTATE_DRAWING_RECTANGLE, 3DSTATE_MAP_INFO, and 3DSTATE_MAP_INFO.
-     *
-     * i845 through i965 limits 2D rendering to 65536 lines and pitch of 32768.
-     *
-     * i965 limits 3D surface to (2*element size)-aligned offset if un-tiled.
-     * i965 limits 3D surface to 4kB-aligned offset if tiled.
-     * i965 limits 3D surfaces to w,h of ?,8192.
-     * i965 limits 3D surface to pitch of 1B - 128kB.
-     * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
-     * i965 limits 3D surface pitch alignment to 512B if tiled.
-     * i965 limits 3D destination drawing rect to w,h of 8192,8192.
-     *
-     * i915 limits 3D textures to 4B-aligned offset if un-tiled.
-     * i915 limits 3D textures to ~4kB-aligned offset if tiled.
-     * i915 limits 3D textures to width,height of 2048,2048.
-     * i915 limits 3D textures to pitch of 16B - 8kB, in dwords.
-     * i915 limits 3D destination to ~4kB-aligned offset if tiled.
-     * i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled.
-     * i915 limits 3D destination to pitch 64B-aligned if used with depth.
-     * i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled.
-     * i915 limits 3D destination to POT aligned pitch if tiled.
-     * i915 limits 3D destination drawing rect to w,h of 2048,2048.
-     *
-     * i845 limits 3D textures to 4B-aligned offset if un-tiled.
-     * i845 limits 3D textures to ~4kB-aligned offset if tiled.
-     * i845 limits 3D textures to width,height of 2048,2048.
-     * i845 limits 3D textures to pitch of 4B - 8kB, in dwords.
-     * i845 limits 3D destination to 4B-aligned offset if un-tiled.
-     * i845 limits 3D destination to ~4kB-aligned offset if tiled.
-     * i845 limits 3D destination to pitch of 8B - 8kB, in dwords.
-     * i845 limits 3D destination drawing rect to w,h of 2048,2048.
-     *
-     * For the tiled issues, the only tiled buffer we draw to should be
-     * the front, which will have an appropriate pitch/offset already set up,
-     * so UXA doesn't need to worry.
-     */
-    if (IS_I965G(pI830)) {
-	pI830->accel_pixmap_offset_alignment = 4 * 2;
-	pI830->accel_pixmap_pitch_alignment = 64;
-	pI830->accel_max_x = 8192;
-	pI830->accel_max_y = 8192;
-    } else {
-	pI830->accel_pixmap_offset_alignment = 4;
-	pI830->accel_pixmap_pitch_alignment = 64;
-	pI830->accel_max_x = 2048;
-	pI830->accel_max_y = 2048;
-    }
-
-    return i830_uxa_init(pScreen);
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	/* Limits are described in the BLT engine chapter under Graphics Data Size
+	 * Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO,
+	 * 3DSTATE_DRAWING_RECTANGLE, 3DSTATE_MAP_INFO, and 3DSTATE_MAP_INFO.
+	 *
+	 * i845 through i965 limits 2D rendering to 65536 lines and pitch of 32768.
+	 *
+	 * i965 limits 3D surface to (2*element size)-aligned offset if un-tiled.
+	 * i965 limits 3D surface to 4kB-aligned offset if tiled.
+	 * i965 limits 3D surfaces to w,h of ?,8192.
+	 * i965 limits 3D surface to pitch of 1B - 128kB.
+	 * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
+	 * i965 limits 3D surface pitch alignment to 512B if tiled.
+	 * i965 limits 3D destination drawing rect to w,h of 8192,8192.
+	 *
+	 * i915 limits 3D textures to 4B-aligned offset if un-tiled.
+	 * i915 limits 3D textures to ~4kB-aligned offset if tiled.
+	 * i915 limits 3D textures to width,height of 2048,2048.
+	 * i915 limits 3D textures to pitch of 16B - 8kB, in dwords.
+	 * i915 limits 3D destination to ~4kB-aligned offset if tiled.
+	 * i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled.
+	 * i915 limits 3D destination to pitch 64B-aligned if used with depth.
+	 * i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled.
+	 * i915 limits 3D destination to POT aligned pitch if tiled.
+	 * i915 limits 3D destination drawing rect to w,h of 2048,2048.
+	 *
+	 * i845 limits 3D textures to 4B-aligned offset if un-tiled.
+	 * i845 limits 3D textures to ~4kB-aligned offset if tiled.
+	 * i845 limits 3D textures to width,height of 2048,2048.
+	 * i845 limits 3D textures to pitch of 4B - 8kB, in dwords.
+	 * i845 limits 3D destination to 4B-aligned offset if un-tiled.
+	 * i845 limits 3D destination to ~4kB-aligned offset if tiled.
+	 * i845 limits 3D destination to pitch of 8B - 8kB, in dwords.
+	 * i845 limits 3D destination drawing rect to w,h of 2048,2048.
+	 *
+	 * For the tiled issues, the only tiled buffer we draw to should be
+	 * the front, which will have an appropriate pitch/offset already set up,
+	 * so UXA doesn't need to worry.
+	 */
+	if (IS_I965G(pI830)) {
+		pI830->accel_pixmap_offset_alignment = 4 * 2;
+		pI830->accel_pixmap_pitch_alignment = 64;
+		pI830->accel_max_x = 8192;
+		pI830->accel_max_y = 8192;
+	} else {
+		pI830->accel_pixmap_offset_alignment = 4;
+		pI830->accel_pixmap_pitch_alignment = 64;
+		pI830->accel_max_x = 2048;
+		pI830->accel_max_y = 2048;
+	}
+
+	return i830_uxa_init(pScreen);
 }
diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 88244349..48a2e1e9 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -39,113 +39,113 @@
 #include "i830_ring.h"
 #include "i915_drm.h"
 
-static void
-intel_next_batch(ScrnInfoPtr pScrn)
+static void intel_next_batch(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    /* The 865 has issues with larger-than-page-sized batch buffers. */
-    if (IS_I865G(pI830))
-	pI830->batch_bo = dri_bo_alloc(pI830->bufmgr, "batch", 4096, 4096);
-    else
-	pI830->batch_bo = dri_bo_alloc(pI830->bufmgr, "batch", 4096 * 4, 4096);
-
-    if (dri_bo_map(pI830->batch_bo, 1) != 0)
-	FatalError("Failed to map batchbuffer: %s\n", strerror(errno));
-
-    pI830->batch_used = 0;
-    pI830->batch_ptr = pI830->batch_bo->virtual;
-
-    /* If we are using DRI2, we don't know when another client has executed,
-     * so we have to reinitialize our 3D state per batch.
-     */
-    if (pI830->directRenderingType == DRI_DRI2)
-	pI830->last_3d = LAST_3D_OTHER;
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	/* The 865 has issues with larger-than-page-sized batch buffers. */
+	if (IS_I865G(pI830))
+		pI830->batch_bo =
+		    dri_bo_alloc(pI830->bufmgr, "batch", 4096, 4096);
+	else
+		pI830->batch_bo =
+		    dri_bo_alloc(pI830->bufmgr, "batch", 4096 * 4, 4096);
+
+	if (dri_bo_map(pI830->batch_bo, 1) != 0)
+		FatalError("Failed to map batchbuffer: %s\n", strerror(errno));
+
+	pI830->batch_used = 0;
+	pI830->batch_ptr = pI830->batch_bo->virtual;
+
+	/* If we are using DRI2, we don't know when another client has executed,
+	 * so we have to reinitialize our 3D state per batch.
+	 */
+	if (pI830->directRenderingType == DRI_DRI2)
+		pI830->last_3d = LAST_3D_OTHER;
 }
 
-void
-intel_batch_init(ScrnInfoPtr pScrn)
+void intel_batch_init(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    pI830->batch_emit_start = 0;
-    pI830->batch_emitting = 0;
+	pI830->batch_emit_start = 0;
+	pI830->batch_emitting = 0;
 
-    intel_next_batch(pScrn);
+	intel_next_batch(pScrn);
 }
 
-void
-intel_batch_teardown(ScrnInfoPtr pScrn)
+void intel_batch_teardown(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    if (pI830->batch_ptr != NULL) {
-	dri_bo_unmap(pI830->batch_bo);
-	pI830->batch_ptr = NULL;
+	if (pI830->batch_ptr != NULL) {
+		dri_bo_unmap(pI830->batch_bo);
+		pI830->batch_ptr = NULL;
 
-	dri_bo_unreference(pI830->batch_bo);
-	pI830->batch_bo = NULL;
+		dri_bo_unreference(pI830->batch_bo);
+		pI830->batch_bo = NULL;
 
-	dri_bo_unreference(pI830->last_batch_bo);
-	pI830->last_batch_bo = NULL;
-    }
+		dri_bo_unreference(pI830->last_batch_bo);
+		pI830->last_batch_bo = NULL;
+	}
 }
 
-void
-intel_batch_flush(ScrnInfoPtr pScrn, Bool flushed)
+void intel_batch_flush(ScrnInfoPtr pScrn, Bool flushed)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int ret;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int ret;
 
-    if (pI830->batch_used == 0)
-	return;
+	if (pI830->batch_used == 0)
+		return;
 
-    /* Emit a padding dword if we aren't going to be quad-word aligned. */
-    if ((pI830->batch_used & 4) == 0) {
-	*(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = MI_NOOP;
-	pI830->batch_used += 4;
-    }
+	/* Emit a padding dword if we aren't going to be quad-word aligned. */
+	if ((pI830->batch_used & 4) == 0) {
+		*(uint32_t *) (pI830->batch_ptr + pI830->batch_used) = MI_NOOP;
+		pI830->batch_used += 4;
+	}
 
-    /* Mark the end of the batchbuffer. */
-    *(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = MI_BATCH_BUFFER_END;
-    pI830->batch_used += 4;
+	/* Mark the end of the batchbuffer. */
+	*(uint32_t *) (pI830->batch_ptr + pI830->batch_used) =
+	    MI_BATCH_BUFFER_END;
+	pI830->batch_used += 4;
 
-    dri_bo_unmap(pI830->batch_bo);
-    pI830->batch_ptr = NULL;
+	dri_bo_unmap(pI830->batch_bo);
+	pI830->batch_ptr = NULL;
 
-    ret = dri_bo_exec(pI830->batch_bo, pI830->batch_used, NULL, 0, 0xffffffff);
-    if (ret != 0)
-	FatalError("Failed to submit batchbuffer: %s\n", strerror(-ret));
+	ret =
+	    dri_bo_exec(pI830->batch_bo, pI830->batch_used, NULL, 0,
+			0xffffffff);
+	if (ret != 0)
+		FatalError("Failed to submit batchbuffer: %s\n",
+			   strerror(-ret));
 
-    /* Save a ref to the last batch emitted, which we use for syncing
-     * in debug code.
-     */
-    dri_bo_unreference(pI830->last_batch_bo);
-    pI830->last_batch_bo = pI830->batch_bo;
-    pI830->batch_bo = NULL;
+	/* Save a ref to the last batch emitted, which we use for syncing
+	 * in debug code.
+	 */
+	dri_bo_unreference(pI830->last_batch_bo);
+	pI830->last_batch_bo = pI830->batch_bo;
+	pI830->batch_bo = NULL;
 
-    intel_next_batch(pScrn);
+	intel_next_batch(pScrn);
 
-    /* Mark that we need to flush whatever potential rendering we've done in the
-     * blockhandler.  We could set this less often, but it's probably not worth
-     * the work.
-     */
-    pI830->need_mi_flush = TRUE;
+	/* Mark that we need to flush whatever potential rendering we've done in the
+	 * blockhandler.  We could set this less often, but it's probably not worth
+	 * the work.
+	 */
+	pI830->need_mi_flush = TRUE;
 
-    if (pI830->batch_flush_notify)
-	pI830->batch_flush_notify (pScrn);
+	if (pI830->batch_flush_notify)
+		pI830->batch_flush_notify(pScrn);
 }
 
 /** Waits on the last emitted batchbuffer to be completed. */
-void
-intel_batch_wait_last(ScrnInfoPtr scrn)
+void intel_batch_wait_last(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
+	I830Ptr pI830 = I830PTR(scrn);
 
-    /* Map it CPU write, which guarantees it's done.  This is a completely
-     * non performance path, so we don't need anything better.
-     */
-    drm_intel_bo_map(pI830->last_batch_bo, TRUE);
-    drm_intel_bo_unmap(pI830->last_batch_bo);
+	/* Map it CPU write, which guarantees it's done.  This is a completely
+	 * non performance path, so we don't need anything better.
+	 */
+	drm_intel_bo_map(pI830->last_batch_bo, TRUE);
+	drm_intel_bo_unmap(pI830->last_batch_bo);
 }
-
diff --git a/src/i830_batchbuffer.h b/src/i830_batchbuffer.h
index 02834381..a00a4364 100644
--- a/src/i830_batchbuffer.h
+++ b/src/i830_batchbuffer.h
@@ -37,63 +37,59 @@ void intel_batch_teardown(ScrnInfoPtr pScrn);
 void intel_batch_flush(ScrnInfoPtr pScrn, Bool flushed);
 void intel_batch_wait_last(ScrnInfoPtr pScrn);
 
-static inline int
-intel_batch_space(I830Ptr pI830)
+static inline int intel_batch_space(I830Ptr pI830)
 {
-    return (pI830->batch_bo->size - BATCH_RESERVED) - (pI830->batch_used);
+	return (pI830->batch_bo->size - BATCH_RESERVED) - (pI830->batch_used);
 }
 
 static inline void
 intel_batch_require_space(ScrnInfoPtr pScrn, I830Ptr pI830, GLuint sz)
 {
-    assert(sz < pI830->batch_bo->size - 8);
-    if (intel_batch_space(pI830) < sz)
-	intel_batch_flush(pScrn, FALSE);
+	assert(sz < pI830->batch_bo->size - 8);
+	if (intel_batch_space(pI830) < sz)
+		intel_batch_flush(pScrn, FALSE);
 }
 
-static inline void
-intel_batch_start_atomic(ScrnInfoPtr pScrn, unsigned int sz)
+static inline void intel_batch_start_atomic(ScrnInfoPtr pScrn, unsigned int sz)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    assert(!pI830->in_batch_atomic);
-    intel_batch_require_space(pScrn, pI830, sz * 4);
+	assert(!pI830->in_batch_atomic);
+	intel_batch_require_space(pScrn, pI830, sz * 4);
 
-    pI830->in_batch_atomic = TRUE;
-    pI830->batch_atomic_limit = pI830->batch_used + sz * 4;
+	pI830->in_batch_atomic = TRUE;
+	pI830->batch_atomic_limit = pI830->batch_used + sz * 4;
 }
 
-static inline void
-intel_batch_end_atomic(ScrnInfoPtr pScrn)
+static inline void intel_batch_end_atomic(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    assert(pI830->in_batch_atomic);
-    assert(pI830->batch_used <= pI830->batch_atomic_limit);
-    pI830->in_batch_atomic = FALSE;
+	assert(pI830->in_batch_atomic);
+	assert(pI830->batch_used <= pI830->batch_atomic_limit);
+	pI830->in_batch_atomic = FALSE;
 }
 
-static inline void
-intel_batch_emit_dword(I830Ptr pI830, uint32_t dword)
+static inline void intel_batch_emit_dword(I830Ptr pI830, uint32_t dword)
 {
-    assert(pI830->batch_ptr != NULL);
-    assert(intel_batch_space(pI830) >= 4);
-    *(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = dword;
-    pI830->batch_used += 4;
+	assert(pI830->batch_ptr != NULL);
+	assert(intel_batch_space(pI830) >= 4);
+	*(uint32_t *) (pI830->batch_ptr + pI830->batch_used) = dword;
+	pI830->batch_used += 4;
 }
 
 static inline void
-intel_batch_emit_reloc (I830Ptr  pI830,
-			dri_bo  *bo,
-			uint32_t read_domains,
-			uint32_t write_domains,
-			uint32_t delta)
+intel_batch_emit_reloc(I830Ptr pI830,
+		       dri_bo * bo,
+		       uint32_t read_domains,
+		       uint32_t write_domains, uint32_t delta)
 {
-    assert(intel_batch_space(pI830) >= 4);
-    *(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = bo->offset + delta;
-    dri_bo_emit_reloc(pI830->batch_bo, read_domains, write_domains, delta,
-		      pI830->batch_used, bo);
-    pI830->batch_used += 4;
+	assert(intel_batch_space(pI830) >= 4);
+	*(uint32_t *) (pI830->batch_ptr + pI830->batch_used) =
+	    bo->offset + delta;
+	dri_bo_emit_reloc(pI830->batch_bo, read_domains, write_domains, delta,
+			  pI830->batch_used, bo);
+	pI830->batch_used += 4;
 }
 
 static inline void
@@ -101,10 +97,10 @@ intel_batch_emit_reloc_pixmap(I830Ptr pI830, PixmapPtr pPixmap,
 			      uint32_t read_domains, uint32_t write_domain,
 			      uint32_t delta)
 {
-    dri_bo *bo = i830_get_pixmap_bo(pPixmap);
-    assert(pI830->batch_ptr != NULL);
-    assert(intel_batch_space(pI830) >= 4);
-    intel_batch_emit_reloc(pI830, bo, read_domains, write_domain, delta);
+	dri_bo *bo = i830_get_pixmap_bo(pPixmap);
+	assert(pI830->batch_ptr != NULL);
+	assert(intel_batch_space(pI830) >= 4);
+	intel_batch_emit_reloc(pI830, bo, read_domains, write_domain, delta);
 }
 
 #define OUT_BATCH(dword) intel_batch_emit_dword(pI830, dword)
@@ -128,33 +124,36 @@ union intfloat {
 
 #define BEGIN_BATCH(n)							\
 do {									\
-    if (pI830->batch_emitting != 0)					\
-	FatalError("%s: BEGIN_BATCH called without closing "		\
-		   "ADVANCE_BATCH\n", __FUNCTION__);			\
-    intel_batch_require_space(pScrn, pI830, (n) * 4);			\
-    pI830->batch_emitting = (n) * 4;					\
-    pI830->batch_emit_start = pI830->batch_used;			\
+	if (pI830->batch_emitting != 0)					\
+		FatalError("%s: BEGIN_BATCH called without closing "	\
+			   "ADVANCE_BATCH\n", __FUNCTION__);		\
+	intel_batch_require_space(pScrn, pI830, (n) * 4);		\
+	pI830->batch_emitting = (n) * 4;				\
+	pI830->batch_emit_start = pI830->batch_used;			\
 } while (0)
 
 #define ADVANCE_BATCH() do {						\
-    if (pI830->batch_emitting == 0)					\
-	FatalError("%s: ADVANCE_BATCH called with no matching "		\
-		   "BEGIN_BATCH\n", __FUNCTION__);			\
-    if (pI830->batch_used > pI830->batch_emit_start + pI830->batch_emitting) \
-	FatalError("%s: ADVANCE_BATCH: exceeded allocation %d/%d\n ",	\
-		   __FUNCTION__,					\
-		   pI830->batch_used - pI830->batch_emit_start,		\
-		   pI830->batch_emitting);				\
-    if (pI830->batch_used < pI830->batch_emit_start + pI830->batch_emitting) \
-	FatalError("%s: ADVANCE_BATCH: under-used allocation %d/%d\n ", \
-		   __FUNCTION__,					\
-		   pI830->batch_used - pI830->batch_emit_start,		\
-		   pI830->batch_emitting);				\
-    if ((pI830->batch_emitting > 8) && (I810_DEBUG & DEBUG_ALWAYS_SYNC)) { \
-	/* Note: not actually syncing, just flushing each batch. */	\
-	intel_batch_flush(pScrn, FALSE);					\
-    }									\
-    pI830->batch_emitting = 0;						\
+	if (pI830->batch_emitting == 0)					\
+		FatalError("%s: ADVANCE_BATCH called with no matching "	\
+			   "BEGIN_BATCH\n", __FUNCTION__);		\
+	if (pI830->batch_used >						\
+	    pI830->batch_emit_start + pI830->batch_emitting)		\
+		FatalError("%s: ADVANCE_BATCH: exceeded allocation %d/%d\n ", \
+			   __FUNCTION__,				\
+			   pI830->batch_used - pI830->batch_emit_start,	\
+			   pI830->batch_emitting);			\
+	if (pI830->batch_used < pI830->batch_emit_start +		\
+	    pI830->batch_emitting)					\
+		FatalError("%s: ADVANCE_BATCH: under-used allocation %d/%d\n ", \
+			   __FUNCTION__,				\
+			   pI830->batch_used - pI830->batch_emit_start,	\
+			   pI830->batch_emitting);			\
+	if ((pI830->batch_emitting > 8) &&				\
+	    (I810_DEBUG & DEBUG_ALWAYS_SYNC)) {				\
+		/* Note: not actually syncing, just flushing each batch. */ \
+		intel_batch_flush(pScrn, FALSE);			\
+	}								\
+	pI830->batch_emitting = 0;					\
 } while (0)
 
 #endif /* _INTEL_BATCHBUFFER_H */
diff --git a/src/i830_bios.c b/src/i830_bios.c
index f4a20053..b8439407 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -26,7 +26,7 @@
  */
 #ifdef HAVE_CONFIG_H
 #include "config.h"
-#undef VERSION	/* XXX edid.h has a VERSION too */
+#undef VERSION			/* XXX edid.h has a VERSION too */
 #endif
 
 #include <stdio.h>
@@ -49,59 +49,54 @@
 
 #define		SLAVE_ADDR1	0x70
 #define		SLAVE_ADDR2	0x72
-static void *
-find_section(struct bdb_header *bdb, int section_id)
+static void *find_section(struct bdb_header *bdb, int section_id)
 {
-    unsigned char *base = (unsigned char *)bdb;
-    int index = 0;
-    uint16_t total, current_size;
-    unsigned char current_id;
-
-    /* skip to first section */
-    index += bdb->header_size;
-    total = bdb->bdb_size;
-
-    /* walk the sections looking for section_id */
-    while (index < total) {
-	current_id = *(base + index);
-	index++;
-	current_size = *((uint16_t *)(base + index));
-	index += 2;
-	if (current_id == section_id)
-	    return base + index;
-	index += current_size;
-    }
-
-    return NULL;
+	unsigned char *base = (unsigned char *)bdb;
+	int index = 0;
+	uint16_t total, current_size;
+	unsigned char current_id;
+
+	/* skip to first section */
+	index += bdb->header_size;
+	total = bdb->bdb_size;
+
+	/* walk the sections looking for section_id */
+	while (index < total) {
+		current_id = *(base + index);
+		index++;
+		current_size = *((uint16_t *) (base + index));
+		index += 2;
+		if (current_id == section_id)
+			return base + index;
+		index += current_size;
+	}
+
+	return NULL;
 }
 
 static void
 fill_detail_timing_data(DisplayModePtr fixed_mode, unsigned char *timing_ptr)
 {
-    fixed_mode->HDisplay   = _H_ACTIVE(timing_ptr);
-    fixed_mode->VDisplay   = _V_ACTIVE(timing_ptr);
-    fixed_mode->HSyncStart = fixed_mode->HDisplay +
-        _H_SYNC_OFF(timing_ptr);
-    fixed_mode->HSyncEnd   = fixed_mode->HSyncStart +
-        _H_SYNC_WIDTH(timing_ptr);
-    fixed_mode->HTotal     = fixed_mode->HDisplay +
-        _H_BLANK(timing_ptr);
-    fixed_mode->VSyncStart = fixed_mode->VDisplay +
-        _V_SYNC_OFF(timing_ptr);
-    fixed_mode->VSyncEnd   = fixed_mode->VSyncStart +
-        _V_SYNC_WIDTH(timing_ptr);
-    fixed_mode->VTotal     = fixed_mode->VDisplay +
-        _V_BLANK(timing_ptr);
-    fixed_mode->Clock      = _PIXEL_CLOCK(timing_ptr) / 1000;
-    fixed_mode->type       = M_T_PREFERRED;
-
-    /* Some VBTs have bogus h/vtotal values */
-    if (fixed_mode->HSyncEnd > fixed_mode->HTotal)
-        fixed_mode->HTotal = fixed_mode->HSyncEnd + 1;
-    if (fixed_mode->VSyncEnd > fixed_mode->VTotal)
-        fixed_mode->VTotal = fixed_mode->VSyncEnd + 1;
-
-    xf86SetModeDefaultName(fixed_mode);
+	fixed_mode->HDisplay = _H_ACTIVE(timing_ptr);
+	fixed_mode->VDisplay = _V_ACTIVE(timing_ptr);
+	fixed_mode->HSyncStart = fixed_mode->HDisplay + _H_SYNC_OFF(timing_ptr);
+	fixed_mode->HSyncEnd = fixed_mode->HSyncStart +
+	    _H_SYNC_WIDTH(timing_ptr);
+	fixed_mode->HTotal = fixed_mode->HDisplay + _H_BLANK(timing_ptr);
+	fixed_mode->VSyncStart = fixed_mode->VDisplay + _V_SYNC_OFF(timing_ptr);
+	fixed_mode->VSyncEnd = fixed_mode->VSyncStart +
+	    _V_SYNC_WIDTH(timing_ptr);
+	fixed_mode->VTotal = fixed_mode->VDisplay + _V_BLANK(timing_ptr);
+	fixed_mode->Clock = _PIXEL_CLOCK(timing_ptr) / 1000;
+	fixed_mode->type = M_T_PREFERRED;
+
+	/* Some VBTs have bogus h/vtotal values */
+	if (fixed_mode->HSyncEnd > fixed_mode->HTotal)
+		fixed_mode->HTotal = fixed_mode->HSyncEnd + 1;
+	if (fixed_mode->VSyncEnd > fixed_mode->VTotal)
+		fixed_mode->VTotal = fixed_mode->VSyncEnd + 1;
+
+	xf86SetModeDefaultName(fixed_mode);
 
 }
 
@@ -113,220 +108,219 @@ fill_detail_timing_data(DisplayModePtr fixed_mode, unsigned char *timing_ptr)
  * offsets, such that this parsing fails.  Thus, almost any other method for
  * detecting the panel mode is preferable.
  */
-static void
-parse_integrated_panel_data(I830Ptr pI830, struct bdb_header *bdb)
+static void parse_integrated_panel_data(I830Ptr pI830, struct bdb_header *bdb)
 {
-    struct bdb_lvds_options *lvds_options;
-    struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
-    struct bdb_lvds_lfp_data *lvds_data;
-    struct bdb_lvds_lfp_data_entry *entry;
-    DisplayModePtr fixed_mode;
-    unsigned char *timing_ptr;
-    int lfp_data_size;
-    int dvo_offset;
-
-    /* Defaults if we can't find VBT info */
-    pI830->lvds_dither = 0;
-
-    lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
-    if (!lvds_options)
-	return;
-
-    pI830->lvds_dither = lvds_options->pixel_dither;
-    if (lvds_options->panel_type == 0xff)
-	return;
-
-    lvds_data = find_section(bdb, BDB_LVDS_LFP_DATA);
-    if (!lvds_data) {
-	return;
-    }
-
-    lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
-    if (!lvds_lfp_data_ptrs)
-	return;
-
-    lfp_data_size = lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
-	lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
-    dvo_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
-			lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
-    entry = (struct bdb_lvds_lfp_data_entry *)((uint8_t *)lvds_data->data +
-					       (lfp_data_size * lvds_options->panel_type));
-    timing_ptr = (unsigned char *)entry + dvo_offset;
-    if (pI830->skip_panel_detect)
-	return;
-
-    fixed_mode = xnfalloc(sizeof(DisplayModeRec));
-    memset(fixed_mode, 0, sizeof(*fixed_mode));
+	struct bdb_lvds_options *lvds_options;
+	struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
+	struct bdb_lvds_lfp_data *lvds_data;
+	struct bdb_lvds_lfp_data_entry *entry;
+	DisplayModePtr fixed_mode;
+	unsigned char *timing_ptr;
+	int lfp_data_size;
+	int dvo_offset;
+
+	/* Defaults if we can't find VBT info */
+	pI830->lvds_dither = 0;
+
+	lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
+	if (!lvds_options)
+		return;
+
+	pI830->lvds_dither = lvds_options->pixel_dither;
+	if (lvds_options->panel_type == 0xff)
+		return;
+
+	lvds_data = find_section(bdb, BDB_LVDS_LFP_DATA);
+	if (!lvds_data) {
+		return;
+	}
 
-    /* Since lvds_bdb_2_fp_edid_dtd is just an EDID detailed timing
-     * block, pull the contents out using EDID macros.
-     */
-    fill_detail_timing_data(fixed_mode, timing_ptr);
-    pI830->lvds_fixed_mode = fixed_mode;
+	lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
+	if (!lvds_lfp_data_ptrs)
+		return;
+
+	lfp_data_size = lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
+	    lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
+	dvo_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
+	    lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
+	entry = (struct bdb_lvds_lfp_data_entry *)((uint8_t *) lvds_data->data +
+						   (lfp_data_size *
+						    lvds_options->panel_type));
+	timing_ptr = (unsigned char *)entry + dvo_offset;
+	if (pI830->skip_panel_detect)
+		return;
+
+	fixed_mode = xnfalloc(sizeof(DisplayModeRec));
+	memset(fixed_mode, 0, sizeof(*fixed_mode));
+
+	/* Since lvds_bdb_2_fp_edid_dtd is just an EDID detailed timing
+	 * block, pull the contents out using EDID macros.
+	 */
+	fill_detail_timing_data(fixed_mode, timing_ptr);
+	pI830->lvds_fixed_mode = fixed_mode;
 }
 
-static void
-parse_sdvo_panel_data(I830Ptr pI830, struct bdb_header *bdb)
+static void parse_sdvo_panel_data(I830Ptr pI830, struct bdb_header *bdb)
 {
-    DisplayModePtr fixed_mode;
-    struct bdb_sdvo_lvds_options *sdvo_lvds_options;
-    unsigned char *timing_ptr;
+	DisplayModePtr fixed_mode;
+	struct bdb_sdvo_lvds_options *sdvo_lvds_options;
+	unsigned char *timing_ptr;
 
-    pI830->sdvo_lvds_fixed_mode = NULL;
+	pI830->sdvo_lvds_fixed_mode = NULL;
 
-    sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
-    if (sdvo_lvds_options == NULL)
-        return;
+	sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
+	if (sdvo_lvds_options == NULL)
+		return;
 
-    timing_ptr = find_section(bdb, BDB_SDVO_PANEL_DTDS);
-    if (timing_ptr == NULL)
-        return;
+	timing_ptr = find_section(bdb, BDB_SDVO_PANEL_DTDS);
+	if (timing_ptr == NULL)
+		return;
 
-    fixed_mode = xnfalloc(sizeof(DisplayModeRec));
-    if (fixed_mode == NULL)
-        return;
+	fixed_mode = xnfalloc(sizeof(DisplayModeRec));
+	if (fixed_mode == NULL)
+		return;
 
-    memset(fixed_mode, 0, sizeof(*fixed_mode));
-    fill_detail_timing_data(fixed_mode, timing_ptr +
-                        (sdvo_lvds_options->panel_type * DET_TIMING_INFO_LEN));
-    pI830->sdvo_lvds_fixed_mode = fixed_mode;
+	memset(fixed_mode, 0, sizeof(*fixed_mode));
+	fill_detail_timing_data(fixed_mode, timing_ptr +
+				(sdvo_lvds_options->panel_type *
+				 DET_TIMING_INFO_LEN));
+	pI830->sdvo_lvds_fixed_mode = fixed_mode;
 
 }
 
-static void
-parse_panel_data(I830Ptr pI830, struct bdb_header *bdb)
+static void parse_panel_data(I830Ptr pI830, struct bdb_header *bdb)
 {
-    parse_integrated_panel_data(pI830, bdb);
-    parse_sdvo_panel_data(pI830, bdb);
+	parse_integrated_panel_data(pI830, bdb);
+	parse_sdvo_panel_data(pI830, bdb);
 }
 
-static void
-parse_general_features(I830Ptr pI830, struct bdb_header *bdb)
+static void parse_general_features(I830Ptr pI830, struct bdb_header *bdb)
 {
-    struct bdb_general_features *general;
-
-    /* Set sensible defaults in case we can't find the general block */
-    pI830->tv_present = 1;
-
-    general = find_section(bdb, BDB_GENERAL_FEATURES);
-    if (!general)
-	return;
-
-    pI830->tv_present = general->int_tv_support;
-    pI830->lvds_use_ssc = general->enable_ssc;
-    if (pI830->lvds_use_ssc) {
-	if (IS_I85X(pI830))
-	    pI830->lvds_ssc_freq = general->ssc_freq ? 66 : 48;
-	else
-	    pI830->lvds_ssc_freq = general->ssc_freq ? 100 : 96;
-    }
+	struct bdb_general_features *general;
+
+	/* Set sensible defaults in case we can't find the general block */
+	pI830->tv_present = 1;
+
+	general = find_section(bdb, BDB_GENERAL_FEATURES);
+	if (!general)
+		return;
+
+	pI830->tv_present = general->int_tv_support;
+	pI830->lvds_use_ssc = general->enable_ssc;
+	if (pI830->lvds_use_ssc) {
+		if (IS_I85X(pI830))
+			pI830->lvds_ssc_freq = general->ssc_freq ? 66 : 48;
+		else
+			pI830->lvds_ssc_freq = general->ssc_freq ? 100 : 96;
+	}
 }
 
-static void
-parse_driver_feature(I830Ptr pI830, struct bdb_header *bdb)
+static void parse_driver_feature(I830Ptr pI830, struct bdb_header *bdb)
 {
-    struct bdb_driver_feature *feature;
+	struct bdb_driver_feature *feature;
 
-    /* For mobile chip, set default as true */
-    if (IS_MOBILE(pI830) && !IS_I830(pI830))
-	pI830->integrated_lvds = TRUE;
+	/* For mobile chip, set default as true */
+	if (IS_MOBILE(pI830) && !IS_I830(pI830))
+		pI830->integrated_lvds = TRUE;
 
-    /* skip pre-9xx chips which is broken to parse this block. */
-    if (!IS_I9XX(pI830))
-	return;
+	/* skip pre-9xx chips which is broken to parse this block. */
+	if (!IS_I9XX(pI830))
+		return;
 
-    /* XXX Disable this parsing, as it looks doesn't work for all
-       VBIOS. Reenable it if we could find out the reliable VBT parsing
-       for LVDS config later. */
-    if (1)
-	return;
+	/* XXX Disable this parsing, as it looks doesn't work for all
+	   VBIOS. Reenable it if we could find out the reliable VBT parsing
+	   for LVDS config later. */
+	if (1)
+		return;
 
-    feature = find_section(bdb, BDB_DRIVER_FEATURES);
-    if (!feature)
-	return;
+	feature = find_section(bdb, BDB_DRIVER_FEATURES);
+	if (!feature)
+		return;
 
-    if (feature->lvds_config != BDB_DRIVER_INT_LVDS)
-	pI830->integrated_lvds = FALSE;
+	if (feature->lvds_config != BDB_DRIVER_INT_LVDS)
+		pI830->integrated_lvds = FALSE;
 }
 
 static
 void parse_sdvo_mapping(ScrnInfoPtr pScrn, struct bdb_header *bdb)
 {
-    unsigned int block_size;
-    uint16_t *block_ptr;
-    struct bdb_general_definitions *defs;
-    struct child_device_config *child;
-    int i, child_device_num, count;
-    struct sdvo_device_mapping *p_mapping;
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
-    if (!defs) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-			"can't find the general definition blocks\n");
-	return;
-    }
-    /* Get the block size of general defintion block */
-    block_ptr = (uint16_t *)((char *)defs - 2);
-    block_size = *block_ptr;
-    child_device_num = (block_size - sizeof(*defs)) / sizeof(*child);
-    count = 0;
-
-    for (i = 0; i < child_device_num; i++) {
-	child = &defs->devices[i];
-	if (!child->device_type) {
-		/* skip invalid child device type*/
-		 continue;
-	}
-	if (child->slave_addr == SLAVE_ADDR1 ||
-			child->slave_addr == SLAVE_ADDR2) {
-	    if (child->dvo_port != DEVICE_PORT_DVOB &&
-			child->dvo_port != DEVICE_PORT_DVOC) {
-		/* skip the incorrect sdvo port */
+	unsigned int block_size;
+	uint16_t *block_ptr;
+	struct bdb_general_definitions *defs;
+	struct child_device_config *child;
+	int i, child_device_num, count;
+	struct sdvo_device_mapping *p_mapping;
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
+	if (!defs) {
 		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-				"Incorrect SDVO port\n");
-		continue;
-	    }
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			"the SDVO device with slave addr %x "
-			"is found on DVO %x port\n",
-			child->slave_addr, child->dvo_port);
-	    /* fill the primary dvo port */
-	    p_mapping = &(pI830->sdvo_mappings[child->dvo_port - 1]);
-	    if (!p_mapping->initialized) {
-		p_mapping->dvo_port = child->dvo_port;
-		p_mapping->dvo_wiring = child->dvo_wiring;
-		p_mapping->initialized = 1;
-		p_mapping->slave_addr = child->slave_addr;
-	    } else {
-		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-				"One DVO port is shared by two slave "
-				"address. Maybe it can't be handled\n");
-	    }
-	    /* If there exists the slave2_addr, maybe it is a sdvo
-	     * device that contain multiple inputs. And it can't
-	     * handled by SDVO driver.
-	     * Ignore the dvo mapping of slave2_addr
-	     * of course its mapping info won't be added.
-	     */
-	    if (child->slave2_addr) {
-		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-				"Two DVO ports uses the same slave address."
-				"Maybe it can't be handled by SDVO driver\n");
-	    }
-	    count++;
-	} else {
-	    /* if the slave address is neither 0x70 nor 0x72, skip it. */
-	    continue;
+			   "can't find the general definition blocks\n");
+		return;
+	}
+	/* Get the block size of general defintion block */
+	block_ptr = (uint16_t *) ((char *)defs - 2);
+	block_size = *block_ptr;
+	child_device_num = (block_size - sizeof(*defs)) / sizeof(*child);
+	count = 0;
+
+	for (i = 0; i < child_device_num; i++) {
+		child = &defs->devices[i];
+		if (!child->device_type) {
+			/* skip invalid child device type */
+			continue;
+		}
+		if (child->slave_addr == SLAVE_ADDR1 ||
+		    child->slave_addr == SLAVE_ADDR2) {
+			if (child->dvo_port != DEVICE_PORT_DVOB &&
+			    child->dvo_port != DEVICE_PORT_DVOC) {
+				/* skip the incorrect sdvo port */
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "Incorrect SDVO port\n");
+				continue;
+			}
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "the SDVO device with slave addr %x "
+				   "is found on DVO %x port\n",
+				   child->slave_addr, child->dvo_port);
+			/* fill the primary dvo port */
+			p_mapping =
+			    &(pI830->sdvo_mappings[child->dvo_port - 1]);
+			if (!p_mapping->initialized) {
+				p_mapping->dvo_port = child->dvo_port;
+				p_mapping->dvo_wiring = child->dvo_wiring;
+				p_mapping->initialized = 1;
+				p_mapping->slave_addr = child->slave_addr;
+			} else {
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "One DVO port is shared by two slave "
+					   "address. Maybe it can't be handled\n");
+			}
+			/* If there exists the slave2_addr, maybe it is a sdvo
+			 * device that contain multiple inputs. And it can't
+			 * handled by SDVO driver.
+			 * Ignore the dvo mapping of slave2_addr
+			 * of course its mapping info won't be added.
+			 */
+			if (child->slave2_addr) {
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "Two DVO ports uses the same slave address."
+					   "Maybe it can't be handled by SDVO driver\n");
+			}
+			count++;
+		} else {
+			/* if the slave address is neither 0x70 nor 0x72, skip it. */
+			continue;
+		}
 	}
-    }
-    /* If the count is zero, it indicates that no sdvo device is found */
-    if (!count)
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			"No SDVO device is found in VBT\n");
+	/* If the count is zero, it indicates that no sdvo device is found */
+	if (!count)
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "No SDVO device is found in VBT\n");
 
-    return;
+	return;
 }
+
 #define INTEL_VBIOS_SIZE (64 * 1024)	/* XXX */
 
 /**
@@ -339,63 +333,62 @@ void parse_sdvo_mapping(ScrnInfoPtr pScrn, struct bdb_header *bdb)
  *
  * Returns 0 on success, nonzero on failure.
  */
-int
-i830_bios_init(ScrnInfoPtr pScrn)
+int i830_bios_init(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct vbt_header *vbt;
-    struct bdb_header *bdb;
-    int vbt_off, bdb_off;
-    unsigned char *bios;
-    int ret;
-    int size;
-
-    size = pI830->PciInfo->rom_size;
-    if (size == 0) {
-	size = INTEL_VBIOS_SIZE;
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "libpciaccess reported 0 rom size, guessing %dkB\n",
-		   size / 1024);
-    }
-    bios = xalloc(size);
-    if (bios == NULL)
-	return -1;
-
-    ret = pci_device_read_rom (pI830->PciInfo, bios);
-    if (ret != 0) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-                  "libpciaccess failed to read %dkB video BIOS: %s\n",
-                  size / 1024, strerror(-ret));
-	xfree (bios);
-	return -1;
-    }
-
-    vbt_off = INTEL_BIOS_16(0x1a);
-    if (vbt_off >= size) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Bad VBT offset: 0x%x\n",
-		   vbt_off);
-	xfree(bios);
-	return -1;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct vbt_header *vbt;
+	struct bdb_header *bdb;
+	int vbt_off, bdb_off;
+	unsigned char *bios;
+	int ret;
+	int size;
+
+	size = pI830->PciInfo->rom_size;
+	if (size == 0) {
+		size = INTEL_VBIOS_SIZE;
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "libpciaccess reported 0 rom size, guessing %dkB\n",
+			   size / 1024);
+	}
+	bios = xalloc(size);
+	if (bios == NULL)
+		return -1;
 
-    vbt = (struct vbt_header *)(bios + vbt_off);
+	ret = pci_device_read_rom(pI830->PciInfo, bios);
+	if (ret != 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "libpciaccess failed to read %dkB video BIOS: %s\n",
+			   size / 1024, strerror(-ret));
+		xfree(bios);
+		return -1;
+	}
 
-    if (memcmp(vbt->signature, "$VBT", 4) != 0) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Bad VBT signature\n");
-	xfree(bios);
-	return -1;
-    }
+	vbt_off = INTEL_BIOS_16(0x1a);
+	if (vbt_off >= size) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Bad VBT offset: 0x%x\n",
+			   vbt_off);
+		xfree(bios);
+		return -1;
+	}
+
+	vbt = (struct vbt_header *)(bios + vbt_off);
 
-    /* Now that we've found the VBIOS, go scour the VBTs */
-    bdb_off = vbt_off + vbt->bdb_offset;
-    bdb = (struct bdb_header *)(bios + bdb_off);
+	if (memcmp(vbt->signature, "$VBT", 4) != 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Bad VBT signature\n");
+		xfree(bios);
+		return -1;
+	}
 
-    parse_general_features(pI830, bdb);
-    parse_panel_data(pI830, bdb);
-    parse_driver_feature(pI830, bdb);
-    parse_sdvo_mapping(pScrn, bdb);
+	/* Now that we've found the VBIOS, go scour the VBTs */
+	bdb_off = vbt_off + vbt->bdb_offset;
+	bdb = (struct bdb_header *)(bios + bdb_off);
 
-    xfree(bios);
+	parse_general_features(pI830, bdb);
+	parse_panel_data(pI830, bdb);
+	parse_driver_feature(pI830, bdb);
+	parse_sdvo_mapping(pScrn, bdb);
+
+	xfree(bios);
 
-    return 0;
+	return 0;
 }
diff --git a/src/i830_bios.h b/src/i830_bios.h
index 754fc86e..f43911e5 100644
--- a/src/i830_bios.h
+++ b/src/i830_bios.h
@@ -34,22 +34,22 @@
 #endif
 
 struct vbt_header {
-    char signature[20];			/**< Always starts with 'VBT$' */
-    uint16_t version;			/**< decimal */
-    uint16_t header_size;		/**< in bytes */
-    uint16_t vbt_size;			/**< in bytes */
-    uint8_t vbt_checksum;
-    uint8_t reserved0;
-    uint32_t bdb_offset;		/**< from beginning of VBT */
-    uint32_t aim_offset[4];		/**< from beginning of VBT */
-} __attribute__((packed));
+	char signature[20];		/**< Always starts with 'VBT$' */
+	uint16_t version;		/**< decimal */
+	uint16_t header_size;		/**< in bytes */
+	uint16_t vbt_size;		/**< in bytes */
+	uint8_t vbt_checksum;
+	uint8_t reserved0;
+	uint32_t bdb_offset;		/**< from beginning of VBT */
+	uint32_t aim_offset[4];		/**< from beginning of VBT */
+} __attribute__ ((packed));
 
 struct bdb_header {
-    char signature[16];			/**< Always 'BIOS_DATA_BLOCK' */
-    uint16_t version;			/**< decimal */
-    uint16_t header_size;		/**< in bytes */
-    uint16_t bdb_size;			/**< in bytes */
-} __attribute__((packed));
+	char signature[16];		/**< Always 'BIOS_DATA_BLOCK' */
+	uint16_t version;		/**< decimal */
+	uint16_t header_size;		/**< in bytes */
+	uint16_t bdb_size;		/**< in bytes */
+} __attribute__ ((packed));
 
 /*
  * There are several types of BIOS data blocks (BDBs), each block has
@@ -76,7 +76,7 @@ struct bdb_header {
 #define BDB_DRIVER_ROTATION	 18
 #define BDB_DISPLAY_REMOVE	 19
 #define BDB_OEM_CUSTOM		 20
-#define BDB_EFP_LIST		 21 /* workarounds for VGA hsync/vsync */
+#define BDB_EFP_LIST		 21	/* workarounds for VGA hsync/vsync */
 #define BDB_SDVO_LVDS_OPTIONS	 22
 #define BDB_SDVO_PANEL_DTDS	 23
 #define BDB_SDVO_LVDS_PNP_IDS	 24
@@ -87,51 +87,51 @@ struct bdb_header {
 #define BDB_LVDS_LFP_DATA	 42
 #define BDB_LVDS_BACKLIGHT	 43
 #define BDB_LVDS_POWER		 44
-#define BDB_SKIP		254 /* VBIOS private block, ignore */
+#define BDB_SKIP		254	/* VBIOS private block, ignore */
 
 struct bdb_general_features {
-        /* bits 1 */
+	/* bits 1 */
 	unsigned char panel_fitting:2;
 	unsigned char flexaim:1;
 	unsigned char msg_enable:1;
 	unsigned char clear_screen:3;
 	unsigned char color_flip:1;
 
-        /* bits 2 */
+	/* bits 2 */
 	unsigned char download_ext_vbt:1;
 	unsigned char enable_ssc:1;
 	unsigned char ssc_freq:1;
 	unsigned char enable_lfp_on_override:1;
 	unsigned char disable_ssc_ddt:1;
-	unsigned char rsvd8:3; /* finish byte */
+	unsigned char rsvd8:3;	/* finish byte */
 
-        /* bits 3 */
+	/* bits 3 */
 	unsigned char disable_smooth_vision:1;
 	unsigned char single_dvi:1;
-	unsigned char rsvd9:6; /* finish byte */
+	unsigned char rsvd9:6;	/* finish byte */
 
-        /* bits 4 */
+	/* bits 4 */
 	unsigned char legacy_monitor_detect;
 
-        /* bits 5 */
+	/* bits 5 */
 	unsigned char int_crt_support:1;
 	unsigned char int_tv_support:1;
-	unsigned char rsvd11:6; /* finish byte */
-} __attribute__((packed));
+	unsigned char rsvd11:6;	/* finish byte */
+} __attribute__ ((packed));
 
-#define GPIO_PIN_NONE		0x00 /* "N/A" */
-#define	GPIO_PIN_I2C		0x01 /* "I2C GPIO pins" */
-#define	GPIO_PIN_CRT_DDC	0x02 /* "Analog CRT DDC GPIO pins" */
+#define GPIO_PIN_NONE		0x00	/* "N/A" */
+#define	GPIO_PIN_I2C		0x01	/* "I2C GPIO pins" */
+#define	GPIO_PIN_CRT_DDC	0x02	/* "Analog CRT DDC GPIO pins" */
 /* 915+ */
-#define	GPIO_PIN_LVDS		0x03 /* "Integrated LVDS DDC GPIO pins" */
-#define	GPIO_PIN_SDVO_I2C	0x05 /* "sDVO I2C GPIO pins" */
-#define	GPIO_PIN_SDVO_DDC1	0x1D /* "SDVO DDC1 GPIO pins" */
-#define	GPIO_PIN_SDVO_DDC2	0x2D /* "SDVO DDC2 GPIO pins" */
+#define	GPIO_PIN_LVDS		0x03	/* "Integrated LVDS DDC GPIO pins" */
+#define	GPIO_PIN_SDVO_I2C	0x05	/* "sDVO I2C GPIO pins" */
+#define	GPIO_PIN_SDVO_DDC1	0x1D	/* "SDVO DDC1 GPIO pins" */
+#define	GPIO_PIN_SDVO_DDC2	0x2D	/* "SDVO DDC2 GPIO pins" */
 /* pre-915 */
-#define	GPIO_PIN_DVI_LVDS	0x03 /* "DVI/LVDS DDC GPIO pins" */
-#define	GPIO_PIN_ADD_I2C	0x05 /* "ADDCARD I2C GPIO pins" */
-#define	GPIO_PIN_ADD_DDC	0x04 /* "ADDCARD DDC GPIO pins" */
-#define	GPIO_PIN_ADD_DDC_I2C	0x06 /* "ADDCARD DDC/I2C GPIO pins" */
+#define	GPIO_PIN_DVI_LVDS	0x03	/* "DVI/LVDS DDC GPIO pins" */
+#define	GPIO_PIN_ADD_I2C	0x05	/* "ADDCARD I2C GPIO pins" */
+#define	GPIO_PIN_ADD_DDC	0x04	/* "ADDCARD DDC GPIO pins" */
+#define	GPIO_PIN_ADD_DDC_I2C	0x06	/* "ADDCARD DDC/I2C GPIO pins" */
 
 /* Pre 915 */
 #define DEVICE_TYPE_NONE	0x00
@@ -181,40 +181,40 @@ struct bdb_general_features {
 #define DEVICE_WIRE_DVOB_MASTER	0x0d
 #define DEVICE_WIRE_DVOC_MASTER	0x0e
 
-#define DEVICE_PORT_DVOA	0x00 /* none on 845+ */
+#define DEVICE_PORT_DVOA	0x00	/* none on 845+ */
 #define DEVICE_PORT_DVOB	0x01
 #define DEVICE_PORT_DVOC	0x02
 
 struct child_device_config {
-    uint16_t handle;
-    uint16_t device_type; /* See DEVICE_TYPE_* above */
-    uint8_t device_id[10];
-    uint16_t addin_offset;
-    uint8_t dvo_port; /* See DEVICE_PORT_* above */
-    uint8_t i2c_pin;
-    uint8_t slave_addr;
-    uint8_t ddc_pin;
-    uint16_t edid_ptr;
-    uint8_t dvo_cfg; /* See DEVICE_CFG_* above */
-    uint8_t dvo2_port;
-    uint8_t i2c2_pin;
-    uint8_t slave2_addr;
-    uint8_t ddc2_pin;
-    uint8_t capabilities;
-    uint8_t dvo_wiring; /* See DEVICE_WIRE_* above */
-    uint8_t dvo2_wiring;
-    uint16_t extended_type;
-    uint8_t dvo_function;
-} __attribute__((packed));
+	uint16_t handle;
+	uint16_t device_type;	/* See DEVICE_TYPE_* above */
+	uint8_t device_id[10];
+	uint16_t addin_offset;
+	uint8_t dvo_port;	/* See DEVICE_PORT_* above */
+	uint8_t i2c_pin;
+	uint8_t slave_addr;
+	uint8_t ddc_pin;
+	uint16_t edid_ptr;
+	uint8_t dvo_cfg;	/* See DEVICE_CFG_* above */
+	uint8_t dvo2_port;
+	uint8_t i2c2_pin;
+	uint8_t slave2_addr;
+	uint8_t ddc2_pin;
+	uint8_t capabilities;
+	uint8_t dvo_wiring;	/* See DEVICE_WIRE_* above */
+	uint8_t dvo2_wiring;
+	uint16_t extended_type;
+	uint8_t dvo_function;
+} __attribute__ ((packed));
 
 struct bdb_general_definitions {
-	unsigned char crt_ddc_gmbus_pin; /* see GPIO_PIN_* above */
+	unsigned char crt_ddc_gmbus_pin;	/* see GPIO_PIN_* above */
 
 	/* DPMS bits */
 	unsigned char dpms_acpi:1;
 	unsigned char skip_boot_crt_detect:1;
 	unsigned char dpms_aim:1;
-	unsigned char rsvd1:5; /* finish byte */
+	unsigned char rsvd1:5;	/* finish byte */
 
 	/* boot device bits */
 	unsigned char boot_display[2];
@@ -230,107 +230,107 @@ struct bdb_general_definitions {
 	 */
 	struct child_device_config devices[0];
 	/* may be another device block here on some platforms */
-} __attribute__((packed));
+} __attribute__ ((packed));
 
 #define DEVICE_CHILD_SIZE 7
 
 struct bdb_child_devices {
-    uint8_t child_structure_size;
-    struct child_device_config children[DEVICE_CHILD_SIZE];
-} __attribute__((packed));
+	uint8_t child_structure_size;
+	struct child_device_config children[DEVICE_CHILD_SIZE];
+} __attribute__ ((packed));
 
 struct bdb_lvds_options {
-    uint8_t panel_type;
-    uint8_t rsvd1;
-    /* LVDS capabilities, stored in a dword */
-    uint8_t pfit_mode:2;
-    uint8_t pfit_text_mode_enhanced:1;
-    uint8_t pfit_gfx_mode_enhanced:1;
-    uint8_t pfit_ratio_auto:1;
-    uint8_t pixel_dither:1;
-    uint8_t lvds_edid:1;
-    uint8_t rsvd2:1;
-    uint8_t rsvd4;
-} __attribute__((packed));
+	uint8_t panel_type;
+	uint8_t rsvd1;
+	/* LVDS capabilities, stored in a dword */
+	uint8_t pfit_mode:2;
+	uint8_t pfit_text_mode_enhanced:1;
+	uint8_t pfit_gfx_mode_enhanced:1;
+	uint8_t pfit_ratio_auto:1;
+	uint8_t pixel_dither:1;
+	uint8_t lvds_edid:1;
+	uint8_t rsvd2:1;
+	uint8_t rsvd4;
+} __attribute__ ((packed));
 
 /* 915+ only */
 struct bdb_tv_features {
-    /* need to verify bit ordering */
-    uint16_t under_over_scan_via_yprpb:2;
-    uint16_t rsvd1:10;
-    uint16_t under_over_scan_via_dvi:2;
-    uint16_t add_overscan_mode:1;
-    uint16_t rsvd2:1;
-} __attribute__((packed));
+	/* need to verify bit ordering */
+	uint16_t under_over_scan_via_yprpb:2;
+	uint16_t rsvd1:10;
+	uint16_t under_over_scan_via_dvi:2;
+	uint16_t add_overscan_mode:1;
+	uint16_t rsvd2:1;
+} __attribute__ ((packed));
 
 struct lvds_fp_timing {
-    uint16_t x_res;
-    uint16_t y_res;
-    uint32_t lvds_reg;
-    uint32_t lvds_reg_val;
-    uint32_t pp_on_reg;
-    uint32_t pp_on_reg_val;
-    uint32_t pp_off_reg;
-    uint32_t pp_off_reg_val;
-    uint32_t pp_cycle_reg;
-    uint32_t pp_cycle_reg_val;
-    uint32_t pfit_reg;
-    uint32_t pfit_reg_val;
-    uint16_t terminator;
-} __attribute__((packed));
+	uint16_t x_res;
+	uint16_t y_res;
+	uint32_t lvds_reg;
+	uint32_t lvds_reg_val;
+	uint32_t pp_on_reg;
+	uint32_t pp_on_reg_val;
+	uint32_t pp_off_reg;
+	uint32_t pp_off_reg_val;
+	uint32_t pp_cycle_reg;
+	uint32_t pp_cycle_reg_val;
+	uint32_t pfit_reg;
+	uint32_t pfit_reg_val;
+	uint16_t terminator;
+} __attribute__ ((packed));
 
 struct lvds_dvo_timing {
-    uint16_t dclk;		/**< In 10khz */
-    uint8_t hactive;
-    uint8_t hblank;
-    uint8_t high_h;		/**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */
-    uint8_t vactive;
-    uint8_t vblank;
-    uint8_t high_v;		/**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */
-    uint8_t hsync_off;
-    uint8_t hsync_pulse_width;
-    uint8_t vsync_off;
-    uint8_t high_hsync_off;	/**< 7:6 = hsync off 9:8 */
-    uint8_t h_image;
-    uint8_t v_image;
-    uint8_t max_hv;
-    uint8_t h_border;
-    uint8_t v_border;
-    uint8_t flags;
-} __attribute__((packed));
+	uint16_t dclk;		/**< In 10khz */
+	uint8_t hactive;
+	uint8_t hblank;
+	uint8_t high_h;		/**< 7:4 = hactive 11:8, 3:0 = hblank 11:8 */
+	uint8_t vactive;
+	uint8_t vblank;
+	uint8_t high_v;		/**< 7:4 = vactive 11:8, 3:0 = vblank 11:8 */
+	uint8_t hsync_off;
+	uint8_t hsync_pulse_width;
+	uint8_t vsync_off;
+	uint8_t high_hsync_off;	/**< 7:6 = hsync off 9:8 */
+	uint8_t h_image;
+	uint8_t v_image;
+	uint8_t max_hv;
+	uint8_t h_border;
+	uint8_t v_border;
+	uint8_t flags;
+} __attribute__ ((packed));
 
 struct lvds_pnp_id {
-    uint16_t mfg_name;
-    uint16_t product_code;
-    uint32_t serial;
-    uint8_t mfg_week;
-    uint8_t mfg_year;
-} __attribute__((packed));;
+	uint16_t mfg_name;
+	uint16_t product_code;
+	uint32_t serial;
+	uint8_t mfg_week;
+	uint8_t mfg_year;
+} __attribute__ ((packed));;
 
 /* LFP pointer table contains entries to the struct below */
 struct bdb_lvds_lfp_data_ptr {
-    uint16_t fp_timing_offset; /* offsets are from start of bdb */
-    uint8_t fp_table_size;
-    uint16_t dvo_timing_offset;
-    uint8_t dvo_table_size;
-    uint16_t panel_pnp_id_offset;
-    uint8_t pnp_table_size;
-} __attribute__((packed));
+	uint16_t fp_timing_offset;	/* offsets are from start of bdb */
+	uint8_t fp_table_size;
+	uint16_t dvo_timing_offset;
+	uint8_t dvo_table_size;
+	uint16_t panel_pnp_id_offset;
+	uint8_t pnp_table_size;
+} __attribute__ ((packed));
 
 struct bdb_lvds_lfp_data_ptrs {
-    uint8_t lvds_entries;
-    struct bdb_lvds_lfp_data_ptr ptr[16];
-} __attribute__((packed));
+	uint8_t lvds_entries;
+	struct bdb_lvds_lfp_data_ptr ptr[16];
+} __attribute__ ((packed));
 
 struct bdb_lvds_lfp_data_entry {
-    struct lvds_fp_timing fp_timing;
-    struct lvds_dvo_timing dvo_timing;
-    struct lvds_pnp_id pnp_id;
-} __attribute__((packed));
+	struct lvds_fp_timing fp_timing;
+	struct lvds_dvo_timing dvo_timing;
+	struct lvds_pnp_id pnp_id;
+} __attribute__ ((packed));
 
 struct bdb_lvds_lfp_data {
-    struct bdb_lvds_lfp_data_entry data[16];
-} __attribute__((packed));
+	struct bdb_lvds_lfp_data_entry data[16];
+} __attribute__ ((packed));
 
 #define BACKLIGHT_TYPE_NONE 0
 #define BACKLIGHT_TYPE_I2C 1
@@ -342,58 +342,58 @@ struct bdb_lvds_lfp_data {
 #define BACKLIGHT_GMBUS_1MHZ	3
 
 struct backlight_info {
-    uint8_t inverter_type:2; /* see BACKLIGHT_TYPE_* above */
-    uint8_t inverter_polarity:1; /* 1 means 0 is max, 255 is min */
-    uint8_t gpio_pins:3; /* see GPIO_PIN_* above */
-    uint8_t gmbus_speed:2;
-    uint16_t pwm_frequency; /* in Hz */
-    uint8_t min_brightness;
-    /* Next two are only for 915+ systems */
-    uint8_t i2c_addr;
-    uint8_t i2c_cmd;
+	uint8_t inverter_type:2;	/* see BACKLIGHT_TYPE_* above */
+	uint8_t inverter_polarity:1;	/* 1 means 0 is max, 255 is min */
+	uint8_t gpio_pins:3;	/* see GPIO_PIN_* above */
+	uint8_t gmbus_speed:2;
+	uint16_t pwm_frequency;	/* in Hz */
+	uint8_t min_brightness;
+	/* Next two are only for 915+ systems */
+	uint8_t i2c_addr;
+	uint8_t i2c_cmd;
 } __attribute((packed));
 
 struct bdb_backlight_control {
-    uint8_t row_size;
-    struct backlight_info lfps[16];
-} __attribute__((packed));
+	uint8_t row_size;
+	struct backlight_info lfps[16];
+} __attribute__ ((packed));
 
 struct bdb_bia {
-    uint8_t bia_enable:1;
-    uint8_t bia_level:3;
-    uint8_t rsvd1:3;
-    uint8_t als_enable:1;
-    uint8_t als_response_data[20];
+	uint8_t bia_enable:1;
+	uint8_t bia_level:3;
+	uint8_t rsvd1:3;
+	uint8_t als_enable:1;
+	uint8_t als_response_data[20];
 } __attribute((packed));
 
 struct aimdb_header {
-    char    signature[16];
-    char    oem_device[20];
-    uint16_t  aimdb_version;
-    uint16_t  aimdb_header_size;
-    uint16_t  aimdb_size;
-} __attribute__((packed));
+	char signature[16];
+	char oem_device[20];
+	uint16_t aimdb_version;
+	uint16_t aimdb_header_size;
+	uint16_t aimdb_size;
+} __attribute__ ((packed));
 
 struct aimdb_block {
-    uint8_t   aimdb_id;
-    uint16_t  aimdb_size;
-} __attribute__((packed));
+	uint8_t aimdb_id;
+	uint16_t aimdb_size;
+} __attribute__ ((packed));
 
 struct vch_panel_data {
-    uint16_t	fp_timing_offset;
-    uint8_t	fp_timing_size;
-    uint16_t	dvo_timing_offset;
-    uint8_t	dvo_timing_size;
-    uint16_t	text_fitting_offset;
-    uint8_t	text_fitting_size;
-    uint16_t	graphics_fitting_offset;
-    uint8_t	graphics_fitting_size;
-} __attribute__((packed));
+	uint16_t fp_timing_offset;
+	uint8_t fp_timing_size;
+	uint16_t dvo_timing_offset;
+	uint8_t dvo_timing_size;
+	uint16_t text_fitting_offset;
+	uint8_t text_fitting_size;
+	uint16_t graphics_fitting_offset;
+	uint8_t graphics_fitting_size;
+} __attribute__ ((packed));
 
 struct vch_bdb_22 {
-    struct aimdb_block	    aimdb_block;
-    struct vch_panel_data   panels[16];
-} __attribute__((packed));
+	struct aimdb_block aimdb_block;
+	struct vch_panel_data panels[16];
+} __attribute__ ((packed));
 
 #define BLC_INVERTER_TYPE_NONE 0
 #define BLC_INVERTER_TYPE_I2C 1
@@ -407,19 +407,19 @@ struct vch_bdb_22 {
 
 struct blc_struct {
 	uint8_t inverter_type:2;
-	uint8_t inverter_polarity:1; /* 1 means inverted (0 = max brightness) */
+	uint8_t inverter_polarity:1;	/* 1 means inverted (0 = max brightness) */
 	uint8_t gpio_pins:3;
 	uint8_t gmbus_speed:2;
-	uint16_t pwm_freq; /* in Hz */
-	uint8_t min_brightness; /* (0-255) */
+	uint16_t pwm_freq;	/* in Hz */
+	uint8_t min_brightness;	/* (0-255) */
 	uint8_t i2c_slave_addr;
 	uint8_t i2c_cmd;
-} __attribute__((packed));
+} __attribute__ ((packed));
 
 struct bdb_lvds_backlight {
 	uint8_t blcstruct_size;
 	struct blc_struct panels[16];
-} __attribute__((packed));
+} __attribute__ ((packed));
 
 struct bdb_lvds_power {
 	uint8_t dpst_enabled:1;
@@ -431,7 +431,7 @@ struct bdb_lvds_power {
 	uint16_t als_backlight3;
 	uint16_t als_backlight4;
 	uint16_t als_backlight5;
-} __attribute__((packed));
+} __attribute__ ((packed));
 
 #define BDB_DRIVER_NO_LVDS	0
 #define BDB_DRIVER_INT_LVDS	1
@@ -439,57 +439,56 @@ struct bdb_lvds_power {
 #define BDB_DRIVER_EDP		3
 
 struct bdb_driver_feature {
-    uint8_t	boot_dev_algorithm:1;
-    uint8_t	block_display_switch:1;
-    uint8_t	allow_display_switch:1;
-    uint8_t	hotplug_dvo:1;
-    uint8_t	dual_view_zoom:1;
-    uint8_t	int15h_hook:1;
-    uint8_t	sprite_in_clone:1;
-    uint8_t	primary_lfp_id:1;
-
-    uint16_t	boot_mode_x;
-    uint16_t	boot_mode_y;
-    uint8_t	boot_mode_bpp;
-    uint8_t	boot_mode_refresh;
-
-    uint16_t	enable_lfp_primary:1;
-    uint16_t	selective_mode_pruning:1;
-    uint16_t	dual_frequency:1;
-    uint16_t	render_clock_freq:1; /* 0: high freq; 1: low freq */
-    uint16_t	nt_clone_support:1;
-    uint16_t	power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
-    uint16_t	sprite_display_assign:1; /* 0: secondary; 1: primary */
-    uint16_t	cui_aspect_scaling:1;
-    uint16_t	preserve_aspect_ratio:1;
-    uint16_t	sdvo_device_power_down:1;
-    uint16_t	crt_hotplug:1;
-    uint16_t	lvds_config:2;
-    uint16_t	reserved:3;
-
-    uint8_t	static_display:1;
-    uint8_t	reserved2:7;
-    uint16_t	legacy_crt_max_x;
-    uint16_t	legacy_crt_max_y;
-    uint8_t	legacy_crt_max_refresh;
-} __attribute__((packed));
+	uint8_t boot_dev_algorithm:1;
+	uint8_t block_display_switch:1;
+	uint8_t allow_display_switch:1;
+	uint8_t hotplug_dvo:1;
+	uint8_t dual_view_zoom:1;
+	uint8_t int15h_hook:1;
+	uint8_t sprite_in_clone:1;
+	uint8_t primary_lfp_id:1;
+
+	uint16_t boot_mode_x;
+	uint16_t boot_mode_y;
+	uint8_t boot_mode_bpp;
+	uint8_t boot_mode_refresh;
+
+	uint16_t enable_lfp_primary:1;
+	uint16_t selective_mode_pruning:1;
+	uint16_t dual_frequency:1;
+	uint16_t render_clock_freq:1;	/* 0: high freq; 1: low freq */
+	uint16_t nt_clone_support:1;
+	uint16_t power_scheme_ui:1;	/* 0: CUI; 1: 3rd party */
+	uint16_t sprite_display_assign:1;	/* 0: secondary; 1: primary */
+	uint16_t cui_aspect_scaling:1;
+	uint16_t preserve_aspect_ratio:1;
+	uint16_t sdvo_device_power_down:1;
+	uint16_t crt_hotplug:1;
+	uint16_t lvds_config:2;
+	uint16_t reserved:3;
+
+	uint8_t static_display:1;
+	uint8_t reserved2:7;
+	uint16_t legacy_crt_max_x;
+	uint16_t legacy_crt_max_y;
+	uint8_t legacy_crt_max_refresh;
+} __attribute__ ((packed));
 
 struct bdb_sdvo_lvds_options {
-    uint8_t     panel_backlight;
-    uint8_t     h40_set_panel_type;
-    uint8_t     panel_type;
-    uint8_t     ssc_clk_freq;
-    uint16_t    als_low_trip;
-    uint16_t    als_high_trip;
-    uint8_t     sclalarcoeff_tab_row_num;
-    uint8_t     sclalarcoeff_tab_row_size;
-    uint8_t     coefficient[8];
-    uint8_t     panel_misc_bits_1;
-    uint8_t     panel_misc_bits_2;
-    uint8_t     panel_misc_bits_3;
-    uint8_t     panel_misc_bits_4;
-} __attribute__((packed));
-
+	uint8_t panel_backlight;
+	uint8_t h40_set_panel_type;
+	uint8_t panel_type;
+	uint8_t ssc_clk_freq;
+	uint16_t als_low_trip;
+	uint16_t als_high_trip;
+	uint8_t sclalarcoeff_tab_row_num;
+	uint8_t sclalarcoeff_tab_row_size;
+	uint8_t coefficient[8];
+	uint8_t panel_misc_bits_1;
+	uint8_t panel_misc_bits_2;
+	uint8_t panel_misc_bits_3;
+	uint8_t panel_misc_bits_4;
+} __attribute__ ((packed));
 
 #ifndef REG_DUMPER
 int i830_bios_init(ScrnInfoPtr pScrn);
@@ -514,12 +513,12 @@ int i830_bios_init(ScrnInfoPtr pScrn);
  */
 
 /* GR18 bits are set on display switch and hotkey events */
-#define GR18_DRIVER_SWITCH_EN	(1<<7) /* 0: VBIOS control, 1: driver control */
-#define GR18_HOTKEY_MASK	0x78 /* See also SWF4 15:0 */
+#define GR18_DRIVER_SWITCH_EN	(1<<7)	/* 0: VBIOS control, 1: driver control */
+#define GR18_HOTKEY_MASK	0x78	/* See also SWF4 15:0 */
 #define   GR18_HK_NONE		(0x0<<3)
 #define   GR18_HK_LFP_STRETCH	(0x1<<3)
 #define   GR18_HK_TOGGLE_DISP	(0x2<<3)
-#define   GR18_HK_DISP_SWITCH	(0x4<<3) /* see SWF14 15:0 for what to enable */
+#define   GR18_HK_DISP_SWITCH	(0x4<<3)	/* see SWF14 15:0 for what to enable */
 #define   GR18_HK_POPUP_DISABLED (0x6<<3)
 #define   GR18_HK_POPUP_ENABLED	(0x7<<3)
 #define   GR18_HK_PFIT		(0x8<<3)
@@ -541,7 +540,7 @@ int i830_bios_init(ScrnInfoPtr pScrn);
 
 #define SWF10_VBIOS_BLC_I2C_EN	(1<<29)
 #define SWF10_GTT_OVERRIDE_EN	(1<<28)
-#define SWF10_LFP_DPMS_OVR	(1<<27) /* override DPMS on display switch */
+#define SWF10_LFP_DPMS_OVR	(1<<27)	/* override DPMS on display switch */
 #define SWF10_ACTIVE_TOGGLE_LIST_MASK (7<<24)
 #define   SWF10_OLD_TOGGLE	0x0
 #define   SWF10_TOGGLE_LIST_1	0x1
@@ -580,7 +579,7 @@ int i830_bios_init(ScrnInfoPtr pScrn);
 #define SWF11_DISPLAY_HOLDOFF	(1<<13)
 #define SWF11_DPMS_REDUCED	(1<<12)
 #define SWF11_IS_VBE_MODE	(1<<11)
-#define SWF11_PIPEB_ACCESS	(1<<10) /* 0 here means pipe a */
+#define SWF11_PIPEB_ACCESS	(1<<10)	/* 0 here means pipe a */
 #define SWF11_DPMS_MASK		0x07
 #define   SWF11_DPMS_OFF	(1<<2)
 #define   SWF11_DPMS_SUSPEND	(1<<1)
@@ -593,7 +592,7 @@ int i830_bios_init(ScrnInfoPtr pScrn);
 #define SWF14_POPUP_EN		(1<<28)
 #define SWF14_DISPLAY_HOLDOFF	(1<<27)
 #define SWF14_DISP_DETECT_EN	(1<<26)
-#define SWF14_DOCKING_STATUS_DOCKED (1<<25) /* 0 here means undocked */
+#define SWF14_DOCKING_STATUS_DOCKED (1<<25)	/* 0 here means undocked */
 #define SWF14_DRIVER_STATUS	(1<<24)
 #define SWF14_OS_TYPE_WIN9X	(1<<23)
 #define SWF14_OS_TYPE_WINNT	(1<<22)
@@ -603,8 +602,8 @@ int i830_bios_init(ScrnInfoPtr pScrn);
 #define   SWF14_PM_ACPI		(0x3 << 16)
 #define   SWF14_PM_APM_12	(0x2 << 16)
 #define   SWF14_PM_APM_11	(0x1 << 16)
-#define SWF14_HK_REQUEST_MASK	0x0000ffff /* see GR18 6:3 for event type */
-          /* if GR18 indicates a display switch */
+#define SWF14_HK_REQUEST_MASK	0x0000ffff	/* see GR18 6:3 for event type */
+	  /* if GR18 indicates a display switch */
 #define   SWF14_DS_PIPEB_LFP2_EN (1<<15)
 #define   SWF14_DS_PIPEB_EFP2_EN (1<<14)
 #define   SWF14_DS_PIPEB_TV2_EN  (1<<13)
@@ -621,9 +620,9 @@ int i830_bios_init(ScrnInfoPtr pScrn);
 #define   SWF14_DS_PIPEA_EFP_EN  (1<<2)
 #define   SWF14_DS_PIPEA_TV_EN   (1<<1)
 #define   SWF14_DS_PIPEA_CRT_EN  (1<<0)
-          /* if GR18 indicates a panel fitting request */
-#define   SWF14_PFIT_EN		(1<<0) /* 0 means disable */
-          /* if GR18 indicates an APM change request */
+	  /* if GR18 indicates a panel fitting request */
+#define   SWF14_PFIT_EN		(1<<0)	/* 0 means disable */
+	  /* if GR18 indicates an APM change request */
 #define   SWF14_APM_HIBERNATE	0x4
 #define   SWF14_APM_SUSPEND	0x3
 #define   SWF14_APM_STANDBY	0x1
diff --git a/src/i830_common.h b/src/i830_common.h
index e9795a29..5809a11f 100644
--- a/src/i830_common.h
+++ b/src/i830_common.h
@@ -26,7 +26,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 **************************************************************************/
 
-
 #ifndef _I830_COMMON_H_
 #define _I830_COMMON_H_
 
@@ -35,7 +34,6 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_NR_TEX_REGIONS 255	/* maximum due to use of chars for next/prev */
 #define I830_LOG_MIN_TEX_REGION_SIZE 14
 
-
 /* Driver specific DRM command indices
  * NOTE: these are not OS specific, but they are driver specific
  */
@@ -56,43 +54,42 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define DRM_I830_GET_VBLANK_PIPE	  0x0e
 #define DRM_I830_HWS_PAGE_ADDR		  0x11
 
-
 typedef struct {
-   enum {
-      I830_INIT_DMA = 0x01,
-      I830_CLEANUP_DMA = 0x02,
-      I830_RESUME_DMA = 0x03
-   } func;
-   unsigned int mmio_offset;
-   int sarea_priv_offset;
-   unsigned int ring_start;
-   unsigned int ring_end;
-   unsigned int ring_size;
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch; /* Pitch of front buffer in units of pixels */
-   unsigned int pitch_bits;
-   unsigned int back_pitch;
-   unsigned int depth_pitch;
-   unsigned int cpp;
-   unsigned int chipset;
+	enum {
+		I830_INIT_DMA = 0x01,
+		I830_CLEANUP_DMA = 0x02,
+		I830_RESUME_DMA = 0x03
+	} func;
+	unsigned int mmio_offset;
+	int sarea_priv_offset;
+	unsigned int ring_start;
+	unsigned int ring_end;
+	unsigned int ring_size;
+	unsigned int front_offset;
+	unsigned int back_offset;
+	unsigned int depth_offset;
+	unsigned int w;
+	unsigned int h;
+	unsigned int pitch;	/* Pitch of front buffer in units of pixels */
+	unsigned int pitch_bits;
+	unsigned int back_pitch;
+	unsigned int depth_pitch;
+	unsigned int cpp;
+	unsigned int chipset;
 } drmI830Init;
 
 typedef struct {
-	drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
-        int last_upload;	/* last time texture was uploaded */
-        int last_enqueue;	/* last time a buffer was enqueued */
+	drmTextureRegion texList[I830_NR_TEX_REGIONS + 1];
+	int last_upload;	/* last time texture was uploaded */
+	int last_enqueue;	/* last time a buffer was enqueued */
 	volatile int last_dispatch;	/* age of the most recently dispatched buffer */
 	int ctxOwner;		/* last context to upload state */
 	int texAge;
-        int pf_enabled;		/* is pageflipping allowed? */
-        int pf_active;               
-        int pf_current_page;	/* which buffer is being displayed? */
-        int perf_boxes;	        /* performance boxes to be displayed */   
-	int width, height;      /* screen size in pixels */
+	int pf_enabled;		/* is pageflipping allowed? */
+	int pf_active;
+	int pf_current_page;	/* which buffer is being displayed? */
+	int perf_boxes;		/* performance boxes to be displayed */
+	int width, height;	/* screen size in pixels */
 
 	drm_handle_t front_handle;
 	int front_offset;
@@ -111,17 +108,17 @@ typedef struct {
 	int tex_size;
 	int log_tex_granularity;
 	int pitch;
-	int rotation;           /* 0, 90, 180 or 270 */
+	int rotation;		/* 0, 90, 180 or 270 */
 	int rotated_offset;
 	int rotated_size;
 	int rotated_pitch;
 	int virtualX, virtualY;
 
-        unsigned int front_tiled;
-        unsigned int back_tiled;
-        unsigned int depth_tiled;
-        unsigned int rotated_tiled;
-        unsigned int rotated2_tiled;
+	unsigned int front_tiled;
+	unsigned int back_tiled;
+	unsigned int depth_tiled;
+	unsigned int rotated_tiled;
+	unsigned int rotated2_tiled;
 
 	int pipeA_x;
 	int pipeA_y;
@@ -150,31 +147,30 @@ typedef struct {
 
 /* Flags for perf_boxes
  */
-#define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
-#define I830_BOX_FLIP          0x2 /* populated by kernel */
-#define I830_BOX_WAIT          0x4 /* populated by kernel & client */
-#define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
-#define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
-
+#define I830_BOX_RING_EMPTY    0x1	/* populated by kernel */
+#define I830_BOX_FLIP          0x2	/* populated by kernel */
+#define I830_BOX_WAIT          0x4	/* populated by kernel & client */
+#define I830_BOX_TEXTURE_LOAD  0x8	/* populated by kernel */
+#define I830_BOX_LOST_CONTEXT  0x10	/* populated by client */
 
 typedef struct {
-   	int start;		/* agp offset */
+	int start;		/* agp offset */
 	int used;		/* nr bytes in use */
 	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
+	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
 	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
+	drm_clip_rect_t *cliprects;	/* pointer to userspace cliprects */
 } drmI830BatchBuffer;
 
 typedef struct {
-   	char *buf;		/* agp offset */
-	int sz; 		/* nr bytes in use */
+	char *buf;		/* agp offset */
+	int sz;			/* nr bytes in use */
 	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
-        int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO*/
+	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
 	int num_cliprects;	/* mulitpass with multiple cliprects? */
-        drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
+	drm_clip_rect_t *cliprects;	/* pointer to userspace cliprects */
 } drmI830CmdBuffer;
- 
+
 typedef struct {
 	int *irq_seq;
 } drmI830IrqEmit;
@@ -189,7 +185,7 @@ typedef struct {
 } drmI830GetParam;
 
 #define I830_PARAM_IRQ_ACTIVE     1
-#define I830_PARAM_ALLOW_BATCHBUFFER   2 
+#define I830_PARAM_ALLOW_BATCHBUFFER   2
 
 typedef struct {
 	int param;
@@ -200,7 +196,6 @@ typedef struct {
 #define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
 #define I830_SETPARAM_ALLOW_BATCHBUFFER         3
 
-
 /* A memory manager for regions of shared memory:
  */
 #define I830_MEM_REGION_AGP 1
@@ -220,7 +215,7 @@ typedef struct {
 typedef struct {
 	int region;
 	int size;
-	int start;	
+	int start;
 } drmI830MemInitHeap;
 
 typedef struct {
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 68ff8604..bca07c68 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -50,555 +50,559 @@
 
 DEBUGSTRING(i830_16bit_func)
 {
-    return XNFprintf("0x%04x", (uint16_t)val);
+	return XNFprintf("0x%04x", (uint16_t) val);
 }
 
 DEBUGSTRING(i830_debug_dcc)
 {
-    char *addressing = NULL;
+	char *addressing = NULL;
 
-    if (!IS_MOBILE(pI830))
-	return NULL;
+	if (!IS_MOBILE(pI830))
+		return NULL;
 
-    if (IS_I965G(pI830)) {
-	if (val & (1 << 1))
-	    addressing = "dual channel interleaved";
-	else
-	    addressing = "single or dual channel asymmetric";
-    } else {
-	switch (val & 3) {
-	case 0: addressing = "single channel"; break;
-	case 1: addressing = "dual channel asymmetric"; break;
-	case 2: addressing = "dual channel interleaved"; break;
-	case 3: addressing = "unknown channel layout"; break;
+	if (IS_I965G(pI830)) {
+		if (val & (1 << 1))
+			addressing = "dual channel interleaved";
+		else
+			addressing = "single or dual channel asymmetric";
+	} else {
+		switch (val & 3) {
+		case 0:
+			addressing = "single channel";
+			break;
+		case 1:
+			addressing = "dual channel asymmetric";
+			break;
+		case 2:
+			addressing = "dual channel interleaved";
+			break;
+		case 3:
+			addressing = "unknown channel layout";
+			break;
+		}
 	}
-    }
 
-    return XNFprintf("%s, XOR randomization: %sabled, XOR bit: %d",
-		     addressing,
-		     (val & (1 << 10)) ? "dis" : "en",
-		     (val & (1 << 9)) ? 17 : 11);
+	return XNFprintf("%s, XOR randomization: %sabled, XOR bit: %d",
+			 addressing,
+			 (val & (1 << 10)) ? "dis" : "en",
+			 (val & (1 << 9)) ? 17 : 11);
 }
 
 DEBUGSTRING(i830_debug_chdecmisc)
 {
-    char *enhmodesel = NULL;
-
-    switch ((val >> 5) & 3) {
-    case 1: enhmodesel = "XOR bank/rank"; break;
-    case 2: enhmodesel = "swap bank"; break;
-    case 3: enhmodesel = "XOR bank"; break;
-    case 0: enhmodesel = "none"; break;
-    }
-
-    return XNFprintf("%s, ch2 enh %sabled, ch1 enh %sabled, ch0 enh %sabled, "
-		     "flex %sabled, ep %spresent",
-		     enhmodesel,
-		     (val & (1 << 4)) ? "en" : "dis",
-		     (val & (1 << 3)) ? "en" : "dis",
-		     (val & (1 << 2)) ? "en" : "dis",
-		     (val & (1 << 1)) ? "en" : "dis",
-		     (val & (1 << 0)) ? "" : "not ");
+	char *enhmodesel = NULL;
+
+	switch ((val >> 5) & 3) {
+	case 1:
+		enhmodesel = "XOR bank/rank";
+		break;
+	case 2:
+		enhmodesel = "swap bank";
+		break;
+	case 3:
+		enhmodesel = "XOR bank";
+		break;
+	case 0:
+		enhmodesel = "none";
+		break;
+	}
+
+	return
+	    XNFprintf("%s, ch2 enh %sabled, ch1 enh %sabled, ch0 enh %sabled, "
+		      "flex %sabled, ep %spresent", enhmodesel,
+		      (val & (1 << 4)) ? "en" : "dis",
+		      (val & (1 << 3)) ? "en" : "dis",
+		      (val & (1 << 2)) ? "en" : "dis",
+		      (val & (1 << 1)) ? "en" : "dis",
+		      (val & (1 << 0)) ? "" : "not ");
 }
 
 DEBUGSTRING(i830_debug_xyminus1)
 {
-    return XNFprintf("%d, %d", (val & 0xffff) + 1,
-		     ((val & 0xffff0000) >> 16) + 1);
+	return XNFprintf("%d, %d", (val & 0xffff) + 1,
+			 ((val & 0xffff0000) >> 16) + 1);
 }
 
 DEBUGSTRING(i830_debug_yxminus1)
 {
-    return XNFprintf("%d, %d", ((val & 0xffff0000) >> 16) + 1,
-		     (val & 0xffff) + 1);
+	return XNFprintf("%d, %d", ((val & 0xffff0000) >> 16) + 1,
+			 (val & 0xffff) + 1);
 }
 
 DEBUGSTRING(i830_debug_xy)
 {
-    return XNFprintf("%d, %d", (val & 0xffff),
-		     ((val & 0xffff0000) >> 16));
+	return XNFprintf("%d, %d", (val & 0xffff), ((val & 0xffff0000) >> 16));
 }
 
 DEBUGSTRING(i830_debug_dspstride)
 {
-    return XNFprintf("%d bytes", val);
+	return XNFprintf("%d bytes", val);
 }
 
 DEBUGSTRING(i830_debug_dspcntr)
 {
-    char *enabled = val & DISPLAY_PLANE_ENABLE ? "enabled" : "disabled";
-    char plane = val & DISPPLANE_SEL_PIPE_B ? 'B' : 'A';
-    if (IS_IGDNG(pI830))
-	return XNFprintf("%s", enabled);
-    else
-	return XNFprintf("%s, pipe %c", enabled, plane);
+	char *enabled = val & DISPLAY_PLANE_ENABLE ? "enabled" : "disabled";
+	char plane = val & DISPPLANE_SEL_PIPE_B ? 'B' : 'A';
+	if (IS_IGDNG(pI830))
+		return XNFprintf("%s", enabled);
+	else
+		return XNFprintf("%s, pipe %c", enabled, plane);
 }
 
 DEBUGSTRING(i830_debug_pipeconf)
 {
-    char *enabled = val & PIPEACONF_ENABLE ? "enabled" : "disabled";
-    char *bit30;
-    char *bpc = NULL;
-    if (IS_I965G(pI830))
-	bit30 = val & I965_PIPECONF_ACTIVE ? "active" : "inactive";
-    else
-	bit30 = val & PIPEACONF_DOUBLE_WIDE ? "double-wide" : "single-wide";
-
-    if (IS_IGDNG(pI830)) {
-	switch (val & (7<<5)) {
-	    case PIPECONF_8BPP:
-		bpc = "8bpc";
-		break;
-	    case PIPECONF_10BPP:
-		bpc = "10bpc";
-		break;
-	    case PIPECONF_6BPP:
-		bpc = "6bpc";
-		break;
-	    case PIPECONF_12BPP:
-		bpc = "12bpc";
-		break;
+	char *enabled = val & PIPEACONF_ENABLE ? "enabled" : "disabled";
+	char *bit30;
+	char *bpc = NULL;
+	if (IS_I965G(pI830))
+		bit30 = val & I965_PIPECONF_ACTIVE ? "active" : "inactive";
+	else
+		bit30 =
+		    val & PIPEACONF_DOUBLE_WIDE ? "double-wide" : "single-wide";
+
+	if (IS_IGDNG(pI830)) {
+		switch (val & (7 << 5)) {
+		case PIPECONF_8BPP:
+			bpc = "8bpc";
+			break;
+		case PIPECONF_10BPP:
+			bpc = "10bpc";
+			break;
+		case PIPECONF_6BPP:
+			bpc = "6bpc";
+			break;
+		case PIPECONF_12BPP:
+			bpc = "12bpc";
+			break;
+		}
 	}
-    }
-    if (IS_IGDNG(pI830))
-	return XNFprintf("%s, %s, %s", enabled, bit30, bpc);
-    else
-	return XNFprintf("%s, %s", enabled, bit30);
+	if (IS_IGDNG(pI830))
+		return XNFprintf("%s, %s, %s", enabled, bit30, bpc);
+	else
+		return XNFprintf("%s, %s", enabled, bit30);
 }
 
 DEBUGSTRING(i830_debug_pipestat)
 {
-    char *_FIFO_UNDERRUN = val & FIFO_UNDERRUN ? " FIFO_UNDERRUN" : "";
-    char *_CRC_ERROR_ENABLE = val & CRC_ERROR_ENABLE ? " CRC_ERROR_ENABLE" : "";
-    char *_CRC_DONE_ENABLE = val & CRC_DONE_ENABLE ? " CRC_DONE_ENABLE" : "";
-    char *_GMBUS_EVENT_ENABLE = val & GMBUS_EVENT_ENABLE ? " GMBUS_EVENT_ENABLE" : "";
-    char *_VSYNC_INT_ENABLE = val & VSYNC_INT_ENABLE ? " VSYNC_INT_ENABLE" : "";
-    char *_DLINE_COMPARE_ENABLE = val & DLINE_COMPARE_ENABLE ? " DLINE_COMPARE_ENABLE" : "";
-    char *_DPST_EVENT_ENABLE = val & DPST_EVENT_ENABLE ? " DPST_EVENT_ENABLE" : "";
-    char *_LBLC_EVENT_ENABLE = val & LBLC_EVENT_ENABLE ? " LBLC_EVENT_ENABLE" : "";
-    char *_OFIELD_INT_ENABLE = val & OFIELD_INT_ENABLE ? " OFIELD_INT_ENABLE" : "";
-    char *_EFIELD_INT_ENABLE = val & EFIELD_INT_ENABLE ? " EFIELD_INT_ENABLE" : "";
-    char *_SVBLANK_INT_ENABLE = val & SVBLANK_INT_ENABLE ? " SVBLANK_INT_ENABLE" : "";
-    char *_VBLANK_INT_ENABLE = val & VBLANK_INT_ENABLE ? " VBLANK_INT_ENABLE" : "";
-    char *_OREG_UPDATE_ENABLE = val & OREG_UPDATE_ENABLE ? " OREG_UPDATE_ENABLE" : "";
-    char *_CRC_ERROR_INT_STATUS = val & CRC_ERROR_INT_STATUS ? " CRC_ERROR_INT_STATUS" : "";
-    char *_CRC_DONE_INT_STATUS = val & CRC_DONE_INT_STATUS ? " CRC_DONE_INT_STATUS" : "";
-    char *_GMBUS_INT_STATUS = val & GMBUS_INT_STATUS ? " GMBUS_INT_STATUS" : "";
-    char *_VSYNC_INT_STATUS = val & VSYNC_INT_STATUS ? " VSYNC_INT_STATUS" : "";
-    char *_DLINE_COMPARE_STATUS = val & DLINE_COMPARE_STATUS ? " DLINE_COMPARE_STATUS" : "";
-    char *_DPST_EVENT_STATUS = val & DPST_EVENT_STATUS ? " DPST_EVENT_STATUS" : "";
-    char *_LBLC_EVENT_STATUS = val & LBLC_EVENT_STATUS ? " LBLC_EVENT_STATUS" : "";
-    char *_OFIELD_INT_STATUS = val & OFIELD_INT_STATUS ? " OFIELD_INT_STATUS" : "";
-    char *_EFIELD_INT_STATUS = val & EFIELD_INT_STATUS ? " EFIELD_INT_STATUS" : "";
-    char *_SVBLANK_INT_STATUS = val & SVBLANK_INT_STATUS ? " SVBLANK_INT_STATUS" : "";
-    char *_VBLANK_INT_STATUS = val & VBLANK_INT_STATUS ? " VBLANK_INT_STATUS" : "";
-    char *_OREG_UPDATE_STATUS = val & OREG_UPDATE_STATUS ? " OREG_UPDATE_STATUS" : "";
-    return XNFprintf("status:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-		     _FIFO_UNDERRUN,
-		     _CRC_ERROR_ENABLE,
-		     _CRC_DONE_ENABLE,
-		     _GMBUS_EVENT_ENABLE,
-		     _VSYNC_INT_ENABLE,
-		     _DLINE_COMPARE_ENABLE,
-		     _DPST_EVENT_ENABLE,
-		     _LBLC_EVENT_ENABLE,
-		     _OFIELD_INT_ENABLE,
-		     _EFIELD_INT_ENABLE,
-		     _SVBLANK_INT_ENABLE,
-		     _VBLANK_INT_ENABLE,
-		     _OREG_UPDATE_ENABLE,
-		     _CRC_ERROR_INT_STATUS,
-		     _CRC_DONE_INT_STATUS,
-		     _GMBUS_INT_STATUS,
-		     _VSYNC_INT_STATUS,
-		     _DLINE_COMPARE_STATUS,
-		     _DPST_EVENT_STATUS,
-		     _LBLC_EVENT_STATUS,
-		     _OFIELD_INT_STATUS,
-		     _EFIELD_INT_STATUS,
-		     _SVBLANK_INT_STATUS,
-		     _VBLANK_INT_STATUS,
-		     _OREG_UPDATE_STATUS);
+	char *_FIFO_UNDERRUN = val & FIFO_UNDERRUN ? " FIFO_UNDERRUN" : "";
+	char *_CRC_ERROR_ENABLE =
+	    val & CRC_ERROR_ENABLE ? " CRC_ERROR_ENABLE" : "";
+	char *_CRC_DONE_ENABLE =
+	    val & CRC_DONE_ENABLE ? " CRC_DONE_ENABLE" : "";
+	char *_GMBUS_EVENT_ENABLE =
+	    val & GMBUS_EVENT_ENABLE ? " GMBUS_EVENT_ENABLE" : "";
+	char *_VSYNC_INT_ENABLE =
+	    val & VSYNC_INT_ENABLE ? " VSYNC_INT_ENABLE" : "";
+	char *_DLINE_COMPARE_ENABLE =
+	    val & DLINE_COMPARE_ENABLE ? " DLINE_COMPARE_ENABLE" : "";
+	char *_DPST_EVENT_ENABLE =
+	    val & DPST_EVENT_ENABLE ? " DPST_EVENT_ENABLE" : "";
+	char *_LBLC_EVENT_ENABLE =
+	    val & LBLC_EVENT_ENABLE ? " LBLC_EVENT_ENABLE" : "";
+	char *_OFIELD_INT_ENABLE =
+	    val & OFIELD_INT_ENABLE ? " OFIELD_INT_ENABLE" : "";
+	char *_EFIELD_INT_ENABLE =
+	    val & EFIELD_INT_ENABLE ? " EFIELD_INT_ENABLE" : "";
+	char *_SVBLANK_INT_ENABLE =
+	    val & SVBLANK_INT_ENABLE ? " SVBLANK_INT_ENABLE" : "";
+	char *_VBLANK_INT_ENABLE =
+	    val & VBLANK_INT_ENABLE ? " VBLANK_INT_ENABLE" : "";
+	char *_OREG_UPDATE_ENABLE =
+	    val & OREG_UPDATE_ENABLE ? " OREG_UPDATE_ENABLE" : "";
+	char *_CRC_ERROR_INT_STATUS =
+	    val & CRC_ERROR_INT_STATUS ? " CRC_ERROR_INT_STATUS" : "";
+	char *_CRC_DONE_INT_STATUS =
+	    val & CRC_DONE_INT_STATUS ? " CRC_DONE_INT_STATUS" : "";
+	char *_GMBUS_INT_STATUS =
+	    val & GMBUS_INT_STATUS ? " GMBUS_INT_STATUS" : "";
+	char *_VSYNC_INT_STATUS =
+	    val & VSYNC_INT_STATUS ? " VSYNC_INT_STATUS" : "";
+	char *_DLINE_COMPARE_STATUS =
+	    val & DLINE_COMPARE_STATUS ? " DLINE_COMPARE_STATUS" : "";
+	char *_DPST_EVENT_STATUS =
+	    val & DPST_EVENT_STATUS ? " DPST_EVENT_STATUS" : "";
+	char *_LBLC_EVENT_STATUS =
+	    val & LBLC_EVENT_STATUS ? " LBLC_EVENT_STATUS" : "";
+	char *_OFIELD_INT_STATUS =
+	    val & OFIELD_INT_STATUS ? " OFIELD_INT_STATUS" : "";
+	char *_EFIELD_INT_STATUS =
+	    val & EFIELD_INT_STATUS ? " EFIELD_INT_STATUS" : "";
+	char *_SVBLANK_INT_STATUS =
+	    val & SVBLANK_INT_STATUS ? " SVBLANK_INT_STATUS" : "";
+	char *_VBLANK_INT_STATUS =
+	    val & VBLANK_INT_STATUS ? " VBLANK_INT_STATUS" : "";
+	char *_OREG_UPDATE_STATUS =
+	    val & OREG_UPDATE_STATUS ? " OREG_UPDATE_STATUS" : "";
+	return
+	    XNFprintf
+	    ("status:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+	     _FIFO_UNDERRUN, _CRC_ERROR_ENABLE, _CRC_DONE_ENABLE,
+	     _GMBUS_EVENT_ENABLE, _VSYNC_INT_ENABLE, _DLINE_COMPARE_ENABLE,
+	     _DPST_EVENT_ENABLE, _LBLC_EVENT_ENABLE, _OFIELD_INT_ENABLE,
+	     _EFIELD_INT_ENABLE, _SVBLANK_INT_ENABLE, _VBLANK_INT_ENABLE,
+	     _OREG_UPDATE_ENABLE, _CRC_ERROR_INT_STATUS, _CRC_DONE_INT_STATUS,
+	     _GMBUS_INT_STATUS, _VSYNC_INT_STATUS, _DLINE_COMPARE_STATUS,
+	     _DPST_EVENT_STATUS, _LBLC_EVENT_STATUS, _OFIELD_INT_STATUS,
+	     _EFIELD_INT_STATUS, _SVBLANK_INT_STATUS, _VBLANK_INT_STATUS,
+	     _OREG_UPDATE_STATUS);
 }
 
 DEBUGSTRING(i830_debug_hvtotal)
 {
-    return XNFprintf("%d active, %d total", (val & 0xffff) + 1,
-		     ((val & 0xffff0000) >> 16) + 1);
+	return XNFprintf("%d active, %d total", (val & 0xffff) + 1,
+			 ((val & 0xffff0000) >> 16) + 1);
 }
 
 DEBUGSTRING(i830_debug_hvsyncblank)
 {
-    return XNFprintf("%d start, %d end", (val & 0xffff) + 1,
-		     ((val & 0xffff0000) >> 16) + 1);
+	return XNFprintf("%d start, %d end", (val & 0xffff) + 1,
+			 ((val & 0xffff0000) >> 16) + 1);
 }
 
 DEBUGSTRING(i830_debug_vgacntrl)
 {
-    return XNFprintf("%s", val & VGA_DISP_DISABLE ? "disabled" : "enabled");
+	return XNFprintf("%s", val & VGA_DISP_DISABLE ? "disabled" : "enabled");
 }
 
 DEBUGSTRING(i830_debug_fp)
 {
-    if (IS_IGD(pI830)) {
+	if (IS_IGD(pI830)) {
+		return XNFprintf("n = %d, m1 = %d, m2 = %d",
+				 ffs((val & FP_N_IGD_DIV_MASK) >>
+				     FP_N_DIV_SHIFT) - 1,
+				 ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT),
+				 ((val & FP_M2_IGD_DIV_MASK) >>
+				  FP_M2_DIV_SHIFT));
+	}
 	return XNFprintf("n = %d, m1 = %d, m2 = %d",
-			 ffs((val & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1,
+			 ((val & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT),
 			 ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT),
-			 ((val & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT));
-    }
-    return XNFprintf("n = %d, m1 = %d, m2 = %d",
-		     ((val & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT),
-		     ((val & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT),
-		     ((val & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT));
+			 ((val & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT));
 }
 
 DEBUGSTRING(i830_debug_vga_pd)
 {
-    int vga0_p1, vga0_p2, vga1_p1, vga1_p2;
+	int vga0_p1, vga0_p2, vga1_p1, vga1_p2;
 
-    /* XXX: i9xx version */
+	/* XXX: i9xx version */
 
-    if (val & VGA0_PD_P1_DIV_2)
-	vga0_p1 = 2;
-    else
-	vga0_p1 = ((val & VGA0_PD_P1_MASK) >> VGA0_PD_P1_SHIFT) + 2;
-    vga0_p2 = (val & VGA0_PD_P2_DIV_4) ? 4 : 2;
+	if (val & VGA0_PD_P1_DIV_2)
+		vga0_p1 = 2;
+	else
+		vga0_p1 = ((val & VGA0_PD_P1_MASK) >> VGA0_PD_P1_SHIFT) + 2;
+	vga0_p2 = (val & VGA0_PD_P2_DIV_4) ? 4 : 2;
 
-    if (val & VGA1_PD_P1_DIV_2)
-	vga1_p1 = 2;
-    else
-	vga1_p1 = ((val & VGA1_PD_P1_MASK) >> VGA1_PD_P1_SHIFT) + 2;
-    vga1_p2 = (val & VGA1_PD_P2_DIV_4) ? 4 : 2;
+	if (val & VGA1_PD_P1_DIV_2)
+		vga1_p1 = 2;
+	else
+		vga1_p1 = ((val & VGA1_PD_P1_MASK) >> VGA1_PD_P1_SHIFT) + 2;
+	vga1_p2 = (val & VGA1_PD_P2_DIV_4) ? 4 : 2;
 
-    return XNFprintf("vga0 p1 = %d, p2 = %d, vga1 p1 = %d, p2 = %d",
-		     vga0_p1, vga0_p2, vga1_p1, vga1_p2);
+	return XNFprintf("vga0 p1 = %d, p2 = %d, vga1 p1 = %d, p2 = %d",
+			 vga0_p1, vga0_p2, vga1_p1, vga1_p2);
 }
 
 DEBUGSTRING(i830_debug_pp_status)
 {
-    char *status = val & PP_ON ? "on" : "off";
-    char *ready = val & PP_READY ? "ready" : "not ready";
-    char *seq = "unknown";
-
-    switch (val & PP_SEQUENCE_MASK) {
-    case PP_SEQUENCE_NONE:
-	seq = "idle";
-	break;
-    case PP_SEQUENCE_ON:
-	seq = "on";
-	break;
-    case PP_SEQUENCE_OFF:
-	seq = "off";
-	break;
-    }
-
-    return XNFprintf("%s, %s, sequencing %s", status, ready, seq);
+	char *status = val & PP_ON ? "on" : "off";
+	char *ready = val & PP_READY ? "ready" : "not ready";
+	char *seq = "unknown";
+
+	switch (val & PP_SEQUENCE_MASK) {
+	case PP_SEQUENCE_NONE:
+		seq = "idle";
+		break;
+	case PP_SEQUENCE_ON:
+		seq = "on";
+		break;
+	case PP_SEQUENCE_OFF:
+		seq = "off";
+		break;
+	}
+
+	return XNFprintf("%s, %s, sequencing %s", status, ready, seq);
 }
 
 DEBUGSTRING(i830_debug_pp_control)
 {
-    return XNFprintf("power target: %s",
-		     val & POWER_TARGET_ON ? "on" : "off");
+	return XNFprintf("power target: %s",
+			 val & POWER_TARGET_ON ? "on" : "off");
 }
 
 DEBUGSTRING(i830_debug_dpll)
 {
-    char *enabled = val & DPLL_VCO_ENABLE ? "enabled" : "disabled";
-    char *dvomode = val & DPLL_DVO_HIGH_SPEED ? "dvo" : "non-dvo";
-    char *vgamode = val & DPLL_VGA_MODE_DIS ? "" : ", VGA";
-    char *mode = "unknown";
-    char *clock = "unknown";
-    char *fpextra = val & DISPLAY_RATE_SELECT_FPA1 ? ", using FPx1!" : "";
-    char sdvoextra[20];
-    int p1, p2 = 0;
-
-    if (IS_I9XX(pI830)) {
-	if (IS_IGD(pI830)) {
-	    p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
-		     DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
+	char *enabled = val & DPLL_VCO_ENABLE ? "enabled" : "disabled";
+	char *dvomode = val & DPLL_DVO_HIGH_SPEED ? "dvo" : "non-dvo";
+	char *vgamode = val & DPLL_VGA_MODE_DIS ? "" : ", VGA";
+	char *mode = "unknown";
+	char *clock = "unknown";
+	char *fpextra = val & DISPLAY_RATE_SELECT_FPA1 ? ", using FPx1!" : "";
+	char sdvoextra[20];
+	int p1, p2 = 0;
+
+	if (IS_I9XX(pI830)) {
+		if (IS_IGD(pI830)) {
+			p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_IGD) >>
+				 DPLL_FPA01_P1_POST_DIV_SHIFT_IGD);
+		} else {
+			p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >>
+				 DPLL_FPA01_P1_POST_DIV_SHIFT);
+		}
+		switch (val & DPLL_MODE_MASK) {
+		case DPLLB_MODE_DAC_SERIAL:
+			mode = "DAC/serial";
+			p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
+			break;
+		case DPLLB_MODE_LVDS:
+			mode = "LVDS";
+			p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
+			break;
+		}
 	} else {
-	    p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >>
-		     DPLL_FPA01_P1_POST_DIV_SHIFT);
+		Bool is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B);
+
+		if (is_lvds) {
+			mode = "LVDS";
+			p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS)
+				 >> DPLL_FPA01_P1_POST_DIV_SHIFT);
+			if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) ==
+			    LVDS_CLKB_POWER_UP)
+				p2 = 7;
+			else
+				p2 = 14;
+
+		} else {
+			mode = "DAC/serial";
+			if (val & PLL_P1_DIVIDE_BY_TWO) {
+				p1 = 2;
+			} else {
+				/* Map the number in the field to (3, 33) */
+				p1 = ((val & DPLL_FPA01_P1_POST_DIV_MASK_I830)
+				      >> DPLL_FPA01_P1_POST_DIV_SHIFT) + 2;
+			}
+			if (val & PLL_P2_DIVIDE_BY_4)
+				p2 = 4;
+			else
+				p2 = 2;
+		}
 	}
-	switch (val & DPLL_MODE_MASK) {
-	case DPLLB_MODE_DAC_SERIAL:
-	    mode = "DAC/serial";
-	    p2 = val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
-	    break;
-	case DPLLB_MODE_LVDS:
-	    mode = "LVDS";
-	    p2 = val & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
-	    break;
+
+	switch (val & PLL_REF_INPUT_MASK) {
+	case PLL_REF_INPUT_DREFCLK:
+		clock = "default";
+		break;
+	case PLL_REF_INPUT_TVCLKINA:
+		clock = "TV A";
+		break;
+	case PLL_REF_INPUT_TVCLKINBC:
+		clock = "TV B/C";
+		break;
+	case PLLB_REF_INPUT_SPREADSPECTRUMIN:
+		if (reg == DPLL_B)
+			clock = "spread spectrum";
+		break;
 	}
-    } else {
-	Bool is_lvds = (INREG(LVDS) & LVDS_PORT_EN) && (reg == DPLL_B);
-
-	if (is_lvds) {
-	    mode = "LVDS";
-	    p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >>
-		     DPLL_FPA01_P1_POST_DIV_SHIFT);
-	    if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
-		p2 = 7;
-	    else
-		p2 = 14;
 
+	if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
+		sprintf(sdvoextra, ", SDVO mult %d",
+			(int)((val & SDVO_MULTIPLIER_MASK) >>
+			      SDVO_MULTIPLIER_SHIFT_HIRES) + 1);
 	} else {
-	    mode = "DAC/serial";
-	    if (val & PLL_P1_DIVIDE_BY_TWO) {
-		p1 = 2;
-	    } else {
-		/* Map the number in the field to (3, 33) */
-		p1 = ((val & DPLL_FPA01_P1_POST_DIV_MASK_I830) >>
-		      DPLL_FPA01_P1_POST_DIV_SHIFT) + 2;
-	    }
-	    if (val & PLL_P2_DIVIDE_BY_4)
-		p2 = 4;
-	    else
-		p2 = 2;
+		sdvoextra[0] = '\0';
 	}
-    }
-
-    switch (val & PLL_REF_INPUT_MASK) {
-    case PLL_REF_INPUT_DREFCLK:
-	clock = "default";
-	break;
-    case PLL_REF_INPUT_TVCLKINA:
-	clock = "TV A";
-	break;
-    case PLL_REF_INPUT_TVCLKINBC:
-	clock = "TV B/C";
-	break;
-    case PLLB_REF_INPUT_SPREADSPECTRUMIN:
-	if (reg == DPLL_B)
-	    clock = "spread spectrum";
-	break;
-    }
-
-    if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
-	sprintf(sdvoextra, ", SDVO mult %d",
-		(int)((val & SDVO_MULTIPLIER_MASK) >>
-		SDVO_MULTIPLIER_SHIFT_HIRES) + 1);
-    } else {
-	sdvoextra[0] = '\0';
-    }
-
-    return XNFprintf("%s, %s%s, %s clock, %s mode, p1 = %d, "
-		     "p2 = %d%s%s",
-		     enabled, dvomode, vgamode, clock, mode, p1, p2,
-		     fpextra, sdvoextra);
+
+	return XNFprintf("%s, %s%s, %s clock, %s mode, p1 = %d, "
+			 "p2 = %d%s%s",
+			 enabled, dvomode, vgamode, clock, mode, p1, p2,
+			 fpextra, sdvoextra);
 }
 
 DEBUGSTRING(i830_debug_dpll_test)
 {
-    char *dpllandiv = val & DPLLA_TEST_N_BYPASS ? ", DPLLA N bypassed" : "";
-    char *dpllamdiv = val & DPLLA_TEST_M_BYPASS ? ", DPLLA M bypassed" : "";
-    char *dpllainput = val & DPLLA_INPUT_BUFFER_ENABLE ?
-	"" : ", DPLLA input buffer disabled";
-    char *dpllbndiv = val & DPLLB_TEST_N_BYPASS ? ", DPLLB N bypassed" : "";
-    char *dpllbmdiv = val & DPLLB_TEST_M_BYPASS ? ", DPLLB M bypassed" : "";
-    char *dpllbinput = val & DPLLB_INPUT_BUFFER_ENABLE ?
-	"" : ", DPLLB input buffer disabled";
-
-    return XNFprintf("%s%s%s%s%s%s",
-		     dpllandiv, dpllamdiv, dpllainput,
-		     dpllbndiv, dpllbmdiv, dpllbinput);
+	char *dpllandiv = val & DPLLA_TEST_N_BYPASS ? ", DPLLA N bypassed" : "";
+	char *dpllamdiv = val & DPLLA_TEST_M_BYPASS ? ", DPLLA M bypassed" : "";
+	char *dpllainput = val & DPLLA_INPUT_BUFFER_ENABLE ?
+	    "" : ", DPLLA input buffer disabled";
+	char *dpllbndiv = val & DPLLB_TEST_N_BYPASS ? ", DPLLB N bypassed" : "";
+	char *dpllbmdiv = val & DPLLB_TEST_M_BYPASS ? ", DPLLB M bypassed" : "";
+	char *dpllbinput = val & DPLLB_INPUT_BUFFER_ENABLE ?
+	    "" : ", DPLLB input buffer disabled";
+
+	return XNFprintf("%s%s%s%s%s%s",
+			 dpllandiv, dpllamdiv, dpllainput,
+			 dpllbndiv, dpllbmdiv, dpllbinput);
 }
 
 DEBUGSTRING(i830_debug_adpa)
 {
-    char pipe = (val & ADPA_PIPE_B_SELECT) ? 'B' : 'A';
-    char *enable = (val & ADPA_DAC_ENABLE) ? "enabled" : "disabled";
-    char hsync = (val & ADPA_HSYNC_ACTIVE_HIGH) ? '+' : '-';
-    char vsync = (val & ADPA_VSYNC_ACTIVE_HIGH) ? '+' : '-';
-
-    if (IS_IGDNG(pI830))
-	return XNFprintf("%s, transcoder %c, %chsync, %cvsync",
-		enable, pipe, hsync, vsync);
-    else
-	return XNFprintf("%s, pipe %c, %chsync, %cvsync",
-		enable, pipe, hsync, vsync);
+	char pipe = (val & ADPA_PIPE_B_SELECT) ? 'B' : 'A';
+	char *enable = (val & ADPA_DAC_ENABLE) ? "enabled" : "disabled";
+	char hsync = (val & ADPA_HSYNC_ACTIVE_HIGH) ? '+' : '-';
+	char vsync = (val & ADPA_VSYNC_ACTIVE_HIGH) ? '+' : '-';
+
+	if (IS_IGDNG(pI830))
+		return XNFprintf("%s, transcoder %c, %chsync, %cvsync",
+				 enable, pipe, hsync, vsync);
+	else
+		return XNFprintf("%s, pipe %c, %chsync, %cvsync",
+				 enable, pipe, hsync, vsync);
 }
 
 DEBUGSTRING(i830_debug_lvds)
 {
-    char pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A';
-    char *enable = val & LVDS_PORT_EN ? "enabled" : "disabled";
-    int depth;
-    char *channels;
-
-    if ((val & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
-	depth = 24;
-    else
-	depth = 18;
-    if ((val & LVDS_B0B3_POWER_MASK) == LVDS_B0B3_POWER_UP)
-	channels = "2 channels";
-    else
-	channels = "1 channel";
-
-
-    return XNFprintf("%s, pipe %c, %d bit, %s",
-		     enable, pipe, depth, channels);
+	char pipe = val & LVDS_PIPEB_SELECT ? 'B' : 'A';
+	char *enable = val & LVDS_PORT_EN ? "enabled" : "disabled";
+	int depth;
+	char *channels;
+
+	if ((val & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
+		depth = 24;
+	else
+		depth = 18;
+	if ((val & LVDS_B0B3_POWER_MASK) == LVDS_B0B3_POWER_UP)
+		channels = "2 channels";
+	else
+		channels = "1 channel";
+
+	return XNFprintf("%s, pipe %c, %d bit, %s",
+			 enable, pipe, depth, channels);
 }
 
 DEBUGSTRING(i830_debug_dvo)
 {
-    char *enable = val & DVO_ENABLE ? "enabled" : "disabled";
-    char pipe = val & DVO_PIPE_B_SELECT ? 'B' : 'A';
-    char *stall;
-    char hsync = val & DVO_HSYNC_ACTIVE_HIGH ? '+' : '-';
-    char vsync = val & DVO_VSYNC_ACTIVE_HIGH ? '+' : '-';
-
-    switch (val & DVO_PIPE_STALL_MASK) {
-    case DVO_PIPE_STALL_UNUSED:
-	stall = "no stall";
-	break;
-    case DVO_PIPE_STALL:
-	stall = "stall";
-	break;
-    case DVO_PIPE_STALL_TV:
-	stall = "TV stall";
-	break;
-    default:
-	stall = "unknown stall";
-	break;
-    }
-
-    return XNFprintf("%s, pipe %c, %s, %chsync, %cvsync",
-		     enable, pipe, stall, hsync, vsync);
+	char *enable = val & DVO_ENABLE ? "enabled" : "disabled";
+	char pipe = val & DVO_PIPE_B_SELECT ? 'B' : 'A';
+	char *stall;
+	char hsync = val & DVO_HSYNC_ACTIVE_HIGH ? '+' : '-';
+	char vsync = val & DVO_VSYNC_ACTIVE_HIGH ? '+' : '-';
+
+	switch (val & DVO_PIPE_STALL_MASK) {
+	case DVO_PIPE_STALL_UNUSED:
+		stall = "no stall";
+		break;
+	case DVO_PIPE_STALL:
+		stall = "stall";
+		break;
+	case DVO_PIPE_STALL_TV:
+		stall = "TV stall";
+		break;
+	default:
+		stall = "unknown stall";
+		break;
+	}
+
+	return XNFprintf("%s, pipe %c, %s, %chsync, %cvsync",
+			 enable, pipe, stall, hsync, vsync);
 }
 
 DEBUGSTRING(i830_debug_sdvo)
 {
-    char *enable = val & SDVO_ENABLE ? "enabled" : "disabled";
-    char pipe = val & SDVO_PIPE_B_SELECT ? 'B' : 'A';
-    char *stall = val & SDVO_STALL_SELECT ? "enabled" : "disabled";
-    char *detected = val & SDVO_DETECTED ? "" : "not ";
-    char *gang = val & SDVOC_GANG_MODE ? ", gang mode" : "";
-    char sdvoextra[20];
-
-    if (IS_I915G(pI830) || IS_I915GM(pI830)) {
-	sprintf(sdvoextra, ", SDVO mult %d",
-		(int)((val & SDVO_PORT_MULTIPLY_MASK) >>
-		SDVO_PORT_MULTIPLY_SHIFT) + 1);
-    } else {
-	sdvoextra[0] = '\0';
-    }
-
-    return XNFprintf("%s, pipe %c, stall %s, %sdetected%s%s",
-		     enable, pipe, stall, detected, sdvoextra, gang);
+	char *enable = val & SDVO_ENABLE ? "enabled" : "disabled";
+	char pipe = val & SDVO_PIPE_B_SELECT ? 'B' : 'A';
+	char *stall = val & SDVO_STALL_SELECT ? "enabled" : "disabled";
+	char *detected = val & SDVO_DETECTED ? "" : "not ";
+	char *gang = val & SDVOC_GANG_MODE ? ", gang mode" : "";
+	char sdvoextra[20];
+
+	if (IS_I915G(pI830) || IS_I915GM(pI830)) {
+		sprintf(sdvoextra, ", SDVO mult %d",
+			(int)((val & SDVO_PORT_MULTIPLY_MASK) >>
+			      SDVO_PORT_MULTIPLY_SHIFT) + 1);
+	} else {
+		sdvoextra[0] = '\0';
+	}
+
+	return XNFprintf("%s, pipe %c, stall %s, %sdetected%s%s",
+			 enable, pipe, stall, detected, sdvoextra, gang);
 }
 
 DEBUGSTRING(i830_debug_dspclk_gate_d)
 {
-    char *DPUNIT_B = val & DPUNIT_B_CLOCK_GATE_DISABLE ? " DPUNIT_B" : "";
-    char *VSUNIT = val & VSUNIT_CLOCK_GATE_DISABLE ? " VSUNIT" : "";
-    char *VRHUNIT = val & VRHUNIT_CLOCK_GATE_DISABLE ? " VRHUNIT" : "";
-    char *VRDUNIT = val & VRDUNIT_CLOCK_GATE_DISABLE ? " VRDUNIT" : "";
-    char *AUDUNIT = val & AUDUNIT_CLOCK_GATE_DISABLE ? " AUDUNIT" : "";
-    char *DPUNIT_A = val & DPUNIT_A_CLOCK_GATE_DISABLE ? " DPUNIT_A" : "";
-    char *DPCUNIT = val & DPCUNIT_CLOCK_GATE_DISABLE ? " DPCUNIT" : "";
-    char *TVRUNIT = val & TVRUNIT_CLOCK_GATE_DISABLE ? " TVRUNIT" : "";
-    char *TVCUNIT = val & TVCUNIT_CLOCK_GATE_DISABLE ? " TVCUNIT" : "";
-    char *TVFUNIT = val & TVFUNIT_CLOCK_GATE_DISABLE ? " TVFUNIT" : "";
-    char *TVEUNIT = val & TVEUNIT_CLOCK_GATE_DISABLE ? " TVEUNIT" : "";
-    char *DVSUNIT = val & DVSUNIT_CLOCK_GATE_DISABLE ? " DVSUNIT" : "";
-    char *DSSUNIT = val & DSSUNIT_CLOCK_GATE_DISABLE ? " DSSUNIT" : "";
-    char *DDBUNIT = val & DDBUNIT_CLOCK_GATE_DISABLE ? " DDBUNIT" : "";
-    char *DPRUNIT = val & DPRUNIT_CLOCK_GATE_DISABLE ? " DPRUNIT" : "";
-    char *DPFUNIT = val & DPFUNIT_CLOCK_GATE_DISABLE ? " DPFUNIT" : "";
-    char *DPBMUNIT = val & DPBMUNIT_CLOCK_GATE_DISABLE ? " DPBMUNIT" : "";
-    char *DPLSUNIT = val & DPLSUNIT_CLOCK_GATE_DISABLE ? " DPLSUNIT" : "";
-    char *DPLUNIT = val & DPLUNIT_CLOCK_GATE_DISABLE ? " DPLUNIT" : "";
-    char *DPOUNIT = val & DPOUNIT_CLOCK_GATE_DISABLE ? " DPOUNIT" : "";
-    char *DPBUNIT = val & DPBUNIT_CLOCK_GATE_DISABLE ? " DPBUNIT" : "";
-    char *DCUNIT = val & DCUNIT_CLOCK_GATE_DISABLE ? " DCUNIT" : "";
-    char *DPUNIT = val & DPUNIT_CLOCK_GATE_DISABLE ? " DPUNIT" : "";
-    char *VRUNIT = val & VRUNIT_CLOCK_GATE_DISABLE ? " VRUNIT" : "";
-    char *OVHUNIT = val & OVHUNIT_CLOCK_GATE_DISABLE ? " OVHUNIT" : "";
-    char *DPIOUNIT = val & DPIOUNIT_CLOCK_GATE_DISABLE ? " DPIOUNIT" : "";
-    char *OVFUNIT = val & OVFUNIT_CLOCK_GATE_DISABLE ? " OVFUNIT" : "";
-    char *OVBUNIT = val & OVBUNIT_CLOCK_GATE_DISABLE ? " OVBUNIT" : "";
-    char *OVRUNIT = val & OVRUNIT_CLOCK_GATE_DISABLE ? " OVRUNIT" : "";
-    char *OVCUNIT = val & OVCUNIT_CLOCK_GATE_DISABLE ? " OVCUNIT" : "";
-    char *OVUUNIT = val & OVUUNIT_CLOCK_GATE_DISABLE ? " OVUUNIT" : "";
-    char *OVLUNIT = val & OVLUNIT_CLOCK_GATE_DISABLE ? " OVLUNIT" : "";
-
-    return XNFprintf ("clock gates disabled:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
-		      DPUNIT_B,
-		      VSUNIT,
-		      VRHUNIT,
-		      VRDUNIT,
-		      AUDUNIT,
-		      DPUNIT_A,
-		      DPCUNIT,
-		      TVRUNIT,
-		      TVCUNIT,
-		      TVFUNIT,
-		      TVEUNIT,
-		      DVSUNIT,
-		      DSSUNIT,
-		      DDBUNIT,
-		      DPRUNIT,
-		      DPFUNIT,
-		      DPBMUNIT,
-		      DPLSUNIT,
-		      DPLUNIT,
-		      DPOUNIT,
-		      DPBUNIT,
-		      DCUNIT,
-		      DPUNIT,
-		      VRUNIT,
-		      OVHUNIT,
-		      DPIOUNIT,
-		      OVFUNIT,
-		      OVBUNIT,
-		      OVRUNIT,
-		      OVCUNIT,
-		      OVUUNIT,
-		      OVLUNIT);
+	char *DPUNIT_B = val & DPUNIT_B_CLOCK_GATE_DISABLE ? " DPUNIT_B" : "";
+	char *VSUNIT = val & VSUNIT_CLOCK_GATE_DISABLE ? " VSUNIT" : "";
+	char *VRHUNIT = val & VRHUNIT_CLOCK_GATE_DISABLE ? " VRHUNIT" : "";
+	char *VRDUNIT = val & VRDUNIT_CLOCK_GATE_DISABLE ? " VRDUNIT" : "";
+	char *AUDUNIT = val & AUDUNIT_CLOCK_GATE_DISABLE ? " AUDUNIT" : "";
+	char *DPUNIT_A = val & DPUNIT_A_CLOCK_GATE_DISABLE ? " DPUNIT_A" : "";
+	char *DPCUNIT = val & DPCUNIT_CLOCK_GATE_DISABLE ? " DPCUNIT" : "";
+	char *TVRUNIT = val & TVRUNIT_CLOCK_GATE_DISABLE ? " TVRUNIT" : "";
+	char *TVCUNIT = val & TVCUNIT_CLOCK_GATE_DISABLE ? " TVCUNIT" : "";
+	char *TVFUNIT = val & TVFUNIT_CLOCK_GATE_DISABLE ? " TVFUNIT" : "";
+	char *TVEUNIT = val & TVEUNIT_CLOCK_GATE_DISABLE ? " TVEUNIT" : "";
+	char *DVSUNIT = val & DVSUNIT_CLOCK_GATE_DISABLE ? " DVSUNIT" : "";
+	char *DSSUNIT = val & DSSUNIT_CLOCK_GATE_DISABLE ? " DSSUNIT" : "";
+	char *DDBUNIT = val & DDBUNIT_CLOCK_GATE_DISABLE ? " DDBUNIT" : "";
+	char *DPRUNIT = val & DPRUNIT_CLOCK_GATE_DISABLE ? " DPRUNIT" : "";
+	char *DPFUNIT = val & DPFUNIT_CLOCK_GATE_DISABLE ? " DPFUNIT" : "";
+	char *DPBMUNIT = val & DPBMUNIT_CLOCK_GATE_DISABLE ? " DPBMUNIT" : "";
+	char *DPLSUNIT = val & DPLSUNIT_CLOCK_GATE_DISABLE ? " DPLSUNIT" : "";
+	char *DPLUNIT = val & DPLUNIT_CLOCK_GATE_DISABLE ? " DPLUNIT" : "";
+	char *DPOUNIT = val & DPOUNIT_CLOCK_GATE_DISABLE ? " DPOUNIT" : "";
+	char *DPBUNIT = val & DPBUNIT_CLOCK_GATE_DISABLE ? " DPBUNIT" : "";
+	char *DCUNIT = val & DCUNIT_CLOCK_GATE_DISABLE ? " DCUNIT" : "";
+	char *DPUNIT = val & DPUNIT_CLOCK_GATE_DISABLE ? " DPUNIT" : "";
+	char *VRUNIT = val & VRUNIT_CLOCK_GATE_DISABLE ? " VRUNIT" : "";
+	char *OVHUNIT = val & OVHUNIT_CLOCK_GATE_DISABLE ? " OVHUNIT" : "";
+	char *DPIOUNIT = val & DPIOUNIT_CLOCK_GATE_DISABLE ? " DPIOUNIT" : "";
+	char *OVFUNIT = val & OVFUNIT_CLOCK_GATE_DISABLE ? " OVFUNIT" : "";
+	char *OVBUNIT = val & OVBUNIT_CLOCK_GATE_DISABLE ? " OVBUNIT" : "";
+	char *OVRUNIT = val & OVRUNIT_CLOCK_GATE_DISABLE ? " OVRUNIT" : "";
+	char *OVCUNIT = val & OVCUNIT_CLOCK_GATE_DISABLE ? " OVCUNIT" : "";
+	char *OVUUNIT = val & OVUUNIT_CLOCK_GATE_DISABLE ? " OVUUNIT" : "";
+	char *OVLUNIT = val & OVLUNIT_CLOCK_GATE_DISABLE ? " OVLUNIT" : "";
+
+	return
+	    XNFprintf
+	    ("clock gates disabled:%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+	     DPUNIT_B, VSUNIT, VRHUNIT, VRDUNIT, AUDUNIT, DPUNIT_A, DPCUNIT,
+	     TVRUNIT, TVCUNIT, TVFUNIT, TVEUNIT, DVSUNIT, DSSUNIT, DDBUNIT,
+	     DPRUNIT, DPFUNIT, DPBMUNIT, DPLSUNIT, DPLUNIT, DPOUNIT, DPBUNIT,
+	     DCUNIT, DPUNIT, VRUNIT, OVHUNIT, DPIOUNIT, OVFUNIT, OVBUNIT,
+	     OVRUNIT, OVCUNIT, OVUUNIT, OVLUNIT);
 }
 
-
 DEBUGSTRING(i810_debug_915_fence)
 {
-    char *enable = (val & 1) ? " enabled" : "disabled";
-    char format = (val & 1 << 12) ? 'Y' : 'X';
-    int pitch = 1 << (((val & 0x70) >> 4) - 1);
-    unsigned int offset = val & 0x0ff00000;
-    int size = (1024 * 1024) << (((val & 0x700) >> 8) - 1);
-
-    if (IS_I965G(pI830) || ((IS_I915G(pI830) || IS_I915GM(pI830)) && reg >= FENCE_NEW))
-	return NULL;
-
-    if (format == 'X')
-      pitch *= 4;
-
-    return XNFprintf("%s, %c tiled, %4d pitch, 0x%08x - 0x%08x (%dkb)",
-		     enable, format, pitch, offset, offset + size, size / 1024);
+	char *enable = (val & 1) ? " enabled" : "disabled";
+	char format = (val & 1 << 12) ? 'Y' : 'X';
+	int pitch = 1 << (((val & 0x70) >> 4) - 1);
+	unsigned int offset = val & 0x0ff00000;
+	int size = (1024 * 1024) << (((val & 0x700) >> 8) - 1);
+
+	if (IS_I965G(pI830)
+	    || ((IS_I915G(pI830) || IS_I915GM(pI830)) && reg >= FENCE_NEW))
+		return NULL;
+
+	if (format == 'X')
+		pitch *= 4;
+
+	return XNFprintf("%s, %c tiled, %4d pitch, 0x%08x - 0x%08x (%dkb)",
+			 enable, format, pitch, offset, offset + size,
+			 size / 1024);
 }
 
 DEBUGSTRING(i810_debug_965_fence_start)
 {
-    char *enable = (val & FENCE_VALID) ? " enabled" : "disabled";
-    char format = (val & I965_FENCE_Y_MAJOR) ? 'Y' : 'X';
-    int pitch = ((val & 0xffc) >> 2) * 128;
-    unsigned int offset = val & 0xfffff000;
+	char *enable = (val & FENCE_VALID) ? " enabled" : "disabled";
+	char format = (val & I965_FENCE_Y_MAJOR) ? 'Y' : 'X';
+	int pitch = ((val & 0xffc) >> 2) * 128;
+	unsigned int offset = val & 0xfffff000;
 
-    if (!IS_I965G(pI830))
-	return NULL;
+	if (!IS_I965G(pI830))
+		return NULL;
 
-    return XNFprintf("%s, %c tile walk, %4d pitch, 0x%08x start",
-		     enable, format, pitch, offset);
+	return XNFprintf("%s, %c tile walk, %4d pitch, 0x%08x start",
+			 enable, format, pitch, offset);
 }
 
 DEBUGSTRING(i810_debug_965_fence_end)
 {
-    unsigned int end = val & 0xfffff000;
+	unsigned int end = val & 0xfffff000;
 
-    if (!IS_I965G(pI830))
-	return NULL;
+	if (!IS_I965G(pI830))
+		return NULL;
 
-    return XNFprintf("                                   0x%08x end", end);
+	return XNFprintf("                                   0x%08x end", end);
 }
 
 #define DEFINEREG(reg) \
@@ -609,1148 +613,1197 @@ DEBUGSTRING(i810_debug_965_fence_end)
 	{ reg, #reg, func, 0 }
 
 struct i830SnapshotRec {
-    int reg;
-    char *name;
-    char *(*debug_output)(I830Ptr pI830, int reg, uint32_t val);
-    uint32_t val;
+	int reg;
+	char *name;
+	char *(*debug_output) (I830Ptr pI830, int reg, uint32_t val);
+	uint32_t val;
 };
 
 static struct i830SnapshotRec i830_snapshot[] = {
-    DEFINEREG2(DCC, i830_debug_dcc),
-    DEFINEREG2(CHDECMISC, i830_debug_chdecmisc),
-    DEFINEREG_16BIT(C0DRB0),
-    DEFINEREG_16BIT(C0DRB1),
-    DEFINEREG_16BIT(C0DRB2),
-    DEFINEREG_16BIT(C0DRB3),
-    DEFINEREG_16BIT(C1DRB0),
-    DEFINEREG_16BIT(C1DRB1),
-    DEFINEREG_16BIT(C1DRB2),
-    DEFINEREG_16BIT(C1DRB3),
-    DEFINEREG_16BIT(C0DRA01),
-    DEFINEREG_16BIT(C0DRA23),
-    DEFINEREG_16BIT(C1DRA01),
-    DEFINEREG_16BIT(C1DRA23),
-
-    DEFINEREG(PGETBL_CTL),
-
-    DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
-    DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
-    DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd),
-    DEFINEREG2(DPLL_TEST, i830_debug_dpll_test),
-    DEFINEREG(CACHE_MODE_0),
-    DEFINEREG(D_STATE),
-    DEFINEREG2(DSPCLK_GATE_D, i830_debug_dspclk_gate_d),
-    DEFINEREG(RENCLK_GATE_D1),
-    DEFINEREG(RENCLK_GATE_D2),
+	DEFINEREG2(DCC, i830_debug_dcc),
+	DEFINEREG2(CHDECMISC, i830_debug_chdecmisc),
+	DEFINEREG_16BIT(C0DRB0),
+	DEFINEREG_16BIT(C0DRB1),
+	DEFINEREG_16BIT(C0DRB2),
+	DEFINEREG_16BIT(C0DRB3),
+	DEFINEREG_16BIT(C1DRB0),
+	DEFINEREG_16BIT(C1DRB1),
+	DEFINEREG_16BIT(C1DRB2),
+	DEFINEREG_16BIT(C1DRB3),
+	DEFINEREG_16BIT(C0DRA01),
+	DEFINEREG_16BIT(C0DRA23),
+	DEFINEREG_16BIT(C1DRA01),
+	DEFINEREG_16BIT(C1DRA23),
+
+	DEFINEREG(PGETBL_CTL),
+
+	DEFINEREG2(VCLK_DIVISOR_VGA0, i830_debug_fp),
+	DEFINEREG2(VCLK_DIVISOR_VGA1, i830_debug_fp),
+	DEFINEREG2(VCLK_POST_DIV, i830_debug_vga_pd),
+	DEFINEREG2(DPLL_TEST, i830_debug_dpll_test),
+	DEFINEREG(CACHE_MODE_0),
+	DEFINEREG(D_STATE),
+	DEFINEREG2(DSPCLK_GATE_D, i830_debug_dspclk_gate_d),
+	DEFINEREG(RENCLK_GATE_D1),
+	DEFINEREG(RENCLK_GATE_D2),
 /*  DEFINEREG(RAMCLK_GATE_D),	CRL only */
-    DEFINEREG2(SDVOB, i830_debug_sdvo),
-    DEFINEREG2(SDVOC, i830_debug_sdvo),
+	DEFINEREG2(SDVOB, i830_debug_sdvo),
+	DEFINEREG2(SDVOC, i830_debug_sdvo),
 /*    DEFINEREG(UDIB_SVB_SHB_CODES), CRL only */
 /*    DEFINEREG(UDIB_SHA_BLANK_CODES), CRL only */
-    DEFINEREG(SDVOUDI),
-    DEFINEREG(DSPARB),
-    DEFINEREG(DSPFW1),
-    DEFINEREG(DSPFW2),
-    DEFINEREG(DSPFW3),
-
-    DEFINEREG2(ADPA, i830_debug_adpa),
-    DEFINEREG2(LVDS, i830_debug_lvds),
-    DEFINEREG2(DVOA, i830_debug_dvo),
-    DEFINEREG2(DVOB, i830_debug_dvo),
-    DEFINEREG2(DVOC, i830_debug_dvo),
-    DEFINEREG(DVOA_SRCDIM),
-    DEFINEREG(DVOB_SRCDIM),
-    DEFINEREG(DVOC_SRCDIM),
-
-    DEFINEREG2(PP_CONTROL, i830_debug_pp_control),
-    DEFINEREG2(PP_STATUS, i830_debug_pp_status),
-    DEFINEREG(PP_ON_DELAYS),
-    DEFINEREG(PP_OFF_DELAYS),
-    DEFINEREG(PP_DIVISOR),
-    DEFINEREG(PFIT_CONTROL),
-    DEFINEREG(PFIT_PGM_RATIOS),
-    DEFINEREG(PORT_HOTPLUG_EN),
-    DEFINEREG(PORT_HOTPLUG_STAT),
-
-    DEFINEREG2(DSPACNTR, i830_debug_dspcntr),
-    DEFINEREG2(DSPASTRIDE, i830_debug_dspstride),
-    DEFINEREG2(DSPAPOS, i830_debug_xy),
-    DEFINEREG2(DSPASIZE, i830_debug_xyminus1),
-    DEFINEREG(DSPABASE),
-    DEFINEREG(DSPASURF),
-    DEFINEREG(DSPATILEOFF),
-    DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
-    DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
-    DEFINEREG2(PIPEASTAT, i830_debug_pipestat),
-    DEFINEREG(PIPEA_GMCH_DATA_M),
-    DEFINEREG(PIPEA_GMCH_DATA_N),
-    DEFINEREG(PIPEA_DP_LINK_M),
-    DEFINEREG(PIPEA_DP_LINK_N),
-    DEFINEREG(CURSOR_A_BASE),
-    DEFINEREG(CURSOR_A_CONTROL),
-    DEFINEREG(CURSOR_A_POSITION),
-
-    DEFINEREG2(FPA0, i830_debug_fp),
-    DEFINEREG2(FPA1, i830_debug_fp),
-    DEFINEREG2(DPLL_A, i830_debug_dpll),
-    DEFINEREG(DPLL_A_MD),
-    DEFINEREG2(HTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank),
-    DEFINEREG2(VTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank),
-    DEFINEREG(BCLRPAT_A),
-    DEFINEREG(VSYNCSHIFT_A),
-
-    DEFINEREG2(DSPBCNTR, i830_debug_dspcntr),
-    DEFINEREG2(DSPBSTRIDE, i830_debug_dspstride),
-    DEFINEREG2(DSPBPOS, i830_debug_xy),
-    DEFINEREG2(DSPBSIZE, i830_debug_xyminus1),
-    DEFINEREG(DSPBBASE),
-    DEFINEREG(DSPBSURF),
-    DEFINEREG(DSPBTILEOFF),
-    DEFINEREG2(PIPEBCONF, i830_debug_pipeconf),
-    DEFINEREG2(PIPEBSRC, i830_debug_yxminus1),
-    DEFINEREG2(PIPEBSTAT, i830_debug_pipestat),
-    DEFINEREG(PIPEB_GMCH_DATA_M),
-    DEFINEREG(PIPEB_GMCH_DATA_N),
-    DEFINEREG(PIPEB_DP_LINK_M),
-    DEFINEREG(PIPEB_DP_LINK_N),
-    DEFINEREG(CURSOR_B_BASE),
-    DEFINEREG(CURSOR_B_CONTROL),
-    DEFINEREG(CURSOR_B_POSITION),
-
-    DEFINEREG2(FPB0, i830_debug_fp),
-    DEFINEREG2(FPB1, i830_debug_fp),
-    DEFINEREG2(DPLL_B, i830_debug_dpll),
-    DEFINEREG(DPLL_B_MD),
-    DEFINEREG2(HTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank),
-    DEFINEREG2(VTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank),
-    DEFINEREG(BCLRPAT_B),
-    DEFINEREG(VSYNCSHIFT_B),
-
-    DEFINEREG(VCLK_DIVISOR_VGA0),
-    DEFINEREG(VCLK_DIVISOR_VGA1),
-    DEFINEREG(VCLK_POST_DIV),
-    DEFINEREG2(VGACNTRL, i830_debug_vgacntrl),
-
-    DEFINEREG(TV_CTL),
-    DEFINEREG(TV_DAC),
-    DEFINEREG(TV_CSC_Y),
-    DEFINEREG(TV_CSC_Y2),
-    DEFINEREG(TV_CSC_U),
-    DEFINEREG(TV_CSC_U2),
-    DEFINEREG(TV_CSC_V),
-    DEFINEREG(TV_CSC_V2),
-    DEFINEREG(TV_CLR_KNOBS),
-    DEFINEREG(TV_CLR_LEVEL),
-    DEFINEREG(TV_H_CTL_1),
-    DEFINEREG(TV_H_CTL_2),
-    DEFINEREG(TV_H_CTL_3),
-    DEFINEREG(TV_V_CTL_1),
-    DEFINEREG(TV_V_CTL_2),
-    DEFINEREG(TV_V_CTL_3),
-    DEFINEREG(TV_V_CTL_4),
-    DEFINEREG(TV_V_CTL_5),
-    DEFINEREG(TV_V_CTL_6),
-    DEFINEREG(TV_V_CTL_7),
-    DEFINEREG(TV_SC_CTL_1),
-    DEFINEREG(TV_SC_CTL_2),
-    DEFINEREG(TV_SC_CTL_3),
-    DEFINEREG(TV_WIN_POS),
-    DEFINEREG(TV_WIN_SIZE),
-    DEFINEREG(TV_FILTER_CTL_1),
-    DEFINEREG(TV_FILTER_CTL_2),
-    DEFINEREG(TV_FILTER_CTL_3),
-    DEFINEREG(TV_CC_CONTROL),
-    DEFINEREG(TV_CC_DATA),
-    DEFINEREG(TV_H_LUMA_0),
-    DEFINEREG(TV_H_LUMA_59),
-    DEFINEREG(TV_H_CHROMA_0),
-    DEFINEREG(TV_H_CHROMA_59),
-
-    DEFINEREG(FBC_CFB_BASE),
-    DEFINEREG(FBC_LL_BASE),
-    DEFINEREG(FBC_CONTROL),
-    DEFINEREG(FBC_COMMAND),
-    DEFINEREG(FBC_STATUS),
-    DEFINEREG(FBC_CONTROL2),
-    DEFINEREG(FBC_FENCE_OFF),
-    DEFINEREG(FBC_MOD_NUM),
-
-    DEFINEREG(MI_MODE),
-    /* DEFINEREG(MI_DISPLAY_POWER_DOWN), CRL only */
-    DEFINEREG(MI_ARB_STATE),
-    DEFINEREG(MI_RDRET_STATE),
-    DEFINEREG(ECOSKPD),
-
-    DEFINEREG(DP_B),
-    DEFINEREG(DPB_AUX_CH_CTL),
-    DEFINEREG(DPB_AUX_CH_DATA1),
-    DEFINEREG(DPB_AUX_CH_DATA2),
-    DEFINEREG(DPB_AUX_CH_DATA3),
-    DEFINEREG(DPB_AUX_CH_DATA4),
-    DEFINEREG(DPB_AUX_CH_DATA5),
-
-    DEFINEREG(DP_C),
-    DEFINEREG(DPC_AUX_CH_CTL),
-    DEFINEREG(DPC_AUX_CH_DATA1),
-    DEFINEREG(DPC_AUX_CH_DATA2),
-    DEFINEREG(DPC_AUX_CH_DATA3),
-    DEFINEREG(DPC_AUX_CH_DATA4),
-    DEFINEREG(DPC_AUX_CH_DATA5),
-
-    DEFINEREG(DP_D),
-    DEFINEREG(DPD_AUX_CH_CTL),
-    DEFINEREG(DPD_AUX_CH_DATA1),
-    DEFINEREG(DPD_AUX_CH_DATA2),
-    DEFINEREG(DPD_AUX_CH_DATA3),
-    DEFINEREG(DPD_AUX_CH_DATA4),
-    DEFINEREG(DPD_AUX_CH_DATA5),
-
-    DEFINEREG(AUD_CONFIG),
-    DEFINEREG(AUD_HDMIW_STATUS),
-    DEFINEREG(AUD_CONV_CHCNT),
-    DEFINEREG(VIDEO_DIP_CTL),
-    DEFINEREG(AUD_PINW_CNTR),
-    DEFINEREG(AUD_CNTL_ST),
-    DEFINEREG(AUD_PIN_CAP),
-    DEFINEREG(AUD_PINW_CAP),
-    DEFINEREG(AUD_PINW_UNSOLRESP),
-    DEFINEREG(AUD_OUT_DIG_CNVT),
-    DEFINEREG(AUD_OUT_CWCAP),
-    DEFINEREG(AUD_GRP_CAP),
+	DEFINEREG(SDVOUDI),
+	DEFINEREG(DSPARB),
+	DEFINEREG(DSPFW1),
+	DEFINEREG(DSPFW2),
+	DEFINEREG(DSPFW3),
+
+	DEFINEREG2(ADPA, i830_debug_adpa),
+	DEFINEREG2(LVDS, i830_debug_lvds),
+	DEFINEREG2(DVOA, i830_debug_dvo),
+	DEFINEREG2(DVOB, i830_debug_dvo),
+	DEFINEREG2(DVOC, i830_debug_dvo),
+	DEFINEREG(DVOA_SRCDIM),
+	DEFINEREG(DVOB_SRCDIM),
+	DEFINEREG(DVOC_SRCDIM),
+
+	DEFINEREG2(PP_CONTROL, i830_debug_pp_control),
+	DEFINEREG2(PP_STATUS, i830_debug_pp_status),
+	DEFINEREG(PP_ON_DELAYS),
+	DEFINEREG(PP_OFF_DELAYS),
+	DEFINEREG(PP_DIVISOR),
+	DEFINEREG(PFIT_CONTROL),
+	DEFINEREG(PFIT_PGM_RATIOS),
+	DEFINEREG(PORT_HOTPLUG_EN),
+	DEFINEREG(PORT_HOTPLUG_STAT),
+
+	DEFINEREG2(DSPACNTR, i830_debug_dspcntr),
+	DEFINEREG2(DSPASTRIDE, i830_debug_dspstride),
+	DEFINEREG2(DSPAPOS, i830_debug_xy),
+	DEFINEREG2(DSPASIZE, i830_debug_xyminus1),
+	DEFINEREG(DSPABASE),
+	DEFINEREG(DSPASURF),
+	DEFINEREG(DSPATILEOFF),
+	DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
+	DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
+	DEFINEREG2(PIPEASTAT, i830_debug_pipestat),
+	DEFINEREG(PIPEA_GMCH_DATA_M),
+	DEFINEREG(PIPEA_GMCH_DATA_N),
+	DEFINEREG(PIPEA_DP_LINK_M),
+	DEFINEREG(PIPEA_DP_LINK_N),
+	DEFINEREG(CURSOR_A_BASE),
+	DEFINEREG(CURSOR_A_CONTROL),
+	DEFINEREG(CURSOR_A_POSITION),
+
+	DEFINEREG2(FPA0, i830_debug_fp),
+	DEFINEREG2(FPA1, i830_debug_fp),
+	DEFINEREG2(DPLL_A, i830_debug_dpll),
+	DEFINEREG(DPLL_A_MD),
+	DEFINEREG2(HTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank),
+	DEFINEREG2(VTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank),
+	DEFINEREG(BCLRPAT_A),
+	DEFINEREG(VSYNCSHIFT_A),
+
+	DEFINEREG2(DSPBCNTR, i830_debug_dspcntr),
+	DEFINEREG2(DSPBSTRIDE, i830_debug_dspstride),
+	DEFINEREG2(DSPBPOS, i830_debug_xy),
+	DEFINEREG2(DSPBSIZE, i830_debug_xyminus1),
+	DEFINEREG(DSPBBASE),
+	DEFINEREG(DSPBSURF),
+	DEFINEREG(DSPBTILEOFF),
+	DEFINEREG2(PIPEBCONF, i830_debug_pipeconf),
+	DEFINEREG2(PIPEBSRC, i830_debug_yxminus1),
+	DEFINEREG2(PIPEBSTAT, i830_debug_pipestat),
+	DEFINEREG(PIPEB_GMCH_DATA_M),
+	DEFINEREG(PIPEB_GMCH_DATA_N),
+	DEFINEREG(PIPEB_DP_LINK_M),
+	DEFINEREG(PIPEB_DP_LINK_N),
+	DEFINEREG(CURSOR_B_BASE),
+	DEFINEREG(CURSOR_B_CONTROL),
+	DEFINEREG(CURSOR_B_POSITION),
+
+	DEFINEREG2(FPB0, i830_debug_fp),
+	DEFINEREG2(FPB1, i830_debug_fp),
+	DEFINEREG2(DPLL_B, i830_debug_dpll),
+	DEFINEREG(DPLL_B_MD),
+	DEFINEREG2(HTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank),
+	DEFINEREG2(VTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank),
+	DEFINEREG(BCLRPAT_B),
+	DEFINEREG(VSYNCSHIFT_B),
+
+	DEFINEREG(VCLK_DIVISOR_VGA0),
+	DEFINEREG(VCLK_DIVISOR_VGA1),
+	DEFINEREG(VCLK_POST_DIV),
+	DEFINEREG2(VGACNTRL, i830_debug_vgacntrl),
+
+	DEFINEREG(TV_CTL),
+	DEFINEREG(TV_DAC),
+	DEFINEREG(TV_CSC_Y),
+	DEFINEREG(TV_CSC_Y2),
+	DEFINEREG(TV_CSC_U),
+	DEFINEREG(TV_CSC_U2),
+	DEFINEREG(TV_CSC_V),
+	DEFINEREG(TV_CSC_V2),
+	DEFINEREG(TV_CLR_KNOBS),
+	DEFINEREG(TV_CLR_LEVEL),
+	DEFINEREG(TV_H_CTL_1),
+	DEFINEREG(TV_H_CTL_2),
+	DEFINEREG(TV_H_CTL_3),
+	DEFINEREG(TV_V_CTL_1),
+	DEFINEREG(TV_V_CTL_2),
+	DEFINEREG(TV_V_CTL_3),
+	DEFINEREG(TV_V_CTL_4),
+	DEFINEREG(TV_V_CTL_5),
+	DEFINEREG(TV_V_CTL_6),
+	DEFINEREG(TV_V_CTL_7),
+	DEFINEREG(TV_SC_CTL_1),
+	DEFINEREG(TV_SC_CTL_2),
+	DEFINEREG(TV_SC_CTL_3),
+	DEFINEREG(TV_WIN_POS),
+	DEFINEREG(TV_WIN_SIZE),
+	DEFINEREG(TV_FILTER_CTL_1),
+	DEFINEREG(TV_FILTER_CTL_2),
+	DEFINEREG(TV_FILTER_CTL_3),
+	DEFINEREG(TV_CC_CONTROL),
+	DEFINEREG(TV_CC_DATA),
+	DEFINEREG(TV_H_LUMA_0),
+	DEFINEREG(TV_H_LUMA_59),
+	DEFINEREG(TV_H_CHROMA_0),
+	DEFINEREG(TV_H_CHROMA_59),
+
+	DEFINEREG(FBC_CFB_BASE),
+	DEFINEREG(FBC_LL_BASE),
+	DEFINEREG(FBC_CONTROL),
+	DEFINEREG(FBC_COMMAND),
+	DEFINEREG(FBC_STATUS),
+	DEFINEREG(FBC_CONTROL2),
+	DEFINEREG(FBC_FENCE_OFF),
+	DEFINEREG(FBC_MOD_NUM),
+
+	DEFINEREG(MI_MODE),
+	/* DEFINEREG(MI_DISPLAY_POWER_DOWN), CRL only */
+	DEFINEREG(MI_ARB_STATE),
+	DEFINEREG(MI_RDRET_STATE),
+	DEFINEREG(ECOSKPD),
+
+	DEFINEREG(DP_B),
+	DEFINEREG(DPB_AUX_CH_CTL),
+	DEFINEREG(DPB_AUX_CH_DATA1),
+	DEFINEREG(DPB_AUX_CH_DATA2),
+	DEFINEREG(DPB_AUX_CH_DATA3),
+	DEFINEREG(DPB_AUX_CH_DATA4),
+	DEFINEREG(DPB_AUX_CH_DATA5),
+
+	DEFINEREG(DP_C),
+	DEFINEREG(DPC_AUX_CH_CTL),
+	DEFINEREG(DPC_AUX_CH_DATA1),
+	DEFINEREG(DPC_AUX_CH_DATA2),
+	DEFINEREG(DPC_AUX_CH_DATA3),
+	DEFINEREG(DPC_AUX_CH_DATA4),
+	DEFINEREG(DPC_AUX_CH_DATA5),
+
+	DEFINEREG(DP_D),
+	DEFINEREG(DPD_AUX_CH_CTL),
+	DEFINEREG(DPD_AUX_CH_DATA1),
+	DEFINEREG(DPD_AUX_CH_DATA2),
+	DEFINEREG(DPD_AUX_CH_DATA3),
+	DEFINEREG(DPD_AUX_CH_DATA4),
+	DEFINEREG(DPD_AUX_CH_DATA5),
+
+	DEFINEREG(AUD_CONFIG),
+	DEFINEREG(AUD_HDMIW_STATUS),
+	DEFINEREG(AUD_CONV_CHCNT),
+	DEFINEREG(VIDEO_DIP_CTL),
+	DEFINEREG(AUD_PINW_CNTR),
+	DEFINEREG(AUD_CNTL_ST),
+	DEFINEREG(AUD_PIN_CAP),
+	DEFINEREG(AUD_PINW_CAP),
+	DEFINEREG(AUD_PINW_UNSOLRESP),
+	DEFINEREG(AUD_OUT_DIG_CNVT),
+	DEFINEREG(AUD_OUT_CWCAP),
+	DEFINEREG(AUD_GRP_CAP),
 
 #define DEFINEFENCE_915(i) \
 	{ FENCE+i*4, "FENCE  " #i, i810_debug_915_fence, 0 }
 #define DEFINEFENCE_945(i)						\
 	{ FENCE_NEW+(i - 8) * 4, "FENCE  " #i, i810_debug_915_fence, 0 }
 
-    DEFINEFENCE_915(0),
-    DEFINEFENCE_915(1),
-    DEFINEFENCE_915(2),
-    DEFINEFENCE_915(3),
-    DEFINEFENCE_915(4),
-    DEFINEFENCE_915(5),
-    DEFINEFENCE_915(6),
-    DEFINEFENCE_915(7),
-    DEFINEFENCE_945(8),
-    DEFINEFENCE_945(9),
-    DEFINEFENCE_945(10),
-    DEFINEFENCE_945(11),
-    DEFINEFENCE_945(12),
-    DEFINEFENCE_945(13),
-    DEFINEFENCE_945(14),
-    DEFINEFENCE_945(15),
+	DEFINEFENCE_915(0),
+	DEFINEFENCE_915(1),
+	DEFINEFENCE_915(2),
+	DEFINEFENCE_915(3),
+	DEFINEFENCE_915(4),
+	DEFINEFENCE_915(5),
+	DEFINEFENCE_915(6),
+	DEFINEFENCE_915(7),
+	DEFINEFENCE_945(8),
+	DEFINEFENCE_945(9),
+	DEFINEFENCE_945(10),
+	DEFINEFENCE_945(11),
+	DEFINEFENCE_945(12),
+	DEFINEFENCE_945(13),
+	DEFINEFENCE_945(14),
+	DEFINEFENCE_945(15),
 
 #define DEFINEFENCE_965(i) \
 	{ FENCE_NEW+i*8, "FENCE START " #i, i810_debug_965_fence_start, 0 }, \
 	{ FENCE_NEW+i*8+4, "FENCE END " #i, i810_debug_965_fence_end, 0 }
 
-    DEFINEFENCE_965(0),
-    DEFINEFENCE_965(1),
-    DEFINEFENCE_965(2),
-    DEFINEFENCE_965(3),
-    DEFINEFENCE_965(4),
-    DEFINEFENCE_965(5),
-    DEFINEFENCE_965(6),
-    DEFINEFENCE_965(7),
-    DEFINEFENCE_965(8),
-    DEFINEFENCE_965(9),
-    DEFINEFENCE_965(10),
-    DEFINEFENCE_965(11),
-    DEFINEFENCE_965(12),
-    DEFINEFENCE_965(13),
-    DEFINEFENCE_965(14),
-    DEFINEFENCE_965(15),
+	DEFINEFENCE_965(0),
+	DEFINEFENCE_965(1),
+	DEFINEFENCE_965(2),
+	DEFINEFENCE_965(3),
+	DEFINEFENCE_965(4),
+	DEFINEFENCE_965(5),
+	DEFINEFENCE_965(6),
+	DEFINEFENCE_965(7),
+	DEFINEFENCE_965(8),
+	DEFINEFENCE_965(9),
+	DEFINEFENCE_965(10),
+	DEFINEFENCE_965(11),
+	DEFINEFENCE_965(12),
+	DEFINEFENCE_965(13),
+	DEFINEFENCE_965(14),
+	DEFINEFENCE_965(15),
 };
+
 #define NUM_I830_SNAPSHOTREGS (sizeof(i830_snapshot) / sizeof(i830_snapshot[0]))
 
 DEBUGSTRING(igdng_debug_rr_hw_ctl)
 {
-    return XNFprintf("low %d, high %d", val & RR_HW_LOW_POWER_FRAMES_MASK,
-	    (val & RR_HW_HIGH_POWER_FRAMES_MASK) >> 8 );
+	return XNFprintf("low %d, high %d", val & RR_HW_LOW_POWER_FRAMES_MASK,
+			 (val & RR_HW_HIGH_POWER_FRAMES_MASK) >> 8);
 }
 
 DEBUGSTRING(igdng_debug_m_tu)
 {
-    return XNFprintf("TU %d, val 0x%x %d", (val >> 25) + 1, val & 0xffffff, val & 0xffffff);
+	return XNFprintf("TU %d, val 0x%x %d", (val >> 25) + 1, val & 0xffffff,
+			 val & 0xffffff);
 }
 
 DEBUGSTRING(igdng_debug_n)
 {
-    return XNFprintf("val 0x%x %d", val & 0xffffff, val & 0xffffff);
+	return XNFprintf("val 0x%x %d", val & 0xffffff, val & 0xffffff);
 }
 
 DEBUGSTRING(igdng_debug_fdi_tx_ctl)
 {
-    char *train = NULL, *voltage = NULL, *pre_emphasis = NULL, *portw = NULL;
+	char *train = NULL, *voltage = NULL, *pre_emphasis = NULL, *portw =
+	    NULL;
 
-    switch (val & FDI_LINK_TRAIN_NONE) {
+	switch (val & FDI_LINK_TRAIN_NONE) {
 	case FDI_LINK_TRAIN_PATTERN_1:
-	    train = "pattern_1";
-	    break;
+		train = "pattern_1";
+		break;
 	case FDI_LINK_TRAIN_PATTERN_2:
-	    train = "pattern_2";
-	    break;
+		train = "pattern_2";
+		break;
 	case FDI_LINK_TRAIN_PATTERN_IDLE:
-	    train = "pattern_idle";
-	    break;
+		train = "pattern_idle";
+		break;
 	case FDI_LINK_TRAIN_NONE:
-	    train = "not train";
-	    break;
-    }
+		train = "not train";
+		break;
+	}
 
-    switch (val & (7<<25)) {
+	switch (val & (7 << 25)) {
 	case FDI_LINK_TRAIN_VOLTAGE_0_4V:
-	    voltage = "0.4V";
-	    break;
+		voltage = "0.4V";
+		break;
 	case FDI_LINK_TRAIN_VOLTAGE_0_6V:
-	    voltage = "0.6V";
-	    break;
+		voltage = "0.6V";
+		break;
 	case FDI_LINK_TRAIN_VOLTAGE_0_8V:
-	    voltage = "0.8V";
-	    break;
+		voltage = "0.8V";
+		break;
 	case FDI_LINK_TRAIN_VOLTAGE_1_2V:
-	    voltage = "1.2V";
-	    break;
+		voltage = "1.2V";
+		break;
 	default:
-	    voltage = "reserved";
-    }
+		voltage = "reserved";
+	}
 
-    switch (val & (7<<22)) {
+	switch (val & (7 << 22)) {
 	case FDI_LINK_TRAIN_PRE_EMPHASIS_NONE:
-	    pre_emphasis = "none";
-	    break;
+		pre_emphasis = "none";
+		break;
 	case FDI_LINK_TRAIN_PRE_EMPHASIS_1_5X:
-	    pre_emphasis = "1.5x";
-	    break;
+		pre_emphasis = "1.5x";
+		break;
 	case FDI_LINK_TRAIN_PRE_EMPHASIS_2X:
-	    pre_emphasis = "2x";
-	    break;
+		pre_emphasis = "2x";
+		break;
 	case FDI_LINK_TRAIN_PRE_EMPHASIS_3X:
-	    pre_emphasis = "3x";
-	    break;
+		pre_emphasis = "3x";
+		break;
 	default:
-	    pre_emphasis = "reserved";
-    }
+		pre_emphasis = "reserved";
+	}
 
-    switch (val & (7<<19)) {
+	switch (val & (7 << 19)) {
 	case FDI_DP_PORT_WIDTH_X1:
-	    portw = "X1";
-	    break;
+		portw = "X1";
+		break;
 	case FDI_DP_PORT_WIDTH_X2:
-	    portw = "X2";
-	    break;
+		portw = "X2";
+		break;
 	case FDI_DP_PORT_WIDTH_X3:
-	    portw = "X3";
-	    break;
+		portw = "X3";
+		break;
 	case FDI_DP_PORT_WIDTH_X4:
-	    portw = "X4";
-	    break;
-    }
-
-    return XNFprintf("%s, train pattern %s, voltage swing %s,"
-	    "pre-emphasis %s, port width %s, enhanced framing %s, FDI PLL %s, scrambing %s, master mode %s",
-	    val & FDI_TX_ENABLE ? "enable" : "disable",
-	    train, voltage, pre_emphasis, portw,
-	    val & FDI_TX_ENHANCE_FRAME_ENABLE ? "enable" : "disable",
-	    val & FDI_TX_PLL_ENABLE ? "enable" : "disable",
-	    val & (1 << 7) ? "disable" : "enable",
-	    val & (1 << 0) ? "enable" : "disable");
+		portw = "X4";
+		break;
+	}
+
+	return XNFprintf("%s, train pattern %s, voltage swing %s,"
+			 "pre-emphasis %s, port width %s, enhanced framing %s, FDI PLL %s, scrambing %s, master mode %s",
+			 val & FDI_TX_ENABLE ? "enable" : "disable",
+			 train, voltage, pre_emphasis, portw,
+			 val & FDI_TX_ENHANCE_FRAME_ENABLE ? "enable" :
+			 "disable",
+			 val & FDI_TX_PLL_ENABLE ? "enable" : "disable",
+			 val & (1 << 7) ? "disable" : "enable",
+			 val & (1 << 0) ? "enable" : "disable");
 }
 
 DEBUGSTRING(igdng_debug_fdi_rx_ctl)
 {
-    char *train = NULL, *portw = NULL, *bpc = NULL;
+	char *train = NULL, *portw = NULL, *bpc = NULL;
 
-    switch (val & FDI_LINK_TRAIN_NONE) {
+	switch (val & FDI_LINK_TRAIN_NONE) {
 	case FDI_LINK_TRAIN_PATTERN_1:
-	    train = "pattern_1";
-	    break;
+		train = "pattern_1";
+		break;
 	case FDI_LINK_TRAIN_PATTERN_2:
-	    train = "pattern_2";
-	    break;
+		train = "pattern_2";
+		break;
 	case FDI_LINK_TRAIN_PATTERN_IDLE:
-	    train = "pattern_idle";
-	    break;
+		train = "pattern_idle";
+		break;
 	case FDI_LINK_TRAIN_NONE:
-	    train = "not train";
-	    break;
-    }
+		train = "not train";
+		break;
+	}
 
-    switch (val & (7<<19)) {
+	switch (val & (7 << 19)) {
 	case FDI_DP_PORT_WIDTH_X1:
-	    portw = "X1";
-	    break;
+		portw = "X1";
+		break;
 	case FDI_DP_PORT_WIDTH_X2:
-	    portw = "X2";
-	    break;
+		portw = "X2";
+		break;
 	case FDI_DP_PORT_WIDTH_X3:
-	    portw = "X3";
-	    break;
+		portw = "X3";
+		break;
 	case FDI_DP_PORT_WIDTH_X4:
-	    portw = "X4";
-	    break;
-    }
+		portw = "X4";
+		break;
+	}
 
-    switch (val & (7<<16)) {
+	switch (val & (7 << 16)) {
 	case FDI_8BPC:
-	    bpc = "8bpc";
-	    break;
+		bpc = "8bpc";
+		break;
 	case FDI_10BPC:
-	    bpc = "10bpc";
-	    break;
+		bpc = "10bpc";
+		break;
 	case FDI_6BPC:
-	    bpc = "6bpc";
-	    break;
+		bpc = "6bpc";
+		break;
 	case FDI_12BPC:
-	    bpc = "12bpc";
-	    break;
-    }
-
-    return XNFprintf("%s, train pattern %s, port width %s, %s,"
-	    "link_reverse_strap_overwrite %s, dmi_link_reverse %s, FDI PLL %s,"
-	    "FS ecc %s, FE ecc %s, FS err report %s, FE err report %s,"
-	    "scrambing %s, enhanced framing %s, %s",
-	    val & FDI_RX_ENABLE ? "enable" : "disable",
-	    train, portw, bpc,
-	    val & FDI_LINK_REVERSE_OVERWRITE ? "yes" : "no",
-	    val & FDI_DMI_LINK_REVERSE_MASK ? "yes" : "no",
-	    val & FDI_RX_PLL_ENABLE ? "enable" : "disable",
-	    val & FDI_FS_ERR_CORRECT_ENABLE ? "enable" : "disable",
-	    val & FDI_FE_ERR_CORRECT_ENABLE ? "enable" : "disable",
-	    val & FDI_FS_ERR_REPORT_ENABLE ? "enable" : "disable",
-	    val & FDI_FE_ERR_REPORT_ENABLE ? "enable" : "disable",
-	    val & (1 << 7) ? "disable" : "enable",
-	    val & FDI_RX_ENHANCE_FRAME_ENABLE ? "enable" : "disable",
-	    val & FDI_SEL_PCDCLK ? "PCDClk" : "RawClk");
+		bpc = "12bpc";
+		break;
+	}
+
+	return XNFprintf("%s, train pattern %s, port width %s, %s,"
+			 "link_reverse_strap_overwrite %s, dmi_link_reverse %s, FDI PLL %s,"
+			 "FS ecc %s, FE ecc %s, FS err report %s, FE err report %s,"
+			 "scrambing %s, enhanced framing %s, %s",
+			 val & FDI_RX_ENABLE ? "enable" : "disable",
+			 train, portw, bpc,
+			 val & FDI_LINK_REVERSE_OVERWRITE ? "yes" : "no",
+			 val & FDI_DMI_LINK_REVERSE_MASK ? "yes" : "no",
+			 val & FDI_RX_PLL_ENABLE ? "enable" : "disable",
+			 val & FDI_FS_ERR_CORRECT_ENABLE ? "enable" : "disable",
+			 val & FDI_FE_ERR_CORRECT_ENABLE ? "enable" : "disable",
+			 val & FDI_FS_ERR_REPORT_ENABLE ? "enable" : "disable",
+			 val & FDI_FE_ERR_REPORT_ENABLE ? "enable" : "disable",
+			 val & (1 << 7) ? "disable" : "enable",
+			 val & FDI_RX_ENHANCE_FRAME_ENABLE ? "enable" :
+			 "disable", val & FDI_SEL_PCDCLK ? "PCDClk" : "RawClk");
 }
 
 DEBUGSTRING(igdng_debug_dspstride)
 {
-    return XNFprintf("%d", val >> 6);
+	return XNFprintf("%d", val >> 6);
 }
 
 DEBUGSTRING(igdng_debug_pch_dpll)
 {
-    char *enable = val & DPLL_VCO_ENABLE ? "enable" : "disable";
-    char *highspeed = val & DPLL_DVO_HIGH_SPEED ? "yes" : "no";
-    char *mode = NULL;
-    char *p2 = NULL;
-    int fpa0_p1, fpa1_p1;
-    char *refclk = NULL;
-    int sdvo_mul;
-
-    if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_LVDS) {
-	mode = "LVDS";
-	if (val & DPLLB_LVDS_P2_CLOCK_DIV_7)
-	    p2 = "Div 7";
-	else
-	    p2 = "Div 14";
-    } else if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_DAC_SERIAL) {
-	mode = "Non-LVDS";
-	if (val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5)
-	    p2 = "Div 5";
-	else
-	    p2 = "Div 10";
-    }
-    fpa0_p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> 16);
-    fpa1_p1 = ffs((val & DPLL_FPA1_P1_POST_DIV_MASK));
+	char *enable = val & DPLL_VCO_ENABLE ? "enable" : "disable";
+	char *highspeed = val & DPLL_DVO_HIGH_SPEED ? "yes" : "no";
+	char *mode = NULL;
+	char *p2 = NULL;
+	int fpa0_p1, fpa1_p1;
+	char *refclk = NULL;
+	int sdvo_mul;
+
+	if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_LVDS) {
+		mode = "LVDS";
+		if (val & DPLLB_LVDS_P2_CLOCK_DIV_7)
+			p2 = "Div 7";
+		else
+			p2 = "Div 14";
+	} else if ((val & DPLLB_MODE_LVDS) == DPLLB_MODE_DAC_SERIAL) {
+		mode = "Non-LVDS";
+		if (val & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5)
+			p2 = "Div 5";
+		else
+			p2 = "Div 10";
+	}
+	fpa0_p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK) >> 16);
+	fpa1_p1 = ffs((val & DPLL_FPA1_P1_POST_DIV_MASK));
 
-    switch (val & PLL_REF_INPUT_MASK) {
+	switch (val & PLL_REF_INPUT_MASK) {
 	case PLL_REF_INPUT_DREFCLK:
-	    refclk = "default 120Mhz";
-	    break;
+		refclk = "default 120Mhz";
+		break;
 	case PLL_REF_INPUT_SUPER_SSC:
-	    refclk = "SuperSSC 120Mhz";
-	    break;
+		refclk = "SuperSSC 120Mhz";
+		break;
 	case PLL_REF_INPUT_TVCLKINBC:
-	    refclk = "SDVO TVClkIn";
-	    break;
+		refclk = "SDVO TVClkIn";
+		break;
 	case PLLB_REF_INPUT_SPREADSPECTRUMIN:
-	    refclk = "SSC";
-	    break;
+		refclk = "SSC";
+		break;
 	case PLL_REF_INPUT_DMICLK:
-	    refclk = "DMI RefCLK";
-	    break;
-    }
+		refclk = "DMI RefCLK";
+		break;
+	}
 
-    sdvo_mul = ((val & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK) >> 9) + 1;
+	sdvo_mul = ((val & PLL_REF_SDVO_HDMI_MULTIPLIER_MASK) >> 9) + 1;
 
-    return XNFprintf("%s, sdvo high speed %s, mode %s, p2 %s, "
-	    "FPA0 P1 %d, FPA1 P1 %d, refclk %s, sdvo/hdmi mul %d",
-	    enable, highspeed, mode, p2, fpa0_p1, fpa1_p1, refclk, sdvo_mul);
+	return XNFprintf("%s, sdvo high speed %s, mode %s, p2 %s, "
+			 "FPA0 P1 %d, FPA1 P1 %d, refclk %s, sdvo/hdmi mul %d",
+			 enable, highspeed, mode, p2, fpa0_p1, fpa1_p1, refclk,
+			 sdvo_mul);
 }
 
 DEBUGSTRING(igdng_debug_dref_ctl)
 {
-    char *cpu_source;
-    char *ssc_source = val & DREF_SSC_SOURCE_ENABLE ? "enable" : "disable";
-    char *nonspread_source = val & DREF_NONSPREAD_SOURCE_ENABLE ? "enable":"disable";
-    char *superspread_source = val & DREF_SUPERSPREAD_SOURCE_ENABLE ? "enable":"disable";
-    char *ssc4_mode = val & DREF_SSC4_CENTERSPREAD ? "centerspread" : "downspread";
-    char *ssc1 = val & DREF_SSC1_ENABLE ? "enable" : "disable";
-    char *ssc4 = val & DREF_SSC4_ENABLE ? "enable" : "disable";
-
-    switch (val & DREF_CPU_SOURCE_OUTPUT_NONSPREAD) {
+	char *cpu_source;
+	char *ssc_source = val & DREF_SSC_SOURCE_ENABLE ? "enable" : "disable";
+	char *nonspread_source =
+	    val & DREF_NONSPREAD_SOURCE_ENABLE ? "enable" : "disable";
+	char *superspread_source =
+	    val & DREF_SUPERSPREAD_SOURCE_ENABLE ? "enable" : "disable";
+	char *ssc4_mode =
+	    val & DREF_SSC4_CENTERSPREAD ? "centerspread" : "downspread";
+	char *ssc1 = val & DREF_SSC1_ENABLE ? "enable" : "disable";
+	char *ssc4 = val & DREF_SSC4_ENABLE ? "enable" : "disable";
+
+	switch (val & DREF_CPU_SOURCE_OUTPUT_NONSPREAD) {
 	case DREF_CPU_SOURCE_OUTPUT_DISABLE:
-	    cpu_source = "disable";
-	    break;
+		cpu_source = "disable";
+		break;
 	case DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD:
-	    cpu_source = "downspread";
-	    break;
+		cpu_source = "downspread";
+		break;
 	case DREF_CPU_SOURCE_OUTPUT_NONSPREAD:
-	    cpu_source = "nonspread";
-	    break;
+		cpu_source = "nonspread";
+		break;
 	default:
-	    cpu_source = "reserved";
-    }
-    return XNFprintf("cpu source %s, ssc_source %s, nonspread_source %s, "
-	    "superspread_source %s, ssc4_mode %s, ssc1 %s, ssc4 %s",
-	    cpu_source, ssc_source, nonspread_source, superspread_source,
-	    ssc4_mode, ssc1, ssc4);
+		cpu_source = "reserved";
+	}
+	return XNFprintf("cpu source %s, ssc_source %s, nonspread_source %s, "
+			 "superspread_source %s, ssc4_mode %s, ssc1 %s, ssc4 %s",
+			 cpu_source, ssc_source, nonspread_source,
+			 superspread_source, ssc4_mode, ssc1, ssc4);
 }
 
 DEBUGSTRING(igdng_debug_rawclk_freq)
 {
-    char *tp1 = NULL, *tp2 = NULL;
+	char *tp1 = NULL, *tp2 = NULL;
 
-    switch (val & FDL_TP1_TIMER_MASK) {
+	switch (val & FDL_TP1_TIMER_MASK) {
 	case 0:
-	    tp1 = "0.5us";
-	    break;
+		tp1 = "0.5us";
+		break;
 	case (1 << 12):
-	    tp1 = "1.0us";
-	    break;
+		tp1 = "1.0us";
+		break;
 	case (2 << 12):
-	    tp1 = "2.0us";
-	    break;
+		tp1 = "2.0us";
+		break;
 	case (3 << 12):
-	    tp1 = "4.0us";
-	    break;
-    }
-    switch (val & FDL_TP2_TIMER_MASK) {
+		tp1 = "4.0us";
+		break;
+	}
+	switch (val & FDL_TP2_TIMER_MASK) {
 	case 0:
-	    tp2 = "1.5us";
-	    break;
+		tp2 = "1.5us";
+		break;
 	case (1 << 10):
-	    tp2 = "3.0us";
-	    break;
+		tp2 = "3.0us";
+		break;
 	case (2 << 10):
-	    tp2 = "6.0us";
-	    break;
+		tp2 = "6.0us";
+		break;
 	case (3 << 10):
-	    tp2 = "12.0us";
-	    break;
-    }
-    return XNFprintf("FDL_TP1 timer %s, FDL_TP2 timer %s, freq %d",
-	    tp1, tp2, val & RAWCLK_FREQ_MASK);
+		tp2 = "12.0us";
+		break;
+	}
+	return XNFprintf("FDL_TP1 timer %s, FDL_TP2 timer %s, freq %d",
+			 tp1, tp2, val & RAWCLK_FREQ_MASK);
 
 }
 
 DEBUGSTRING(igdng_debug_fdi_rx_misc)
 {
-    return XNFprintf("FDI Delay %d", val & ((1 << 13) - 1));
+	return XNFprintf("FDI Delay %d", val & ((1 << 13) - 1));
 }
 
 DEBUGSTRING(igdng_debug_transconf)
 {
-    return XNFprintf("%s, %s",
-	    val & TRANS_ENABLE ? "enable" : "disable",
-	    val & TRANS_STATE_ENABLE ? "active" : "inactive");
+	return XNFprintf("%s, %s",
+			 val & TRANS_ENABLE ? "enable" : "disable",
+			 val & TRANS_STATE_ENABLE ? "active" : "inactive");
 }
 
 DEBUGSTRING(igdng_debug_panel_fitting)
 {
-    char *vadapt = NULL, *filter_sel = NULL;
+	char *vadapt = NULL, *filter_sel = NULL;
 
-    switch (val & (3 << 25)) {
+	switch (val & (3 << 25)) {
 	case 0:
-	    vadapt = "least";
-	    break;
-	case (1<<25):
-	    vadapt = "moderate";
-	    break;
-	case (2<<25):
-	    vadapt = "reserved";
-	    break;
-	case (3<<25):
-	    vadapt = "most";
-	    break;
-    }
-
-    switch (val & (3 << 23)) {
+		vadapt = "least";
+		break;
+	case (1 << 25):
+		vadapt = "moderate";
+		break;
+	case (2 << 25):
+		vadapt = "reserved";
+		break;
+	case (3 << 25):
+		vadapt = "most";
+		break;
+	}
+
+	switch (val & (3 << 23)) {
 	case 0:
-	    filter_sel = "programmed";
-	    break;
-	case (1<<25):
-	    filter_sel = "hardcoded";
-	    break;
-	case (2<<25):
-	    filter_sel = "edge_enhance";
-	    break;
-	case (3<<25):
-	    filter_sel = "edge_soften";
-	    break;
-    }
-
-    return XNFprintf("%s, auto_scale %s, auto_scale_cal %s, v_filter %s, vadapt %s, mode %s, filter_sel %s,"
-	    "chroma pre-filter %s, vert3tap %s, v_inter_invert %s",
-	    val & PF_ENABLE ? "enable" : "disable",
-	    val & (1 << 30) ? "no" : "yes",
-	    val & (1 << 29) ? "yes" : "no",
-	    val & (1 << 28) ? "bypass" : "enable",
-	    val & (1 << 27) ? "enable" : "disable",
-	    vadapt, filter_sel,
-	    val & (1 << 22) ? "enable" : "disable",
-	    val & (1 << 21) ? "force" : "auto",
-	    val & (1 << 20) ? "field 0" : "field 1");
+		filter_sel = "programmed";
+		break;
+	case (1 << 25):
+		filter_sel = "hardcoded";
+		break;
+	case (2 << 25):
+		filter_sel = "edge_enhance";
+		break;
+	case (3 << 25):
+		filter_sel = "edge_soften";
+		break;
+	}
+
+	return
+	    XNFprintf
+	    ("%s, auto_scale %s, auto_scale_cal %s, v_filter %s, vadapt %s, mode %s, filter_sel %s,"
+	     "chroma pre-filter %s, vert3tap %s, v_inter_invert %s",
+	     val & PF_ENABLE ? "enable" : "disable",
+	     val & (1 << 30) ? "no" : "yes", val & (1 << 29) ? "yes" : "no",
+	     val & (1 << 28) ? "bypass" : "enable",
+	     val & (1 << 27) ? "enable" : "disable", vadapt, filter_sel,
+	     val & (1 << 22) ? "enable" : "disable",
+	     val & (1 << 21) ? "force" : "auto",
+	     val & (1 << 20) ? "field 0" : "field 1");
 }
 
 DEBUGSTRING(igdng_debug_pf_win)
 {
-    int a, b;
+	int a, b;
 
-    a = (val >> 16) & 0x1fff;
-    b = val & 0xfff;
+	a = (val >> 16) & 0x1fff;
+	b = val & 0xfff;
 
-    return XNFprintf("%d, %d", a, b);
+	return XNFprintf("%d, %d", a, b);
 }
 
-
 static struct i830SnapshotRec igdng_snapshot[] = {
-    DEFINEREG2(CPU_VGACNTRL, i830_debug_vgacntrl),
-    DEFINEREG(DIGITAL_PORT_HOTPLUG_CNTRL),
-
-    DEFINEREG2(RR_HW_CTL, igdng_debug_rr_hw_ctl),
-
-    DEFINEREG(FDI_PLL_BIOS_0),
-    DEFINEREG(FDI_PLL_BIOS_1),
-    DEFINEREG(FDI_PLL_BIOS_2),
-
-    DEFINEREG(DISPLAY_PORT_PLL_BIOS_0),
-    DEFINEREG(DISPLAY_PORT_PLL_BIOS_1),
-    DEFINEREG(DISPLAY_PORT_PLL_BIOS_2),
-
-    DEFINEREG(FDI_PLL_FREQ_CTL),
-
-    DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
-
-    DEFINEREG2(HTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank),
-    DEFINEREG2(VTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank),
-    DEFINEREG(VSYNCSHIFT_A),
-    DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
-
-    DEFINEREG2(PIPEA_DATA_M1, igdng_debug_m_tu),
-    DEFINEREG2(PIPEA_DATA_N1, igdng_debug_n),
-    DEFINEREG2(PIPEA_DATA_M2, igdng_debug_m_tu),
-    DEFINEREG2(PIPEA_DATA_N2, igdng_debug_n),
-
-    DEFINEREG2(PIPEA_LINK_M1, igdng_debug_n),
-    DEFINEREG2(PIPEA_LINK_N1, igdng_debug_n),
-    DEFINEREG2(PIPEA_LINK_M2, igdng_debug_n),
-    DEFINEREG2(PIPEA_LINK_N2, igdng_debug_n),
-
-    DEFINEREG2(DSPACNTR, i830_debug_dspcntr),
-    DEFINEREG(DSPABASE),
-    DEFINEREG2(DSPASTRIDE, igdng_debug_dspstride),
-    DEFINEREG(DSPASURF),
-    DEFINEREG2(DSPATILEOFF, i830_debug_xy),
-
-    DEFINEREG2(PIPEBCONF, i830_debug_pipeconf),
-
-    DEFINEREG2(HTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank),
-    DEFINEREG2(VTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank),
-    DEFINEREG(VSYNCSHIFT_B),
-
-    DEFINEREG2(DSPBCNTR, i830_debug_dspcntr),
-    DEFINEREG(DSPBBASE),
-    DEFINEREG2(DSPBSTRIDE, igdng_debug_dspstride),
-    DEFINEREG(DSPBSURF),
-    DEFINEREG2(DSPBTILEOFF, i830_debug_xy),
-
-    DEFINEREG2(PIPEBSRC, i830_debug_yxminus1),
-
-    DEFINEREG2(PIPEB_DATA_M1, igdng_debug_m_tu),
-    DEFINEREG2(PIPEB_DATA_N1, igdng_debug_n),
-    DEFINEREG2(PIPEB_DATA_M2, igdng_debug_m_tu),
-    DEFINEREG2(PIPEB_DATA_N2, igdng_debug_n),
-
-    DEFINEREG2(PIPEB_LINK_M1, igdng_debug_n),
-    DEFINEREG2(PIPEB_LINK_N1, igdng_debug_n),
-    DEFINEREG2(PIPEB_LINK_M2, igdng_debug_n),
-    DEFINEREG2(PIPEB_LINK_N2, igdng_debug_n),
-
-    DEFINEREG2(PFA_CTL_1, igdng_debug_panel_fitting),
-    DEFINEREG2(PFB_CTL_1, igdng_debug_panel_fitting),
-    DEFINEREG2(PFA_WIN_POS, igdng_debug_pf_win),
-    DEFINEREG2(PFB_WIN_POS, igdng_debug_pf_win),
-    DEFINEREG2(PFA_WIN_SIZE, igdng_debug_pf_win),
-    DEFINEREG2(PFB_WIN_SIZE, igdng_debug_pf_win),
-
-    /* PCH */
-
-    DEFINEREG2(PCH_DREF_CONTROL, igdng_debug_dref_ctl),
-    DEFINEREG2(PCH_RAWCLK_FREQ, igdng_debug_rawclk_freq),
-    DEFINEREG(PCH_DPLL_TMR_CFG),
-    DEFINEREG(PCH_SSC4_PARMS),
-    DEFINEREG(PCH_SSC4_AUX_PARMS),
-
-    DEFINEREG2(PCH_DPLL_A, igdng_debug_pch_dpll),
-    DEFINEREG2(PCH_DPLL_B, igdng_debug_pch_dpll),
-    DEFINEREG2(PCH_FPA0, i830_debug_fp),
-    DEFINEREG2(PCH_FPA1, i830_debug_fp),
-    DEFINEREG2(PCH_FPB0, i830_debug_fp),
-    DEFINEREG2(PCH_FPB1, i830_debug_fp),
-
-    DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal),
-    DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank),
-
-    DEFINEREG2(TRANSA_DATA_M1, igdng_debug_m_tu),
-    DEFINEREG2(TRANSA_DATA_N1, igdng_debug_n),
-    DEFINEREG2(TRANSA_DATA_M2, igdng_debug_m_tu),
-    DEFINEREG2(TRANSA_DATA_N2, igdng_debug_n),
-    DEFINEREG2(TRANSA_DP_LINK_M1, igdng_debug_n),
-    DEFINEREG2(TRANSA_DP_LINK_N1, igdng_debug_n),
-    DEFINEREG2(TRANSA_DP_LINK_M2, igdng_debug_n),
-    DEFINEREG2(TRANSA_DP_LINK_N2, igdng_debug_n),
-
-    DEFINEREG2(TRANS_HTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(TRANS_HBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_HSYNC_B, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_VTOTAL_B, i830_debug_hvtotal),
-    DEFINEREG2(TRANS_VBLANK_B, i830_debug_hvsyncblank),
-    DEFINEREG2(TRANS_VSYNC_B, i830_debug_hvsyncblank),
-
-    DEFINEREG2(TRANSB_DATA_M1, igdng_debug_m_tu),
-    DEFINEREG2(TRANSB_DATA_N1, igdng_debug_n),
-    DEFINEREG2(TRANSB_DATA_M2, igdng_debug_m_tu),
-    DEFINEREG2(TRANSB_DATA_N2, igdng_debug_n),
-    DEFINEREG2(TRANSB_DP_LINK_M1, igdng_debug_n),
-    DEFINEREG2(TRANSB_DP_LINK_N1, igdng_debug_n),
-    DEFINEREG2(TRANSB_DP_LINK_M2, igdng_debug_n),
-    DEFINEREG2(TRANSB_DP_LINK_N2, igdng_debug_n),
-
-    DEFINEREG2(TRANSACONF, igdng_debug_transconf),
-    DEFINEREG2(TRANSBCONF, igdng_debug_transconf),
-
-    DEFINEREG2(FDI_TXA_CTL, igdng_debug_fdi_tx_ctl),
-    DEFINEREG2(FDI_TXB_CTL, igdng_debug_fdi_tx_ctl),
-    DEFINEREG2(FDI_RXA_CTL, igdng_debug_fdi_rx_ctl),
-    DEFINEREG2(FDI_RXB_CTL, igdng_debug_fdi_rx_ctl),
-
-    DEFINEREG2(FDI_RXA_MISC, igdng_debug_fdi_rx_misc),
-    DEFINEREG2(FDI_RXB_MISC, igdng_debug_fdi_rx_misc),
-    DEFINEREG(FDI_RXA_TUSIZE1),
-    DEFINEREG(FDI_RXA_TUSIZE2),
-    DEFINEREG(FDI_RXB_TUSIZE1),
-    DEFINEREG(FDI_RXB_TUSIZE2),
-
-    DEFINEREG(FDI_PLL_CTL_1),
-    DEFINEREG(FDI_PLL_CTL_2),
-
-    DEFINEREG(FDI_RXA_IIR),
-    DEFINEREG(FDI_RXA_IMR),
-    DEFINEREG(FDI_RXB_IIR),
-    DEFINEREG(FDI_RXB_IMR),
-
-    DEFINEREG2(PCH_ADPA, i830_debug_adpa),
-    DEFINEREG(HDMIB),
-    DEFINEREG(HDMIC),
-    DEFINEREG(HDMID),
-    DEFINEREG2(PCH_LVDS, i830_debug_lvds),
+	DEFINEREG2(CPU_VGACNTRL, i830_debug_vgacntrl),
+	DEFINEREG(DIGITAL_PORT_HOTPLUG_CNTRL),
+
+	DEFINEREG2(RR_HW_CTL, igdng_debug_rr_hw_ctl),
+
+	DEFINEREG(FDI_PLL_BIOS_0),
+	DEFINEREG(FDI_PLL_BIOS_1),
+	DEFINEREG(FDI_PLL_BIOS_2),
+
+	DEFINEREG(DISPLAY_PORT_PLL_BIOS_0),
+	DEFINEREG(DISPLAY_PORT_PLL_BIOS_1),
+	DEFINEREG(DISPLAY_PORT_PLL_BIOS_2),
+
+	DEFINEREG(FDI_PLL_FREQ_CTL),
+
+	DEFINEREG2(PIPEACONF, i830_debug_pipeconf),
+
+	DEFINEREG2(HTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(HBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(HSYNC_A, i830_debug_hvsyncblank),
+	DEFINEREG2(VTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(VBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(VSYNC_A, i830_debug_hvsyncblank),
+	DEFINEREG(VSYNCSHIFT_A),
+	DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
+
+	DEFINEREG2(PIPEA_DATA_M1, igdng_debug_m_tu),
+	DEFINEREG2(PIPEA_DATA_N1, igdng_debug_n),
+	DEFINEREG2(PIPEA_DATA_M2, igdng_debug_m_tu),
+	DEFINEREG2(PIPEA_DATA_N2, igdng_debug_n),
+
+	DEFINEREG2(PIPEA_LINK_M1, igdng_debug_n),
+	DEFINEREG2(PIPEA_LINK_N1, igdng_debug_n),
+	DEFINEREG2(PIPEA_LINK_M2, igdng_debug_n),
+	DEFINEREG2(PIPEA_LINK_N2, igdng_debug_n),
+
+	DEFINEREG2(DSPACNTR, i830_debug_dspcntr),
+	DEFINEREG(DSPABASE),
+	DEFINEREG2(DSPASTRIDE, igdng_debug_dspstride),
+	DEFINEREG(DSPASURF),
+	DEFINEREG2(DSPATILEOFF, i830_debug_xy),
+
+	DEFINEREG2(PIPEBCONF, i830_debug_pipeconf),
+
+	DEFINEREG2(HTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(HBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(HSYNC_B, i830_debug_hvsyncblank),
+	DEFINEREG2(VTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(VBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(VSYNC_B, i830_debug_hvsyncblank),
+	DEFINEREG(VSYNCSHIFT_B),
+
+	DEFINEREG2(DSPBCNTR, i830_debug_dspcntr),
+	DEFINEREG(DSPBBASE),
+	DEFINEREG2(DSPBSTRIDE, igdng_debug_dspstride),
+	DEFINEREG(DSPBSURF),
+	DEFINEREG2(DSPBTILEOFF, i830_debug_xy),
+
+	DEFINEREG2(PIPEBSRC, i830_debug_yxminus1),
+
+	DEFINEREG2(PIPEB_DATA_M1, igdng_debug_m_tu),
+	DEFINEREG2(PIPEB_DATA_N1, igdng_debug_n),
+	DEFINEREG2(PIPEB_DATA_M2, igdng_debug_m_tu),
+	DEFINEREG2(PIPEB_DATA_N2, igdng_debug_n),
+
+	DEFINEREG2(PIPEB_LINK_M1, igdng_debug_n),
+	DEFINEREG2(PIPEB_LINK_N1, igdng_debug_n),
+	DEFINEREG2(PIPEB_LINK_M2, igdng_debug_n),
+	DEFINEREG2(PIPEB_LINK_N2, igdng_debug_n),
+
+	DEFINEREG2(PFA_CTL_1, igdng_debug_panel_fitting),
+	DEFINEREG2(PFB_CTL_1, igdng_debug_panel_fitting),
+	DEFINEREG2(PFA_WIN_POS, igdng_debug_pf_win),
+	DEFINEREG2(PFB_WIN_POS, igdng_debug_pf_win),
+	DEFINEREG2(PFA_WIN_SIZE, igdng_debug_pf_win),
+	DEFINEREG2(PFB_WIN_SIZE, igdng_debug_pf_win),
+
+	/* PCH */
+
+	DEFINEREG2(PCH_DREF_CONTROL, igdng_debug_dref_ctl),
+	DEFINEREG2(PCH_RAWCLK_FREQ, igdng_debug_rawclk_freq),
+	DEFINEREG(PCH_DPLL_TMR_CFG),
+	DEFINEREG(PCH_SSC4_PARMS),
+	DEFINEREG(PCH_SSC4_AUX_PARMS),
+
+	DEFINEREG2(PCH_DPLL_A, igdng_debug_pch_dpll),
+	DEFINEREG2(PCH_DPLL_B, igdng_debug_pch_dpll),
+	DEFINEREG2(PCH_FPA0, i830_debug_fp),
+	DEFINEREG2(PCH_FPA1, i830_debug_fp),
+	DEFINEREG2(PCH_FPB0, i830_debug_fp),
+	DEFINEREG2(PCH_FPB1, i830_debug_fp),
+
+	DEFINEREG2(TRANS_HTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(TRANS_HBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_HSYNC_A, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal),
+	DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank),
+
+	DEFINEREG2(TRANSA_DATA_M1, igdng_debug_m_tu),
+	DEFINEREG2(TRANSA_DATA_N1, igdng_debug_n),
+	DEFINEREG2(TRANSA_DATA_M2, igdng_debug_m_tu),
+	DEFINEREG2(TRANSA_DATA_N2, igdng_debug_n),
+	DEFINEREG2(TRANSA_DP_LINK_M1, igdng_debug_n),
+	DEFINEREG2(TRANSA_DP_LINK_N1, igdng_debug_n),
+	DEFINEREG2(TRANSA_DP_LINK_M2, igdng_debug_n),
+	DEFINEREG2(TRANSA_DP_LINK_N2, igdng_debug_n),
+
+	DEFINEREG2(TRANS_HTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(TRANS_HBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_HSYNC_B, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_VTOTAL_B, i830_debug_hvtotal),
+	DEFINEREG2(TRANS_VBLANK_B, i830_debug_hvsyncblank),
+	DEFINEREG2(TRANS_VSYNC_B, i830_debug_hvsyncblank),
+
+	DEFINEREG2(TRANSB_DATA_M1, igdng_debug_m_tu),
+	DEFINEREG2(TRANSB_DATA_N1, igdng_debug_n),
+	DEFINEREG2(TRANSB_DATA_M2, igdng_debug_m_tu),
+	DEFINEREG2(TRANSB_DATA_N2, igdng_debug_n),
+	DEFINEREG2(TRANSB_DP_LINK_M1, igdng_debug_n),
+	DEFINEREG2(TRANSB_DP_LINK_N1, igdng_debug_n),
+	DEFINEREG2(TRANSB_DP_LINK_M2, igdng_debug_n),
+	DEFINEREG2(TRANSB_DP_LINK_N2, igdng_debug_n),
+
+	DEFINEREG2(TRANSACONF, igdng_debug_transconf),
+	DEFINEREG2(TRANSBCONF, igdng_debug_transconf),
+
+	DEFINEREG2(FDI_TXA_CTL, igdng_debug_fdi_tx_ctl),
+	DEFINEREG2(FDI_TXB_CTL, igdng_debug_fdi_tx_ctl),
+	DEFINEREG2(FDI_RXA_CTL, igdng_debug_fdi_rx_ctl),
+	DEFINEREG2(FDI_RXB_CTL, igdng_debug_fdi_rx_ctl),
+
+	DEFINEREG2(FDI_RXA_MISC, igdng_debug_fdi_rx_misc),
+	DEFINEREG2(FDI_RXB_MISC, igdng_debug_fdi_rx_misc),
+	DEFINEREG(FDI_RXA_TUSIZE1),
+	DEFINEREG(FDI_RXA_TUSIZE2),
+	DEFINEREG(FDI_RXB_TUSIZE1),
+	DEFINEREG(FDI_RXB_TUSIZE2),
+
+	DEFINEREG(FDI_PLL_CTL_1),
+	DEFINEREG(FDI_PLL_CTL_2),
+
+	DEFINEREG(FDI_RXA_IIR),
+	DEFINEREG(FDI_RXA_IMR),
+	DEFINEREG(FDI_RXB_IIR),
+	DEFINEREG(FDI_RXB_IMR),
+
+	DEFINEREG2(PCH_ADPA, i830_debug_adpa),
+	DEFINEREG(HDMIB),
+	DEFINEREG(HDMIC),
+	DEFINEREG(HDMID),
+	DEFINEREG2(PCH_LVDS, i830_debug_lvds),
 };
+
 #define NUM_IGDNG_SNAPSHOTREGS (sizeof(igdng_snapshot) / sizeof(igdng_snapshot[0]))
 #undef DEFINEREG
 
 #ifndef REG_DUMPER
 void i830TakeRegSnapshot(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
 
-    if (IS_IGDNG(pI830)) {
-	for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
-	    igdng_snapshot[i].val = INREG(igdng_snapshot[i].reg);
-	}
-    } else {
-	for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
-	    i830_snapshot[i].val = INREG(i830_snapshot[i].reg);
+	if (IS_IGDNG(pI830)) {
+		for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
+			igdng_snapshot[i].val = INREG(igdng_snapshot[i].reg);
+		}
+	} else {
+		for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
+			i830_snapshot[i].val = INREG(i830_snapshot[i].reg);
+		}
 	}
-    }
 }
 
 static void IGDNGCompareRegsToSnapshot(ScrnInfoPtr pScrn, char *where)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
-
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	       "Comparing regs from server start up to %s\n", where);
-    for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
-	uint32_t val = INREG(igdng_snapshot[i].reg);
-	if (igdng_snapshot[i].val == val)
-	    continue;
-
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "Register 0x%x (%s) changed from 0x%08x to 0x%08x\n",
-		   igdng_snapshot[i].reg, igdng_snapshot[i].name,
-		   (int)igdng_snapshot[i].val, (int)val);
-
-	if (igdng_snapshot[i].debug_output != NULL) {
-	    char *before, *after;
-
-	    before = igdng_snapshot[i].debug_output(pI830,
-						   igdng_snapshot[i].reg,
-						   igdng_snapshot[i].val);
-	    after = igdng_snapshot[i].debug_output(pI830,
-						  igdng_snapshot[i].reg,
-						  val);
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		       "%s before: %s\n", igdng_snapshot[i].name, before);
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		       "%s after: %s\n", igdng_snapshot[i].name, after);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
 
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "Comparing regs from server start up to %s\n", where);
+	for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
+		uint32_t val = INREG(igdng_snapshot[i].reg);
+		if (igdng_snapshot[i].val == val)
+			continue;
+
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "Register 0x%x (%s) changed from 0x%08x to 0x%08x\n",
+			   igdng_snapshot[i].reg, igdng_snapshot[i].name,
+			   (int)igdng_snapshot[i].val, (int)val);
+
+		if (igdng_snapshot[i].debug_output != NULL) {
+			char *before, *after;
+
+			before = igdng_snapshot[i].debug_output(pI830,
+								igdng_snapshot
+								[i].reg,
+								igdng_snapshot
+								[i].val);
+			after =
+			    igdng_snapshot[i].debug_output(pI830,
+							   igdng_snapshot[i].
+							   reg, val);
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "%s before: %s\n", igdng_snapshot[i].name,
+				   before);
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "%s after: %s\n", igdng_snapshot[i].name,
+				   after);
+
+		}
 	}
-    }
 }
 
 void i830CompareRegsToSnapshot(ScrnInfoPtr pScrn, char *where)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
-
-    if (IS_IGDNG(pI830)) {
-	IGDNGCompareRegsToSnapshot(pScrn, where);
-	return;
-    }
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	       "Comparing regs from server start up to %s\n", where);
-    for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
-	uint32_t val = INREG(i830_snapshot[i].reg);
-	if (i830_snapshot[i].val == val)
-	    continue;
-
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "Register 0x%x (%s) changed from 0x%08x to 0x%08x\n",
-		   i830_snapshot[i].reg, i830_snapshot[i].name,
-		   (int)i830_snapshot[i].val, (int)val);
-
-	if (i830_snapshot[i].debug_output != NULL) {
-	    char *before, *after;
-
-	    before = i830_snapshot[i].debug_output(pI830,
-						   i830_snapshot[i].reg,
-						   i830_snapshot[i].val);
-	    after = i830_snapshot[i].debug_output(pI830,
-						  i830_snapshot[i].reg,
-						  val);
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		       "%s before: %s\n", i830_snapshot[i].name, before);
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		       "%s after: %s\n", i830_snapshot[i].name, after);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+
+	if (IS_IGDNG(pI830)) {
+		IGDNGCompareRegsToSnapshot(pScrn, where);
+		return;
+	}
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "Comparing regs from server start up to %s\n", where);
+	for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
+		uint32_t val = INREG(i830_snapshot[i].reg);
+		if (i830_snapshot[i].val == val)
+			continue;
+
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "Register 0x%x (%s) changed from 0x%08x to 0x%08x\n",
+			   i830_snapshot[i].reg, i830_snapshot[i].name,
+			   (int)i830_snapshot[i].val, (int)val);
+
+		if (i830_snapshot[i].debug_output != NULL) {
+			char *before, *after;
+
+			before = i830_snapshot[i].debug_output(pI830,
+							       i830_snapshot[i].
+							       reg,
+							       i830_snapshot[i].
+							       val);
+			after =
+			    i830_snapshot[i].debug_output(pI830,
+							  i830_snapshot[i].reg,
+							  val);
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "%s before: %s\n", i830_snapshot[i].name,
+				   before);
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "%s after: %s\n", i830_snapshot[i].name,
+				   after);
 
+		}
 	}
-    }
 }
 #endif /* !REG_DUMPER */
 
 #if 0
-static void i830DumpIndexed (ScrnInfoPtr pScrn, char *name, int id, int val, int min, int max)
+static void i830DumpIndexed(ScrnInfoPtr pScrn, char *name, int id, int val,
+			    int min, int max)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int	i;
-
-    for (i = min; i <= max; i++) {
-	OUTREG8 (id, i);
-	xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%18.18s%02x: 0x%02x\n",
-		    name, i, INREG8(val));
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+
+	for (i = min; i <= max; i++) {
+		OUTREG8(id, i);
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%18.18s%02x: 0x%02x\n",
+			   name, i, INREG8(val));
+	}
 }
 
 static void i830DumpAR(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
-    uint16_t st01;
-    unsigned char orig_arx, msr;
-
-    msr = INREG8(0x3cc);
-    if (msr & 1)
-	st01 = 0x3da;
-    else
-	st01 = 0x3ba;
-
-    INREG8(st01); /* make sure index/write register is in index mode */
-    orig_arx = INREG8(0x3c0);
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%19.19sX: 0x%02x\n",
-	       "AR", orig_arx);
-    
-    for (i = 0; i <= 0x14; i++) {
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+	uint16_t st01;
+	unsigned char orig_arx, msr;
+
+	msr = INREG8(0x3cc);
+	if (msr & 1)
+		st01 = 0x3da;
+	else
+		st01 = 0x3ba;
+
+	INREG8(st01);		/* make sure index/write register is in index mode */
+	orig_arx = INREG8(0x3c0);
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%19.19sX: 0x%02x\n",
+		   "AR", orig_arx);
+
+	for (i = 0; i <= 0x14; i++) {
+		INREG8(st01);
+		OUTREG8(0x3c0, i);
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%18.18s%02x: 0x%02x\n",
+			   "AR", i, INREG8(0x3c1));
+	}
 	INREG8(st01);
-	OUTREG8(0x3c0, i);
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%18.18s%02x: 0x%02x\n",
-		   "AR", i, INREG8(0x3c1));
-    }
-    INREG8(st01);
-    OUTREG8(0x3c0, orig_arx);
-    INREG8(st01); /* switch back to index mode */
+	OUTREG8(0x3c0, orig_arx);
+	INREG8(st01);		/* switch back to index mode */
 }
 #endif
 
-static void IGDNGDumpRegs (ScrnInfoPtr pScrn)
+static void IGDNGDumpRegs(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
-
-    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "DumpRegsBegin\n");
-    for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
-	uint32_t val = INREG(igdng_snapshot[i].reg);
-
-	if (igdng_snapshot[i].debug_output != NULL) {
-	    char *debug = igdng_snapshot[i].debug_output(pI830,
-							igdng_snapshot[i].reg,
-							val);
-	    if (debug != NULL) {
-		xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%08x (%s)\n",
-			    igdng_snapshot[i].name, (unsigned int)val, debug);
-		xfree(debug);
-	    }
-	} else {
-	    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%08x\n",
-			igdng_snapshot[i].name, (unsigned int)val);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DumpRegsBegin\n");
+	for (i = 0; i < NUM_IGDNG_SNAPSHOTREGS; i++) {
+		uint32_t val = INREG(igdng_snapshot[i].reg);
+
+		if (igdng_snapshot[i].debug_output != NULL) {
+			char *debug = igdng_snapshot[i].debug_output(pI830,
+								     igdng_snapshot
+								     [i].reg,
+								     val);
+			if (debug != NULL) {
+				xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+					   "%20.20s: 0x%08x (%s)\n",
+					   igdng_snapshot[i].name,
+					   (unsigned int)val, debug);
+				xfree(debug);
+			}
+		} else {
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "%20.20s: 0x%08x\n", igdng_snapshot[i].name,
+				   (unsigned int)val);
+		}
 	}
-    }
 }
 
-void i830DumpRegs (ScrnInfoPtr pScrn)
+void i830DumpRegs(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int i;
-    int	fp, dpll;
-    int pipe;
-    int	n, m1, m2, m, p1, p2;
-    int ref;
-    int	dot;
-    int phase;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+	int fp, dpll;
+	int pipe;
+	int n, m1, m2, m, p1, p2;
+	int ref;
+	int dot;
+	int phase;
 #if 0
-    int msr;
-    int crt;
+	int msr;
+	int crt;
 #endif
 
-    if (IS_IGDNG(pI830)) {
-	IGDNGDumpRegs(pScrn);
-	return;
-    }
-    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "DumpRegsBegin\n");
-    for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
-	uint32_t val = INREG(i830_snapshot[i].reg);
-
-	if (i830_snapshot[i].debug_output != NULL) {
-	    char *debug = i830_snapshot[i].debug_output(pI830,
-							i830_snapshot[i].reg,
-							val);
-	    if (debug != NULL) {
-		xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%08x (%s)\n",
-			    i830_snapshot[i].name, (unsigned int)val, debug);
-		xfree(debug);
-	    }
-	} else {
-	    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%08x\n",
-			i830_snapshot[i].name, (unsigned int)val);
+	if (IS_IGDNG(pI830)) {
+		IGDNGDumpRegs(pScrn);
+		return;
+	}
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DumpRegsBegin\n");
+	for (i = 0; i < NUM_I830_SNAPSHOTREGS; i++) {
+		uint32_t val = INREG(i830_snapshot[i].reg);
+
+		if (i830_snapshot[i].debug_output != NULL) {
+			char *debug = i830_snapshot[i].debug_output(pI830,
+								    i830_snapshot
+								    [i].reg,
+								    val);
+			if (debug != NULL) {
+				xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+					   "%20.20s: 0x%08x (%s)\n",
+					   i830_snapshot[i].name,
+					   (unsigned int)val, debug);
+				xfree(debug);
+			}
+		} else {
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "%20.20s: 0x%08x\n", i830_snapshot[i].name,
+				   (unsigned int)val);
+		}
 	}
-    }
 #if 0
-    i830DumpIndexed (pScrn, "SR", 0x3c4, 0x3c5, 0, 7);
-    msr = INREG8(0x3cc);
-    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "%20.20s: 0x%02x\n",
-		    "MSR", (unsigned int) msr);
-
-    i830DumpAR (pScrn);
-    if (msr & 1)
-	crt = 0x3d0;
-    else
-	crt = 0x3b0;
-    i830DumpIndexed (pScrn, "CR", crt + 4, crt + 5, 0, 0x24);
+	i830DumpIndexed(pScrn, "SR", 0x3c4, 0x3c5, 0, 7);
+	msr = INREG8(0x3cc);
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%20.20s: 0x%02x\n",
+		   "MSR", (unsigned int)msr);
+
+	i830DumpAR(pScrn);
+	if (msr & 1)
+		crt = 0x3d0;
+	else
+		crt = 0x3b0;
+	i830DumpIndexed(pScrn, "CR", crt + 4, crt + 5, 0, 0x24);
 #endif
-    for (pipe = 0; pipe <= 1; pipe++)
-    {
-	fp = INREG(pipe == 0 ? FPA0 : FPB0);
-	dpll = INREG(pipe == 0 ? DPLL_A : DPLL_B);
-	if (IS_I9XX(pI830)) 
-	{
-	    uint32_t lvds = INREG(LVDS);
-	    if ((lvds & LVDS_PORT_EN) &&
-		(lvds & LVDS_PIPEB_SELECT) == (pipe << 30))
-	    {
-		if ((lvds & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
-		    p2 = 7;
-		else
-		    p2 = 14;
-	    }
-	    else
-	    {
-		switch ((dpll >> 24) & 0x3) {
+	for (pipe = 0; pipe <= 1; pipe++) {
+		fp = INREG(pipe == 0 ? FPA0 : FPB0);
+		dpll = INREG(pipe == 0 ? DPLL_A : DPLL_B);
+		if (IS_I9XX(pI830)) {
+			uint32_t lvds = INREG(LVDS);
+			if ((lvds & LVDS_PORT_EN) &&
+			    (lvds & LVDS_PIPEB_SELECT) == (pipe << 30)) {
+				if ((lvds & LVDS_CLKB_POWER_MASK) ==
+				    LVDS_CLKB_POWER_UP)
+					p2 = 7;
+				else
+					p2 = 14;
+			} else {
+				switch ((dpll >> 24) & 0x3) {
+				case 0:
+					p2 = 10;
+					break;
+				case 1:
+					p2 = 5;
+					break;
+				default:
+					p2 = 1;
+					xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+						   "p2 out of range\n");
+					break;
+				}
+			}
+			if (IS_IGD(pI830))
+				i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT_IGD) &
+				    0x1ff;
+			else
+				i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT) &
+				    0xff;
+			switch (i) {
+			case 1:
+				p1 = 1;
+				break;
+			case 2:
+				p1 = 2;
+				break;
+			case 4:
+				p1 = 3;
+				break;
+			case 8:
+				p1 = 4;
+				break;
+			case 16:
+				p1 = 5;
+				break;
+			case 32:
+				p1 = 6;
+				break;
+			case 64:
+				p1 = 7;
+				break;
+			case 128:
+				p1 = 8;
+				break;
+			case 256:
+				if (IS_IGD(pI830)) {
+					p1 = 9;
+					break;
+				}	/* fallback */
+			default:
+				p1 = 1;
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "p1 out of range\n");
+				break;
+			}
+
+			switch ((dpll >> 13) & 0x3) {
+			case 0:
+				ref = 96000;
+				break;
+			case 3:
+				ref = 100000;
+				break;
+			default:
+				ref = 0;
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "ref out of range\n");
+				break;
+			}
+		} else {
+			uint32_t lvds = INREG(LVDS);
+			if (IS_I85X(pI830) &&
+			    (lvds & LVDS_PORT_EN) &&
+			    (lvds & LVDS_PIPEB_SELECT) == (pipe << 30)) {
+				if ((lvds & LVDS_CLKB_POWER_MASK) ==
+				    LVDS_CLKB_POWER_UP)
+					p2 = 7;
+				else
+					p2 = 14;
+				switch ((dpll >> 16) & 0x3f) {
+				case 0x01:
+					p1 = 1;
+					break;
+				case 0x02:
+					p1 = 2;
+					break;
+				case 0x04:
+					p1 = 3;
+					break;
+				case 0x08:
+					p1 = 4;
+					break;
+				case 0x10:
+					p1 = 5;
+					break;
+				case 0x20:
+					p1 = 6;
+					break;
+				default:
+					p1 = 1;
+					xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+						   "LVDS P1 0x%x invalid encoding\n",
+						   (dpll >> 16) & 0x3f);
+					break;
+				}
+			} else {
+				if (dpll & (1 << 23))
+					p2 = 4;
+				else
+					p2 = 2;
+				if (dpll & PLL_P1_DIVIDE_BY_TWO)
+					p1 = 2;
+				else
+					p1 = ((dpll >> 16) & 0x3f) + 2;
+			}
+
+			switch ((dpll >> 13) & 0x3) {
+			case 0:
+				ref = 48000;
+				break;
+			case 3:
+				ref = 66000;
+				break;
+			default:
+				ref = 0;
+				xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+					   "ref out of range\n");
+				break;
+			}
+		}
+		if (IS_I965G(pI830)) {
+			phase = (dpll >> 9) & 0xf;
+			switch (phase) {
+			case 6:
+				break;
+			default:
+				xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+					   "SDVO phase shift %d out of range -- probobly not "
+					   "an issue.\n", phase);
+				break;
+			}
+		}
+		switch ((dpll >> 8) & 1) {
 		case 0:
-		    p2 = 10;
-		    break;
-		case 1:
-		    p2 = 5;
-		    break;
+			break;
 		default:
-		    p2 = 1;
-		    xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "p2 out of range\n");
-		    break;
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "fp select out of range\n");
+			break;
 		}
-	    }
-	    if (IS_IGD(pI830))
-		i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT_IGD) & 0x1ff;
-	    else
-		i = (dpll >> DPLL_FPA01_P1_POST_DIV_SHIFT) & 0xff;
-	    switch (i) {
-	    case 1:
-		p1 = 1; break;
-	    case 2:
-		p1 = 2; break;
-	    case 4:
-		p1 = 3; break;
-	    case 8:
-		p1 = 4; break;
-	    case 16:
-		p1 = 5; break;
-	    case 32:
-		p1 = 6; break;
-	    case 64:
-		p1 = 7; break;
-	    case 128:
-		p1 = 8; break;
-            case 256:
+		m1 = ((fp >> 8) & 0x3f);
 		if (IS_IGD(pI830)) {
-		    p1 = 9;
-		    break;
-		} /* fallback */
-	    default:
-		p1 = 1;
-		xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "p1 out of range\n");
-		break;
-	    }
-	    
-	    switch ((dpll >> 13) & 0x3) {
-	    case 0:
-		ref = 96000;
-		break;
-	    case 3:
-		ref = 100000;
-		break;
-	    default:
-		ref = 0;
-		xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "ref out of range\n");
-		break;
-	    }
-	}
-	else
-	{
-	    uint32_t lvds = INREG(LVDS);
-	    if (IS_I85X (pI830) && 
-		(lvds & LVDS_PORT_EN) &&
-		(lvds & LVDS_PIPEB_SELECT) == (pipe << 30))
-	    {
-		if ((lvds & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP)
-		    p2 = 7;
-		else
-		    p2 = 14;
-		switch ((dpll >> 16) & 0x3f) {
-		case 0x01:  p1 = 1; break;
-		case 0x02:  p1 = 2; break;
-		case 0x04:  p1 = 3; break;
-		case 0x08:  p1 = 4; break;
-		case 0x10:  p1 = 5; break;
-		case 0x20:  p1 = 6; break;
-		default:
-		    p1 = 1;
-		    xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "LVDS P1 0x%x invalid encoding\n",
-				(dpll >> 16) & 0x3f);
-		    break;
+			n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
+			m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT;
+			m = m2 + 2;
+			dot = (ref * m) / n / (p1 * p2);
+		} else {
+			n = ((fp >> 16) & 0x3f);
+			m2 = ((fp >> 0) & 0x3f);
+			m = 5 * (m1 + 2) + (m2 + 2);
+			dot =
+			    (ref * (5 * (m1 + 2) + (m2 + 2)) / (n + 2)) / (p1 *
+									   p2);
 		}
-	    }
-	    else
-	    {
-		if (dpll & (1 << 23))
-		    p2 = 4;
-		else
-		    p2 = 2;
-		if (dpll & PLL_P1_DIVIDE_BY_TWO)
-		    p1 = 2;
-		else
-		    p1 = ((dpll >> 16) & 0x3f) + 2;
-	    }
 
-	    switch ((dpll >> 13) & 0x3) {
-	    case 0:
-		ref = 48000;
-		break;
-	    case 3:
-		ref = 66000;
-		break;
-	    default:
-		ref = 0;
-		xf86DrvMsg (pScrn->scrnIndex, X_WARNING, "ref out of range\n");
-		break;
-	    }
-	}
-	if (IS_I965G(pI830)) {
-	    phase = (dpll >> 9) & 0xf;
-	    switch (phase) {
-	    case 6:
-		break;
-	    default:
-		xf86DrvMsg (pScrn->scrnIndex, X_INFO,
-			    "SDVO phase shift %d out of range -- probobly not "
-			    "an issue.\n", phase);
-		break;
-	    }
-	}
-	switch ((dpll >> 8) & 1) {
-	case 0:
-	    break;
-	default:
-	    xf86DrvMsg (pScrn->scrnIndex, X_WARNING,
-			"fp select out of range\n");
-	    break;
-	}
-	m1 = ((fp >> 8) & 0x3f);
-	if (IS_IGD(pI830)) {
-	    n = ffs((fp & FP_N_IGD_DIV_MASK) >> FP_N_DIV_SHIFT) - 1;
-	    m2 = (fp & FP_M2_IGD_DIV_MASK) >> FP_M2_DIV_SHIFT;
-	    m = m2 + 2;
-	    dot = (ref * m) / n / (p1 * p2);
-	} else {
-	    n = ((fp >> 16) & 0x3f);
-	    m2 = ((fp >> 0) & 0x3f);
-	    m = 5 * (m1 + 2) + (m2 + 2);
-	    dot = (ref * (5 * (m1 + 2) + (m2 + 2)) / (n + 2)) / (p1 * p2);
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "pipe %s dot %d n %d m1 %d m2 %d p1 %d p2 %d\n",
+			   pipe == 0 ? "A" : "B", dot, n, m1, m2, p1, p2);
 	}
-
-	xf86DrvMsg (pScrn->scrnIndex, X_INFO, "pipe %s dot %d n %d m1 %d m2 %d p1 %d p2 %d\n",
-		    pipe == 0 ? "A" : "B", dot, n, m1, m2, p1, p2);
-    }
-    xf86DrvMsg (pScrn->scrnIndex, X_INFO, "DumpRegsEnd\n");
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "DumpRegsEnd\n");
 }
diff --git a/src/i830_debug.h b/src/i830_debug.h
index 6ccd29a2..73d6ea31 100644
--- a/src/i830_debug.h
+++ b/src/i830_debug.h
@@ -27,5 +27,4 @@
 
 void i830TakeRegSnapshot(ScrnInfoPtr pScrn);
 void i830CompareRegsToSnapshot(ScrnInfoPtr pScrn, char *where);
-void i830DumpRegs (ScrnInfoPtr pScrn);
-
+void i830DumpRegs(ScrnInfoPtr pScrn);
diff --git a/src/i830_display.h b/src/i830_display.h
index dbbed9dc..d9b56e9c 100644
--- a/src/i830_display.h
+++ b/src/i830_display.h
@@ -33,10 +33,10 @@ void i830WaitForVblank(ScrnInfoPtr pScrn);
 void i830DescribeOutputConfiguration(ScrnInfoPtr pScrn);
 void i830_set_new_crtc_bo(ScrnInfoPtr pScrn);
 
-xf86CrtcPtr i830GetLoadDetectPipe(xf86OutputPtr output, DisplayModePtr mode, int *dpms_mode);
+xf86CrtcPtr i830GetLoadDetectPipe(xf86OutputPtr output, DisplayModePtr mode,
+				  int *dpms_mode);
 void i830ReleaseLoadDetectPipe(xf86OutputPtr output, int dpms_mode);
 void i830_crtc_init(ScrnInfoPtr pScrn, int pipe);
 DisplayModePtr i830_crtc_mode_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc);
-void i830_output_prepare (xf86OutputPtr output);
-void i830_output_commit (xf86OutputPtr output);
-
+void i830_output_prepare(xf86OutputPtr output);
+void i830_output_commit(xf86OutputPtr output);
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 1cf90d5d..b9d82b8c 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -74,88 +74,87 @@ extern XF86ModuleData dri2ModuleData;
 #endif
 
 typedef struct {
-    PixmapPtr pPixmap;
-    unsigned int attachment;
+	PixmapPtr pPixmap;
+	unsigned int attachment;
 } I830DRI2BufferPrivateRec, *I830DRI2BufferPrivatePtr;
 
 #ifndef USE_DRI2_1_1_0
 static DRI2BufferPtr
 I830DRI2CreateBuffers(DrawablePtr pDraw, unsigned int *attachments, int count)
 {
-    ScreenPtr pScreen = pDraw->pScreen;
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    DRI2BufferPtr buffers;
-    dri_bo *bo;
-    int i;
-    I830DRI2BufferPrivatePtr privates;
-    PixmapPtr pPixmap, pDepthPixmap;
-
-    buffers = xcalloc(count, sizeof *buffers);
-    if (buffers == NULL)
-	return NULL;
-    privates = xcalloc(count, sizeof *privates);
-    if (privates == NULL) {
-	xfree(buffers);
-	return NULL;
-    }
-
-    pDepthPixmap = NULL;
-    for (i = 0; i < count; i++) {
-	if (attachments[i] == DRI2BufferFrontLeft) {
-	    pPixmap = get_drawable_pixmap(pDraw);
-	    pPixmap->refcnt++;
-	} else if (attachments[i] == DRI2BufferStencil && pDepthPixmap) {
-	    pPixmap = pDepthPixmap;
-	    pPixmap->refcnt++;
-	} else {
-	    unsigned int hint = 0;
-
-	    switch (attachments[i]) {
-	    case DRI2BufferDepth:
-		if (SUPPORTS_YTILING(pI830))
-		    hint = INTEL_CREATE_PIXMAP_TILING_Y;
-		else
-		    hint = INTEL_CREATE_PIXMAP_TILING_X;
-		break;
-	    case DRI2BufferFakeFrontLeft:
-	    case DRI2BufferFakeFrontRight:
-	    case DRI2BufferBackLeft:
-	    case DRI2BufferBackRight:
-		    hint = INTEL_CREATE_PIXMAP_TILING_X;
-		break;
-	    }
-
-	    if (!pI830->tiling)
-		hint = 0;
-
-	    pPixmap = (*pScreen->CreatePixmap)(pScreen,
-					       pDraw->width,
-					       pDraw->height,
-					       pDraw->depth,
-					       hint);
-
+	ScreenPtr pScreen = pDraw->pScreen;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	DRI2BufferPtr buffers;
+	dri_bo *bo;
+	int i;
+	I830DRI2BufferPrivatePtr privates;
+	PixmapPtr pPixmap, pDepthPixmap;
+
+	buffers = xcalloc(count, sizeof *buffers);
+	if (buffers == NULL)
+		return NULL;
+	privates = xcalloc(count, sizeof *privates);
+	if (privates == NULL) {
+		xfree(buffers);
+		return NULL;
 	}
 
-	if (attachments[i] == DRI2BufferDepth)
-	    pDepthPixmap = pPixmap;
-
-	buffers[i].attachment = attachments[i];
-	buffers[i].pitch = pPixmap->devKind;
-	buffers[i].cpp = pPixmap->drawable.bitsPerPixel / 8;
-	buffers[i].driverPrivate = &privates[i];
-	buffers[i].flags = 0; /* not tiled */
-	privates[i].pPixmap = pPixmap;
-	privates[i].attachment = attachments[i];
+	pDepthPixmap = NULL;
+	for (i = 0; i < count; i++) {
+		if (attachments[i] == DRI2BufferFrontLeft) {
+			pPixmap = get_drawable_pixmap(pDraw);
+			pPixmap->refcnt++;
+		} else if (attachments[i] == DRI2BufferStencil && pDepthPixmap) {
+			pPixmap = pDepthPixmap;
+			pPixmap->refcnt++;
+		} else {
+			unsigned int hint = 0;
+
+			switch (attachments[i]) {
+			case DRI2BufferDepth:
+				if (SUPPORTS_YTILING(pI830))
+					hint = INTEL_CREATE_PIXMAP_TILING_Y;
+				else
+					hint = INTEL_CREATE_PIXMAP_TILING_X;
+				break;
+			case DRI2BufferFakeFrontLeft:
+			case DRI2BufferFakeFrontRight:
+			case DRI2BufferBackLeft:
+			case DRI2BufferBackRight:
+				hint = INTEL_CREATE_PIXMAP_TILING_X;
+				break;
+			}
+
+			if (!pI830->tiling)
+				hint = 0;
+
+			pPixmap = (*pScreen->CreatePixmap) (pScreen,
+							    pDraw->width,
+							    pDraw->height,
+							    pDraw->depth, hint);
+
+		}
+
+		if (attachments[i] == DRI2BufferDepth)
+			pDepthPixmap = pPixmap;
+
+		buffers[i].attachment = attachments[i];
+		buffers[i].pitch = pPixmap->devKind;
+		buffers[i].cpp = pPixmap->drawable.bitsPerPixel / 8;
+		buffers[i].driverPrivate = &privates[i];
+		buffers[i].flags = 0;	/* not tiled */
+		privates[i].pPixmap = pPixmap;
+		privates[i].attachment = attachments[i];
+
+		bo = i830_get_pixmap_bo(pPixmap);
+		if (dri_bo_flink(bo, &buffers[i].name) != 0) {
+			/* failed to name buffer */
+		}
 
-	bo = i830_get_pixmap_bo (pPixmap);
-	if (dri_bo_flink(bo, &buffers[i].name) != 0) {
-	    /* failed to name buffer */
 	}
 
-    }
-
-    return buffers;
+	return buffers;
 }
 
 #else
@@ -164,72 +163,72 @@ static DRI2Buffer2Ptr
 I830DRI2CreateBuffer(DrawablePtr pDraw, unsigned int attachment,
 		     unsigned int format)
 {
-    ScreenPtr pScreen = pDraw->pScreen;
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    DRI2Buffer2Ptr buffer;
-    dri_bo *bo;
-    I830DRI2BufferPrivatePtr privates;
-    PixmapPtr pPixmap;
-
-    buffer = xcalloc(1, sizeof *buffer);
-    if (buffer == NULL)
-	return NULL;
-    privates = xcalloc(1, sizeof *privates);
-    if (privates == NULL) {
-	xfree(buffer);
-	return NULL;
-    }
-
-    if (attachment == DRI2BufferFrontLeft) {
-	pPixmap = get_drawable_pixmap(pDraw);
-	pPixmap->refcnt++;
-    } else {
-	unsigned int hint = 0;
-
-	switch (attachment) {
-	case DRI2BufferDepth:
-	case DRI2BufferDepthStencil:
-	    if (SUPPORTS_YTILING(pI830))
-		hint = INTEL_CREATE_PIXMAP_TILING_Y;
-	    else
-		hint = INTEL_CREATE_PIXMAP_TILING_X;
-	    break;
-	case DRI2BufferFakeFrontLeft:
-	case DRI2BufferFakeFrontRight:
-	case DRI2BufferBackLeft:
-	case DRI2BufferBackRight:
-	    hint = INTEL_CREATE_PIXMAP_TILING_X;
-	    break;
+	ScreenPtr pScreen = pDraw->pScreen;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	DRI2Buffer2Ptr buffer;
+	dri_bo *bo;
+	I830DRI2BufferPrivatePtr privates;
+	PixmapPtr pPixmap;
+
+	buffer = xcalloc(1, sizeof *buffer);
+	if (buffer == NULL)
+		return NULL;
+	privates = xcalloc(1, sizeof *privates);
+	if (privates == NULL) {
+		xfree(buffer);
+		return NULL;
 	}
 
-	if (!pI830->tiling)
-	    hint = 0;
-
-	pPixmap = (*pScreen->CreatePixmap)(pScreen,
-					   pDraw->width,
-					   pDraw->height,
-					   (format != 0)?format:pDraw->depth,
-					   hint);
-
-    }
-
+	if (attachment == DRI2BufferFrontLeft) {
+		pPixmap = get_drawable_pixmap(pDraw);
+		pPixmap->refcnt++;
+	} else {
+		unsigned int hint = 0;
+
+		switch (attachment) {
+		case DRI2BufferDepth:
+		case DRI2BufferDepthStencil:
+			if (SUPPORTS_YTILING(pI830))
+				hint = INTEL_CREATE_PIXMAP_TILING_Y;
+			else
+				hint = INTEL_CREATE_PIXMAP_TILING_X;
+			break;
+		case DRI2BufferFakeFrontLeft:
+		case DRI2BufferFakeFrontRight:
+		case DRI2BufferBackLeft:
+		case DRI2BufferBackRight:
+			hint = INTEL_CREATE_PIXMAP_TILING_X;
+			break;
+		}
+
+		if (!pI830->tiling)
+			hint = 0;
+
+		pPixmap = (*pScreen->CreatePixmap) (pScreen,
+						    pDraw->width,
+						    pDraw->height,
+						    (format !=
+						     0) ? format : pDraw->depth,
+						    hint);
 
-    buffer->attachment = attachment;
-    buffer->pitch = pPixmap->devKind;
-    buffer->cpp = pPixmap->drawable.bitsPerPixel / 8;
-    buffer->driverPrivate = privates;
-    buffer->format = format;
-    buffer->flags = 0; /* not tiled */
-    privates->pPixmap = pPixmap;
-    privates->attachment = attachment;
+	}
 
-    bo = i830_get_pixmap_bo (pPixmap);
-    if (dri_bo_flink(bo, &buffer->name) != 0) {
-	/* failed to name buffer */
-    }
+	buffer->attachment = attachment;
+	buffer->pitch = pPixmap->devKind;
+	buffer->cpp = pPixmap->drawable.bitsPerPixel / 8;
+	buffer->driverPrivate = privates;
+	buffer->format = format;
+	buffer->flags = 0;	/* not tiled */
+	privates->pPixmap = pPixmap;
+	privates->attachment = attachment;
+
+	bo = i830_get_pixmap_bo(pPixmap);
+	if (dri_bo_flink(bo, &buffer->name) != 0) {
+		/* failed to name buffer */
+	}
 
-    return buffer;
+	return buffer;
 }
 
 #endif
@@ -239,37 +238,34 @@ I830DRI2CreateBuffer(DrawablePtr pDraw, unsigned int attachment,
 static void
 I830DRI2DestroyBuffers(DrawablePtr pDraw, DRI2BufferPtr buffers, int count)
 {
-    ScreenPtr pScreen = pDraw->pScreen;
-    I830DRI2BufferPrivatePtr private;
-    int i;
-
-    for (i = 0; i < count; i++)
-    {
-	private = buffers[i].driverPrivate;
-	(*pScreen->DestroyPixmap)(private->pPixmap);
-    }
-
-    if (buffers)
-    {
-	xfree(buffers[0].driverPrivate);
-	xfree(buffers);
-    }
+	ScreenPtr pScreen = pDraw->pScreen;
+	I830DRI2BufferPrivatePtr private;
+	int i;
+
+	for (i = 0; i < count; i++) {
+		private = buffers[i].driverPrivate;
+		(*pScreen->DestroyPixmap) (private->pPixmap);
+	}
+
+	if (buffers) {
+		xfree(buffers[0].driverPrivate);
+		xfree(buffers);
+	}
 }
 
 #else
 
-static void
-I830DRI2DestroyBuffer(DrawablePtr pDraw, DRI2Buffer2Ptr buffer)
+static void I830DRI2DestroyBuffer(DrawablePtr pDraw, DRI2Buffer2Ptr buffer)
 {
-    if (buffer) {
-	I830DRI2BufferPrivatePtr private = buffer->driverPrivate;
-	ScreenPtr pScreen = pDraw->pScreen;
+	if (buffer) {
+		I830DRI2BufferPrivatePtr private = buffer->driverPrivate;
+		ScreenPtr pScreen = pDraw->pScreen;
 
-	(*pScreen->DestroyPixmap)(private->pPixmap);
+		(*pScreen->DestroyPixmap) (private->pPixmap);
 
-	xfree(private);
-	xfree(buffer);
-    }
+		xfree(private);
+		xfree(buffer);
+	}
 }
 
 #endif
@@ -278,164 +274,169 @@ static void
 I830DRI2CopyRegion(DrawablePtr pDraw, RegionPtr pRegion,
 		   DRI2BufferPtr pDstBuffer, DRI2BufferPtr pSrcBuffer)
 {
-    I830DRI2BufferPrivatePtr srcPrivate = pSrcBuffer->driverPrivate;
-    I830DRI2BufferPrivatePtr dstPrivate = pDstBuffer->driverPrivate;
-    ScreenPtr pScreen = pDraw->pScreen;
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    DrawablePtr src = (srcPrivate->attachment == DRI2BufferFrontLeft)
-	? pDraw : &srcPrivate->pPixmap->drawable;
-    DrawablePtr dst = (dstPrivate->attachment == DRI2BufferFrontLeft)
-	? pDraw : &dstPrivate->pPixmap->drawable;
-    RegionPtr pCopyClip;
-    GCPtr pGC;
-
-    pGC = GetScratchGC(pDraw->depth, pScreen);
-    pCopyClip = REGION_CREATE(pScreen, NULL, 0);
-    REGION_COPY(pScreen, pCopyClip, pRegion);
-    (*pGC->funcs->ChangeClip) (pGC, CT_REGION, pCopyClip, 0);
-    ValidateGC(dst, pGC);
-
-    /* Wait for the scanline to be outside the region to be copied */
-    if (pixmap_is_scanout(get_drawable_pixmap(dst)) && pI830->swapbuffers_wait) {
-	BoxPtr box;
-	BoxRec crtcbox;
-	int y1, y2;
-	int pipe = -1, event, load_scan_lines_pipe;
-	xf86CrtcPtr crtc;
-
-	box = REGION_EXTENTS(unused, pGC->pCompositeClip);
-	crtc = i830_covering_crtc(pScrn, box, NULL, &crtcbox);
-
-	/* Make sure the CRTC is valid and this is the real front buffer */
-	if (crtc != NULL && !crtc->rotatedData) {
-	    pipe = i830_crtc_to_pipe(crtc);
-
-	    if (pipe == 0) {
-		event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
-		load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
-	    } else {
-		event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
-		load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
-	    }
-
-	    /* Make sure we don't wait for a scanline that will never occur */
-	    y1 = (crtcbox.y1 <= box->y1) ? box->y1 - crtcbox.y1 : 0;
-	    y2 = (box->y2 <= crtcbox.y2) ?
-		box->y2 - crtcbox.y1 : crtcbox.y2 - crtcbox.y1;
-
-	    BEGIN_BATCH(5);
-	    /* The documentation says that the LOAD_SCAN_LINES command
-	     * always comes in pairs. Don't ask me why. */
-	    OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
-	    OUT_BATCH((y1 << 16) | y2);
-	    OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
-	    OUT_BATCH((y1 << 16) | y2);
-	    OUT_BATCH(MI_WAIT_FOR_EVENT | event);
-	    ADVANCE_BATCH();
+	I830DRI2BufferPrivatePtr srcPrivate = pSrcBuffer->driverPrivate;
+	I830DRI2BufferPrivatePtr dstPrivate = pDstBuffer->driverPrivate;
+	ScreenPtr pScreen = pDraw->pScreen;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	DrawablePtr src = (srcPrivate->attachment == DRI2BufferFrontLeft)
+	    ? pDraw : &srcPrivate->pPixmap->drawable;
+	DrawablePtr dst = (dstPrivate->attachment == DRI2BufferFrontLeft)
+	    ? pDraw : &dstPrivate->pPixmap->drawable;
+	RegionPtr pCopyClip;
+	GCPtr pGC;
+
+	pGC = GetScratchGC(pDraw->depth, pScreen);
+	pCopyClip = REGION_CREATE(pScreen, NULL, 0);
+	REGION_COPY(pScreen, pCopyClip, pRegion);
+	(*pGC->funcs->ChangeClip) (pGC, CT_REGION, pCopyClip, 0);
+	ValidateGC(dst, pGC);
+
+	/* Wait for the scanline to be outside the region to be copied */
+	if (pixmap_is_scanout(get_drawable_pixmap(dst))
+	    && pI830->swapbuffers_wait) {
+		BoxPtr box;
+		BoxRec crtcbox;
+		int y1, y2;
+		int pipe = -1, event, load_scan_lines_pipe;
+		xf86CrtcPtr crtc;
+
+		box = REGION_EXTENTS(unused, pGC->pCompositeClip);
+		crtc = i830_covering_crtc(pScrn, box, NULL, &crtcbox);
+
+		/* Make sure the CRTC is valid and this is the real front buffer */
+		if (crtc != NULL && !crtc->rotatedData) {
+			pipe = i830_crtc_to_pipe(crtc);
+
+			if (pipe == 0) {
+				event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
+				load_scan_lines_pipe =
+				    MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
+			} else {
+				event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
+				load_scan_lines_pipe =
+				    MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
+			}
+
+			/* Make sure we don't wait for a scanline that will never occur */
+			y1 = (crtcbox.y1 <= box->y1) ? box->y1 - crtcbox.y1 : 0;
+			y2 = (box->y2 <= crtcbox.y2) ?
+			    box->y2 - crtcbox.y1 : crtcbox.y2 - crtcbox.y1;
+
+			BEGIN_BATCH(5);
+			/* The documentation says that the LOAD_SCAN_LINES command
+			 * always comes in pairs. Don't ask me why. */
+			OUT_BATCH(MI_LOAD_SCAN_LINES_INCL |
+				  load_scan_lines_pipe);
+			OUT_BATCH((y1 << 16) | y2);
+			OUT_BATCH(MI_LOAD_SCAN_LINES_INCL |
+				  load_scan_lines_pipe);
+			OUT_BATCH((y1 << 16) | y2);
+			OUT_BATCH(MI_WAIT_FOR_EVENT | event);
+			ADVANCE_BATCH();
+		}
 	}
-    }
-
-    (*pGC->ops->CopyArea)(src, dst,
-			  pGC, 0, 0, pDraw->width, pDraw->height, 0, 0);
-    FreeScratchGC(pGC);
-
-    /* Emit a flush of the rendering cache, or on the 965 and beyond
-     * rendering results may not hit the framebuffer until significantly
-     * later.
-     */
-    I830EmitFlush(pScrn);
-    pI830->need_mi_flush = FALSE;
-
-    /* We can't rely on getting into the block handler before the DRI
-     * client gets to run again so flush now. */
-    intel_batch_flush(pScrn, TRUE);
+
+	(*pGC->ops->CopyArea) (src, dst,
+			       pGC, 0, 0, pDraw->width, pDraw->height, 0, 0);
+	FreeScratchGC(pGC);
+
+	/* Emit a flush of the rendering cache, or on the 965 and beyond
+	 * rendering results may not hit the framebuffer until significantly
+	 * later.
+	 */
+	I830EmitFlush(pScrn);
+	pI830->need_mi_flush = FALSE;
+
+	/* We can't rely on getting into the block handler before the DRI
+	 * client gets to run again so flush now. */
+	intel_batch_flush(pScrn, TRUE);
 #if ALWAYS_SYNC
-    I830Sync(pScrn);
+	I830Sync(pScrn);
 #endif
-    drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
+	drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
 
 }
 
 Bool I830DRI2ScreenInit(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    DRI2InfoRec info;
-    char *p;
-    int i;
-    struct stat sbuf;
-    dev_t d;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	DRI2InfoRec info;
+	char *p;
+	int i;
+	struct stat sbuf;
+	dev_t d;
 #ifdef USE_DRI2_1_1_0
-    int dri2_major = 1;
-    int dri2_minor = 0;
+	int dri2_major = 1;
+	int dri2_minor = 0;
 #endif
 
 #ifdef USE_DRI2_1_1_0
-    if (xf86LoaderCheckSymbol("DRI2Version")) {
-	DRI2Version(& dri2_major, & dri2_minor);
-    }
-
-    if (dri2_minor < 1) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "DRI2 requires DRI2 module version 1.1.0 or later\n");
-	return FALSE;
-    }
+	if (xf86LoaderCheckSymbol("DRI2Version")) {
+		DRI2Version(&dri2_major, &dri2_minor);
+	}
+
+	if (dri2_minor < 1) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "DRI2 requires DRI2 module version 1.1.0 or later\n");
+		return FALSE;
+	}
 #endif
 
-    info.fd = pI830->drmSubFD;
+	info.fd = pI830->drmSubFD;
 
-    /* The whole drmOpen thing is a fiasco and we need to find a way
-     * back to just using open(2).  For now, however, lets just make
-     * things worse with even more ad hoc directory walking code to
-     * discover the device file name. */
+	/* The whole drmOpen thing is a fiasco and we need to find a way
+	 * back to just using open(2).  For now, however, lets just make
+	 * things worse with even more ad hoc directory walking code to
+	 * discover the device file name. */
 
-    fstat(info.fd, &sbuf);
-    d = sbuf.st_rdev;
+	fstat(info.fd, &sbuf);
+	d = sbuf.st_rdev;
 
-    p = pI830->deviceName;
-    for (i = 0; i < DRM_MAX_MINOR; i++) {
-	sprintf(p, DRM_DEV_NAME, DRM_DIR_NAME, i);
-	if (stat(p, &sbuf) == 0 && sbuf.st_rdev == d)
-	    break;
-    }
-    if (i == DRM_MAX_MINOR) {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "DRI2: failed to open drm device\n");
-	return FALSE;
-    }
+	p = pI830->deviceName;
+	for (i = 0; i < DRM_MAX_MINOR; i++) {
+		sprintf(p, DRM_DEV_NAME, DRM_DIR_NAME, i);
+		if (stat(p, &sbuf) == 0 && sbuf.st_rdev == d)
+			break;
+	}
+	if (i == DRM_MAX_MINOR) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "DRI2: failed to open drm device\n");
+		return FALSE;
+	}
 
-    info.driverName = IS_I965G(pI830) ? "i965" : "i915";
-    info.deviceName = p;
+	info.driverName = IS_I965G(pI830) ? "i965" : "i915";
+	info.deviceName = p;
 
 #if DRI2INFOREC_VERSION >= 3
-    info.version = 3;
-    info.CreateBuffer = I830DRI2CreateBuffer;
-    info.DestroyBuffer = I830DRI2DestroyBuffer;
+	info.version = 3;
+	info.CreateBuffer = I830DRI2CreateBuffer;
+	info.DestroyBuffer = I830DRI2DestroyBuffer;
 #else
 # ifdef USE_DRI2_1_1_0
-    info.version = 2;
-    info.CreateBuffers = NULL;
-    info.DestroyBuffers = NULL;
-    info.CreateBuffer = I830DRI2CreateBuffer;
-    info.DestroyBuffer = I830DRI2DestroyBuffer;
+	info.version = 2;
+	info.CreateBuffers = NULL;
+	info.DestroyBuffers = NULL;
+	info.CreateBuffer = I830DRI2CreateBuffer;
+	info.DestroyBuffer = I830DRI2DestroyBuffer;
 # else
-    info.version = 1;
-    info.CreateBuffers = I830DRI2CreateBuffers;
-    info.DestroyBuffers = I830DRI2DestroyBuffers;
+	info.version = 1;
+	info.CreateBuffers = I830DRI2CreateBuffers;
+	info.DestroyBuffers = I830DRI2DestroyBuffers;
 # endif
 #endif
 
-    info.CopyRegion = I830DRI2CopyRegion;
+	info.CopyRegion = I830DRI2CopyRegion;
 
-    return DRI2ScreenInit(pScreen, &info);
+	return DRI2ScreenInit(pScreen, &info);
 }
 
 void I830DRI2CloseScreen(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    DRI2CloseScreen(pScreen);
-    pI830->directRenderingType = DRI_NONE;
+	DRI2CloseScreen(pScreen);
+	pI830->directRenderingType = DRI_NONE;
 }
diff --git a/src/i830_dri.h b/src/i830_dri.h
index bedbcbe2..9802356c 100644
--- a/src/i830_dri.h
+++ b/src/i830_dri.h
@@ -14,48 +14,48 @@
 #define I830_REG_SIZE 0x80000
 
 typedef struct _I830DRIRec {
-   drm_handle_t regs;
-   drmSize regsSize;
+	drm_handle_t regs;
+	drmSize regsSize;
 
-   drmSize unused1; /* backbufferSize */
-   drm_handle_t unused2; /* backbuffer */
+	drmSize unused1;	/* backbufferSize */
+	drm_handle_t unused2;	/* backbuffer */
 
-   drmSize unused3; /* depthbufferSize */
-   drm_handle_t unused4; /* depthbuffer */
+	drmSize unused3;	/* depthbufferSize */
+	drm_handle_t unused4;	/* depthbuffer */
 
-   drmSize unused5; /* rotatedSize /*/
-   drm_handle_t unused6; /* rotatedbuffer */
+	drmSize unused5;	/* rotatedSize / */
+	drm_handle_t unused6;	/* rotatedbuffer */
 
-   drm_handle_t unused7; /* textures */
-   int unused8; /* textureSize */
+	drm_handle_t unused7;	/* textures */
+	int unused8;		/* textureSize */
 
-   drm_handle_t unused9; /* agp_buffers */
-   drmSize unused10; /* agp_buf_size */
+	drm_handle_t unused9;	/* agp_buffers */
+	drmSize unused10;	/* agp_buf_size */
 
-   int deviceID;
-   int width;
-   int height;
-   int mem;
-   int cpp;
-   int bitsPerPixel;
+	int deviceID;
+	int width;
+	int height;
+	int mem;
+	int cpp;
+	int bitsPerPixel;
 
-   int unused11[8]; /* was front/back/depth/rotated offset/pitch */
+	int unused11[8];	/* was front/back/depth/rotated offset/pitch */
 
-   int unused12; /* logTextureGranularity */
-   int unused13; /* textureOffset */
+	int unused12;		/* logTextureGranularity */
+	int unused13;		/* textureOffset */
 
-   int irq;
-   int sarea_priv_offset;
+	int irq;
+	int sarea_priv_offset;
 } I830DRIRec, *I830DRIPtr;
 
 typedef struct {
-   /* Nothing here yet */
-   int dummy;
+	/* Nothing here yet */
+	int dummy;
 } I830ConfigPrivRec, *I830ConfigPrivPtr;
 
 typedef struct {
-   /* Nothing here yet */
-   int dummy;
+	/* Nothing here yet */
+	int dummy;
 } I830DRIContextRec, *I830DRIContextPtr;
 
 #endif
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 165036d1..b36450b1 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -201,124 +201,127 @@ void
 I830DPRINTF(const char *filename, int line, const char *function,
 	    const char *fmt, ...)
 {
-   va_list ap;
-
-   ErrorF("\n##############################################\n"
-	  "*** In function %s, on line %d, in file %s ***\n",
-	  function, line, filename);
-   va_start(ap, fmt);
-   VErrorF(fmt, ap);
-   va_end(ap);
-   ErrorF("##############################################\n\n");
+	va_list ap;
+
+	ErrorF("\n##############################################\n"
+	       "*** In function %s, on line %d, in file %s ***\n",
+	       function, line, filename);
+	va_start(ap, fmt);
+	VErrorF(fmt, ap);
+	va_end(ap);
+	ErrorF("##############################################\n\n");
 }
 #endif /* #ifdef I830DEBUG */
 
 /* Export I830 options to i830 driver where necessary */
-const OptionInfoRec *
-I830AvailableOptions(int chipid, int busid)
+const OptionInfoRec *I830AvailableOptions(int chipid, int busid)
 {
-   int i;
+	int i;
 
-   for (i = 0; I830PciChipsets[i].PCIid > 0; i++) {
-      if (chipid == I830PciChipsets[i].PCIid)
-	 return I830Options;
-   }
-   return NULL;
+	for (i = 0; I830PciChipsets[i].PCIid > 0; i++) {
+		if (chipid == I830PciChipsets[i].PCIid)
+			return I830Options;
+	}
+	return NULL;
 }
 
-static Bool
-I830GetRec(ScrnInfoPtr pScrn)
+static Bool I830GetRec(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830;
+	I830Ptr pI830;
 
-   if (pScrn->driverPrivate)
-      return TRUE;
-   pI830 = pScrn->driverPrivate = xnfcalloc(sizeof(I830Rec), 1);
-   return TRUE;
+	if (pScrn->driverPrivate)
+		return TRUE;
+	pI830 = pScrn->driverPrivate = xnfcalloc(sizeof(I830Rec), 1);
+	return TRUE;
 }
 
-static void
-I830FreeRec(ScrnInfoPtr pScrn)
+static void I830FreeRec(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830;
+	I830Ptr pI830;
 
-   if (!pScrn)
-      return;
-   if (!pScrn->driverPrivate)
-      return;
+	if (!pScrn)
+		return;
+	if (!pScrn->driverPrivate)
+		return;
 
-   pI830 = I830PTR(pScrn);
+	pI830 = I830PTR(pScrn);
 
-   xfree(pScrn->driverPrivate);
-   pScrn->driverPrivate = NULL;
+	xfree(pScrn->driverPrivate);
+	pScrn->driverPrivate = NULL;
 }
 
 static void
 I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
 		LOCO * colors, VisualPtr pVisual)
 {
-   xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-   int i,j, index;
-   int p;
-   uint16_t lut_r[256], lut_g[256], lut_b[256];
-
-   DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors);
-
-   for(p = 0; p < xf86_config->num_crtc; p++) {
-      xf86CrtcPtr	   crtc = xf86_config->crtc[p];
-      I830CrtcPrivatePtr   intel_crtc = crtc->driver_private;
-
-      /* Initialize to the old lookup table values. */
-      for (i = 0; i < 256; i++) {
-	 lut_r[i] = intel_crtc->lut_r[i] << 8;
-	 lut_g[i] = intel_crtc->lut_g[i] << 8;
-	 lut_b[i] = intel_crtc->lut_b[i] << 8;
-      }
-
-      switch(pScrn->depth) {
-      case 15:
-	 for (i = 0; i < numColors; i++) {
-	    index = indices[i];
-	    for (j = 0; j < 8; j++) {
-	       lut_r[index * 8 + j] = colors[index].red << 8;
-	       lut_g[index * 8 + j] = colors[index].green << 8;
-	       lut_b[index * 8 + j] = colors[index].blue << 8;
-	    }
-         }
-	 break;
-      case 16:
-	 for (i = 0; i < numColors; i++) {
-	    index = indices[i];
-
-	    if (index <= 31) {
-	       for (j = 0; j < 8; j++) {
-		  lut_r[index * 8 + j] = colors[index].red << 8;
-		  lut_b[index * 8 + j] = colors[index].blue << 8;
-	       }
-	    }
-
-	    for (j = 0; j < 4; j++) {
-	       lut_g[index * 4 + j] = colors[index].green << 8;
-	    }
-         }
-        break;
-      default:
-	 for (i = 0; i < numColors; i++) {
-	    index = indices[i];
-	    lut_r[index] = colors[index].red << 8;
-	    lut_g[index] = colors[index].green << 8;
-	    lut_b[index] = colors[index].blue << 8;
-	 }
-	 break;
-      }
-
-      /* Make the change through RandR */
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	int i, j, index;
+	int p;
+	uint16_t lut_r[256], lut_g[256], lut_b[256];
+
+	DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors);
+
+	for (p = 0; p < xf86_config->num_crtc; p++) {
+		xf86CrtcPtr crtc = xf86_config->crtc[p];
+		I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+
+		/* Initialize to the old lookup table values. */
+		for (i = 0; i < 256; i++) {
+			lut_r[i] = intel_crtc->lut_r[i] << 8;
+			lut_g[i] = intel_crtc->lut_g[i] << 8;
+			lut_b[i] = intel_crtc->lut_b[i] << 8;
+		}
+
+		switch (pScrn->depth) {
+		case 15:
+			for (i = 0; i < numColors; i++) {
+				index = indices[i];
+				for (j = 0; j < 8; j++) {
+					lut_r[index * 8 + j] =
+					    colors[index].red << 8;
+					lut_g[index * 8 + j] =
+					    colors[index].green << 8;
+					lut_b[index * 8 + j] =
+					    colors[index].blue << 8;
+				}
+			}
+			break;
+		case 16:
+			for (i = 0; i < numColors; i++) {
+				index = indices[i];
+
+				if (index <= 31) {
+					for (j = 0; j < 8; j++) {
+						lut_r[index * 8 + j] =
+						    colors[index].red << 8;
+						lut_b[index * 8 + j] =
+						    colors[index].blue << 8;
+					}
+				}
+
+				for (j = 0; j < 4; j++) {
+					lut_g[index * 4 + j] =
+					    colors[index].green << 8;
+				}
+			}
+			break;
+		default:
+			for (i = 0; i < numColors; i++) {
+				index = indices[i];
+				lut_r[index] = colors[index].red << 8;
+				lut_g[index] = colors[index].green << 8;
+				lut_b[index] = colors[index].blue << 8;
+			}
+			break;
+		}
+
+		/* Make the change through RandR */
 #ifdef RANDR_12_INTERFACE
-      RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b);
+		RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b);
 #else
-      crtc->funcs->gamma_set(crtc, lut_r, lut_g, lut_b, 256);
+		crtc->funcs->gamma_set(crtc, lut_r, lut_g, lut_b, 256);
 #endif
-   }
+	}
 }
 
 /**
@@ -327,140 +330,137 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
  * have already been created, but the first EnterVT happens before
  * CreateScreenResources.
  */
-static Bool
-i830CreateScreenResources(ScreenPtr pScreen)
+static Bool i830CreateScreenResources(ScreenPtr pScreen)
 {
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-   I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-   pScreen->CreateScreenResources = pI830->CreateScreenResources;
-   if (!(*pScreen->CreateScreenResources)(pScreen))
-      return FALSE;
+	pScreen->CreateScreenResources = pI830->CreateScreenResources;
+	if (!(*pScreen->CreateScreenResources) (pScreen))
+		return FALSE;
 
-   i830_uxa_create_screen_resources(pScreen);
+	i830_uxa_create_screen_resources(pScreen);
 
-   return TRUE;
+	return TRUE;
 }
 
-static void
-PreInitCleanup(ScrnInfoPtr pScrn)
+static void PreInitCleanup(ScrnInfoPtr pScrn)
 {
-   I830FreeRec(pScrn);
+	I830FreeRec(pScrn);
 }
 
 /*
  * Adjust *width to allow for tiling if possible
  */
-Bool
-i830_tiled_width(I830Ptr i830, int *width, int cpp)
+Bool i830_tiled_width(I830Ptr i830, int *width, int cpp)
 {
-    Bool    tiled = FALSE;
-
-    /*
-     * Adjust the display width to allow for front buffer tiling if possible
-     */
-    if (i830->tiling) {
-	if (IS_I965G(i830)) {
-	    int tile_pixels = 512 / cpp;
-	    *width = (*width + tile_pixels - 1) &
-		~(tile_pixels - 1);
-	    tiled = TRUE;
-	} else {
-	    /* Good pitches to allow tiling.  Don't care about pitches < 1024
-	     * pixels.
-	     */
-	    static const int pitches[] = {
-		1024,
-		2048,
-		4096,
-		8192,
-		0
-	    };
-	    int i;
-
-	    for (i = 0; pitches[i] != 0; i++) {
-		if (pitches[i] >= *width) {
-		    *width = pitches[i];
-		    tiled = TRUE;
-		    break;
+	Bool tiled = FALSE;
+
+	/*
+	 * Adjust the display width to allow for front buffer tiling if possible
+	 */
+	if (i830->tiling) {
+		if (IS_I965G(i830)) {
+			int tile_pixels = 512 / cpp;
+			*width = (*width + tile_pixels - 1) &
+			    ~(tile_pixels - 1);
+			tiled = TRUE;
+		} else {
+			/* Good pitches to allow tiling.  Don't care about pitches < 1024
+			 * pixels.
+			 */
+			static const int pitches[] = {
+				1024,
+				2048,
+				4096,
+				8192,
+				0
+			};
+			int i;
+
+			for (i = 0; pitches[i] != 0; i++) {
+				if (pitches[i] >= *width) {
+					*width = pitches[i];
+					tiled = TRUE;
+					break;
+				}
+			}
 		}
-	    }
 	}
-    }
-    return tiled;
+	return tiled;
 }
 
 /*
  * Pad to accelerator requirement
  */
-int
-i830_pad_drawable_width(int width, int cpp)
+int i830_pad_drawable_width(int width, int cpp)
 {
-    return (width + 63) & ~63;
+	return (width + 63) & ~63;
 }
 
-static Bool
-i830_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
+static Bool i830_xf86crtc_resize(ScrnInfoPtr scrn, int width, int height)
 {
 #ifdef DRI2
-    I830Ptr	i830 = I830PTR(scrn);
-    int		old_width = scrn->displayWidth;
+	I830Ptr i830 = I830PTR(scrn);
+	int old_width = scrn->displayWidth;
 #endif
-    int		old_x = scrn->virtualX;
-    int		old_y = scrn->virtualY;
+	int old_x = scrn->virtualX;
+	int old_y = scrn->virtualY;
 
-    if (old_x == width && old_y == height)
-	return TRUE;
+	if (old_x == width && old_y == height)
+		return TRUE;
 
-    scrn->virtualX = width;
-    scrn->virtualY = height;
+	scrn->virtualX = width;
+	scrn->virtualY = height;
 #ifdef DRI2
-    if (i830->front_buffer)
-    {
-	i830_memory *new_front, *old_front;
-	Bool	    tiled;
-	ScreenPtr   screen = screenInfo.screens[scrn->scrnIndex];
-
-	scrn->displayWidth = i830_pad_drawable_width(width, i830->cpp);
-	tiled = i830_tiled_width(i830, &scrn->displayWidth, i830->cpp);
-	xf86DrvMsg(scrn->scrnIndex, X_INFO, "Allocate new frame buffer %dx%d stride %d\n",
-		   width, height, scrn->displayWidth);
-	I830Sync(scrn);
-	i830WaitForVblank(scrn);
-	new_front = i830_allocate_framebuffer(scrn);
-	if (!new_front) {
-	    scrn->virtualX = old_x;
-	    scrn->virtualY = old_y;
-	    scrn->displayWidth = old_width;
-	    return FALSE;
+	if (i830->front_buffer) {
+		i830_memory *new_front, *old_front;
+		Bool tiled;
+		ScreenPtr screen = screenInfo.screens[scrn->scrnIndex];
+
+		scrn->displayWidth = i830_pad_drawable_width(width, i830->cpp);
+		tiled = i830_tiled_width(i830, &scrn->displayWidth, i830->cpp);
+		xf86DrvMsg(scrn->scrnIndex, X_INFO,
+			   "Allocate new frame buffer %dx%d stride %d\n", width,
+			   height, scrn->displayWidth);
+		I830Sync(scrn);
+		i830WaitForVblank(scrn);
+		new_front = i830_allocate_framebuffer(scrn);
+		if (!new_front) {
+			scrn->virtualX = old_x;
+			scrn->virtualY = old_y;
+			scrn->displayWidth = old_width;
+			return FALSE;
+		}
+		old_front = i830->front_buffer;
+		i830->front_buffer = new_front;
+		i830_set_pixmap_bo(screen->GetScreenPixmap(screen),
+				   new_front->bo);
+		scrn->fbOffset = i830->front_buffer->offset;
+
+		screen->ModifyPixmapHeader(screen->GetScreenPixmap(screen),
+					   width, height, -1, -1,
+					   scrn->displayWidth * i830->cpp,
+					   NULL);
+
+		/* ick. xf86EnableDisableFBAccess smashes the screen pixmap devPrivate,
+		 * so update the value it uses
+		 */
+		scrn->pixmapPrivate.ptr = NULL;
+		xf86DrvMsg(scrn->scrnIndex, X_INFO,
+			   "New front buffer at 0x%lx\n",
+			   i830->front_buffer->offset);
+		i830_set_new_crtc_bo(scrn);
+		I830Sync(scrn);
+		i830WaitForVblank(scrn);
+		i830_free_memory(scrn, old_front);
 	}
-	old_front = i830->front_buffer;
-	i830->front_buffer = new_front;
-	i830_set_pixmap_bo(screen->GetScreenPixmap(screen),
-			   new_front->bo);
-	scrn->fbOffset = i830->front_buffer->offset;
-
-	screen->ModifyPixmapHeader(screen->GetScreenPixmap(screen),
-				   width, height, -1, -1, scrn->displayWidth * i830->cpp,
-				   NULL);
-
-	/* ick. xf86EnableDisableFBAccess smashes the screen pixmap devPrivate,
-	 * so update the value it uses
-	 */
-	scrn->pixmapPrivate.ptr = NULL;
-	xf86DrvMsg(scrn->scrnIndex, X_INFO, "New front buffer at 0x%lx\n",
-		   i830->front_buffer->offset);
-	i830_set_new_crtc_bo(scrn);
-	I830Sync(scrn);
-	i830WaitForVblank(scrn);
-	i830_free_memory(scrn, old_front);
-    }
 #endif
-    return TRUE;
+	return TRUE;
 }
 
 static const xf86CrtcConfigFuncsRec i830_xf86crtc_config_funcs = {
-    i830_xf86crtc_resize
+	i830_xf86crtc_resize
 };
 
 /*
@@ -469,325 +469,326 @@ static const xf86CrtcConfigFuncsRec i830_xf86crtc_config_funcs = {
  */
 static Bool i830_kernel_mode_enabled(ScrnInfoPtr pScrn)
 {
-    struct pci_device *PciInfo;
-    EntityInfoPtr pEnt;
-    char *busIdString;
-    int ret;
+	struct pci_device *PciInfo;
+	EntityInfoPtr pEnt;
+	char *busIdString;
+	int ret;
 
-    pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
-    PciInfo = xf86GetPciInfoForEntity(pEnt->index);
+	pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
+	PciInfo = xf86GetPciInfoForEntity(pEnt->index);
 
-    if (!xf86LoaderCheckSymbol("DRICreatePCIBusID"))
-	return FALSE;
+	if (!xf86LoaderCheckSymbol("DRICreatePCIBusID"))
+		return FALSE;
 
-    busIdString = DRICreatePCIBusID(PciInfo);
-
-    ret = drmCheckModesettingSupported(busIdString);
-    if (ret) {
-	if (xf86LoadKernelModule("i915"))
-	    ret = drmCheckModesettingSupported(busIdString);
-    }
-    /* Be nice to the user and load fbcon too */
-    if (!ret)
-	(void) xf86LoadKernelModule("fbcon");
-    xfree(busIdString);
-    if (ret)
-	return FALSE;
+	busIdString = DRICreatePCIBusID(PciInfo);
 
-    return TRUE;
+	ret = drmCheckModesettingSupported(busIdString);
+	if (ret) {
+		if (xf86LoadKernelModule("i915"))
+			ret = drmCheckModesettingSupported(busIdString);
+	}
+	/* Be nice to the user and load fbcon too */
+	if (!ret)
+		(void)xf86LoadKernelModule("fbcon");
+	xfree(busIdString);
+	if (ret)
+		return FALSE;
+
+	return TRUE;
 }
 
-static void
-i830_detect_chipset(ScrnInfoPtr pScrn)
+static void i830_detect_chipset(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    MessageType from = X_PROBED;
-    const char *chipname;
-    uint32_t capid;
-
-    switch (DEVICE_ID(pI830->PciInfo)) {
-    case PCI_CHIP_I830_M:
-	chipname = "830M";
-	break;
-    case PCI_CHIP_845_G:
-	chipname = "845G";
-	break;
-    case PCI_CHIP_I855_GM:
-	/* Check capid register to find the chipset variant */
-	pci_device_cfg_read_u32 (pI830->PciInfo, &capid, I85X_CAPID);
-	pI830->variant = (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
-	switch (pI830->variant) {
-	case I855_GM:
-	    chipname = "855GM";
-	    break;
-	case I855_GME:
-	    chipname = "855GME";
-	    break;
-	case I852_GM:
-	    chipname = "852GM";
-	    break;
-	case I852_GME:
-	    chipname = "852GME";
-	    break;
+	I830Ptr pI830 = I830PTR(pScrn);
+	MessageType from = X_PROBED;
+	const char *chipname;
+	uint32_t capid;
+
+	switch (DEVICE_ID(pI830->PciInfo)) {
+	case PCI_CHIP_I830_M:
+		chipname = "830M";
+		break;
+	case PCI_CHIP_845_G:
+		chipname = "845G";
+		break;
+	case PCI_CHIP_I855_GM:
+		/* Check capid register to find the chipset variant */
+		pci_device_cfg_read_u32(pI830->PciInfo, &capid, I85X_CAPID);
+		pI830->variant =
+		    (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
+		switch (pI830->variant) {
+		case I855_GM:
+			chipname = "855GM";
+			break;
+		case I855_GME:
+			chipname = "855GME";
+			break;
+		case I852_GM:
+			chipname = "852GM";
+			break;
+		case I852_GME:
+			chipname = "852GME";
+			break;
+		default:
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "Unknown 852GM/855GM variant: 0x%x)\n",
+				   pI830->variant);
+			chipname = "852GM/855GM (unknown variant)";
+			break;
+		}
+		break;
+	case PCI_CHIP_I865_G:
+		chipname = "865G";
+		break;
+	case PCI_CHIP_I915_G:
+		chipname = "915G";
+		break;
+	case PCI_CHIP_E7221_G:
+		chipname = "E7221 (i915)";
+		break;
+	case PCI_CHIP_I915_GM:
+		chipname = "915GM";
+		break;
+	case PCI_CHIP_I945_G:
+		chipname = "945G";
+		break;
+	case PCI_CHIP_I945_GM:
+		chipname = "945GM";
+		break;
+	case PCI_CHIP_I945_GME:
+		chipname = "945GME";
+		break;
+	case PCI_CHIP_IGD_GM:
+		chipname = "Pineview GM";
+		break;
+	case PCI_CHIP_IGD_G:
+		chipname = "Pineview G";
+		break;
+	case PCI_CHIP_I965_G:
+		chipname = "965G";
+		break;
+	case PCI_CHIP_G35_G:
+		chipname = "G35";
+		break;
+	case PCI_CHIP_I965_Q:
+		chipname = "965Q";
+		break;
+	case PCI_CHIP_I946_GZ:
+		chipname = "946GZ";
+		break;
+	case PCI_CHIP_I965_GM:
+		chipname = "965GM";
+		break;
+	case PCI_CHIP_I965_GME:
+		chipname = "965GME/GLE";
+		break;
+	case PCI_CHIP_G33_G:
+		chipname = "G33";
+		break;
+	case PCI_CHIP_Q35_G:
+		chipname = "Q35";
+		break;
+	case PCI_CHIP_Q33_G:
+		chipname = "Q33";
+		break;
+	case PCI_CHIP_GM45_GM:
+		chipname = "GM45";
+		break;
+	case PCI_CHIP_IGD_E_G:
+		chipname = "4 Series";
+		break;
+	case PCI_CHIP_G45_G:
+		chipname = "G45/G43";
+		break;
+	case PCI_CHIP_Q45_G:
+		chipname = "Q45/Q43";
+		break;
+	case PCI_CHIP_G41_G:
+		chipname = "G41";
+		break;
+	case PCI_CHIP_B43_G:
+		chipname = "B43";
+		break;
+	case PCI_CHIP_IGDNG_D_G:
+		chipname = "Clarkdale";
+		break;
+	case PCI_CHIP_IGDNG_M_G:
+		chipname = "Arrandale";
+		break;
 	default:
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		       "Unknown 852GM/855GM variant: 0x%x)\n", pI830->variant);
-	    chipname = "852GM/855GM (unknown variant)";
-	    break;
+		chipname = "unknown chipset";
+		break;
 	}
-	break;
-    case PCI_CHIP_I865_G:
-	chipname = "865G";
-	break;
-    case PCI_CHIP_I915_G:
-	chipname = "915G";
-	break;
-    case PCI_CHIP_E7221_G:
-	chipname = "E7221 (i915)";
-	break;
-    case PCI_CHIP_I915_GM:
-	chipname = "915GM";
-	break;
-    case PCI_CHIP_I945_G:
-	chipname = "945G";
-	break;
-    case PCI_CHIP_I945_GM:
-	chipname = "945GM";
-	break;
-    case PCI_CHIP_I945_GME:
-	chipname = "945GME";
-	break;
-    case PCI_CHIP_IGD_GM:
-	chipname = "Pineview GM";
-	break;
-    case PCI_CHIP_IGD_G:
-	chipname = "Pineview G";
-	break;
-    case PCI_CHIP_I965_G:
-	chipname = "965G";
-	break;
-    case PCI_CHIP_G35_G:
-	chipname = "G35";
-	break;
-    case PCI_CHIP_I965_Q:
-	chipname = "965Q";
-	break;
-    case PCI_CHIP_I946_GZ:
-	chipname = "946GZ";
-	break;
-    case PCI_CHIP_I965_GM:
-	chipname = "965GM";
-	break;
-    case PCI_CHIP_I965_GME:
-	chipname = "965GME/GLE";
-	break;
-    case PCI_CHIP_G33_G:
-	chipname = "G33";
-	break;
-    case PCI_CHIP_Q35_G:
-	chipname = "Q35";
-	break;
-    case PCI_CHIP_Q33_G:
-	chipname = "Q33";
-	break;
-    case PCI_CHIP_GM45_GM:
-	chipname = "GM45";
-	break;
-    case PCI_CHIP_IGD_E_G:
-	chipname = "4 Series";
-	break;
-    case PCI_CHIP_G45_G:
-	chipname = "G45/G43";
-	break;
-    case PCI_CHIP_Q45_G:
-	chipname = "Q45/Q43";
-	break;
-    case PCI_CHIP_G41_G:
-	chipname = "G41";
-	break;
-    case PCI_CHIP_B43_G:
-	chipname = "B43";
-	break;
-    case PCI_CHIP_IGDNG_D_G:
-	chipname = "Clarkdale";
-	break;
-    case PCI_CHIP_IGDNG_M_G:
-	chipname = "Arrandale";
-	break;
-   default:
-	chipname = "unknown chipset";
-	break;
-    }
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	       "Integrated Graphics Chipset: Intel(R) %s\n", chipname);
-
-    /* Set the Chipset and ChipRev, allowing config file entries to override. */
-    if (pI830->pEnt->device->chipset && *pI830->pEnt->device->chipset) {
-	pScrn->chipset = pI830->pEnt->device->chipset;
-	from = X_CONFIG;
-    } else if (pI830->pEnt->device->chipID >= 0) {
-	pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
-						   pI830->pEnt->device->chipID);
-	from = X_CONFIG;
-	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
-		   pI830->pEnt->device->chipID);
-	DEVICE_ID(pI830->PciInfo) = pI830->pEnt->device->chipID;
-    } else {
-	from = X_PROBED;
-	pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
-						   DEVICE_ID(pI830->PciInfo));
-    }
-
-    if (pI830->pEnt->device->chipRev >= 0) {
-	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
-		   pI830->pEnt->device->chipRev);
-    }
-
-    xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
-	       (pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i8xx");
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "Integrated Graphics Chipset: Intel(R) %s\n", chipname);
+
+	/* Set the Chipset and ChipRev, allowing config file entries to override. */
+	if (pI830->pEnt->device->chipset && *pI830->pEnt->device->chipset) {
+		pScrn->chipset = pI830->pEnt->device->chipset;
+		from = X_CONFIG;
+	} else if (pI830->pEnt->device->chipID >= 0) {
+		pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
+							   pI830->pEnt->device->
+							   chipID);
+		from = X_CONFIG;
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+			   "ChipID override: 0x%04X\n",
+			   pI830->pEnt->device->chipID);
+		DEVICE_ID(pI830->PciInfo) = pI830->pEnt->device->chipID;
+	} else {
+		from = X_PROBED;
+		pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
+							   DEVICE_ID(pI830->
+								     PciInfo));
+	}
+
+	if (pI830->pEnt->device->chipRev >= 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
+			   pI830->pEnt->device->chipRev);
+	}
+
+	xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
+		   (pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i8xx");
 }
 
-static Bool
-I830GetEarlyOptions(ScrnInfoPtr pScrn)
+static Bool I830GetEarlyOptions(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    /* Process the options */
-    xf86CollectOptions(pScrn, NULL);
-    if (!(pI830->Options = xalloc(sizeof(I830Options))))
-	return FALSE;
-    memcpy(pI830->Options, I830Options, sizeof(I830Options));
-    xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI830->Options);
+	/* Process the options */
+	xf86CollectOptions(pScrn, NULL);
+	if (!(pI830->Options = xalloc(sizeof(I830Options))))
+		return FALSE;
+	memcpy(pI830->Options, I830Options, sizeof(I830Options));
+	xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, pI830->Options);
 
-    pI830->fallback_debug = xf86ReturnOptValBool(pI830->Options,
-						 OPTION_FALLBACKDEBUG, FALSE);
+	pI830->fallback_debug = xf86ReturnOptValBool(pI830->Options,
+						     OPTION_FALLBACKDEBUG,
+						     FALSE);
 
-    return TRUE;
+	return TRUE;
 }
 
-static void
-i830_check_dri_option(ScrnInfoPtr pScrn)
+static void i830_check_dri_option(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    pI830->directRenderingType = DRI_NONE;
-    if (!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE))
-	pI830->directRenderingType = DRI_DISABLED;
-
-    if (pScrn->depth != 16 && pScrn->depth != 24) {
-	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "DRI is disabled because it "
-		"runs only at depths 16 and 24.\n");
-	pI830->directRenderingType = DRI_DISABLED;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	pI830->directRenderingType = DRI_NONE;
+	if (!xf86ReturnOptValBool(pI830->Options, OPTION_DRI, TRUE))
+		pI830->directRenderingType = DRI_DISABLED;
+
+	if (pScrn->depth != 16 && pScrn->depth != 24) {
+		xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
+			   "DRI is disabled because it "
+			   "runs only at depths 16 and 24.\n");
+		pI830->directRenderingType = DRI_DISABLED;
+	}
 }
 
-static Bool
-i830_open_drm_master(ScrnInfoPtr scrn)
+static Bool i830_open_drm_master(ScrnInfoPtr scrn)
 {
-    I830Ptr i830 = I830PTR(scrn);
-    struct pci_device *dev = i830->PciInfo;
-    char *busid;
-    drmSetVersion sv;
-    struct drm_i915_getparam gp;
-    int err, has_gem;
-
-    /* We wish we had asprintf, but all we get is XNFprintf. */
-    busid = XNFprintf("pci:%04x:%02x:%02x.%d",
-		      dev->domain, dev->bus, dev->dev, dev->func);
-
-    i830->drmSubFD = drmOpen("i915", busid);
-    if (i830->drmSubFD == -1) {
+	I830Ptr i830 = I830PTR(scrn);
+	struct pci_device *dev = i830->PciInfo;
+	char *busid;
+	drmSetVersion sv;
+	struct drm_i915_getparam gp;
+	int err, has_gem;
+
+	/* We wish we had asprintf, but all we get is XNFprintf. */
+	busid = XNFprintf("pci:%04x:%02x:%02x.%d",
+			  dev->domain, dev->bus, dev->dev, dev->func);
+
+	i830->drmSubFD = drmOpen("i915", busid);
+	if (i830->drmSubFD == -1) {
+		xfree(busid);
+		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+			   "[drm] Failed to open DRM device for %s: %s\n",
+			   busid, strerror(errno));
+		return FALSE;
+	}
+
 	xfree(busid);
-	xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		   "[drm] Failed to open DRM device for %s: %s\n", busid,
-		   strerror(errno));
-	return FALSE;
-    }
-
-    xfree(busid);
-
-    /* Check that what we opened was a master or a master-capable FD,
-     * by setting the version of the interface we'll use to talk to it.
-     * (see DRIOpenDRMMaster() in DRI1)
-     */
-    sv.drm_di_major = 1;
-    sv.drm_di_minor = 1;
-    sv.drm_dd_major = -1;
-    sv.drm_dd_minor = -1;
-    err = drmSetInterfaceVersion(i830->drmSubFD, &sv);
-    if (err != 0) {
-	xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		   "[drm] failed to set drm interface version.\n");
-	drmClose(i830->drmSubFD);
-	i830->drmSubFD = -1;
-	return FALSE;
-    }
-
-    has_gem = FALSE;
-    gp.param = I915_PARAM_HAS_GEM;
-    gp.value = &has_gem;
-    (void)drmCommandWriteRead(i830->drmSubFD, DRM_I915_GETPARAM,
-			      &gp, sizeof(gp));
-    if (!has_gem) {
-	xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		   "[drm] Failed to detect GEM.  Kernel 2.6.28 required.\n");
-	drmClose(i830->drmSubFD);
-	i830->drmSubFD = -1;
-	return FALSE;
-    }
 
-    return TRUE;
+	/* Check that what we opened was a master or a master-capable FD,
+	 * by setting the version of the interface we'll use to talk to it.
+	 * (see DRIOpenDRMMaster() in DRI1)
+	 */
+	sv.drm_di_major = 1;
+	sv.drm_di_minor = 1;
+	sv.drm_dd_major = -1;
+	sv.drm_dd_minor = -1;
+	err = drmSetInterfaceVersion(i830->drmSubFD, &sv);
+	if (err != 0) {
+		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+			   "[drm] failed to set drm interface version.\n");
+		drmClose(i830->drmSubFD);
+		i830->drmSubFD = -1;
+		return FALSE;
+	}
+
+	has_gem = FALSE;
+	gp.param = I915_PARAM_HAS_GEM;
+	gp.value = &has_gem;
+	(void)drmCommandWriteRead(i830->drmSubFD, DRM_I915_GETPARAM,
+				  &gp, sizeof(gp));
+	if (!has_gem) {
+		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+			   "[drm] Failed to detect GEM.  Kernel 2.6.28 required.\n");
+		drmClose(i830->drmSubFD);
+		i830->drmSubFD = -1;
+		return FALSE;
+	}
+
+	return TRUE;
 }
 
-static void
-i830_close_drm_master(ScrnInfoPtr scrn)
+static void i830_close_drm_master(ScrnInfoPtr scrn)
 {
-    I830Ptr i830 = I830PTR(scrn);
-    if (i830 && i830->drmSubFD > 0) {
-	drmClose(i830->drmSubFD);
-	i830->drmSubFD = -1;
-    }
+	I830Ptr i830 = I830PTR(scrn);
+	if (i830 && i830->drmSubFD > 0) {
+		drmClose(i830->drmSubFD);
+		i830->drmSubFD = -1;
+	}
 }
 
-static Bool
-I830DrmModeInit(ScrnInfoPtr pScrn)
+static Bool I830DrmModeInit(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    if (drmmode_pre_init(pScrn, pI830->drmSubFD, pI830->cpp) == FALSE) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		   "Kernel modesetting setup failed\n");
-	PreInitCleanup(pScrn);
-	return FALSE;
-    }
+	if (drmmode_pre_init(pScrn, pI830->drmSubFD, pI830->cpp) == FALSE) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Kernel modesetting setup failed\n");
+		PreInitCleanup(pScrn);
+		return FALSE;
+	}
 
-    i830_init_bufmgr(pScrn);
+	i830_init_bufmgr(pScrn);
 
-    return TRUE;
+	return TRUE;
 }
 
-static void
-I830XvInit(ScrnInfoPtr pScrn)
+static void I830XvInit(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    MessageType from = X_PROBED;
-
-   pI830->XvPreferOverlay = xf86ReturnOptValBool(pI830->Options, OPTION_PREFER_OVERLAY, FALSE);
-
-    if (xf86GetOptValInteger(pI830->Options, OPTION_VIDEO_KEY,
-			     &(pI830->colorKey))) {
-	from = X_CONFIG;
-    } else if (xf86GetOptValInteger(pI830->Options, OPTION_COLOR_KEY,
-				    &(pI830->colorKey))) {
-	from = X_CONFIG;
-    } else {
-	pI830->colorKey =
-	    (1 << pScrn->offset.red) | (1 << pScrn->offset.green) |
-	    (((pScrn->mask.blue >> pScrn->offset.blue) - 1) <<
-	     pScrn->offset.blue);
-	from = X_DEFAULT;
-    }
-    xf86DrvMsg(pScrn->scrnIndex, from, "video overlay key set to 0x%x\n",
-	       pI830->colorKey);
+	I830Ptr pI830 = I830PTR(pScrn);
+	MessageType from = X_PROBED;
+
+	pI830->XvPreferOverlay =
+	    xf86ReturnOptValBool(pI830->Options, OPTION_PREFER_OVERLAY, FALSE);
+
+	if (xf86GetOptValInteger(pI830->Options, OPTION_VIDEO_KEY,
+				 &(pI830->colorKey))) {
+		from = X_CONFIG;
+	} else if (xf86GetOptValInteger(pI830->Options, OPTION_COLOR_KEY,
+					&(pI830->colorKey))) {
+		from = X_CONFIG;
+	} else {
+		pI830->colorKey =
+		    (1 << pScrn->offset.red) | (1 << pScrn->offset.green) |
+		    (((pScrn->mask.blue >> pScrn->offset.blue) - 1) <<
+		     pScrn->offset.blue);
+		from = X_DEFAULT;
+	}
+	xf86DrvMsg(pScrn->scrnIndex, from, "video overlay key set to 0x%x\n",
+		   pI830->colorKey);
 }
 
 /**
@@ -803,123 +804,123 @@ I830XvInit(ScrnInfoPtr pScrn)
  * As a result, we want to set up that server initialization once rather
  * that doing it per generation.
  */
-static Bool
-I830PreInit(ScrnInfoPtr pScrn, int flags)
+static Bool I830PreInit(ScrnInfoPtr pScrn, int flags)
 {
-   I830Ptr pI830;
-   rgb defaultWeight = { 0, 0, 0 };
-   EntityInfoPtr pEnt;
-   int flags24;
-   Gamma zeros = { 0.0, 0.0, 0.0 };
-   int drm_mode_setting;
-
-   if (pScrn->numEntities != 1)
-      return FALSE;
-
-   drm_mode_setting = i830_kernel_mode_enabled(pScrn);
-   if (!drm_mode_setting) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "No kernel modesetting driver detected.\n");
-      return FALSE;
-   }
+	I830Ptr pI830;
+	rgb defaultWeight = { 0, 0, 0 };
+	EntityInfoPtr pEnt;
+	int flags24;
+	Gamma zeros = { 0.0, 0.0, 0.0 };
+	int drm_mode_setting;
+
+	if (pScrn->numEntities != 1)
+		return FALSE;
+
+	drm_mode_setting = i830_kernel_mode_enabled(pScrn);
+	if (!drm_mode_setting) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "No kernel modesetting driver detected.\n");
+		return FALSE;
+	}
 
-   pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
+	pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
 
-   if (flags & PROBE_DETECT)
-       return TRUE;
+	if (flags & PROBE_DETECT)
+		return TRUE;
 
-   /* Allocate driverPrivate */
-   if (!I830GetRec(pScrn))
-      return FALSE;
+	/* Allocate driverPrivate */
+	if (!I830GetRec(pScrn))
+		return FALSE;
 
-   pI830 = I830PTR(pScrn);
-   pI830->pEnt = pEnt;
+	pI830 = I830PTR(pScrn);
+	pI830->pEnt = pEnt;
 
-   pScrn->displayWidth = 640; /* default it */
+	pScrn->displayWidth = 640;	/* default it */
 
-   if (pI830->pEnt->location.type != BUS_PCI)
-      return FALSE;
+	if (pI830->pEnt->location.type != BUS_PCI)
+		return FALSE;
 
-   pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index);
+	pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index);
 
-   if (!i830_open_drm_master(pScrn))
-       xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to become DRM master.\n");
+	if (!i830_open_drm_master(pScrn))
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Failed to become DRM master.\n");
 
-   pScrn->monitor = pScrn->confScreen->monitor;
-   pScrn->progClock = TRUE;
-   pScrn->rgbBits = 8;
+	pScrn->monitor = pScrn->confScreen->monitor;
+	pScrn->progClock = TRUE;
+	pScrn->rgbBits = 8;
 
-   flags24 = Support32bppFb | PreferConvert24to32 | SupportConvert24to32;
+	flags24 = Support32bppFb | PreferConvert24to32 | SupportConvert24to32;
 
-   if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24))
-      return FALSE;
+	if (!xf86SetDepthBpp(pScrn, 0, 0, 0, flags24))
+		return FALSE;
 
-   switch (pScrn->depth) {
-   case 8:
-   case 15:
-   case 16:
-   case 24:
-      break;
-   default:
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Given depth (%d) is not supported by I830 driver\n",
-		 pScrn->depth);
-      return FALSE;
-   }
-   xf86PrintDepthBpp(pScrn);
+	switch (pScrn->depth) {
+	case 8:
+	case 15:
+	case 16:
+	case 24:
+		break;
+	default:
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Given depth (%d) is not supported by I830 driver\n",
+			   pScrn->depth);
+		return FALSE;
+	}
+	xf86PrintDepthBpp(pScrn);
 
-   if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight))
-      return FALSE;
-   if (!xf86SetDefaultVisual(pScrn, -1))
-      return FALSE;
+	if (!xf86SetWeight(pScrn, defaultWeight, defaultWeight))
+		return FALSE;
+	if (!xf86SetDefaultVisual(pScrn, -1))
+		return FALSE;
 
-   pI830->cpp = pScrn->bitsPerPixel / 8;
+	pI830->cpp = pScrn->bitsPerPixel / 8;
 
-   if (!I830GetEarlyOptions(pScrn))
-       return FALSE;
+	if (!I830GetEarlyOptions(pScrn))
+		return FALSE;
 
-   i830_detect_chipset(pScrn);
+	i830_detect_chipset(pScrn);
 
-   i830_check_dri_option(pScrn);
+	i830_check_dri_option(pScrn);
 
-   I830XvInit(pScrn);
+	I830XvInit(pScrn);
 
-   if (!I830DrmModeInit(pScrn))
-      return FALSE;
+	if (!I830DrmModeInit(pScrn))
+		return FALSE;
 
-   if (!xf86SetGamma(pScrn, zeros)) {
-       PreInitCleanup(pScrn);
-       return FALSE;
-   }
+	if (!xf86SetGamma(pScrn, zeros)) {
+		PreInitCleanup(pScrn);
+		return FALSE;
+	}
 
-   if (pScrn->modes == NULL) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n");
-      PreInitCleanup(pScrn);
-      return FALSE;
-   }
-   pScrn->currentMode = pScrn->modes;
+	if (pScrn->modes == NULL) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No modes.\n");
+		PreInitCleanup(pScrn);
+		return FALSE;
+	}
+	pScrn->currentMode = pScrn->modes;
 
-   /* Set display resolution */
-   xf86SetDpi(pScrn, 0, 0);
+	/* Set display resolution */
+	xf86SetDpi(pScrn, 0, 0);
 
-   /* Load the required sub modules */
-   if (!xf86LoadSubModule(pScrn, "fb")) {
-      PreInitCleanup(pScrn);
-      return FALSE;
-   }
+	/* Load the required sub modules */
+	if (!xf86LoadSubModule(pScrn, "fb")) {
+		PreInitCleanup(pScrn);
+		return FALSE;
+	}
 
-   /* Load the dri2 module if requested. */
-   if (xf86ReturnOptValBool(pI830->Options, OPTION_DRI, FALSE) &&
-       pI830->directRenderingType != DRI_DISABLED) {
-       xf86LoadSubModule(pScrn, "dri2");
-   }
+	/* Load the dri2 module if requested. */
+	if (xf86ReturnOptValBool(pI830->Options, OPTION_DRI, FALSE) &&
+	    pI830->directRenderingType != DRI_DISABLED) {
+		xf86LoadSubModule(pScrn, "dri2");
+	}
 
-   return TRUE;
+	return TRUE;
 }
 
 enum pipe {
-    PIPE_A = 0,
-    PIPE_B,
+	PIPE_A = 0,
+	PIPE_B,
 };
 
 /**
@@ -929,133 +930,129 @@ enum pipe {
  * function is also responsible for marking the state as clobbered for DRI
  * clients.
  */
-void
-IntelEmitInvarientState(ScrnInfoPtr pScrn)
+void IntelEmitInvarientState(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   /* If we've emitted our state since the last clobber by another client,
-    * skip it.
-    */
-   if (pI830->last_3d != LAST_3D_OTHER)
-      return;
-
-   if (!IS_I965G(pI830))
-   {
-      if (IS_I9XX(pI830))
-         I915EmitInvarientState(pScrn);
-      else
-         I830EmitInvarientState(pScrn);
-   }
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	/* If we've emitted our state since the last clobber by another client,
+	 * skip it.
+	 */
+	if (pI830->last_3d != LAST_3D_OTHER)
+		return;
+
+	if (!IS_I965G(pI830)) {
+		if (IS_I9XX(pI830))
+			I915EmitInvarientState(pScrn);
+		else
+			I830EmitInvarientState(pScrn);
+	}
 }
 
 static void
-I830BlockHandler(int i,
-		 pointer blockData, pointer pTimeout, pointer pReadmask)
+I830BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
 {
-    ScreenPtr pScreen = screenInfo.screens[i];
-    ScrnInfoPtr pScrn = xf86Screens[i];
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    pScreen->BlockHandler = pI830->BlockHandler;
-
-    (*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
-
-    pI830->BlockHandler = pScreen->BlockHandler;
-    pScreen->BlockHandler = I830BlockHandler;
-
-    if (pScrn->vtSema) {
-       Bool flushed = FALSE;
-       /* Emit a flush of the rendering cache, or on the 965 and beyond
-	* rendering results may not hit the framebuffer until significantly
-	* later.
-	*/
-       if (pI830->need_mi_flush || pI830->batch_used)
-       {
-	  flushed = TRUE;
-	  I830EmitFlush(pScrn);
-       }
+	ScreenPtr pScreen = screenInfo.screens[i];
+	ScrnInfoPtr pScrn = xf86Screens[i];
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	pScreen->BlockHandler = pI830->BlockHandler;
+
+	(*pScreen->BlockHandler) (i, blockData, pTimeout, pReadmask);
+
+	pI830->BlockHandler = pScreen->BlockHandler;
+	pScreen->BlockHandler = I830BlockHandler;
+
+	if (pScrn->vtSema) {
+		Bool flushed = FALSE;
+		/* Emit a flush of the rendering cache, or on the 965 and beyond
+		 * rendering results may not hit the framebuffer until significantly
+		 * later.
+		 */
+		if (pI830->need_mi_flush || pI830->batch_used) {
+			flushed = TRUE;
+			I830EmitFlush(pScrn);
+		}
 
-       /* Flush the batch, so that any rendering is executed in a timely
-	* fashion.
-	*/
-       intel_batch_flush(pScrn, flushed);
-       drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
+		/* Flush the batch, so that any rendering is executed in a timely
+		 * fashion.
+		 */
+		intel_batch_flush(pScrn, flushed);
+		drmCommandNone(pI830->drmSubFD, DRM_I915_GEM_THROTTLE);
 
-       pI830->need_mi_flush = FALSE;
-    }
+		pI830->need_mi_flush = FALSE;
+	}
 
-    i830_uxa_block_handler (pScreen);
+	i830_uxa_block_handler(pScreen);
 
-    I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
+	I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
 }
 
-static void
-i830_fixup_mtrrs(ScrnInfoPtr pScrn)
+static void i830_fixup_mtrrs(ScrnInfoPtr pScrn)
 {
 #ifdef HAS_MTRR_SUPPORT
-    I830Ptr pI830 = I830PTR(pScrn);
-    int fd;
-    struct mtrr_gentry gentry;
-    struct mtrr_sentry sentry;
-
-    if ( ( fd = open ("/proc/mtrr", O_RDONLY, 0) ) != -1 ) {
-	for (gentry.regnum = 0; ioctl (fd, MTRRIOC_GET_ENTRY, &gentry) == 0;
-		++gentry.regnum) {
-
-	    if (gentry.size < 1) {
-		/* DISABLED */
-		continue;
-	    }
-
-	    /* Check the MTRR range is one we like and if not - remove it.
-	     * The Xserver common layer will then setup the right range
-	     * for us.
-	     */
-	    if (gentry.base == pI830->LinearAddr && 
-		    gentry.size < pI830->FbMapSize) {
-
-		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-			"Removing bad MTRR range (base 0x%lx, size 0x%x)\n",
-			gentry.base, gentry.size);
-
-		sentry.base = gentry.base;
-		sentry.size = gentry.size;
-		sentry.type = gentry.type;
-
-		if (ioctl (fd, MTRRIOC_DEL_ENTRY, &sentry) == -1) {
-		    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			    "Failed to remove bad MTRR range\n");
+	I830Ptr pI830 = I830PTR(pScrn);
+	int fd;
+	struct mtrr_gentry gentry;
+	struct mtrr_sentry sentry;
+
+	if ((fd = open("/proc/mtrr", O_RDONLY, 0)) != -1) {
+		for (gentry.regnum = 0;
+		     ioctl(fd, MTRRIOC_GET_ENTRY, &gentry) == 0;
+		     ++gentry.regnum) {
+
+			if (gentry.size < 1) {
+				/* DISABLED */
+				continue;
+			}
+
+			/* Check the MTRR range is one we like and if not - remove it.
+			 * The Xserver common layer will then setup the right range
+			 * for us.
+			 */
+			if (gentry.base == pI830->LinearAddr &&
+			    gentry.size < pI830->FbMapSize) {
+
+				xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+					   "Removing bad MTRR range (base 0x%lx, size 0x%x)\n",
+					   gentry.base, gentry.size);
+
+				sentry.base = gentry.base;
+				sentry.size = gentry.size;
+				sentry.type = gentry.type;
+
+				if (ioctl(fd, MTRRIOC_DEL_ENTRY, &sentry) == -1) {
+					xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+						   "Failed to remove bad MTRR range\n");
+				}
+			}
 		}
-	    }
+		close(fd);
 	}
-	close(fd);
-    }
 #endif
 }
 
-static Bool
-i830_try_memory_allocation(ScrnInfoPtr pScrn)
+static Bool i830_try_memory_allocation(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    Bool tiled = pI830->tiling;
+	I830Ptr pI830 = I830PTR(pScrn);
+	Bool tiled = pI830->tiling;
 
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-	    "Attempting memory allocation with %stiled buffers.\n",
-	    tiled ? "" : "un");
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "Attempting memory allocation with %stiled buffers.\n",
+		   tiled ? "" : "un");
 
-    if (!i830_allocate_2d_memory(pScrn))
-	goto failed;
+	if (!i830_allocate_2d_memory(pScrn))
+		goto failed;
 
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation successful.\n",
-	    tiled ? "T" : "Unt");
-    return TRUE;
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation successful.\n",
+		   tiled ? "T" : "Unt");
+	return TRUE;
 
 failed:
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation failed.\n",
-	    tiled ? "T" : "Unt");
-    return FALSE;
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%siled allocation failed.\n",
+		   tiled ? "T" : "Unt");
+	return FALSE;
 }
+
 /*
  * Try to allocate memory in several ways:
  *  1) If direct rendering is enabled, try to allocate enough memory for tiled
@@ -1065,498 +1062,501 @@ failed:
  *  3) And if all else fails, disable DRI and try just 2D allocations.
  *  4) Give up and fail ScreenInit.
  */
-static Bool
-i830_memory_init(ScrnInfoPtr pScrn)
+static Bool i830_memory_init(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int savedDisplayWidth = pScrn->displayWidth;
-    Bool tiled = FALSE;
-
-    tiled = i830_tiled_width(pI830, &pScrn->displayWidth, pI830->cpp);
-    /* Set up our video memory allocator for the chosen videoRam */
-    if (!i830_allocator_init(pScrn, pScrn->videoRam * KB(1))) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		"Couldn't initialize video memory allocator\n");
-	PreInitCleanup(pScrn);
-	return FALSE;
-    }
-
-    xf86DrvMsg(pScrn->scrnIndex,
-	    pI830->pEnt->device->videoRam ? X_CONFIG : X_DEFAULT,
-	    "VideoRam: %d KB\n", pScrn->videoRam);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int savedDisplayWidth = pScrn->displayWidth;
+	Bool tiled = FALSE;
+
+	tiled = i830_tiled_width(pI830, &pScrn->displayWidth, pI830->cpp);
+	/* Set up our video memory allocator for the chosen videoRam */
+	if (!i830_allocator_init(pScrn, pScrn->videoRam * KB(1))) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Couldn't initialize video memory allocator\n");
+		PreInitCleanup(pScrn);
+		return FALSE;
+	}
 
-    /* Tiled first if we got a good displayWidth */
-    if (tiled) {
-	if (i830_try_memory_allocation(pScrn))
-	    return TRUE;
-	else {
-	    i830_reset_allocations(pScrn);
-	    pI830->tiling = FALSE;
+	xf86DrvMsg(pScrn->scrnIndex,
+		   pI830->pEnt->device->videoRam ? X_CONFIG : X_DEFAULT,
+		   "VideoRam: %d KB\n", pScrn->videoRam);
+
+	/* Tiled first if we got a good displayWidth */
+	if (tiled) {
+		if (i830_try_memory_allocation(pScrn))
+			return TRUE;
+		else {
+			i830_reset_allocations(pScrn);
+			pI830->tiling = FALSE;
+		}
 	}
-    }
 
-    /* If tiling fails we have to disable FBC */
-    pScrn->displayWidth = savedDisplayWidth;
+	/* If tiling fails we have to disable FBC */
+	pScrn->displayWidth = savedDisplayWidth;
 
-    if (i830_try_memory_allocation(pScrn))
-	return TRUE;
+	if (i830_try_memory_allocation(pScrn))
+		return TRUE;
 
-    return FALSE;
+	return FALSE;
 }
 
-void
-i830_init_bufmgr(ScrnInfoPtr pScrn)
+void i830_init_bufmgr(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-   int batch_size;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int batch_size;
 
-   if (pI830->bufmgr)
-       return;
+	if (pI830->bufmgr)
+		return;
 
-   batch_size = 4096 * 4;
+	batch_size = 4096 * 4;
 
-   /* The 865 has issues with larger-than-page-sized batch buffers. */
-   if (IS_I865G(pI830))
-      batch_size = 4096;
+	/* The 865 has issues with larger-than-page-sized batch buffers. */
+	if (IS_I865G(pI830))
+		batch_size = 4096;
 
-   pI830->bufmgr = intel_bufmgr_gem_init(pI830->drmSubFD, batch_size);
-   intel_bufmgr_gem_enable_reuse(pI830->bufmgr);
+	pI830->bufmgr = intel_bufmgr_gem_init(pI830->drmSubFD, batch_size);
+	intel_bufmgr_gem_enable_reuse(pI830->bufmgr);
 }
 
 Bool i830_crtc_on(xf86CrtcPtr crtc)
 {
-    ScrnInfoPtr pScrn = crtc->scrn;
-    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-    int i, active_outputs = 0;
-
-    /* Kernel manages CRTC status based out output config */
-    for (i = 0; i < xf86_config->num_output; i++) {
-       xf86OutputPtr output = xf86_config->output[i];
-       if (output->crtc == crtc &&
-	   drmmode_output_dpms_status(output) == DPMSModeOn)
-	  active_outputs++;
-    }
-
-    if (active_outputs)
-       return TRUE;
-    return FALSE;
+	ScrnInfoPtr pScrn = crtc->scrn;
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	int i, active_outputs = 0;
+
+	/* Kernel manages CRTC status based out output config */
+	for (i = 0; i < xf86_config->num_output; i++) {
+		xf86OutputPtr output = xf86_config->output[i];
+		if (output->crtc == crtc &&
+		    drmmode_output_dpms_status(output) == DPMSModeOn)
+			active_outputs++;
+	}
+
+	if (active_outputs)
+		return TRUE;
+	return FALSE;
 }
 
 int i830_crtc_to_pipe(xf86CrtcPtr crtc)
 {
-    ScrnInfoPtr pScrn = crtc->scrn;
-    I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = crtc->scrn;
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    return drmmode_get_pipe_from_crtc_id(pI830->bufmgr, crtc) ;
+	return drmmode_get_pipe_from_crtc_id(pI830->bufmgr, crtc);
 }
 
 static Bool
 I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
 {
-   ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];;
-   I830Ptr pI830 = I830PTR(pScrn);;
-   VisualPtr visual;
-   MessageType from;
-   struct pci_device *const device = pI830->PciInfo;
-   int fb_bar = IS_I9XX(pI830) ? 2 : 0;
-
-   pScrn->displayWidth = i830_pad_drawable_width(pScrn->virtualX, pI830->cpp);
-
-   /*
-    * The "VideoRam" config file parameter specifies the maximum amount of
-    * memory that will be used/allocated.  When not present, we allow the
-    * driver to allocate as much memory as it wishes to satisfy its
-    * allocations, but if agpgart support isn't available, it gets limited
-    * to the amount of pre-allocated ("stolen") memory.
-    *
-    * Note that in using this value for allocator initialization, we're
-    * limiting aperture allocation to the VideoRam option, rather than limiting
-    * actual memory allocation, so alignment and things will cause less than
-    * VideoRam to be actually used.
-    */
-   if (pI830->pEnt->device->videoRam == 0) {
-      from = X_DEFAULT;
-      pScrn->videoRam = pI830->FbMapSize / KB(1);
-   } else {
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];;
+	I830Ptr pI830 = I830PTR(pScrn);;
+	VisualPtr visual;
+	MessageType from;
+	struct pci_device *const device = pI830->PciInfo;
+	int fb_bar = IS_I9XX(pI830) ? 2 : 0;
+
+	pScrn->displayWidth =
+	    i830_pad_drawable_width(pScrn->virtualX, pI830->cpp);
+
+	/*
+	 * The "VideoRam" config file parameter specifies the maximum amount of
+	 * memory that will be used/allocated.  When not present, we allow the
+	 * driver to allocate as much memory as it wishes to satisfy its
+	 * allocations, but if agpgart support isn't available, it gets limited
+	 * to the amount of pre-allocated ("stolen") memory.
+	 *
+	 * Note that in using this value for allocator initialization, we're
+	 * limiting aperture allocation to the VideoRam option, rather than limiting
+	 * actual memory allocation, so alignment and things will cause less than
+	 * VideoRam to be actually used.
+	 */
+	if (pI830->pEnt->device->videoRam == 0) {
+		from = X_DEFAULT;
+		pScrn->videoRam = pI830->FbMapSize / KB(1);
+	} else {
 #if 0
-      from = X_CONFIG;
-      pScrn->videoRam = pI830->pEnt->device->videoRam;
+		from = X_CONFIG;
+		pScrn->videoRam = pI830->pEnt->device->videoRam;
 #else
-      /* Disable VideoRam configuration, at least for now.  Previously,
-       * VideoRam was necessary to avoid overly low limits on allocated
-       * memory, so users created larger, yet still small, fixed allocation
-       * limits in their config files.  Now, the driver wants to allocate more,
-       * and the old intention of the VideoRam lines that had been entered is
-       * obsolete.
-       */
-      from = X_DEFAULT;
-      pScrn->videoRam = pI830->FbMapSize / KB(1);
-
-      if (pScrn->videoRam != pI830->pEnt->device->videoRam) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "VideoRam configuration found, which is no longer "
-		    "recommended.\n");
-	 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		    "Continuing with default %dkB VideoRam instead of %d "
-		    "kB.\n",
-		    pScrn->videoRam, pI830->pEnt->device->videoRam);
-      }
+		/* Disable VideoRam configuration, at least for now.  Previously,
+		 * VideoRam was necessary to avoid overly low limits on allocated
+		 * memory, so users created larger, yet still small, fixed allocation
+		 * limits in their config files.  Now, the driver wants to allocate more,
+		 * and the old intention of the VideoRam lines that had been entered is
+		 * obsolete.
+		 */
+		from = X_DEFAULT;
+		pScrn->videoRam = pI830->FbMapSize / KB(1);
+
+		if (pScrn->videoRam != pI830->pEnt->device->videoRam) {
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "VideoRam configuration found, which is no longer "
+				   "recommended.\n");
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "Continuing with default %dkB VideoRam instead of %d "
+				   "kB.\n",
+				   pScrn->videoRam,
+				   pI830->pEnt->device->videoRam);
+		}
 #endif
-   }
+	}
 
-   pScrn->videoRam = device->regions[fb_bar].size / 1024;
+	pScrn->videoRam = device->regions[fb_bar].size / 1024;
 
 #ifdef DRI2
-   if (pI830->directRenderingType == DRI_NONE && I830DRI2ScreenInit(pScreen))
-       pI830->directRenderingType = DRI_DRI2;
+	if (pI830->directRenderingType == DRI_NONE
+	    && I830DRI2ScreenInit(pScreen))
+		pI830->directRenderingType = DRI_DRI2;
 #endif
 
-   /* Enable tiling by default */
-   pI830->tiling = TRUE;
-
-   /* Allow user override if they set a value */
-   if (xf86IsOptionSet(pI830->Options, OPTION_TILING)) {
-       if (xf86ReturnOptValBool(pI830->Options, OPTION_TILING, FALSE))
-	   pI830->tiling = TRUE;
-       else
-	   pI830->tiling = FALSE;
-   }
-
-   /* SwapBuffers delays to avoid tearing */
-   pI830->swapbuffers_wait = TRUE;
-
-   /* Allow user override if they set a value */
-   if (xf86IsOptionSet(pI830->Options, OPTION_SWAPBUFFERS_WAIT)) {
-       if (xf86ReturnOptValBool(pI830->Options, OPTION_SWAPBUFFERS_WAIT, FALSE))
-	   pI830->swapbuffers_wait = TRUE;
-       else
-	   pI830->swapbuffers_wait = FALSE;
-   }
-
-   xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Tiling %sabled\n", pI830->tiling ?
-	      "en" : "dis");
-   xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "SwapBuffers wait %sabled\n",
-	      pI830->swapbuffers_wait ? "en" : "dis");
-
-   pI830->last_3d = LAST_3D_OTHER;
-   pI830->overlayOn = FALSE;
-
-    /*
-     * Set this so that the overlay allocation is factored in when
-     * appropriate.
-     */
-    pI830->XvEnabled = TRUE;
-
-   if (!i830_memory_init(pScrn)) {
-       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-	       "Couldn't allocate video memory\n");
-       return FALSE;
-   }
-
-   i830_fixup_mtrrs(pScrn);
-
-   miClearVisualTypes();
-   if (!miSetVisualTypes(pScrn->depth,
-			    miGetDefaultVisualMask(pScrn->depth),
-			    pScrn->rgbBits, pScrn->defaultVisual))
-	 return FALSE;
-   if (!miSetPixmapDepths())
-      return FALSE;
-
-   DPRINTF(PFX, "assert( if(!I830EnterVT(scrnIndex, 0)) )\n");
-
-    if (pScrn->virtualX > pScrn->displayWidth)
-	pScrn->displayWidth = pScrn->virtualX;
-
-   /* If the front buffer is not a BO, we need to
-    * set the initial framebuffer pixmap to point at
-    * it
-    */
-   pScrn->fbOffset = pI830->front_buffer->offset;
-
-   DPRINTF(PFX, "assert( if(!fbScreenInit(pScreen, ...) )\n");
-   if (!fbScreenInit(pScreen, NULL,
-                     pScrn->virtualX, pScrn->virtualY,
-		     pScrn->xDpi, pScrn->yDpi,
-		     pScrn->displayWidth, pScrn->bitsPerPixel))
-      return FALSE;
-
-   if (pScrn->bitsPerPixel > 8) {
-      /* Fixup RGB ordering */
-      visual = pScreen->visuals + pScreen->numVisuals;
-      while (--visual >= pScreen->visuals) {
-	 if ((visual->class | DynamicClass) == DirectColor) {
-	    visual->offsetRed = pScrn->offset.red;
-	    visual->offsetGreen = pScrn->offset.green;
-	    visual->offsetBlue = pScrn->offset.blue;
-	    visual->redMask = pScrn->mask.red;
-	    visual->greenMask = pScrn->mask.green;
-	    visual->blueMask = pScrn->mask.blue;
-	 }
-      }
-   }
-
-   fbPictureInit(pScreen, NULL, 0);
-
-   xf86SetBlackWhitePixels(pScreen);
-
-   if (!I830AccelInit(pScreen)) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Hardware acceleration initialization failed\n");
-      return FALSE;
-   }
-
-   if (IS_I965G(pI830))
-       pI830->batch_flush_notify = i965_batch_flush_notify;
-   else if (IS_I9XX(pI830))
-       pI830->batch_flush_notify = i915_batch_flush_notify;
-   else
-       pI830->batch_flush_notify = i830_batch_flush_notify;
-
-   miInitializeBackingStore(pScreen);
-   xf86SetBackingStore(pScreen);
-   xf86SetSilkenMouse(pScreen);
-   miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
-
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing HW Cursor\n");
-
-   if (!xf86_cursors_init (pScreen, I810_CURSOR_X, I810_CURSOR_Y,
-			   (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
-			    HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
-			    HARDWARE_CURSOR_INVERT_MASK |
-			    HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
-			    HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
-			    HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 |
-			    HARDWARE_CURSOR_UPDATE_UNHIDDEN |
-			    HARDWARE_CURSOR_ARGB))) {
-      xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		 "Hardware cursor initialization failed\n");
-   }
-
-   /* Must force it before EnterVT, so we are in control of VT and
-    * later memory should be bound when allocating, e.g rotate_mem */
-   pScrn->vtSema = TRUE;
-
-   if (!I830EnterVT(scrnIndex, 0))
-      return FALSE;
-
-   pI830->BlockHandler = pScreen->BlockHandler;
-   pScreen->BlockHandler = I830BlockHandler;
-
-   pScreen->SaveScreen = xf86SaveScreen;
-   pI830->CloseScreen = pScreen->CloseScreen;
-   pScreen->CloseScreen = I830CloseScreen;
-   pI830->CreateScreenResources = pScreen->CreateScreenResources;
-   pScreen->CreateScreenResources = i830CreateScreenResources;
-
-   if (!xf86CrtcScreenInit (pScreen))
-       return FALSE;
-
-   DPRINTF(PFX, "assert( if(!miCreateDefColormap(pScreen)) )\n");
-   if (!miCreateDefColormap(pScreen))
-      return FALSE;
-
-   DPRINTF(PFX, "assert( if(!xf86HandleColormaps(pScreen, ...)) )\n");
-   if (!xf86HandleColormaps(pScreen, 256, 8, I830LoadPalette, NULL,
-			    CMAP_RELOAD_ON_MODE_SWITCH |
-			    CMAP_PALETTED_TRUECOLOR)) {
-      return FALSE;
-   }
-
-   xf86DPMSInit(pScreen, xf86DPMSSet, 0);
+	/* Enable tiling by default */
+	pI830->tiling = TRUE;
+
+	/* Allow user override if they set a value */
+	if (xf86IsOptionSet(pI830->Options, OPTION_TILING)) {
+		if (xf86ReturnOptValBool(pI830->Options, OPTION_TILING, FALSE))
+			pI830->tiling = TRUE;
+		else
+			pI830->tiling = FALSE;
+	}
+
+	/* SwapBuffers delays to avoid tearing */
+	pI830->swapbuffers_wait = TRUE;
+
+	/* Allow user override if they set a value */
+	if (xf86IsOptionSet(pI830->Options, OPTION_SWAPBUFFERS_WAIT)) {
+		if (xf86ReturnOptValBool
+		    (pI830->Options, OPTION_SWAPBUFFERS_WAIT, FALSE))
+			pI830->swapbuffers_wait = TRUE;
+		else
+			pI830->swapbuffers_wait = FALSE;
+	}
+
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Tiling %sabled\n",
+		   pI830->tiling ? "en" : "dis");
+	xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "SwapBuffers wait %sabled\n",
+		   pI830->swapbuffers_wait ? "en" : "dis");
+
+	pI830->last_3d = LAST_3D_OTHER;
+	pI830->overlayOn = FALSE;
+
+	/*
+	 * Set this so that the overlay allocation is factored in when
+	 * appropriate.
+	 */
+	pI830->XvEnabled = TRUE;
+
+	if (!i830_memory_init(pScrn)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Couldn't allocate video memory\n");
+		return FALSE;
+	}
+
+	i830_fixup_mtrrs(pScrn);
+
+	miClearVisualTypes();
+	if (!miSetVisualTypes(pScrn->depth,
+			      miGetDefaultVisualMask(pScrn->depth),
+			      pScrn->rgbBits, pScrn->defaultVisual))
+		return FALSE;
+	if (!miSetPixmapDepths())
+		return FALSE;
+
+	DPRINTF(PFX, "assert( if(!I830EnterVT(scrnIndex, 0)) )\n");
+
+	if (pScrn->virtualX > pScrn->displayWidth)
+		pScrn->displayWidth = pScrn->virtualX;
+
+	/* If the front buffer is not a BO, we need to
+	 * set the initial framebuffer pixmap to point at
+	 * it
+	 */
+	pScrn->fbOffset = pI830->front_buffer->offset;
+
+	DPRINTF(PFX, "assert( if(!fbScreenInit(pScreen, ...) )\n");
+	if (!fbScreenInit(pScreen, NULL,
+			  pScrn->virtualX, pScrn->virtualY,
+			  pScrn->xDpi, pScrn->yDpi,
+			  pScrn->displayWidth, pScrn->bitsPerPixel))
+		return FALSE;
+
+	if (pScrn->bitsPerPixel > 8) {
+		/* Fixup RGB ordering */
+		visual = pScreen->visuals + pScreen->numVisuals;
+		while (--visual >= pScreen->visuals) {
+			if ((visual->class | DynamicClass) == DirectColor) {
+				visual->offsetRed = pScrn->offset.red;
+				visual->offsetGreen = pScrn->offset.green;
+				visual->offsetBlue = pScrn->offset.blue;
+				visual->redMask = pScrn->mask.red;
+				visual->greenMask = pScrn->mask.green;
+				visual->blueMask = pScrn->mask.blue;
+			}
+		}
+	}
+
+	fbPictureInit(pScreen, NULL, 0);
+
+	xf86SetBlackWhitePixels(pScreen);
+
+	if (!I830AccelInit(pScreen)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Hardware acceleration initialization failed\n");
+		return FALSE;
+	}
+
+	if (IS_I965G(pI830))
+		pI830->batch_flush_notify = i965_batch_flush_notify;
+	else if (IS_I9XX(pI830))
+		pI830->batch_flush_notify = i915_batch_flush_notify;
+	else
+		pI830->batch_flush_notify = i830_batch_flush_notify;
+
+	miInitializeBackingStore(pScreen);
+	xf86SetBackingStore(pScreen);
+	xf86SetSilkenMouse(pScreen);
+	miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
+
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Initializing HW Cursor\n");
+
+	if (!xf86_cursors_init(pScreen, I810_CURSOR_X, I810_CURSOR_Y,
+			       (HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
+				HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
+				HARDWARE_CURSOR_INVERT_MASK |
+				HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
+				HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
+				HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64 |
+				HARDWARE_CURSOR_UPDATE_UNHIDDEN |
+				HARDWARE_CURSOR_ARGB))) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Hardware cursor initialization failed\n");
+	}
+
+	/* Must force it before EnterVT, so we are in control of VT and
+	 * later memory should be bound when allocating, e.g rotate_mem */
+	pScrn->vtSema = TRUE;
+
+	if (!I830EnterVT(scrnIndex, 0))
+		return FALSE;
+
+	pI830->BlockHandler = pScreen->BlockHandler;
+	pScreen->BlockHandler = I830BlockHandler;
+
+	pScreen->SaveScreen = xf86SaveScreen;
+	pI830->CloseScreen = pScreen->CloseScreen;
+	pScreen->CloseScreen = I830CloseScreen;
+	pI830->CreateScreenResources = pScreen->CreateScreenResources;
+	pScreen->CreateScreenResources = i830CreateScreenResources;
+
+	if (!xf86CrtcScreenInit(pScreen))
+		return FALSE;
+
+	DPRINTF(PFX, "assert( if(!miCreateDefColormap(pScreen)) )\n");
+	if (!miCreateDefColormap(pScreen))
+		return FALSE;
+
+	DPRINTF(PFX, "assert( if(!xf86HandleColormaps(pScreen, ...)) )\n");
+	if (!xf86HandleColormaps(pScreen, 256, 8, I830LoadPalette, NULL,
+				 CMAP_RELOAD_ON_MODE_SWITCH |
+				 CMAP_PALETTED_TRUECOLOR)) {
+		return FALSE;
+	}
+
+	xf86DPMSInit(pScreen, xf86DPMSSet, 0);
 
 #ifdef INTEL_XVMC
-    pI830->XvMCEnabled = FALSE;
-    from = ((pI830->directRenderingType == DRI_DRI2) &&
-            xf86GetOptValBool(pI830->Options, OPTION_XVMC,
-                              &pI830->XvMCEnabled) ? X_CONFIG : X_DEFAULT);
-    xf86DrvMsg(pScrn->scrnIndex, from, "Intel XvMC decoder %sabled\n",
-	       pI830->XvMCEnabled ? "en" : "dis");
+	pI830->XvMCEnabled = FALSE;
+	from = ((pI830->directRenderingType == DRI_DRI2) &&
+		xf86GetOptValBool(pI830->Options, OPTION_XVMC,
+				  &pI830->XvMCEnabled) ? X_CONFIG : X_DEFAULT);
+	xf86DrvMsg(pScrn->scrnIndex, from, "Intel XvMC decoder %sabled\n",
+		   pI830->XvMCEnabled ? "en" : "dis");
 #endif
-   /* Init video */
-   if (pI830->XvEnabled)
-      I830InitVideo(pScreen);
+	/* Init video */
+	if (pI830->XvEnabled)
+		I830InitVideo(pScreen);
 
-   /* Setup 3D engine, needed for rotation too */
-   IntelEmitInvarientState(pScrn);
+	/* Setup 3D engine, needed for rotation too */
+	IntelEmitInvarientState(pScrn);
 
 #if defined(DRI2)
-   switch (pI830->directRenderingType) {
-   case DRI_DRI2:
-      pI830->directRenderingOpen = TRUE;
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: DRI2 Enabled\n");
-      break;
-   case DRI_DISABLED:
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Disabled\n");
-      break;
-   case DRI_NONE:
-      xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Failed\n");
-      break;
-   }
+	switch (pI830->directRenderingType) {
+	case DRI_DRI2:
+		pI830->directRenderingOpen = TRUE;
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "direct rendering: DRI2 Enabled\n");
+		break;
+	case DRI_DISABLED:
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "direct rendering: Disabled\n");
+		break;
+	case DRI_NONE:
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "direct rendering: Failed\n");
+		break;
+	}
 #else
-   xf86DrvMsg(pScrn->scrnIndex, X_INFO, "direct rendering: Not available\n");
+	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+		   "direct rendering: Not available\n");
 #endif
 
-   if (serverGeneration == 1)
-      xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
+	if (serverGeneration == 1)
+		xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options);
 
-   pI830->suspended = FALSE;
+	pI830->suspended = FALSE;
 
-   return TRUE;
+	return TRUE;
 }
 
-static void
-i830AdjustFrame(int scrnIndex, int x, int y, int flags)
+static void i830AdjustFrame(int scrnIndex, int x, int y, int flags)
 {
 }
 
-static void
-I830FreeScreen(int scrnIndex, int flags)
+static void I830FreeScreen(int scrnIndex, int flags)
 {
-    ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 #ifdef INTEL_XVMC
-    I830Ptr pI830 = I830PTR(pScrn);
-    if (pI830 && pI830->XvMCEnabled)
-	intel_xvmc_finish(xf86Screens[scrnIndex]);
+	I830Ptr pI830 = I830PTR(pScrn);
+	if (pI830 && pI830->XvMCEnabled)
+		intel_xvmc_finish(xf86Screens[scrnIndex]);
 #endif
 
-    i830_close_drm_master(pScrn);
+	i830_close_drm_master(pScrn);
 
-   I830FreeRec(xf86Screens[scrnIndex]);
-   if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
-      vgaHWFreeHWRec(xf86Screens[scrnIndex]);
+	I830FreeRec(xf86Screens[scrnIndex]);
+	if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
+		vgaHWFreeHWRec(xf86Screens[scrnIndex]);
 }
 
-static void
-I830LeaveVT(int scrnIndex, int flags)
+static void I830LeaveVT(int scrnIndex, int flags)
 {
-   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-   I830Ptr pI830 = I830PTR(pScrn);
-   int ret;
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	I830Ptr pI830 = I830PTR(pScrn);
+	int ret;
 
-   DPRINTF(PFX, "Leave VT\n");
+	DPRINTF(PFX, "Leave VT\n");
 
-   xf86RotateFreeShadow(pScrn);
+	xf86RotateFreeShadow(pScrn);
 
-   xf86_hide_cursors (pScrn);
+	xf86_hide_cursors(pScrn);
 
-   I830Sync(pScrn);
+	I830Sync(pScrn);
 
-   intel_batch_teardown(pScrn);
+	intel_batch_teardown(pScrn);
 
-   if (IS_I965G(pI830))
-      gen4_render_state_cleanup(pScrn);
+	if (IS_I965G(pI830))
+		gen4_render_state_cleanup(pScrn);
 
-   ret = drmDropMaster(pI830->drmSubFD);
-   if (ret)
-      xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		 "drmDropMaster failed: %s\n", strerror(errno));
+	ret = drmDropMaster(pI830->drmSubFD);
+	if (ret)
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "drmDropMaster failed: %s\n", strerror(errno));
 }
 
 /*
  * This gets called when gaining control of the VT, and from ScreenInit().
  */
-static Bool
-I830EnterVT(int scrnIndex, int flags)
+static Bool I830EnterVT(int scrnIndex, int flags)
 {
-   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-   I830Ptr  pI830 = I830PTR(pScrn);
-   int ret;
-
-   DPRINTF(PFX, "Enter VT\n");
-
-   ret = drmSetMaster(pI830->drmSubFD);
-   if (ret) {
-      if (errno == EINVAL) {
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "drmSetMaster failed: 2.6.29 or newer kernel required for "
-		    "multi-server DRI\n");
-      } else {
-	 xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "drmSetMaster failed: %s\n", strerror(errno));
-      }
-   }
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	I830Ptr pI830 = I830PTR(pScrn);
+	int ret;
+
+	DPRINTF(PFX, "Enter VT\n");
+
+	ret = drmSetMaster(pI830->drmSubFD);
+	if (ret) {
+		if (errno == EINVAL) {
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "drmSetMaster failed: 2.6.29 or newer kernel required for "
+				   "multi-server DRI\n");
+		} else {
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "drmSetMaster failed: %s\n",
+				   strerror(errno));
+		}
+	}
 
-   if (!i830_bind_all_memory(pScrn))
-      return FALSE;
+	if (!i830_bind_all_memory(pScrn))
+		return FALSE;
 
-   i830_describe_allocations(pScrn, 1, "");
+	i830_describe_allocations(pScrn, 1, "");
 
-   intel_batch_init(pScrn);
+	intel_batch_init(pScrn);
 
-   if (IS_I965G(pI830))
-      gen4_render_state_init(pScrn);
+	if (IS_I965G(pI830))
+		gen4_render_state_init(pScrn);
 
-   if (!xf86SetDesiredModes (pScrn))
-      return FALSE;
+	if (!xf86SetDesiredModes(pScrn))
+		return FALSE;
 
-   /* Mark 3D state as being clobbered and setup the basics */
-   pI830->last_3d = LAST_3D_OTHER;
-   IntelEmitInvarientState(pScrn);
+	/* Mark 3D state as being clobbered and setup the basics */
+	pI830->last_3d = LAST_3D_OTHER;
+	IntelEmitInvarientState(pScrn);
 
-   return TRUE;
+	return TRUE;
 }
 
-static Bool
-I830SwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
+static Bool I830SwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 {
-   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
 
-   return xf86SetSingleMode (pScrn, mode, RR_Rotate_0);
+	return xf86SetSingleMode(pScrn, mode, RR_Rotate_0);
 }
 
-static Bool
-I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
+static Bool I830CloseScreen(int scrnIndex, ScreenPtr pScreen)
 {
-   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-   I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-   if (pScrn->vtSema == TRUE) {
-      I830LeaveVT(scrnIndex, 0);
-   }
+	if (pScrn->vtSema == TRUE) {
+		I830LeaveVT(scrnIndex, 0);
+	}
 
-   if (pI830->uxa_driver) {
-       uxa_driver_fini (pScreen);
-       xfree (pI830->uxa_driver);
-       pI830->uxa_driver = NULL;
-   }
-   if (pI830->front_buffer) {
-	i830_set_pixmap_bo(pScreen->GetScreenPixmap(pScreen), NULL);
-	i830_free_memory(pScrn, pI830->front_buffer);
-	pI830->front_buffer = NULL;
-   }
+	if (pI830->uxa_driver) {
+		uxa_driver_fini(pScreen);
+		xfree(pI830->uxa_driver);
+		pI830->uxa_driver = NULL;
+	}
+	if (pI830->front_buffer) {
+		i830_set_pixmap_bo(pScreen->GetScreenPixmap(pScreen), NULL);
+		i830_free_memory(pScrn, pI830->front_buffer);
+		pI830->front_buffer = NULL;
+	}
 
-   xf86_cursors_fini (pScreen);
+	xf86_cursors_fini(pScreen);
 
-   i830_allocator_fini(pScrn);
+	i830_allocator_fini(pScrn);
 
-   i965_free_video(pScrn);
+	i965_free_video(pScrn);
 
-   pScreen->CloseScreen = pI830->CloseScreen;
-   (*pScreen->CloseScreen) (scrnIndex, pScreen);
+	pScreen->CloseScreen = pI830->CloseScreen;
+	(*pScreen->CloseScreen) (scrnIndex, pScreen);
 
-   if (pI830->directRenderingOpen && pI830->directRenderingType == DRI_DRI2) {
-      pI830->directRenderingOpen = FALSE;
-      I830DRI2CloseScreen(pScreen);
-   }
+	if (pI830->directRenderingOpen
+	    && pI830->directRenderingType == DRI_DRI2) {
+		pI830->directRenderingOpen = FALSE;
+		I830DRI2CloseScreen(pScreen);
+	}
 
-   xf86GARTCloseScreen(scrnIndex);
+	xf86GARTCloseScreen(scrnIndex);
 
-   pScrn->vtSema = FALSE;
-   return TRUE;
+	pScrn->vtSema = FALSE;
+	return TRUE;
 }
 
 static ModeStatus
 I830ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
 {
-   if (mode->Flags & V_INTERLACE) {
-      if (verbose) {
-	 xf86DrvMsg(scrnIndex, X_PROBED,
-		    "Removing interlaced mode \"%s\"\n", mode->name);
-      }
-      return MODE_BAD;
-   }
-   return MODE_OK;
+	if (mode->Flags & V_INTERLACE) {
+		if (verbose) {
+			xf86DrvMsg(scrnIndex, X_PROBED,
+				   "Removing interlaced mode \"%s\"\n",
+				   mode->name);
+		}
+		return MODE_BAD;
+	}
+	return MODE_OK;
 }
 
 #ifndef SUSPEND_SLEEP
@@ -1571,88 +1571,86 @@ I830ValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
  * DoApmEvent() in common/xf86PM.c, including if we want to see events other
  * than suspend/resume.
  */
-static Bool
-I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
+static Bool I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
 {
-   ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   DPRINTF(PFX, "Enter VT, event %d, undo: %s\n", event, BOOLTOSTRING(undo));
- 
-   switch(event) {
-   case XF86_APM_SYS_SUSPEND:
-   case XF86_APM_CRITICAL_SUSPEND: /*do we want to delay a critical suspend?*/
-   case XF86_APM_USER_SUSPEND:
-   case XF86_APM_SYS_STANDBY:
-   case XF86_APM_USER_STANDBY:
-      if (!undo && !pI830->suspended) {
-	 pScrn->LeaveVT(scrnIndex, 0);
-	 pI830->suspended = TRUE;
-	 sleep(SUSPEND_SLEEP);
-      } else if (undo && pI830->suspended) {
-	 sleep(RESUME_SLEEP);
-	 pScrn->EnterVT(scrnIndex, 0);
-	 pI830->suspended = FALSE;
-      }
-      break;
-   case XF86_APM_STANDBY_RESUME:
-   case XF86_APM_NORMAL_RESUME:
-   case XF86_APM_CRITICAL_RESUME:
-      if (pI830->suspended) {
-	 sleep(RESUME_SLEEP);
-	 pScrn->EnterVT(scrnIndex, 0);
-	 pI830->suspended = FALSE;
-	 /*
-	  * Turn the screen saver off when resuming.  This seems to be
-	  * needed to stop xscreensaver kicking in (when used).
-	  *
-	  * XXX DoApmEvent() should probably call this just like
-	  * xf86VTSwitch() does.  Maybe do it here only in 4.2
-	  * compatibility mode.
-	  */
-	 SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
-      }
-      break;
-   /* This is currently used for ACPI */
-   case XF86_APM_CAPABILITY_CHANGED:
-      ErrorF("I830PMEvent: Capability change\n");
-
-      SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
-
-      break;
-   default:
-      ErrorF("I830PMEvent: received APM event %d\n", event);
-   }
-   return TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	DPRINTF(PFX, "Enter VT, event %d, undo: %s\n", event,
+		BOOLTOSTRING(undo));
+
+	switch (event) {
+	case XF86_APM_SYS_SUSPEND:
+	case XF86_APM_CRITICAL_SUSPEND:	/*do we want to delay a critical suspend? */
+	case XF86_APM_USER_SUSPEND:
+	case XF86_APM_SYS_STANDBY:
+	case XF86_APM_USER_STANDBY:
+		if (!undo && !pI830->suspended) {
+			pScrn->LeaveVT(scrnIndex, 0);
+			pI830->suspended = TRUE;
+			sleep(SUSPEND_SLEEP);
+		} else if (undo && pI830->suspended) {
+			sleep(RESUME_SLEEP);
+			pScrn->EnterVT(scrnIndex, 0);
+			pI830->suspended = FALSE;
+		}
+		break;
+	case XF86_APM_STANDBY_RESUME:
+	case XF86_APM_NORMAL_RESUME:
+	case XF86_APM_CRITICAL_RESUME:
+		if (pI830->suspended) {
+			sleep(RESUME_SLEEP);
+			pScrn->EnterVT(scrnIndex, 0);
+			pI830->suspended = FALSE;
+			/*
+			 * Turn the screen saver off when resuming.  This seems to be
+			 * needed to stop xscreensaver kicking in (when used).
+			 *
+			 * XXX DoApmEvent() should probably call this just like
+			 * xf86VTSwitch() does.  Maybe do it here only in 4.2
+			 * compatibility mode.
+			 */
+			SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
+		}
+		break;
+		/* This is currently used for ACPI */
+	case XF86_APM_CAPABILITY_CHANGED:
+		ErrorF("I830PMEvent: Capability change\n");
+
+		SaveScreens(SCREEN_SAVER_FORCER, ScreenSaverReset);
+
+		break;
+	default:
+		ErrorF("I830PMEvent: received APM event %d\n", event);
+	}
+	return TRUE;
 }
 
-xf86CrtcPtr
-i830_pipe_to_crtc(ScrnInfoPtr pScrn, int pipe)
+xf86CrtcPtr i830_pipe_to_crtc(ScrnInfoPtr pScrn, int pipe)
 {
-   xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
-   int c;
-   
-   for (c = 0; c < config->num_crtc; c++) {
-      xf86CrtcPtr crtc = config->crtc[c];
-      I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+	xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(pScrn);
+	int c;
 
-      if (intel_crtc->pipe == pipe)
-	  return crtc;
-   }
+	for (c = 0; c < config->num_crtc; c++) {
+		xf86CrtcPtr crtc = config->crtc[c];
+		I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
 
-   return NULL;
-} 
+		if (intel_crtc->pipe == pipe)
+			return crtc;
+	}
 
-void
-I830InitpScrn(ScrnInfoPtr pScrn)
+	return NULL;
+}
+
+void I830InitpScrn(ScrnInfoPtr pScrn)
 {
-   pScrn->PreInit = I830PreInit;
-   pScrn->ScreenInit = I830ScreenInit;
-   pScrn->SwitchMode = I830SwitchMode;
-   pScrn->AdjustFrame = i830AdjustFrame;
-   pScrn->EnterVT = I830EnterVT;
-   pScrn->LeaveVT = I830LeaveVT;
-   pScrn->FreeScreen = I830FreeScreen;
-   pScrn->ValidMode = I830ValidMode;
-   pScrn->PMEvent = I830PMEvent;
+	pScrn->PreInit = I830PreInit;
+	pScrn->ScreenInit = I830ScreenInit;
+	pScrn->SwitchMode = I830SwitchMode;
+	pScrn->AdjustFrame = i830AdjustFrame;
+	pScrn->EnterVT = I830EnterVT;
+	pScrn->LeaveVT = I830LeaveVT;
+	pScrn->FreeScreen = I830FreeScreen;
+	pScrn->ValidMode = I830ValidMode;
+	pScrn->PMEvent = I830PMEvent;
 }
diff --git a/src/i830_hwmc.c b/src/i830_hwmc.c
index 3aa1c987..896cd94b 100644
--- a/src/i830_hwmc.c
+++ b/src/i830_hwmc.c
@@ -37,141 +37,141 @@ struct intel_xvmc_driver *xvmc_driver;
 /* set global current driver for xvmc */
 static Bool intel_xvmc_set_driver(struct intel_xvmc_driver *d)
 {
-    if (xvmc_driver) {
-	ErrorF("XvMC driver already set!\n");
-	return FALSE;
-    } else
-	xvmc_driver = d;
-    return TRUE;
+	if (xvmc_driver) {
+		ErrorF("XvMC driver already set!\n");
+		return FALSE;
+	} else
+		xvmc_driver = d;
+	return TRUE;
 }
 
 /* check chip type and load xvmc driver */
 /* This must be first called! */
 Bool intel_xvmc_probe(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    Bool ret = FALSE;
-
-    if (!pI830->XvMCEnabled)
-	return FALSE;
-
-    /* Needs KMS support. */
-    if (IS_I915G(pI830) || IS_I915GM(pI830))
-	return FALSE;
-
-    if (IS_I9XX(pI830)) {
-	if (IS_I915(pI830))
-	    ret = intel_xvmc_set_driver(&i915_xvmc_driver);
-	else if (IS_G4X(pI830) || IS_IGDNG(pI830))
-	    ret = intel_xvmc_set_driver(&vld_xvmc_driver);
-	else
-	    ret = intel_xvmc_set_driver(&i965_xvmc_driver);
-    } else {
-	ErrorF("Your chipset doesn't support XvMC.\n");
-	return FALSE;
-    }
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	Bool ret = FALSE;
+
+	if (!pI830->XvMCEnabled)
+		return FALSE;
+
+	/* Needs KMS support. */
+	if (IS_I915G(pI830) || IS_I915GM(pI830))
+		return FALSE;
+
+	if (IS_I9XX(pI830)) {
+		if (IS_I915(pI830))
+			ret = intel_xvmc_set_driver(&i915_xvmc_driver);
+		else if (IS_G4X(pI830) || IS_IGDNG(pI830))
+			ret = intel_xvmc_set_driver(&vld_xvmc_driver);
+		else
+			ret = intel_xvmc_set_driver(&i965_xvmc_driver);
+	} else {
+		ErrorF("Your chipset doesn't support XvMC.\n");
+		return FALSE;
+	}
+	return TRUE;
 }
 
 void intel_xvmc_finish(ScrnInfoPtr pScrn)
 {
-    if (!xvmc_driver)
-	return;
-    (*xvmc_driver->fini)(pScrn);
+	if (!xvmc_driver)
+		return;
+	(*xvmc_driver->fini) (pScrn);
 }
 
 Bool intel_xvmc_driver_init(ScreenPtr pScreen, XF86VideoAdaptorPtr xv_adaptor)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct drm_i915_setparam sp;
-    int ret;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct drm_i915_setparam sp;
+	int ret;
+
+	if (!xvmc_driver) {
+		ErrorF("Failed to probe XvMC driver.\n");
+		return FALSE;
+	}
+
+	if (!(*xvmc_driver->init) (pScrn, xv_adaptor)) {
+		ErrorF("XvMC driver initialize failed.\n");
+		return FALSE;
+	}
+
+	/* Currently XvMC uses batchbuffer */
+	sp.param = I915_SETPARAM_ALLOW_BATCHBUFFER;
+	sp.value = 1;
+	ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM,
+			      &sp, sizeof(sp));
+	if (ret == 0)
+		return TRUE;
 
-    if (!xvmc_driver) {
-	ErrorF("Failed to probe XvMC driver.\n");
 	return FALSE;
-    }
-
-    if (!(*xvmc_driver->init)(pScrn, xv_adaptor)) {
-	ErrorF("XvMC driver initialize failed.\n");
-	return FALSE;
-    }
-
-    /* Currently XvMC uses batchbuffer */
-    sp.param = I915_SETPARAM_ALLOW_BATCHBUFFER;
-    sp.value = 1; 
-    ret = drmCommandWrite(pI830->drmSubFD, DRM_I915_SETPARAM,
-                          &sp, sizeof(sp));
-    if (ret == 0)
-        return TRUE;
-    
-    return FALSE;
 }
 
 Bool intel_xvmc_screen_init(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    char buf[64];
-
-    if (!xvmc_driver)
-	return FALSE;
-
-    if (xf86XvMCScreenInit(pScreen, 1, &xvmc_driver->adaptor)) {
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		"[XvMC] %s driver initialized.\n",
-		xvmc_driver->name);
-    } else {
-	intel_xvmc_finish(pScrn);
-	pI830->XvMCEnabled = FALSE;
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		"[XvMC] Failed to initialize XvMC.\n");
-	return FALSE;
-    }
-
-    sprintf(buf, "pci:%04x:%02x:%02x.%d",
-            pI830->PciInfo->domain,
-            pI830->PciInfo->bus,
-            pI830->PciInfo->dev,
-            pI830->PciInfo->func);
-
-    xf86XvMCRegisterDRInfo(pScreen, INTEL_XVMC_LIBNAME,
-                           buf,
-                           INTEL_XVMC_MAJOR, INTEL_XVMC_MINOR, INTEL_XVMC_PATCHLEVEL);
-    return TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	char buf[64];
+
+	if (!xvmc_driver)
+		return FALSE;
+
+	if (xf86XvMCScreenInit(pScreen, 1, &xvmc_driver->adaptor)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "[XvMC] %s driver initialized.\n",
+			   xvmc_driver->name);
+	} else {
+		intel_xvmc_finish(pScrn);
+		pI830->XvMCEnabled = FALSE;
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+			   "[XvMC] Failed to initialize XvMC.\n");
+		return FALSE;
+	}
+
+	sprintf(buf, "pci:%04x:%02x:%02x.%d",
+		pI830->PciInfo->domain,
+		pI830->PciInfo->bus, pI830->PciInfo->dev, pI830->PciInfo->func);
+
+	xf86XvMCRegisterDRInfo(pScreen, INTEL_XVMC_LIBNAME,
+			       buf,
+			       INTEL_XVMC_MAJOR, INTEL_XVMC_MINOR,
+			       INTEL_XVMC_PATCHLEVEL);
+	return TRUE;
 }
 
 Bool intel_xvmc_init_batch(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int size = KB(64);
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC] batch buffer",
-                                   &(xvmc_driver->batch), size,
-                                   ALIGN_BOTH_ENDS))
-        return FALSE;
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(xvmc_driver->batch->offset+pI830->LinearAddr),
-                  xvmc_driver->batch->size, DRM_AGP, 0,
-                  &xvmc_driver->batch_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(batchbuffer_handle) failed!\n");
-        return FALSE;
-    }
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int size = KB(64);
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC] batch buffer",
+				       &(xvmc_driver->batch), size,
+				       ALIGN_BOTH_ENDS))
+		return FALSE;
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (xvmc_driver->batch->offset +
+				      pI830->LinearAddr),
+		      xvmc_driver->batch->size, DRM_AGP, 0,
+		      &xvmc_driver->batch_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(batchbuffer_handle) failed!\n");
+		return FALSE;
+	}
+	return TRUE;
 }
 
 void intel_xvmc_fini_batch(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    if (xvmc_driver->batch_handle) {
-        drmRmMap(pI830->drmSubFD, xvmc_driver->batch_handle);
-        xvmc_driver->batch_handle = 0;
-    }
-    if (xvmc_driver->batch) {
-        i830_free_xvmc_buffer(pScrn, xvmc_driver->batch);
-        xvmc_driver->batch = NULL;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	if (xvmc_driver->batch_handle) {
+		drmRmMap(pI830->drmSubFD, xvmc_driver->batch_handle);
+		xvmc_driver->batch_handle = 0;
+	}
+	if (xvmc_driver->batch) {
+		i830_free_xvmc_buffer(pScrn, xvmc_driver->batch);
+		xvmc_driver->batch = NULL;
+	}
 }
diff --git a/src/i830_hwmc.h b/src/i830_hwmc.h
index 7db6a86a..0b512b4e 100644
--- a/src/i830_hwmc.h
+++ b/src/i830_hwmc.h
@@ -49,52 +49,51 @@
 
 /* supported surface types */
 enum {
-    SURFACE_TYPE_MPEG2_MPML = FOURCC_XVMC, /* mpeg2 MP@ML */
-    SURFACE_TYPE_MPEG1_MPML,		   /* mpeg1 MP@ML */
-    SURFACE_TYPE_MAX
+	SURFACE_TYPE_MPEG2_MPML = FOURCC_XVMC,	/* mpeg2 MP@ML */
+	SURFACE_TYPE_MPEG1_MPML,	/* mpeg1 MP@ML */
+	SURFACE_TYPE_MAX
 };
 
 /* common header for context private */
-struct hwmc_buffer
-{
-    drm_handle_t handle;
-    unsigned long offset;
-    unsigned long size;
-    unsigned long bus_addr;
+struct hwmc_buffer {
+	drm_handle_t handle;
+	unsigned long offset;
+	unsigned long size;
+	unsigned long bus_addr;
 };
 
 struct _intel_xvmc_common {
-    unsigned int type;
-    struct hwmc_buffer batchbuffer;
-    unsigned int kernel_exec_fencing:1;
+	unsigned int type;
+	struct hwmc_buffer batchbuffer;
+	unsigned int kernel_exec_fencing:1;
 };
 
 /* Intel private XvMC command to DDX driver */
 struct intel_xvmc_command {
-    unsigned int command;
-    unsigned int ctxNo;
-    unsigned int srfNo;
-    unsigned int subPicNo;
-    unsigned int flags;
-    unsigned int real_id;
-    uint32_t handle;
-    unsigned int pad[5];
+	unsigned int command;
+	unsigned int ctxNo;
+	unsigned int srfNo;
+	unsigned int subPicNo;
+	unsigned int flags;
+	unsigned int real_id;
+	uint32_t handle;
+	unsigned int pad[5];
 };
 
 #ifdef _INTEL_XVMC_SERVER_
 #include <xf86xvmc.h>
 
 struct intel_xvmc_driver {
-    char *name;
-    XF86MCAdaptorPtr adaptor;
-    unsigned int flag;
-    i830_memory *batch;
-    drm_handle_t batch_handle;
+	char *name;
+	XF86MCAdaptorPtr adaptor;
+	unsigned int flag;
+	i830_memory *batch;
+	drm_handle_t batch_handle;
 
-    /* more items for xvmv surface manage? */
-    Bool (*init)(ScrnInfoPtr, XF86VideoAdaptorPtr);
-    void (*fini)(ScrnInfoPtr);
-    void* devPrivate;
+	/* more items for xvmv surface manage? */
+	 Bool(*init) (ScrnInfoPtr, XF86VideoAdaptorPtr);
+	void (*fini) (ScrnInfoPtr);
+	void *devPrivate;
 };
 
 extern struct intel_xvmc_driver *xvmc_driver;
@@ -106,7 +105,7 @@ extern Bool intel_xvmc_probe(ScrnInfoPtr);
 extern Bool intel_xvmc_driver_init(ScreenPtr, XF86VideoAdaptorPtr);
 extern Bool intel_xvmc_screen_init(ScreenPtr);
 extern void intel_xvmc_finish(ScrnInfoPtr);
-extern int  intel_xvmc_put_image_size(ScrnInfoPtr);
+extern int intel_xvmc_put_image_size(ScrnInfoPtr);
 extern Bool intel_xvmc_init_batch(ScrnInfoPtr);
 extern void intel_xvmc_fini_batch(ScrnInfoPtr);
 #endif
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 33b1e31b..83fee898 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -94,29 +94,27 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 /**
  * Returns the fence size for a tiled area of the given size.
  */
-unsigned long
-i830_get_fence_size(I830Ptr pI830, unsigned long size)
+unsigned long i830_get_fence_size(I830Ptr pI830, unsigned long size)
 {
-    unsigned long i;
-    unsigned long start;
-
-    if (IS_I965G(pI830)) {
-	/* The 965 can have fences at any page boundary. */
-	return ALIGN(size, GTT_PAGE_SIZE);
-    } else {
-	/* Align the size to a power of two greater than the smallest fence
-	 * size.
-	 */
-	if (IS_I9XX(pI830))
-	    start = MB(1);
-	else
-	    start = KB(512);
+	unsigned long i;
+	unsigned long start;
+
+	if (IS_I965G(pI830)) {
+		/* The 965 can have fences at any page boundary. */
+		return ALIGN(size, GTT_PAGE_SIZE);
+	} else {
+		/* Align the size to a power of two greater than the smallest fence
+		 * size.
+		 */
+		if (IS_I9XX(pI830))
+			start = MB(1);
+		else
+			start = KB(512);
 
-	for (i = start; i < size; i <<= 1)
-	    ;
+		for (i = start; i < size; i <<= 1) ;
 
-	return i;
-    }
+		return i;
+	}
 }
 
 /**
@@ -126,119 +124,115 @@ i830_get_fence_size(I830Ptr pI830, unsigned long size)
 unsigned long
 i830_get_fence_pitch(I830Ptr pI830, unsigned long pitch, int format)
 {
-    unsigned long i;
-    unsigned long tile_width = (format == I915_TILING_Y) ? 128 : 512;
+	unsigned long i;
+	unsigned long tile_width = (format == I915_TILING_Y) ? 128 : 512;
 
-    if (format == TILE_NONE)
-	return pitch;
+	if (format == TILE_NONE)
+		return pitch;
 
-    /* 965 is flexible */
-    if (IS_I965G(pI830))
-	return ROUND_TO(pitch, tile_width);
+	/* 965 is flexible */
+	if (IS_I965G(pI830))
+		return ROUND_TO(pitch, tile_width);
 
-    /* Pre-965 needs power of two tile width */
-    for (i = tile_width; i < pitch; i <<= 1)
-	;
+	/* Pre-965 needs power of two tile width */
+	for (i = tile_width; i < pitch; i <<= 1) ;
 
-    return i;
+	return i;
 }
 
 /**
  * On some chips, pitch width has to be a power of two tile width, so
  * calculate that here.
  */
-static unsigned long
-i830_get_fence_alignment(I830Ptr pI830, unsigned long size)
+static unsigned long i830_get_fence_alignment(I830Ptr pI830, unsigned long size)
 {
-    if (IS_I965G(pI830))
-	return 4096;
-    else
-	return i830_get_fence_size(pI830, size);
+	if (IS_I965G(pI830))
+		return 4096;
+	else
+		return i830_get_fence_size(pI830, size);
 }
 
 static Bool
 i830_check_display_stride(ScrnInfoPtr pScrn, int stride, Bool tiling)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int limit = KB(32);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int limit = KB(32);
 
-    /* 8xx spec has always 8K limit, but tests show larger limit in
-       non-tiling mode, which makes large monitor work. */
-    if ((IS_845G(pI830) || IS_I85X(pI830)) && tiling)
-	limit = KB(8);
+	/* 8xx spec has always 8K limit, but tests show larger limit in
+	   non-tiling mode, which makes large monitor work. */
+	if ((IS_845G(pI830) || IS_I85X(pI830)) && tiling)
+		limit = KB(8);
 
-    if (IS_I915(pI830) && tiling)
-	limit = KB(8);
+	if (IS_I915(pI830) && tiling)
+		limit = KB(8);
 
-    if (IS_I965G(pI830) && tiling)
-	limit = KB(16);
+	if (IS_I965G(pI830) && tiling)
+		limit = KB(16);
 
-    if (stride <= limit)
-	return TRUE;
-    else
-	return FALSE;
+	if (stride <= limit)
+		return TRUE;
+	else
+		return FALSE;
 }
 
-void
-i830_free_memory(ScrnInfoPtr pScrn, i830_memory *mem)
+void i830_free_memory(ScrnInfoPtr pScrn, i830_memory * mem)
 {
-    if (mem == NULL)
-	return;
-
-    if (mem->bo != NULL) {
-	I830Ptr pI830 = I830PTR(pScrn);
-	dri_bo_unreference (mem->bo);
-	if (pI830->bo_list == mem) {
-	    pI830->bo_list = mem->next;
-	    if (mem->next)
-		mem->next->prev = NULL;
-	} else {
-	    if (mem->prev)
+	if (mem == NULL)
+		return;
+
+	if (mem->bo != NULL) {
+		I830Ptr pI830 = I830PTR(pScrn);
+		dri_bo_unreference(mem->bo);
+		if (pI830->bo_list == mem) {
+			pI830->bo_list = mem->next;
+			if (mem->next)
+				mem->next->prev = NULL;
+		} else {
+			if (mem->prev)
+				mem->prev->next = mem->next;
+			if (mem->next)
+				mem->next->prev = mem->prev;
+		}
+		xfree(mem->name);
+		xfree(mem);
+		return;
+	}
+	/* Disconnect from the list of allocations */
+	if (mem->prev != NULL)
 		mem->prev->next = mem->next;
-	    if (mem->next)
+	if (mem->next != NULL)
 		mem->next->prev = mem->prev;
-	}
+
 	xfree(mem->name);
 	xfree(mem);
-	return;
-    }
-	    /* Disconnect from the list of allocations */
-    if (mem->prev != NULL)
-	mem->prev->next = mem->next;
-    if (mem->next != NULL)
-	mem->next->prev = mem->prev;
-
-    xfree(mem->name);
-    xfree(mem);
 }
 
 /* Resets the state of the aperture allocator, freeing all memory that had
  * been allocated.
  */
-void
-i830_reset_allocations(ScrnInfoPtr pScrn)
+void i830_reset_allocations(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int	    p;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int p;
 
-    /* While there is any memory between the start and end markers, free it. */
-    while (pI830->memory_list->next->next != NULL) {
-	i830_memory *mem = pI830->memory_list->next;
+	/* While there is any memory between the start and end markers, free it. */
+	while (pI830->memory_list->next->next != NULL) {
+		i830_memory *mem = pI830->memory_list->next;
 
-	i830_free_memory(pScrn, mem);
-    }
+		i830_free_memory(pScrn, mem);
+	}
 
-    /* Free any allocations in buffer objects */
-    while (pI830->bo_list != NULL)
-        i830_free_memory(pScrn, pI830->bo_list);
+	/* Free any allocations in buffer objects */
+	while (pI830->bo_list != NULL)
+		i830_free_memory(pScrn, pI830->bo_list);
 
-    /* Null out the pointers for all the allocations we just freed.  This is
-     * kind of gross, but at least it's just one place now.
-     */
-    for (p = 0; p < 2; p++)
-	pI830->cursor_mem_argb[p] = NULL;
+	/* Null out the pointers for all the allocations we just freed.  This is
+	 * kind of gross, but at least it's just one place now.
+	 */
+	for (p = 0; p < 2; p++)
+		pI830->cursor_mem_argb[p] = NULL;
 
-    pI830->front_buffer = NULL;
+	pI830->front_buffer = NULL;
 }
 
 /**
@@ -250,138 +244,137 @@ i830_reset_allocations(ScrnInfoPtr pScrn)
  * static allocations.  Some of these exist because of the need for physical
  * addresses to reference.
  */
-Bool
-i830_allocator_init(ScrnInfoPtr pScrn, unsigned long size)
+Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long size)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    i830_memory *start, *end;
-
-    start = xcalloc(1, sizeof(*start));
-    if (start == NULL)
-	return FALSE;
-    start->name = xstrdup("start marker");
-    if (start->name == NULL) {
-	xfree(start);
-	return FALSE;
-    }
-    end = xcalloc(1, sizeof(*end));
-    if (end == NULL) {
-	xfree(start->name);
-	xfree(start);
-	return FALSE;
-    }
-    end->name = xstrdup("end marker");
-    if (end->name == NULL) {
-	xfree(start->name);
-	xfree(start);
-	xfree(end);
-	return FALSE;
-    }
-
-    start->offset = 0;
-    start->end = start->offset;
-    start->size = 0;
-    start->next = end;
-    end->offset = size;
-    end->end = end->offset;
-    end->size = 0;
-    end->prev = start;
-
-    pI830->memory_list = start;
-
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	i830_memory *start, *end;
+
+	start = xcalloc(1, sizeof(*start));
+	if (start == NULL)
+		return FALSE;
+	start->name = xstrdup("start marker");
+	if (start->name == NULL) {
+		xfree(start);
+		return FALSE;
+	}
+	end = xcalloc(1, sizeof(*end));
+	if (end == NULL) {
+		xfree(start->name);
+		xfree(start);
+		return FALSE;
+	}
+	end->name = xstrdup("end marker");
+	if (end->name == NULL) {
+		xfree(start->name);
+		xfree(start);
+		xfree(end);
+		return FALSE;
+	}
+
+	start->offset = 0;
+	start->end = start->offset;
+	start->size = 0;
+	start->next = end;
+	end->offset = size;
+	end->end = end->offset;
+	end->size = 0;
+	end->prev = start;
+
+	pI830->memory_list = start;
+
+	return TRUE;
 }
 
-void
-i830_allocator_fini(ScrnInfoPtr pScrn)
+void i830_allocator_fini(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    /* Free most of the allocations */
-    i830_reset_allocations(pScrn);
+	/* Free most of the allocations */
+	i830_reset_allocations(pScrn);
 
-    /* Free the start/end markers */
-    free(pI830->memory_list->next);
-    free(pI830->memory_list);
-    pI830->memory_list = NULL;
+	/* Free the start/end markers */
+	free(pI830->memory_list->next);
+	free(pI830->memory_list);
+	pI830->memory_list = NULL;
 }
 
-static i830_memory *
-i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
-			unsigned long size, unsigned long pitch,
-			unsigned long align, int flags,
-			enum tile_format tile_format)
+static i830_memory *i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
+					    unsigned long size,
+					    unsigned long pitch,
+					    unsigned long align, int flags,
+					    enum tile_format tile_format)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    i830_memory *mem;
-    uint32_t bo_tiling_mode = I915_TILING_NONE;
-    int	    ret;
+	I830Ptr pI830 = I830PTR(pScrn);
+	i830_memory *mem;
+	uint32_t bo_tiling_mode = I915_TILING_NONE;
+	int ret;
 
-    assert((flags & NEED_PHYSICAL_ADDR) == 0);
+	assert((flags & NEED_PHYSICAL_ADDR) == 0);
 
-    /* Only allocate page-sized increments. */
-    size = ALIGN(size, GTT_PAGE_SIZE);
-    align = i830_get_fence_alignment(pI830, size);
+	/* Only allocate page-sized increments. */
+	size = ALIGN(size, GTT_PAGE_SIZE);
+	align = i830_get_fence_alignment(pI830, size);
 
-    mem = xcalloc(1, sizeof(*mem));
-    if (mem == NULL)
-	return NULL;
+	mem = xcalloc(1, sizeof(*mem));
+	if (mem == NULL)
+		return NULL;
 
-    mem->name = xstrdup(name);
-    if (mem->name == NULL) {
-	xfree(mem);
-	return NULL;
-    }
+	mem->name = xstrdup(name);
+	if (mem->name == NULL) {
+		xfree(mem);
+		return NULL;
+	}
 
-    mem->bo = dri_bo_alloc (pI830->bufmgr, name, size, align);
+	mem->bo = dri_bo_alloc(pI830->bufmgr, name, size, align);
 
-    if (!mem->bo) {
-	xfree(mem->name);
-	xfree(mem);
-	return NULL;
-    }
-
-    /* Give buffer obviously wrong offset/end until it's pinned. */
-    mem->offset = -1;
-    mem->end = -1;
-    mem->size = size;
-    mem->alignment = align;
-    mem->tiling = tile_format;
-    mem->pitch = pitch;
-
-    switch (tile_format) {
-    case TILE_XMAJOR:
-	bo_tiling_mode = I915_TILING_X;
-	break;
-    case TILE_YMAJOR:
-	bo_tiling_mode = I915_TILING_Y;
-	break;
-    case TILE_NONE:
-    default:
-	bo_tiling_mode = I915_TILING_NONE;
-	break;
-    }
-
-    ret = drm_intel_bo_set_tiling(mem->bo, &bo_tiling_mode, pitch);
-    if (ret != 0 || (bo_tiling_mode == I915_TILING_NONE && tile_format != TILE_NONE)) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		   "Failed to set tiling on %s: %s\n",
-		   mem->name,
-		   ret == 0 ? "rejected by kernel" : strerror(errno));
-	mem->tiling = TILE_NONE;
-    }
-
-    if (flags & DISABLE_REUSE)
-	drm_intel_bo_disable_reuse(mem->bo);
-
-    /* Insert new allocation into the list */
-    mem->prev = NULL;
-    mem->next = pI830->bo_list;
-    if (pI830->bo_list != NULL)
-	pI830->bo_list->prev = mem;
-    pI830->bo_list = mem;
-
-    return mem;
+	if (!mem->bo) {
+		xfree(mem->name);
+		xfree(mem);
+		return NULL;
+	}
+
+	/* Give buffer obviously wrong offset/end until it's pinned. */
+	mem->offset = -1;
+	mem->end = -1;
+	mem->size = size;
+	mem->alignment = align;
+	mem->tiling = tile_format;
+	mem->pitch = pitch;
+
+	switch (tile_format) {
+	case TILE_XMAJOR:
+		bo_tiling_mode = I915_TILING_X;
+		break;
+	case TILE_YMAJOR:
+		bo_tiling_mode = I915_TILING_Y;
+		break;
+	case TILE_NONE:
+	default:
+		bo_tiling_mode = I915_TILING_NONE;
+		break;
+	}
+
+	ret = drm_intel_bo_set_tiling(mem->bo, &bo_tiling_mode, pitch);
+	if (ret != 0
+	    || (bo_tiling_mode == I915_TILING_NONE
+		&& tile_format != TILE_NONE)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Failed to set tiling on %s: %s\n", mem->name,
+			   ret == 0 ? "rejected by kernel" : strerror(errno));
+		mem->tiling = TILE_NONE;
+	}
+
+	if (flags & DISABLE_REUSE)
+		drm_intel_bo_disable_reuse(mem->bo);
+
+	/* Insert new allocation into the list */
+	mem->prev = NULL;
+	mem->next = pI830->bo_list;
+	if (pI830->bo_list != NULL)
+		pI830->bo_list->prev = mem;
+	pI830->bo_list = mem;
+
+	return mem;
 }
 
 /* Allocates video memory at the given size, pitch, alignment and tile format.
@@ -402,127 +395,125 @@ i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
  *   the entire Screen lifetime.  This means not using buffer objects, which
  *   get their offsets chosen at each EnterVT time.
  */
-i830_memory *
-i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
-		     unsigned long size, unsigned long pitch,
-		     unsigned long alignment, int flags,
-		     enum tile_format tile_format)
+i830_memory *i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
+				  unsigned long size, unsigned long pitch,
+				  unsigned long alignment, int flags,
+				  enum tile_format tile_format)
 {
-    i830_memory *mem;
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    /* Manage tile alignment and size constraints */
-    if (tile_format != TILE_NONE) {
-	/* Only allocate page-sized increments. */
-	size = ALIGN(size, GTT_PAGE_SIZE);
+	i830_memory *mem;
+	I830Ptr pI830 = I830PTR(pScrn);
 
-	/* Check for maximum tiled region size */
-	if (IS_I9XX(pI830)) {
-	    if (size > MB(128))
-		return NULL;
-	} else {
-	    if (size > MB(64))
-		return NULL;
+	/* Manage tile alignment and size constraints */
+	if (tile_format != TILE_NONE) {
+		/* Only allocate page-sized increments. */
+		size = ALIGN(size, GTT_PAGE_SIZE);
+
+		/* Check for maximum tiled region size */
+		if (IS_I9XX(pI830)) {
+			if (size > MB(128))
+				return NULL;
+		} else {
+			if (size > MB(64))
+				return NULL;
+		}
+
+		/* round to size necessary for the fence register to work */
+		size = i830_get_fence_size(pI830, size);
+		alignment = i830_get_fence_alignment(pI830, size);
 	}
 
-	/* round to size necessary for the fence register to work */
-	size = i830_get_fence_size(pI830, size);
-	alignment = i830_get_fence_alignment(pI830, size);
-    }
-
-    return i830_allocate_memory_bo(pScrn, name, size,
-				   pitch, alignment, flags, tile_format);
+	return i830_allocate_memory_bo(pScrn, name, size,
+				       pitch, alignment, flags, tile_format);
 
-    return mem;
+	return mem;
 }
 
 void
 i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity, const char *prefix)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    i830_memory *mem;
+	I830Ptr pI830 = I830PTR(pScrn);
+	i830_memory *mem;
 
-    if (pI830->memory_list == NULL) {
-	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		       "%sMemory allocator not initialized\n", prefix);
-	return;
-    }
+	if (pI830->memory_list == NULL) {
+		xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			       "%sMemory allocator not initialized\n", prefix);
+		return;
+	}
 
-    if (pI830->memory_list->next->next == NULL) {
-	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		       "%sNo memory allocations\n", prefix);
-	return;
-    }
+	if (pI830->memory_list->next->next == NULL) {
+		xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			       "%sNo memory allocations\n", prefix);
+		return;
+	}
 
-    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		   "%sFixed memory allocation layout:\n", prefix);
+	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+		       "%sFixed memory allocation layout:\n", prefix);
 
-    for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
-	char phys_suffix[32] = "";
-	char *tile_suffix = "";
+	for (mem = pI830->memory_list->next; mem->next != NULL; mem = mem->next) {
+		char phys_suffix[32] = "";
+		char *tile_suffix = "";
 
-	if (mem->tiling == TILE_XMAJOR)
-	    tile_suffix = " X tiled";
-	else if (mem->tiling == TILE_YMAJOR)
-	    tile_suffix = " Y tiled";
+		if (mem->tiling == TILE_XMAJOR)
+			tile_suffix = " X tiled";
+		else if (mem->tiling == TILE_YMAJOR)
+			tile_suffix = " Y tiled";
 
+		xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			       "%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
+			       mem->offset, mem->end - 1, mem->name,
+			       mem->size / 1024, phys_suffix, tile_suffix);
+	}
 	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		       "%s0x%08lx-0x%08lx: %s (%ld kB%s)%s\n", prefix,
-		       mem->offset, mem->end - 1, mem->name,
-		       mem->size / 1024, phys_suffix, tile_suffix);
-    }
-    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		   "%s0x%08lx:            end of aperture\n",
-		   prefix, pI830->FbMapSize);
-
-    xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		   "%sBO memory allocation layout:\n", prefix);
-    for (mem = pI830->bo_list; mem != NULL; mem = mem->next) {
-	char *tile_suffix = "";
-
-	if (mem->tiling == TILE_XMAJOR)
-	    tile_suffix = " X tiled";
-	else if (mem->tiling == TILE_YMAJOR)
-	    tile_suffix = " Y tiled";
+		       "%s0x%08lx:            end of aperture\n",
+		       prefix, pI830->FbMapSize);
 
 	xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
-		       "%sunpinned          : %s (%ld kB)%s\n", prefix,
-		       mem->name, mem->size / 1024, tile_suffix);
-    }
+		       "%sBO memory allocation layout:\n", prefix);
+	for (mem = pI830->bo_list; mem != NULL; mem = mem->next) {
+		char *tile_suffix = "";
+
+		if (mem->tiling == TILE_XMAJOR)
+			tile_suffix = " X tiled";
+		else if (mem->tiling == TILE_YMAJOR)
+			tile_suffix = " Y tiled";
+
+		xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, verbosity,
+			       "%sunpinned          : %s (%ld kB)%s\n", prefix,
+			       mem->name, mem->size / 1024, tile_suffix);
+	}
 }
 
-static Bool
-IsTileable(ScrnInfoPtr pScrn, int pitch)
+static Bool IsTileable(ScrnInfoPtr pScrn, int pitch)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    if (IS_I965G(pI830)) {
-	if (pitch / 512 * 512 == pitch && pitch <= KB(128))
-	    return TRUE;
-	else
-	    return FALSE;
-    }
-
-    /*
-     * Allow tiling for pitches that are a power of 2 multiple of 128 bytes,
-     * up to 64 * 128 (= 8192) bytes.
-     */
-    switch (pitch) {
-    case 128:
-    case 256:
-	if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
-	    return TRUE;
-	else
-	    return FALSE;
-    case 512:
-    case KB(1):
-    case KB(2):
-    case KB(4):
-    case KB(8):
-	return TRUE;
-    default:
-	return FALSE;
-    }
+	if (IS_I965G(pI830)) {
+		if (pitch / 512 * 512 == pitch && pitch <= KB(128))
+			return TRUE;
+		else
+			return FALSE;
+	}
+
+	/*
+	 * Allow tiling for pitches that are a power of 2 multiple of 128 bytes,
+	 * up to 64 * 128 (= 8192) bytes.
+	 */
+	switch (pitch) {
+	case 128:
+	case 256:
+		if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
+			return TRUE;
+		else
+			return FALSE;
+	case 512:
+	case KB(1):
+	case KB(2):
+	case KB(4):
+	case KB(8):
+		return TRUE;
+	default:
+		return FALSE;
+	}
 }
 
 /**
@@ -531,117 +522,112 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
  * Used once for each X screen, so once with RandR 1.2 and twice with classic
  * dualhead.
  */
-i830_memory *
-i830_allocate_framebuffer(ScrnInfoPtr pScrn)
+i830_memory *i830_allocate_framebuffer(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    unsigned int pitch = pScrn->displayWidth * pI830->cpp;
-    unsigned long minspace;
-    int align;
-    long size, fb_height;
-    int flags;
-    i830_memory *front_buffer = NULL;
-    enum tile_format tile_format = TILE_NONE;
-
-    flags = ALLOW_SHARING|DISABLE_REUSE;
-
-    /* We'll allocate the fb such that the root window will fit regardless of
-     * rotation.
-     */
-    fb_height = pScrn->virtualY;
-
-    /* Calculate how much framebuffer memory to allocate.  For the
-     * initial allocation, calculate a reasonable minimum.  This is
-     * enough for the virtual screen size.
-     */
-    minspace = pitch * pScrn->virtualY;
-
-    size = ROUND_TO_PAGE(pitch * fb_height);
-
-    if (pI830->tiling)
-	tile_format = TILE_XMAJOR;
-
-    if (!IsTileable(pScrn, pitch))
-	tile_format = TILE_NONE;
-
-    if (!i830_check_display_stride(pScrn, pitch, tile_format != TILE_NONE)) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Front buffer stride %d kB "
-		"exceed display limit\n", pitch/1024);
-	return NULL;
-    }
-
-    /* Attempt to allocate it tiled first if we have page flipping on. */
-    if (tile_format != TILE_NONE) {
-	/* XXX: probably not the case on 965 */
-	if (IS_I9XX(pI830))
-	    align = MB(1);
-	else
-	    align = KB(512);
-    } else
-	align = KB(64);
-    front_buffer = i830_allocate_memory(pScrn, "front buffer", size,
-					pitch, align, flags,
-					tile_format);
-
-    if (front_buffer == NULL) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		   "Failed to allocate framebuffer.\n");
-	return NULL;
-    }
-
-    i830_set_max_gtt_map_size(pScrn);
-
-    return front_buffer;
+	I830Ptr pI830 = I830PTR(pScrn);
+	unsigned int pitch = pScrn->displayWidth * pI830->cpp;
+	unsigned long minspace;
+	int align;
+	long size, fb_height;
+	int flags;
+	i830_memory *front_buffer = NULL;
+	enum tile_format tile_format = TILE_NONE;
+
+	flags = ALLOW_SHARING | DISABLE_REUSE;
+
+	/* We'll allocate the fb such that the root window will fit regardless of
+	 * rotation.
+	 */
+	fb_height = pScrn->virtualY;
+
+	/* Calculate how much framebuffer memory to allocate.  For the
+	 * initial allocation, calculate a reasonable minimum.  This is
+	 * enough for the virtual screen size.
+	 */
+	minspace = pitch * pScrn->virtualY;
+
+	size = ROUND_TO_PAGE(pitch * fb_height);
+
+	if (pI830->tiling)
+		tile_format = TILE_XMAJOR;
+
+	if (!IsTileable(pScrn, pitch))
+		tile_format = TILE_NONE;
+
+	if (!i830_check_display_stride(pScrn, pitch, tile_format != TILE_NONE)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Front buffer stride %d kB "
+			   "exceed display limit\n", pitch / 1024);
+		return NULL;
+	}
+
+	/* Attempt to allocate it tiled first if we have page flipping on. */
+	if (tile_format != TILE_NONE) {
+		/* XXX: probably not the case on 965 */
+		if (IS_I9XX(pI830))
+			align = MB(1);
+		else
+			align = KB(512);
+	} else
+		align = KB(64);
+	front_buffer = i830_allocate_memory(pScrn, "front buffer", size,
+					    pitch, align, flags, tile_format);
+
+	if (front_buffer == NULL) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Failed to allocate framebuffer.\n");
+		return NULL;
+	}
+
+	i830_set_max_gtt_map_size(pScrn);
+
+	return front_buffer;
 }
 
-static Bool
-i830_allocate_cursor_buffers(ScrnInfoPtr pScrn)
+static Bool i830_allocate_cursor_buffers(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-    int i;
-
-    /*
-     * Allocate four separate buffers when the kernel doesn't support
-     * large allocations as on Linux. If any of these fail, just
-     * bail back to software cursors everywhere
-     */
-    for (i = 0; i < xf86_config->num_crtc; i++)
-    {
-	pI830->cursor_mem_argb[i] = i830_allocate_memory (pScrn, "ARGB cursor",
-							  HWCURSOR_SIZE_ARGB,
-							  PITCH_NONE,
-							  GTT_PAGE_SIZE,
-							  DISABLE_REUSE,
-							  TILE_NONE);
-	if (!pI830->cursor_mem_argb[i])
-	    return FALSE;
-
-    }
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	int i;
+
+	/*
+	 * Allocate four separate buffers when the kernel doesn't support
+	 * large allocations as on Linux. If any of these fail, just
+	 * bail back to software cursors everywhere
+	 */
+	for (i = 0; i < xf86_config->num_crtc; i++) {
+		pI830->cursor_mem_argb[i] =
+		    i830_allocate_memory(pScrn, "ARGB cursor",
+					 HWCURSOR_SIZE_ARGB, PITCH_NONE,
+					 GTT_PAGE_SIZE, DISABLE_REUSE,
+					 TILE_NONE);
+		if (!pI830->cursor_mem_argb[i])
+			return FALSE;
+
+	}
+	return TRUE;
 }
 
 /*
  * Allocate memory for 2D operation.  This includes the (front) framebuffer,
  * ring buffer, scratch memory, HW cursor.
  */
-Bool
-i830_allocate_2d_memory(ScrnInfoPtr pScrn)
+Bool i830_allocate_2d_memory(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    /* Next, allocate other fixed-size allocations we have. */
-    if (!i830_allocate_cursor_buffers(pScrn)) {
-	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		   "Failed to allocate HW cursor space.\n");
-	return FALSE;
-    }
+	/* Next, allocate other fixed-size allocations we have. */
+	if (!i830_allocate_cursor_buffers(pScrn)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Failed to allocate HW cursor space.\n");
+		return FALSE;
+	}
 
-    pI830->front_buffer = i830_allocate_framebuffer(pScrn);
-    if (pI830->front_buffer == NULL)
-	return FALSE;
+	pI830->front_buffer = i830_allocate_framebuffer(pScrn);
+	if (pI830->front_buffer == NULL)
+		return FALSE;
 
-    return TRUE;
+	return TRUE;
 }
 
 /**
@@ -651,26 +637,25 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
  * pI830 points to the same allocation list, but the bind_memory will just
  * no-op then.
  */
-Bool
-i830_bind_all_memory(ScrnInfoPtr pScrn)
+Bool i830_bind_all_memory(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    if (pI830->memory_list == NULL)
-	return TRUE;
+	if (pI830->memory_list == NULL)
+		return TRUE;
 
-    int	i;
-    xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-    for (i = 0; i < xf86_config->num_crtc; i++)
-	drmmode_crtc_set_cursor_bo(xf86_config->crtc[i],
-				   pI830->cursor_mem_argb[i]->bo);
+	int i;
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	for (i = 0; i < xf86_config->num_crtc; i++)
+		drmmode_crtc_set_cursor_bo(xf86_config->crtc[i],
+					   pI830->cursor_mem_argb[i]->bo);
 
-    i830_set_max_gtt_map_size(pScrn);
+	i830_set_max_gtt_map_size(pScrn);
 
-    if (pI830->front_buffer)
-	pScrn->fbOffset = pI830->front_buffer->offset;
+	if (pI830->front_buffer)
+		pScrn->fbOffset = pI830->front_buffer->offset;
 
-    return TRUE;
+	return TRUE;
 }
 
 #ifdef INTEL_XVMC
@@ -678,59 +663,59 @@ i830_bind_all_memory(ScrnInfoPtr pScrn)
  * Allocate memory for MC compensation
  */
 Bool i830_allocate_xvmc_buffer(ScrnInfoPtr pScrn, const char *name,
-                               i830_memory **buffer, unsigned long size,
-                               int flags)
+			       i830_memory ** buffer, unsigned long size,
+			       int flags)
 {
-    *buffer = i830_allocate_memory(pScrn, name, size, PITCH_NONE,
-                                   GTT_PAGE_SIZE, flags, TILE_NONE);
-
-    if (!*buffer) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "Failed to allocate memory for %s.\n", name);
-        return FALSE;
-    }
-
-    if ((*buffer)->bo) {
-        if (drm_intel_bo_pin((*buffer)->bo, GTT_PAGE_SIZE)) {
-            i830_free_memory(pScrn, *buffer);
-            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                       "Failed to bind XvMC buffer bo!\n");
-            return FALSE;
-        }
-
-        (*buffer)->offset = (*buffer)->bo->offset;
-    }
-
-    return TRUE;
+	*buffer = i830_allocate_memory(pScrn, name, size, PITCH_NONE,
+				       GTT_PAGE_SIZE, flags, TILE_NONE);
+
+	if (!*buffer) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "Failed to allocate memory for %s.\n", name);
+		return FALSE;
+	}
+
+	if ((*buffer)->bo) {
+		if (drm_intel_bo_pin((*buffer)->bo, GTT_PAGE_SIZE)) {
+			i830_free_memory(pScrn, *buffer);
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+				   "Failed to bind XvMC buffer bo!\n");
+			return FALSE;
+		}
+
+		(*buffer)->offset = (*buffer)->bo->offset;
+	}
+
+	return TRUE;
 }
 
-void
-i830_free_xvmc_buffer(ScrnInfoPtr pScrn, i830_memory *buffer)
+void i830_free_xvmc_buffer(ScrnInfoPtr pScrn, i830_memory * buffer)
 {
-    if (buffer->bo)
-        drm_intel_bo_unpin(buffer->bo);
+	if (buffer->bo)
+		drm_intel_bo_unpin(buffer->bo);
 
-    i830_free_memory(pScrn, buffer);
+	i830_free_memory(pScrn, buffer);
 }
 
 #endif
 
-void
-i830_set_max_gtt_map_size(ScrnInfoPtr pScrn)
+void i830_set_max_gtt_map_size(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct drm_i915_gem_get_aperture aperture;
-    int ret;
-
-    /* Default low value in case it gets used during server init. */
-    pI830->max_gtt_map_size = 16 * 1024 * 1024;
-
-    ret = ioctl(pI830->drmSubFD, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
-    if (ret == 0) {
-	/* Let objects up get bound up to the size where only 2 would fit in
-	 * the aperture, but then leave slop to account for alignment like
-	 * libdrm does.
-	 */
-	pI830->max_gtt_map_size = aperture.aper_available_size * 3 / 4 / 2;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct drm_i915_gem_get_aperture aperture;
+	int ret;
+
+	/* Default low value in case it gets used during server init. */
+	pI830->max_gtt_map_size = 16 * 1024 * 1024;
+
+	ret =
+	    ioctl(pI830->drmSubFD, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
+	if (ret == 0) {
+		/* Let objects up get bound up to the size where only 2 would fit in
+		 * the aperture, but then leave slop to account for alignment like
+		 * libdrm does.
+		 */
+		pI830->max_gtt_map_size =
+		    aperture.aper_available_size * 3 / 4 / 2;
+	}
 }
diff --git a/src/i830_reg.h b/src/i830_reg.h
index a8b82a68..3bba44da 100644
--- a/src/i830_reg.h
+++ b/src/i830_reg.h
@@ -25,7 +25,6 @@
  * 
  **************************************************************************/
 
-
 #ifndef _I830_REG_H_
 #define _I830_REG_H_
 
@@ -74,7 +73,6 @@
 /* Dword 2 */
 #define BUF_3D_ADDR(x)		((x) & ~0x3)
 
-
 #define _3DSTATE_COLOR_FACTOR_CMD	(CMD_3D | (0x1d<<24) | (0x1<<16))
 
 #define _3DSTATE_COLOR_FACTOR_N_CMD(stage)	(CMD_3D | (0x1d<<24) | \
@@ -88,7 +86,6 @@
 
 #define _3DSTATE_DFLT_Z_CMD		(CMD_3D | (0x1d<<24) | (0x98<<16))
 
-
 #define _3DSTATE_DST_BUF_VARS_CMD	(CMD_3D | (0x1d<<24) | (0x85<<16))
 /* Dword 1 */
 #define DSTORG_HORT_BIAS(x)		((x)<<20)
@@ -115,7 +112,6 @@
 #define VERT_LINE_STRIDE_OFS_1		1
 #define VERT_LINE_STRIDE_OFS_0		0
 
-
 #define _3DSTATE_DRAW_RECT_CMD		(CMD_3D|(0x1d<<24)|(0x80<<16)|3)
 /* Dword 1 */
 #define DRAW_RECT_DIS_DEPTH_OFS 	(1<<30)
@@ -131,7 +127,6 @@
 #define DRAW_YORG(x)			((x)<<16)
 #define DRAW_XORG(x)			(x)
 
-
 #define _3DSTATE_ENABLES_1_CMD		(CMD_3D|(0x3<<24))
 #define ENABLE_LOGIC_OP_MASK		((1<<23)|(1<<22))
 #define ENABLE_LOGIC_OP 		((1<<23)|(1<<22))
@@ -307,7 +302,6 @@
 #define DISABLE_VIEWPORT_TRANSFORM	(1<<31)
 #define DISABLE_PERSPECTIVE_DIVIDE	(1<<29)
 
-
 /* _3DSTATE_MAP_COORD_SET_BINDINGS, p162 */
 #define _3DSTATE_MAP_COORD_SETBIND_CMD	(CMD_3D|(0x1d<<24)|(0x02<<16))
 #define TEXBIND_MASK3			((1<<15)|(1<<14)|(1<<13)|(1<<12))
@@ -388,7 +382,6 @@
 #define SRC_BLND_FACT(x)		((x)<<6)
 #define DST_BLND_FACT(x)		(x)
 
-
 /* _3DSTATE_MODES_2, p192 */
 #define _3DSTATE_MODES_2_CMD		(CMD_3D|(0x0f<<24))
 #define ENABLE_GLOBAL_DEPTH_BIAS	(1<<22)
@@ -543,7 +536,6 @@
 
 #define MLC_LOD_BIAS_MASK ((1<<7)-1)
 
-
 /* _3DSTATE_VERTEX_TRANSFORM, p207 */
 #define _3DSTATE_VERTEX_TRANS_CMD	(CMD_3D|(0x1d<<24)|(0x8b<<16)|0)
 #define _3DSTATE_VERTEX_TRANS_MTX_CMD	(CMD_3D|(0x1d<<24)|(0x8b<<16)|6)
@@ -563,7 +555,6 @@
 /* Dword 2 */
 #define WFAR_VALUE(x)			(x)
 
-
 /* Stipple command, carried over from the i810, apparently:
  */
 #define _3DSTATE_STIPPLE           (CMD_3D|(0x1d<<24)|(0x83<<16))
@@ -637,8 +628,8 @@
 #define    MAPSURF_4BIT_INDEXED		   (7<<6)
 #define TM0S1_MT_FORMAT_MASK         (0x7 << 3)
 #define TM0S1_MT_FORMAT_SHIFT        3
-#define    MT_4BIT_IDX_ARGB8888	           (7<<3) /* SURFACE_4BIT_INDEXED */
-#define    MT_8BIT_IDX_RGB565	           (0<<3) /* SURFACE_8BIT_INDEXED */
+#define    MT_4BIT_IDX_ARGB8888	           (7<<3)	/* SURFACE_4BIT_INDEXED */
+#define    MT_8BIT_IDX_RGB565	           (0<<3)	/* SURFACE_8BIT_INDEXED */
 #define    MT_8BIT_IDX_ARGB1555	           (1<<3)
 #define    MT_8BIT_IDX_ARGB4444	           (2<<3)
 #define    MT_8BIT_IDX_AY88		   (3<<3)
@@ -646,10 +637,10 @@
 #define    MT_8BIT_IDX_BUMP_88DVDU 	   (5<<3)
 #define    MT_8BIT_IDX_BUMP_655LDVDU	   (6<<3)
 #define    MT_8BIT_IDX_ARGB8888	           (7<<3)
-#define    MT_8BIT_I8		           (0<<3) /* SURFACE_8BIT */
+#define    MT_8BIT_I8		           (0<<3)	/* SURFACE_8BIT */
 #define    MT_8BIT_L8		           (1<<3)
 #define    MT_8BIT_A8		           (4<<3)
-#define    MT_16BIT_RGB565 		   (0<<3) /* SURFACE_16BIT */
+#define    MT_16BIT_RGB565 		   (0<<3)	/* SURFACE_16BIT */
 #define    MT_16BIT_ARGB1555		   (1<<3)
 #define    MT_16BIT_ARGB4444		   (2<<3)
 #define    MT_16BIT_AY88		   (3<<3)
@@ -657,18 +648,18 @@
 #define    MT_16BIT_BUMP_88DVDU	           (5<<3)
 #define    MT_16BIT_BUMP_655LDVDU	   (6<<3)
 #define    MT_16BIT_DIB_RGB565_8888	   (7<<3)
-#define    MT_32BIT_ARGB8888		   (0<<3) /* SURFACE_32BIT */
+#define    MT_32BIT_ARGB8888		   (0<<3)	/* SURFACE_32BIT */
 #define    MT_32BIT_ABGR8888		   (1<<3)
 #define    MT_32BIT_XRGB8888		   (2<<3)
 #define    MT_32BIT_XBGR8888		   (3<<3)
 #define    MT_32BIT_BUMP_XLDVDU_8888	   (6<<3)
 #define    MT_32BIT_DIB_8888		   (7<<3)
-#define    MT_411_YUV411		   (0<<3) /* SURFACE_411 */
-#define    MT_422_YCRCB_SWAPY	           (0<<3) /* SURFACE_422 */
+#define    MT_411_YUV411		   (0<<3)	/* SURFACE_411 */
+#define    MT_422_YCRCB_SWAPY	           (0<<3)	/* SURFACE_422 */
 #define    MT_422_YCRCB_NORMAL	           (1<<3)
 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
-#define    MT_COMPRESS_DXT1		   (0<<3) /* SURFACE_COMPRESSED */
+#define    MT_COMPRESS_DXT1		   (0<<3)	/* SURFACE_COMPRESSED */
 #define    MT_COMPRESS_DXT2_3	           (1<<3)
 #define    MT_COMPRESS_DXT4_5	           (2<<3)
 #define    MT_COMPRESS_FXT1		   (3<<3)
@@ -710,7 +701,6 @@
 #define TM0S3_KEYED_FILTER		(1<<1)
 #define TM0S3_CHROMA_KEY		(1<<0)
 
-
 /* _3DSTATE_MAP_TEXEL_STREAM, p188 */
 #define _3DSTATE_MAP_TEX_STREAM_CMD	(CMD_3D|(0x1c<<24)|(0x05<<19))
 #define DISABLE_TEX_STREAM_BUMP 	(1<<12)
@@ -722,13 +712,12 @@
 #define ENABLE_TEX_STREAM_MAP_IDX	(1<<3)
 #define TEX_STREAM_MAP_IDX(x)		(x)
 
-
 #define FLUSH_MAP_CACHE    (1<<0)
 
 #define _3DSTATE_MAP_FILTER_CMD    (CMD_3D|(0x1c<<24)|(0x02<<19))
 #define FILTER_TEXMAP_INDEX(x) ((x) << 16)
-#define MAG_MODE_FILTER_ENABLE (1 << 5) 
-#define MIN_MODE_FILTER_ENABLE (1 << 2) 
+#define MAG_MODE_FILTER_ENABLE (1 << 5)
+#define MIN_MODE_FILTER_ENABLE (1 << 2)
 #define MAG_MAPFILTER_NEAREST (0 << 3)
 #define MAG_MAPFILTER_LINEAR  (1 << 3)
 #define MAG_MAPFILTER_ANISOTROPIC (2 << 3)
@@ -736,7 +725,7 @@
 #define MIN_MAPFILTER_LINEAR  (1)
 #define MIN_MAPFILTER_ANISOTROPIC (2)
 #define ENABLE_KEYS	(1<<15)
-#define DISABLE_COLOR_KEY	0 
+#define DISABLE_COLOR_KEY	0
 #define DISABLE_CHROMA_KEY	0
 #define DISABLE_KILL_PIXEL	0
 #define ENABLE_MIP_MODE_FILTER	(1 << 9)
diff --git a/src/i830_render.c b/src/i830_render.c
index 4fa872b9..4e849674 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -35,15 +35,15 @@
 #include "i830_reg.h"
 
 struct blendinfo {
-    Bool dst_alpha;
-    Bool src_alpha;
-    uint32_t src_blend;
-    uint32_t dst_blend;
+	Bool dst_alpha;
+	Bool src_alpha;
+	uint32_t src_blend;
+	uint32_t dst_blend;
 };
 
 struct formatinfo {
-    int fmt;
-    uint32_t card_fmt;
+	int fmt;
+	uint32_t card_fmt;
 };
 
 #define TB0C_LAST_STAGE	(1 << 31)
@@ -98,32 +98,32 @@ struct formatinfo {
 #define TB0A_ARG1_SEL_TEXEL3		(9 << 6)
 
 static struct blendinfo i830_blend_op[] = {
-    /* Clear */
-    {0, 0, BLENDFACTOR_ZERO, 		BLENDFACTOR_ZERO},
-    /* Src */
-    {0, 0, BLENDFACTOR_ONE, 		BLENDFACTOR_ZERO},
-    /* Dst */
-    {0, 0, BLENDFACTOR_ZERO,		BLENDFACTOR_ONE},
-    /* Over */
-    {0, 1, BLENDFACTOR_ONE,		BLENDFACTOR_INV_SRC_ALPHA},
-    /* OverReverse */
-    {1, 0, BLENDFACTOR_INV_DST_ALPHA,	BLENDFACTOR_ONE},
-    /* In */
-    {1, 0, BLENDFACTOR_DST_ALPHA,	BLENDFACTOR_ZERO},
-    /* InReverse */
-    {0, 1, BLENDFACTOR_ZERO,		BLENDFACTOR_SRC_ALPHA},
-    /* Out */
-    {1, 0, BLENDFACTOR_INV_DST_ALPHA,	BLENDFACTOR_ZERO},
-    /* OutReverse */
-    {0, 1, BLENDFACTOR_ZERO,		BLENDFACTOR_INV_SRC_ALPHA},
-    /* Atop */
-    {1, 1, BLENDFACTOR_DST_ALPHA,	BLENDFACTOR_INV_SRC_ALPHA},
-    /* AtopReverse */
-    {1, 1, BLENDFACTOR_INV_DST_ALPHA,	BLENDFACTOR_SRC_ALPHA},
-    /* Xor */
-    {1, 1, BLENDFACTOR_INV_DST_ALPHA,	BLENDFACTOR_INV_SRC_ALPHA},
-    /* Add */
-    {0, 0, BLENDFACTOR_ONE, 		BLENDFACTOR_ONE},
+	/* Clear */
+	{0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ZERO},
+	/* Src */
+	{0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ZERO},
+	/* Dst */
+	{0, 0, BLENDFACTOR_ZERO, BLENDFACTOR_ONE},
+	/* Over */
+	{0, 1, BLENDFACTOR_ONE, BLENDFACTOR_INV_SRC_ALPHA},
+	/* OverReverse */
+	{1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ONE},
+	/* In */
+	{1, 0, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_ZERO},
+	/* InReverse */
+	{0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_SRC_ALPHA},
+	/* Out */
+	{1, 0, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_ZERO},
+	/* OutReverse */
+	{0, 1, BLENDFACTOR_ZERO, BLENDFACTOR_INV_SRC_ALPHA},
+	/* Atop */
+	{1, 1, BLENDFACTOR_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
+	/* AtopReverse */
+	{1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_SRC_ALPHA},
+	/* Xor */
+	{1, 1, BLENDFACTOR_INV_DST_ALPHA, BLENDFACTOR_INV_SRC_ALPHA},
+	/* Add */
+	{0, 0, BLENDFACTOR_ONE, BLENDFACTOR_ONE},
 };
 
 /* The x8* formats could use MT_32BIT_X* on 855+, but since we implement
@@ -131,272 +131,276 @@ static struct blendinfo i830_blend_op[] = {
  * could handle it for us or not.
  */
 static struct formatinfo i830_tex_formats[] = {
-    {PICT_a8r8g8b8, MT_32BIT_ARGB8888 },
-    {PICT_x8r8g8b8, MT_32BIT_ARGB8888 },
-    {PICT_a8b8g8r8, MT_32BIT_ABGR8888 },
-    {PICT_x8b8g8r8, MT_32BIT_ABGR8888 },
-    {PICT_r5g6b5,   MT_16BIT_RGB565   },
-    {PICT_a1r5g5b5, MT_16BIT_ARGB1555 },
-    {PICT_x1r5g5b5, MT_16BIT_ARGB1555 },
-    {PICT_a8,       MT_8BIT_A8        },
+	{PICT_a8r8g8b8, MT_32BIT_ARGB8888},
+	{PICT_x8r8g8b8, MT_32BIT_ARGB8888},
+	{PICT_a8b8g8r8, MT_32BIT_ABGR8888},
+	{PICT_x8b8g8r8, MT_32BIT_ABGR8888},
+	{PICT_r5g6b5, MT_16BIT_RGB565},
+	{PICT_a1r5g5b5, MT_16BIT_ARGB1555},
+	{PICT_x1r5g5b5, MT_16BIT_ARGB1555},
+	{PICT_a8, MT_8BIT_A8},
 };
 
-static Bool i830_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
+static Bool i830_get_dest_format(PicturePtr pDstPicture, uint32_t * dst_format)
 {
-    switch (pDstPicture->format) {
-    case PICT_a8r8g8b8:
-    case PICT_x8r8g8b8:
-        *dst_format = COLR_BUF_ARGB8888;
-        break;
-    case PICT_r5g6b5:
-        *dst_format = COLR_BUF_RGB565;
-        break;
-    case PICT_a1r5g5b5:
-    case PICT_x1r5g5b5:
-        *dst_format = COLR_BUF_ARGB1555;
-        break;
-    case PICT_a8:
-        *dst_format = COLR_BUF_8BIT;
-        break;
-    case PICT_a4r4g4b4:
-    case PICT_x4r4g4b4:
-	*dst_format = COLR_BUF_ARGB4444;
-	break;
-    default:
-	{
-	    ScrnInfoPtr pScrn;
-
-	    pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-	    I830FALLBACK("Unsupported dest format 0x%x\n",
-			 (int)pDstPicture->format);
+	switch (pDstPicture->format) {
+	case PICT_a8r8g8b8:
+	case PICT_x8r8g8b8:
+		*dst_format = COLR_BUF_ARGB8888;
+		break;
+	case PICT_r5g6b5:
+		*dst_format = COLR_BUF_RGB565;
+		break;
+	case PICT_a1r5g5b5:
+	case PICT_x1r5g5b5:
+		*dst_format = COLR_BUF_ARGB1555;
+		break;
+	case PICT_a8:
+		*dst_format = COLR_BUF_8BIT;
+		break;
+	case PICT_a4r4g4b4:
+	case PICT_x4r4g4b4:
+		*dst_format = COLR_BUF_ARGB4444;
+		break;
+	default:
+		{
+			ScrnInfoPtr pScrn;
+
+			pScrn =
+			    xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+			I830FALLBACK("Unsupported dest format 0x%x\n",
+				     (int)pDstPicture->format);
+		}
 	}
-    }
-    *dst_format |= DSTORG_HORT_BIAS (0x8) | DSTORG_VERT_BIAS (0x8);
-    return TRUE;
+	*dst_format |= DSTORG_HORT_BIAS(0x8) | DSTORG_VERT_BIAS(0x8);
+	return TRUE;
 }
 
-
 static Bool i830_get_blend_cntl(ScrnInfoPtr pScrn, int op, PicturePtr pMask,
-				uint32_t dst_format, uint32_t *blendctl)
+				uint32_t dst_format, uint32_t * blendctl)
 {
-    uint32_t sblend, dblend;
-
-    sblend = i830_blend_op[op].src_blend;
-    dblend = i830_blend_op[op].dst_blend;
-
-    /* If there's no dst alpha channel, adjust the blend op so that we'll treat
-     * it as always 1.
-     */
-    if (PICT_FORMAT_A(dst_format) == 0 && i830_blend_op[op].dst_alpha) {
-        if (sblend == BLENDFACTOR_DST_ALPHA)
-            sblend = BLENDFACTOR_ONE;
-        else if (sblend == BLENDFACTOR_INV_DST_ALPHA)
-            sblend = BLENDFACTOR_ZERO;
-    }
-
-    /* For blending purposes, COLR_BUF_8BIT values show up in the green
-     * channel.  So we can't use the alpha channel.
-     */
-    if (dst_format == PICT_a8 && ((sblend == BLENDFACTOR_DST_ALPHA ||
-				   sblend == BLENDFACTOR_INV_DST_ALPHA))) {
-	I830FALLBACK("Can't do dst alpha blending with PICT_a8 dest.\n");
-    }
-
-    /* If the source alpha is being used, then we should only be in a case
-     * where the source blend factor is 0, and the source blend value is the
-     * mask channels multiplied by the source picture's alpha.
-     */
-    if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) 
+	uint32_t sblend, dblend;
+
+	sblend = i830_blend_op[op].src_blend;
+	dblend = i830_blend_op[op].dst_blend;
+
+	/* If there's no dst alpha channel, adjust the blend op so that we'll treat
+	 * it as always 1.
+	 */
+	if (PICT_FORMAT_A(dst_format) == 0 && i830_blend_op[op].dst_alpha) {
+		if (sblend == BLENDFACTOR_DST_ALPHA)
+			sblend = BLENDFACTOR_ONE;
+		else if (sblend == BLENDFACTOR_INV_DST_ALPHA)
+			sblend = BLENDFACTOR_ZERO;
+	}
+
+	/* For blending purposes, COLR_BUF_8BIT values show up in the green
+	 * channel.  So we can't use the alpha channel.
+	 */
+	if (dst_format == PICT_a8 && ((sblend == BLENDFACTOR_DST_ALPHA ||
+				       sblend == BLENDFACTOR_INV_DST_ALPHA))) {
+		I830FALLBACK
+		    ("Can't do dst alpha blending with PICT_a8 dest.\n");
+	}
+
+	/* If the source alpha is being used, then we should only be in a case
+	 * where the source blend factor is 0, and the source blend value is the
+	 * mask channels multiplied by the source picture's alpha.
+	 */
+	if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format)
 	    && i830_blend_op[op].src_alpha) {
-        if (dblend == BLENDFACTOR_SRC_ALPHA) {
-            dblend = BLENDFACTOR_SRC_COLR;
-        } else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) {
-            dblend = BLENDFACTOR_INV_SRC_COLR;
-        }
-    }
+		if (dblend == BLENDFACTOR_SRC_ALPHA) {
+			dblend = BLENDFACTOR_SRC_COLR;
+		} else if (dblend == BLENDFACTOR_INV_SRC_ALPHA) {
+			dblend = BLENDFACTOR_INV_SRC_COLR;
+		}
+	}
 
-    *blendctl = (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
-	(dblend << S8_DST_BLEND_FACTOR_SHIFT);
+	*blendctl = (sblend << S8_SRC_BLEND_FACTOR_SHIFT) |
+	    (dblend << S8_DST_BLEND_FACTOR_SHIFT);
 
-    return TRUE;
+	return TRUE;
 }
 
-static Bool i830_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict, int unit)
+static Bool i830_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict,
+					 int unit)
 {
-    if (pPict->repeatType > RepeatReflect)
-        I830FALLBACK("Unsupported picture repeat %d\n", pPict->repeatType);
-
-    if (pPict->filter != PictFilterNearest &&
-        pPict->filter != PictFilterBilinear)
-    {
-        I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
-    }
-
-    if (pPict->pDrawable)
-    {
-	int w, h, i;
+	if (pPict->repeatType > RepeatReflect)
+		I830FALLBACK("Unsupported picture repeat %d\n",
+			     pPict->repeatType);
 
-	w = pPict->pDrawable->width;
-	h = pPict->pDrawable->height;
-	if ((w > 2048) || (h > 2048))
-	    I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+	if (pPict->filter != PictFilterNearest &&
+	    pPict->filter != PictFilterBilinear) {
+		I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+	}
 
-	for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
-	     i++)
-	{
-	    if (i830_tex_formats[i].fmt == pPict->format)
-		break;
+	if (pPict->pDrawable) {
+		int w, h, i;
+
+		w = pPict->pDrawable->width;
+		h = pPict->pDrawable->height;
+		if ((w > 2048) || (h > 2048))
+			I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+
+		for (i = 0;
+		     i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
+		     i++) {
+			if (i830_tex_formats[i].fmt == pPict->format)
+				break;
+		}
+		if (i == sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]))
+			I830FALLBACK("Unsupported picture format 0x%x\n",
+				     (int)pPict->format);
 	}
-	if (i == sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]))
-	    I830FALLBACK("Unsupported picture format 0x%x\n",
-			 (int)pPict->format);
-    }
 
-    return TRUE;
+	return TRUE;
 }
 
-static uint32_t
-i8xx_get_card_format(PicturePtr pPict)
+static uint32_t i8xx_get_card_format(PicturePtr pPict)
 {
-    int i;
-    for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
-	    i++)
-    {
-	if (i830_tex_formats[i].fmt == pPict->format)
-	    return i830_tex_formats[i].card_fmt;
-    }
-    FatalError("Unsupported format type %d\n", pPict->format);
+	int i;
+	for (i = 0; i < sizeof(i830_tex_formats) / sizeof(i830_tex_formats[0]);
+	     i++) {
+		if (i830_tex_formats[i].fmt == pPict->format)
+			return i830_tex_formats[i].card_fmt;
+	}
+	FatalError("Unsupported format type %d\n", pPict->format);
 }
 
-static void
-i830_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
+static void i830_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
 {
 
-    ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    uint32_t format, pitch, filter;
-    uint32_t wrap_mode;
-    uint32_t texcoordtype;
-
-    pitch = intel_get_pixmap_pitch(pPix);
-    pI830->scale_units[unit][0] = pPix->drawable.width;
-    pI830->scale_units[unit][1] = pPix->drawable.height;
-    pI830->transform[unit] = pPict->transform;
-
-    if (i830_transform_is_affine(pI830->transform[unit]))
-	texcoordtype = TEXCOORDTYPE_CARTESIAN;
-    else
-	texcoordtype = TEXCOORDTYPE_HOMOGENEOUS;
-
-    format = i8xx_get_card_format(pPict);
-
-    switch (pPict->repeatType) {
-    case RepeatNone:
-	wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
-	break;
-    case RepeatNormal:
-	wrap_mode = TEXCOORDMODE_WRAP;
-	break;
-    case RepeatPad:
-	wrap_mode = TEXCOORDMODE_CLAMP;
-	break;
-    case RepeatReflect:
-	wrap_mode = TEXCOORDMODE_MIRROR;
-	break;
-    default:
-	FatalError("Unknown repeat type %d\n", pPict->repeatType);
-    }
-
-    switch (pPict->filter) {
-    case PictFilterNearest:
-        filter = ((FILTER_NEAREST<<TM0S3_MAG_FILTER_SHIFT) |
-		  (FILTER_NEAREST<<TM0S3_MIN_FILTER_SHIFT));
-        break;
-    case PictFilterBilinear:
-        filter = ((FILTER_LINEAR<<TM0S3_MAG_FILTER_SHIFT) |
-		  (FILTER_LINEAR<<TM0S3_MIN_FILTER_SHIFT));
-        break;
-    default:
-	filter = 0;
-        FatalError("Bad filter 0x%x\n", pPict->filter);
-    }
-    filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT); 
-
-    {
-	if (pPix->drawable.bitsPerPixel == 8)
-	    format |= MAPSURF_8BIT;
-	else if (pPix->drawable.bitsPerPixel == 16)
-	    format |= MAPSURF_16BIT;
-	else
-	    format |= MAPSURF_32BIT;
-
-	BEGIN_BATCH(10);
-	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 | LOAD_TEXTURE_MAP(unit) | 4);
-	OUT_RELOC_PIXMAP(pPix, I915_GEM_DOMAIN_SAMPLER, 0, TM0S0_USE_FENCE);
-	OUT_BATCH(((pPix->drawable.height - 1) << TM0S1_HEIGHT_SHIFT) |
-		  ((pPix->drawable.width - 1) << TM0S1_WIDTH_SHIFT) | format);
-	OUT_BATCH((pitch/4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
-	OUT_BATCH(filter);
-	OUT_BATCH(0); /* default color */
-	OUT_BATCH(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
-		  ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
-		  texcoordtype | ENABLE_ADDR_V_CNTL |
-		  TEXCOORD_ADDR_V_MODE(wrap_mode) |
-		  ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
-	/* map texel stream */
-	OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD);
-	if (unit == 0)
-	    OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) |
-		      TEXBIND_SET1(TEXCOORDSRC_KEEP) |
-		      TEXBIND_SET2(TEXCOORDSRC_KEEP) |
-		      TEXBIND_SET3(TEXCOORDSRC_KEEP));
+	ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	uint32_t format, pitch, filter;
+	uint32_t wrap_mode;
+	uint32_t texcoordtype;
+
+	pitch = intel_get_pixmap_pitch(pPix);
+	pI830->scale_units[unit][0] = pPix->drawable.width;
+	pI830->scale_units[unit][1] = pPix->drawable.height;
+	pI830->transform[unit] = pPict->transform;
+
+	if (i830_transform_is_affine(pI830->transform[unit]))
+		texcoordtype = TEXCOORDTYPE_CARTESIAN;
 	else
-	    OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) |
-		      TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
-		      TEXBIND_SET2(TEXCOORDSRC_KEEP) |
-		      TEXBIND_SET3(TEXCOORDSRC_KEEP));
-	OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | (unit << 16) |
-		  DISABLE_TEX_STREAM_BUMP |
-		  ENABLE_TEX_STREAM_COORD_SET |
-		  TEX_STREAM_COORD_SET(unit) |
-		  ENABLE_TEX_STREAM_MAP_IDX |
-		  TEX_STREAM_MAP_IDX(unit));
-	ADVANCE_BATCH();
-     }
+		texcoordtype = TEXCOORDTYPE_HOMOGENEOUS;
+
+	format = i8xx_get_card_format(pPict);
+
+	switch (pPict->repeatType) {
+	case RepeatNone:
+		wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
+		break;
+	case RepeatNormal:
+		wrap_mode = TEXCOORDMODE_WRAP;
+		break;
+	case RepeatPad:
+		wrap_mode = TEXCOORDMODE_CLAMP;
+		break;
+	case RepeatReflect:
+		wrap_mode = TEXCOORDMODE_MIRROR;
+		break;
+	default:
+		FatalError("Unknown repeat type %d\n", pPict->repeatType);
+	}
+
+	switch (pPict->filter) {
+	case PictFilterNearest:
+		filter = ((FILTER_NEAREST << TM0S3_MAG_FILTER_SHIFT) |
+			  (FILTER_NEAREST << TM0S3_MIN_FILTER_SHIFT));
+		break;
+	case PictFilterBilinear:
+		filter = ((FILTER_LINEAR << TM0S3_MAG_FILTER_SHIFT) |
+			  (FILTER_LINEAR << TM0S3_MIN_FILTER_SHIFT));
+		break;
+	default:
+		filter = 0;
+		FatalError("Bad filter 0x%x\n", pPict->filter);
+	}
+	filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);
+
+	{
+		if (pPix->drawable.bitsPerPixel == 8)
+			format |= MAPSURF_8BIT;
+		else if (pPix->drawable.bitsPerPixel == 16)
+			format |= MAPSURF_16BIT;
+		else
+			format |= MAPSURF_32BIT;
+
+		BEGIN_BATCH(10);
+		OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
+			  LOAD_TEXTURE_MAP(unit) | 4);
+		OUT_RELOC_PIXMAP(pPix, I915_GEM_DOMAIN_SAMPLER, 0,
+				 TM0S0_USE_FENCE);
+		OUT_BATCH(((pPix->drawable.height -
+			    1) << TM0S1_HEIGHT_SHIFT) | ((pPix->drawable.width -
+							  1) <<
+							 TM0S1_WIDTH_SHIFT) |
+			  format);
+		OUT_BATCH((pitch / 4 - 1) << TM0S2_PITCH_SHIFT | TM0S2_MAP_2D);
+		OUT_BATCH(filter);
+		OUT_BATCH(0);	/* default color */
+		OUT_BATCH(_3DSTATE_MAP_COORD_SET_CMD | TEXCOORD_SET(unit) |
+			  ENABLE_TEXCOORD_PARAMS | TEXCOORDS_ARE_NORMAL |
+			  texcoordtype | ENABLE_ADDR_V_CNTL |
+			  TEXCOORD_ADDR_V_MODE(wrap_mode) |
+			  ENABLE_ADDR_U_CNTL | TEXCOORD_ADDR_U_MODE(wrap_mode));
+		/* map texel stream */
+		OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD);
+		if (unit == 0)
+			OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) |
+				  TEXBIND_SET1(TEXCOORDSRC_KEEP) |
+				  TEXBIND_SET2(TEXCOORDSRC_KEEP) |
+				  TEXBIND_SET3(TEXCOORDSRC_KEEP));
+		else
+			OUT_BATCH(TEXBIND_SET0(TEXCOORDSRC_VTXSET_0) |
+				  TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
+				  TEXBIND_SET2(TEXCOORDSRC_KEEP) |
+				  TEXBIND_SET3(TEXCOORDSRC_KEEP));
+		OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | (unit << 16) |
+			  DISABLE_TEX_STREAM_BUMP |
+			  ENABLE_TEX_STREAM_COORD_SET |
+			  TEX_STREAM_COORD_SET(unit) |
+			  ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(unit));
+		ADVANCE_BATCH();
+	}
 }
 
 Bool
 i830_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 		     PicturePtr pDstPicture)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-    uint32_t tmp1;
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+	uint32_t tmp1;
 
-    /* Check for unsupported compositing operations. */
-    if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0]))
-        I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+	/* Check for unsupported compositing operations. */
+	if (op >= sizeof(i830_blend_op) / sizeof(i830_blend_op[0]))
+		I830FALLBACK("Unsupported Composite op 0x%x\n", op);
 
-    if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+	if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
 	    PICT_FORMAT_RGB(pMaskPicture->format)) {
-        /* Check if it's component alpha that relies on a source alpha and on
-         * the source value.  We can only get one of those into the single
-         * source value that we get to blend with.
-         */
-        if (i830_blend_op[op].src_alpha &&
-            (i830_blend_op[op].src_blend != BLENDFACTOR_ZERO))
-            	I830FALLBACK("Component alpha not supported with source "
+		/* Check if it's component alpha that relies on a source alpha and on
+		 * the source value.  We can only get one of those into the single
+		 * source value that we get to blend with.
+		 */
+		if (i830_blend_op[op].src_alpha &&
+		    (i830_blend_op[op].src_blend != BLENDFACTOR_ZERO))
+			I830FALLBACK
+			    ("Component alpha not supported with source "
 			     "alpha and source value blending.\n");
-    }
+	}
 
-    if (!i830_check_composite_texture(pScrn, pSrcPicture, 0))
-        I830FALLBACK("Check Src picture texture\n");
-    if (pMaskPicture != NULL && !i830_check_composite_texture(pScrn, pMaskPicture, 1))
-        I830FALLBACK("Check Mask picture texture\n");
+	if (!i830_check_composite_texture(pScrn, pSrcPicture, 0))
+		I830FALLBACK("Check Src picture texture\n");
+	if (pMaskPicture != NULL
+	    && !i830_check_composite_texture(pScrn, pMaskPicture, 1))
+		I830FALLBACK("Check Mask picture texture\n");
 
-    if (!i830_get_dest_format(pDstPicture, &tmp1))
-	I830FALLBACK("Get Color buffer format\n");
+	if (!i830_get_dest_format(pDstPicture, &tmp1))
+		I830FALLBACK("Get Color buffer format\n");
 
-    return TRUE;
+	return TRUE;
 }
 
 Bool
@@ -404,209 +408,208 @@ i830_prepare_composite(int op, PicturePtr pSrcPicture,
 		       PicturePtr pMaskPicture, PicturePtr pDstPicture,
 		       PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    pI830->render_src_picture = pSrcPicture;
-    pI830->render_src = pSrc;
-    pI830->render_mask_picture = pMaskPicture;
-    pI830->render_mask = pMask;
-    pI830->render_dst_picture = pDstPicture;
-    pI830->render_dst = pDst;
-
-    i830_exa_check_pitch_3d(pSrc);
-    if (pMask)
-	i830_exa_check_pitch_3d(pMask);
-    i830_exa_check_pitch_3d(pDst);
-
-    if (!i830_get_dest_format(pDstPicture, &pI830->render_dst_format))
-	return FALSE;
-
-    pI830->dst_coord_adjust = 0;
-    pI830->src_coord_adjust = 0;
-    pI830->mask_coord_adjust = 0;
-    if (pSrcPicture->filter == PictFilterNearest)
-	pI830->src_coord_adjust = 0.375;
-    if (pMask != NULL) {
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	pI830->render_src_picture = pSrcPicture;
+	pI830->render_src = pSrc;
+	pI830->render_mask_picture = pMaskPicture;
+	pI830->render_mask = pMask;
+	pI830->render_dst_picture = pDstPicture;
+	pI830->render_dst = pDst;
+
+	i830_exa_check_pitch_3d(pSrc);
+	if (pMask)
+		i830_exa_check_pitch_3d(pMask);
+	i830_exa_check_pitch_3d(pDst);
+
+	if (!i830_get_dest_format(pDstPicture, &pI830->render_dst_format))
+		return FALSE;
+
+	pI830->dst_coord_adjust = 0;
+	pI830->src_coord_adjust = 0;
 	pI830->mask_coord_adjust = 0;
-	if (pMaskPicture->filter == PictFilterNearest)
-	    pI830->mask_coord_adjust = 0.375;
-    } else {
-	pI830->transform[1] = NULL;
-	pI830->scale_units[1][0] = -1;
-	pI830->scale_units[1][1] = -1;
-    }
-
-    {
-	uint32_t cblend, ablend, blendctl;
-
-	/* If component alpha is active in the mask and the blend operation
-	 * uses the source alpha, then we know we don't need the source
-	 * value (otherwise we would have hit a fallback earlier), so we
-	 * provide the source alpha (src.A * mask.X) as output color.
-	 * Conversely, if CA is set and we don't need the source alpha, then
-	 * we produce the source value (src.X * mask.X) and the source alpha
-	 * is unused..  Otherwise, we provide the non-CA source value
-	 * (src.X * mask.A).
-	 *
-	 * The PICT_FORMAT_RGB(pict) == 0 fixups are not needed on 855+'s a8
-	 * pictures, but we need to implement it for 830/845 and there's no
-	 * harm done in leaving it in.
-	 */
-	cblend = TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE |
-		 TB0C_OUTPUT_WRITE_CURRENT;
-	ablend = TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
-		 TB0A_OUTPUT_WRITE_CURRENT;
-
-	/* Get the source picture's channels into TBx_ARG1 */
-	if ((pMaskPicture != NULL &&
-	     pMaskPicture->componentAlpha &&
-	     PICT_FORMAT_RGB(pMaskPicture->format) &&
-	     i830_blend_op[op].src_alpha) || pDstPicture->format == PICT_a8)
-	{
-	    /* Producing source alpha value, so the first set of channels
-	     * is src.A instead of src.X.  We also do this if the destination
-	     * is a8, in which case src.G is what's written, and the other
-	     * channels are ignored.
-	     */
-	    if (PICT_FORMAT_A(pSrcPicture->format) != 0) {
-		ablend |= TB0A_ARG1_SEL_TEXEL0;
-		cblend |= TB0C_ARG1_SEL_TEXEL0 | TB0C_ARG1_REPLICATE_ALPHA;
-	    } else {
-		ablend |= TB0A_ARG1_SEL_ONE;
-		cblend |= TB0C_ARG1_SEL_ONE;
-	    }
-	} else {
-	    if (PICT_FORMAT_A(pSrcPicture->format) != 0) {
-		ablend |= TB0A_ARG1_SEL_TEXEL0;
-	    } else {
-		ablend |= TB0A_ARG1_SEL_ONE;
-	    }
-	    if (PICT_FORMAT_RGB(pSrcPicture->format) != 0)
-		cblend |= TB0C_ARG1_SEL_TEXEL0;
-	    else
-		cblend |= TB0C_ARG1_SEL_ONE | TB0C_ARG1_INVERT; /* 0.0 */
-	}
-
-	if (pMask) {
-	    if (pDstPicture->format != PICT_a8 &&
-		(pMaskPicture->componentAlpha &&
-		 PICT_FORMAT_RGB(pMaskPicture->format)))
-	    {
-		cblend |= TB0C_ARG2_SEL_TEXEL1;
-	    } else {
-		if (PICT_FORMAT_A(pMaskPicture->format) != 0)
-		    cblend |= TB0C_ARG2_SEL_TEXEL1 |
-			TB0C_ARG2_REPLICATE_ALPHA;
-		else
-		    cblend |= TB0C_ARG2_SEL_ONE;
-	    }
-	    if (PICT_FORMAT_A(pMaskPicture->format) != 0)
-		ablend |= TB0A_ARG2_SEL_TEXEL1;
-	    else
-		ablend |= TB0A_ARG2_SEL_ONE;
+	if (pSrcPicture->filter == PictFilterNearest)
+		pI830->src_coord_adjust = 0.375;
+	if (pMask != NULL) {
+		pI830->mask_coord_adjust = 0;
+		if (pMaskPicture->filter == PictFilterNearest)
+			pI830->mask_coord_adjust = 0.375;
 	} else {
-	    cblend |= TB0C_ARG2_SEL_ONE;
-	    ablend |= TB0A_ARG2_SEL_ONE;
+		pI830->transform[1] = NULL;
+		pI830->scale_units[1][0] = -1;
+		pI830->scale_units[1][1] = -1;
 	}
 
-	if (!i830_get_blend_cntl(pScrn, op, pMaskPicture, pDstPicture->format,
-				 &blendctl)) {
-	    return FALSE;
+	{
+		uint32_t cblend, ablend, blendctl;
+
+		/* If component alpha is active in the mask and the blend operation
+		 * uses the source alpha, then we know we don't need the source
+		 * value (otherwise we would have hit a fallback earlier), so we
+		 * provide the source alpha (src.A * mask.X) as output color.
+		 * Conversely, if CA is set and we don't need the source alpha, then
+		 * we produce the source value (src.X * mask.X) and the source alpha
+		 * is unused..  Otherwise, we provide the non-CA source value
+		 * (src.X * mask.A).
+		 *
+		 * The PICT_FORMAT_RGB(pict) == 0 fixups are not needed on 855+'s a8
+		 * pictures, but we need to implement it for 830/845 and there's no
+		 * harm done in leaving it in.
+		 */
+		cblend =
+		    TB0C_LAST_STAGE | TB0C_RESULT_SCALE_1X | TB0C_OP_MODULE |
+		    TB0C_OUTPUT_WRITE_CURRENT;
+		ablend =
+		    TB0A_RESULT_SCALE_1X | TB0A_OP_MODULE |
+		    TB0A_OUTPUT_WRITE_CURRENT;
+
+		/* Get the source picture's channels into TBx_ARG1 */
+		if ((pMaskPicture != NULL &&
+		     pMaskPicture->componentAlpha &&
+		     PICT_FORMAT_RGB(pMaskPicture->format) &&
+		     i830_blend_op[op].src_alpha)
+		    || pDstPicture->format == PICT_a8) {
+			/* Producing source alpha value, so the first set of channels
+			 * is src.A instead of src.X.  We also do this if the destination
+			 * is a8, in which case src.G is what's written, and the other
+			 * channels are ignored.
+			 */
+			if (PICT_FORMAT_A(pSrcPicture->format) != 0) {
+				ablend |= TB0A_ARG1_SEL_TEXEL0;
+				cblend |=
+				    TB0C_ARG1_SEL_TEXEL0 |
+				    TB0C_ARG1_REPLICATE_ALPHA;
+			} else {
+				ablend |= TB0A_ARG1_SEL_ONE;
+				cblend |= TB0C_ARG1_SEL_ONE;
+			}
+		} else {
+			if (PICT_FORMAT_A(pSrcPicture->format) != 0) {
+				ablend |= TB0A_ARG1_SEL_TEXEL0;
+			} else {
+				ablend |= TB0A_ARG1_SEL_ONE;
+			}
+			if (PICT_FORMAT_RGB(pSrcPicture->format) != 0)
+				cblend |= TB0C_ARG1_SEL_TEXEL0;
+			else
+				cblend |= TB0C_ARG1_SEL_ONE | TB0C_ARG1_INVERT;	/* 0.0 */
+		}
+
+		if (pMask) {
+			if (pDstPicture->format != PICT_a8 &&
+			    (pMaskPicture->componentAlpha &&
+			     PICT_FORMAT_RGB(pMaskPicture->format))) {
+				cblend |= TB0C_ARG2_SEL_TEXEL1;
+			} else {
+				if (PICT_FORMAT_A(pMaskPicture->format) != 0)
+					cblend |= TB0C_ARG2_SEL_TEXEL1 |
+					    TB0C_ARG2_REPLICATE_ALPHA;
+				else
+					cblend |= TB0C_ARG2_SEL_ONE;
+			}
+			if (PICT_FORMAT_A(pMaskPicture->format) != 0)
+				ablend |= TB0A_ARG2_SEL_TEXEL1;
+			else
+				ablend |= TB0A_ARG2_SEL_ONE;
+		} else {
+			cblend |= TB0C_ARG2_SEL_ONE;
+			ablend |= TB0A_ARG2_SEL_ONE;
+		}
+
+		if (!i830_get_blend_cntl
+		    (pScrn, op, pMaskPicture, pDstPicture->format, &blendctl)) {
+			return FALSE;
+		}
+
+		pI830->cblend = cblend;
+		pI830->ablend = ablend;
+		pI830->s8_blendctl = blendctl;
 	}
 
-	pI830->cblend = cblend;
-	pI830->ablend = ablend;
-	pI830->s8_blendctl = blendctl;
-    }
-
-    i830_debug_sync(pScrn);
+	i830_debug_sync(pScrn);
 
-    pI830->needs_render_state_emit = TRUE;
+	pI830->needs_render_state_emit = TRUE;
 
-    return TRUE;
+	return TRUE;
 }
 
-static void
-i830_emit_composite_state(ScrnInfoPtr pScrn)
+static void i830_emit_composite_state(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    uint32_t vf2;
-    uint32_t texcoordfmt = 0;
-
-    pI830->needs_render_state_emit = FALSE;
-
-    IntelEmitInvarientState(pScrn);
-    pI830->last_3d = LAST_3D_RENDER;
-
-    BEGIN_BATCH(21);
-
-    OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
-    OUT_BATCH(BUF_3D_ID_COLOR_BACK| BUF_3D_USE_FENCE |
-	      BUF_3D_PITCH(intel_get_pixmap_pitch(pI830->render_dst)));
-    OUT_RELOC_PIXMAP(pI830->render_dst,
-		     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-
-    OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
-    OUT_BATCH(pI830->render_dst_format);
-
-    OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
-    OUT_BATCH(0);
-    OUT_BATCH(0); /* ymin, xmin */
-    OUT_BATCH(DRAW_YMAX(pI830->render_dst->drawable.height - 1) |
-	      DRAW_XMAX(pI830->render_dst->drawable.width - 1));
-    OUT_BATCH(0); /* yorig, xorig */
-
-    OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
-	      I1_LOAD_S(2) |
-	      I1_LOAD_S(3) |
-	      I1_LOAD_S(8) |
-	      2);
-    if (pI830->render_mask)
-	vf2 = 2 << 12; /* 2 texture coord sets */
-    else
-	vf2 = 1 << 12;
-    OUT_BATCH(vf2); /* number of coordinate sets */
-    OUT_BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
-    OUT_BATCH(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD | pI830->s8_blendctl |
-	      S8_ENABLE_COLOR_BUFFER_WRITE);
-
-    OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND);
-
-    OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
-	      LOAD_TEXTURE_BLEND_STAGE(0)|1);
-    OUT_BATCH(pI830->cblend);
-    OUT_BATCH(pI830->ablend);
-
-    OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP |
-	      DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS |
-	      DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST |
-	      ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST);
-    /* We have to explicitly say we don't want write disabled */
-    OUT_BATCH(_3DSTATE_ENABLES_2_CMD | ENABLE_COLOR_MASK |
-	      DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
-	      DISABLE_DITHER | ENABLE_COLOR_WRITE |
-	      DISABLE_DEPTH_WRITE);
-
-    if (i830_transform_is_affine(pI830->render_src_picture->transform))
-	texcoordfmt |= (TEXCOORDFMT_2D << 0);
-    else
-	texcoordfmt |= (TEXCOORDFMT_3D << 0);
-    if (pI830->render_mask) {
-	if (i830_transform_is_affine(pI830->render_mask_picture->transform))
-	    texcoordfmt |= (TEXCOORDFMT_2D << 2);
+	I830Ptr pI830 = I830PTR(pScrn);
+	uint32_t vf2;
+	uint32_t texcoordfmt = 0;
+
+	pI830->needs_render_state_emit = FALSE;
+
+	IntelEmitInvarientState(pScrn);
+	pI830->last_3d = LAST_3D_RENDER;
+
+	BEGIN_BATCH(21);
+
+	OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
+	OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
+		  BUF_3D_PITCH(intel_get_pixmap_pitch(pI830->render_dst)));
+	OUT_RELOC_PIXMAP(pI830->render_dst,
+			 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
+
+	OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
+	OUT_BATCH(pI830->render_dst_format);
+
+	OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
+	OUT_BATCH(0);
+	OUT_BATCH(0);		/* ymin, xmin */
+	OUT_BATCH(DRAW_YMAX(pI830->render_dst->drawable.height - 1) |
+		  DRAW_XMAX(pI830->render_dst->drawable.width - 1));
+	OUT_BATCH(0);		/* yorig, xorig */
+
+	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
+		  I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
+	if (pI830->render_mask)
+		vf2 = 2 << 12;	/* 2 texture coord sets */
+	else
+		vf2 = 1 << 12;
+	OUT_BATCH(vf2);		/* number of coordinate sets */
+	OUT_BATCH(S3_CULLMODE_NONE | S3_VERTEXHAS_XY);
+	OUT_BATCH(S8_ENABLE_COLOR_BLEND | S8_BLENDFUNC_ADD | pI830->
+		  s8_blendctl | S8_ENABLE_COLOR_BUFFER_WRITE);
+
+	OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | DISABLE_INDPT_ALPHA_BLEND);
+
+	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_2 |
+		  LOAD_TEXTURE_BLEND_STAGE(0) | 1);
+	OUT_BATCH(pI830->cblend);
+	OUT_BATCH(pI830->ablend);
+
+	OUT_BATCH(_3DSTATE_ENABLES_1_CMD | DISABLE_LOGIC_OP |
+		  DISABLE_STENCIL_TEST | DISABLE_DEPTH_BIAS |
+		  DISABLE_SPEC_ADD | DISABLE_FOG | DISABLE_ALPHA_TEST |
+		  ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST);
+	/* We have to explicitly say we don't want write disabled */
+	OUT_BATCH(_3DSTATE_ENABLES_2_CMD | ENABLE_COLOR_MASK |
+		  DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
+		  DISABLE_DITHER | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE);
+
+	if (i830_transform_is_affine(pI830->render_src_picture->transform))
+		texcoordfmt |= (TEXCOORDFMT_2D << 0);
 	else
-	    texcoordfmt |= (TEXCOORDFMT_3D << 2);
-    }
-    OUT_BATCH(_3DSTATE_VERTEX_FORMAT_2_CMD | texcoordfmt);
+		texcoordfmt |= (TEXCOORDFMT_3D << 0);
+	if (pI830->render_mask) {
+		if (i830_transform_is_affine
+		    (pI830->render_mask_picture->transform))
+			texcoordfmt |= (TEXCOORDFMT_2D << 2);
+		else
+			texcoordfmt |= (TEXCOORDFMT_3D << 2);
+	}
+	OUT_BATCH(_3DSTATE_VERTEX_FORMAT_2_CMD | texcoordfmt);
 
-    ADVANCE_BATCH();
+	ADVANCE_BATCH();
 
-    i830_texture_setup(pI830->render_src_picture, pI830->render_src, 0);
-    if (pI830->render_mask) {
-	i830_texture_setup(pI830->render_mask_picture,
-			   pI830->render_mask, 1);
-    }
+	i830_texture_setup(pI830->render_src_picture, pI830->render_src, 0);
+	if (pI830->render_mask) {
+		i830_texture_setup(pI830->render_mask_picture,
+				   pI830->render_mask, 1);
+	}
 }
 
 /* Emit the vertices for a single composite rectangle.
@@ -617,166 +620,182 @@ static void
 i830_emit_composite_primitive(PixmapPtr pDst,
 			      int srcX, int srcY,
 			      int maskX, int maskY,
-			      int dstX, int dstY,
-			      int w, int h)
+			      int dstX, int dstY, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    Bool is_affine_src, is_affine_mask = TRUE;
-    int per_vertex, num_floats;
-    float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
-
-    per_vertex = 2; /* dest x/y */
-
-    {
-	float x = srcX + pI830->src_coord_adjust;
-	float y = srcY + pI830->src_coord_adjust;
-
-	is_affine_src = i830_transform_is_affine (pI830->transform[0]);
-	if (is_affine_src) {
-	    if (!i830_get_transformed_coordinates(x, y,
-						  pI830->transform[0],
-						  &src_x[0], &src_y[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x, y + h,
-						  pI830->transform[0],
-						  &src_x[1], &src_y[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x + w, y + h,
-						  pI830->transform[0],
-						  &src_x[2], &src_y[2]))
-		return;
-
-	    per_vertex += 2;    /* src x/y */
-	} else {
-	    if (!i830_get_transformed_coordinates_3d(x, y,
-						     pI830->transform[0],
-						     &src_x[0],
-						     &src_y[0],
-						     &src_w[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x, y + h,
-						     pI830->transform[0],
-						     &src_x[1],
-						     &src_y[1],
-						     &src_w[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x + w, y + h,
-						     pI830->transform[0],
-						     &src_x[2],
-						     &src_y[2],
-						     &src_w[2]))
-		return;
-
-	    per_vertex += 3;    /* src x/y/w */
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	Bool is_affine_src, is_affine_mask = TRUE;
+	int per_vertex, num_floats;
+	float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
+
+	per_vertex = 2;		/* dest x/y */
+
+	{
+		float x = srcX + pI830->src_coord_adjust;
+		float y = srcY + pI830->src_coord_adjust;
+
+		is_affine_src = i830_transform_is_affine(pI830->transform[0]);
+		if (is_affine_src) {
+			if (!i830_get_transformed_coordinates(x, y,
+							      pI830->
+							      transform[0],
+							      &src_x[0],
+							      &src_y[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x, y + h,
+							      pI830->
+							      transform[0],
+							      &src_x[1],
+							      &src_y[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x + w, y + h,
+							      pI830->
+							      transform[0],
+							      &src_x[2],
+							      &src_y[2]))
+				return;
+
+			per_vertex += 2;	/* src x/y */
+		} else {
+			if (!i830_get_transformed_coordinates_3d(x, y,
+								 pI830->
+								 transform[0],
+								 &src_x[0],
+								 &src_y[0],
+								 &src_w[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x, y + h,
+								 pI830->
+								 transform[0],
+								 &src_x[1],
+								 &src_y[1],
+								 &src_w[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+								 pI830->
+								 transform[0],
+								 &src_x[2],
+								 &src_y[2],
+								 &src_w[2]))
+				return;
+
+			per_vertex += 3;	/* src x/y/w */
+		}
 	}
-    }
-
-    if (pI830->render_mask) {
-	float x = maskX + pI830->mask_coord_adjust;
-	float y = maskY + pI830->mask_coord_adjust;
-
-	is_affine_mask = i830_transform_is_affine (pI830->transform[1]);
-	if (is_affine_mask) {
-	    if (!i830_get_transformed_coordinates(x, y,
-						  pI830->transform[1],
-						  &mask_x[0], &mask_y[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x, y + h,
-						  pI830->transform[1],
-						  &mask_x[1], &mask_y[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x + w, y + h,
-						  pI830->transform[1],
-						  &mask_x[2], &mask_y[2]))
-		return;
-
-	    per_vertex += 2;	/* mask x/y */
-	} else {
-	    if (!i830_get_transformed_coordinates_3d(x, y,
-						     pI830->transform[1],
-						     &mask_x[0],
-						     &mask_y[0],
-						     &mask_w[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x, y + h,
-						     pI830->transform[1],
-						     &mask_x[1],
-						     &mask_y[1],
-						     &mask_w[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x + w, y + h,
-						     pI830->transform[1],
-						     &mask_x[2],
-						     &mask_y[2],
-						     &mask_w[2]))
-		return;
-
-	    per_vertex += 3;	/* mask x/y/w */
+
+	if (pI830->render_mask) {
+		float x = maskX + pI830->mask_coord_adjust;
+		float y = maskY + pI830->mask_coord_adjust;
+
+		is_affine_mask = i830_transform_is_affine(pI830->transform[1]);
+		if (is_affine_mask) {
+			if (!i830_get_transformed_coordinates(x, y,
+							      pI830->
+							      transform[1],
+							      &mask_x[0],
+							      &mask_y[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x, y + h,
+							      pI830->
+							      transform[1],
+							      &mask_x[1],
+							      &mask_y[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x + w, y + h,
+							      pI830->
+							      transform[1],
+							      &mask_x[2],
+							      &mask_y[2]))
+				return;
+
+			per_vertex += 2;	/* mask x/y */
+		} else {
+			if (!i830_get_transformed_coordinates_3d(x, y,
+								 pI830->
+								 transform[1],
+								 &mask_x[0],
+								 &mask_y[0],
+								 &mask_w[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x, y + h,
+								 pI830->
+								 transform[1],
+								 &mask_x[1],
+								 &mask_y[1],
+								 &mask_w[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+								 pI830->
+								 transform[1],
+								 &mask_x[2],
+								 &mask_y[2],
+								 &mask_w[2]))
+				return;
+
+			per_vertex += 3;	/* mask x/y/w */
+		}
 	}
-    }
-
-    num_floats = 3 * per_vertex;
-
-    BEGIN_BATCH(1 + num_floats);
-
-    OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (num_floats-1));
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX + w);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
-    OUT_BATCH_F(src_x[2] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[2] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(src_w[2]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[2] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[2] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(mask_w[2]);
+
+	num_floats = 3 * per_vertex;
+
+	BEGIN_BATCH(1 + num_floats);
+
+	OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (num_floats - 1));
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX + w);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
+	OUT_BATCH_F(src_x[2] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[2] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(src_w[2]);
 	}
-    }
-
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
-    OUT_BATCH_F(src_x[1] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[1] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(src_w[1]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[1] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[1] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(mask_w[1]);
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[2] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[2] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(mask_w[2]);
+		}
 	}
-    }
-
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY);
-    OUT_BATCH_F(src_x[0] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[0] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(src_w[0]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[0] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[0] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(mask_w[0]);
+
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
+	OUT_BATCH_F(src_x[1] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[1] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(src_w[1]);
+	}
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[1] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[1] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(mask_w[1]);
+		}
 	}
-    }
 
-    ADVANCE_BATCH();
-}
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY);
+	OUT_BATCH_F(src_x[0] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[0] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(src_w[0]);
+	}
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[0] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[0] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(mask_w[0]);
+		}
+	}
 
+	ADVANCE_BATCH();
+}
 
 /**
  * Do a single rectangle composite operation.
@@ -785,30 +804,28 @@ void
 i830_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 	       int dstX, int dstY, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    intel_batch_start_atomic(pScrn,
-			     58 + /* invarient */
-			     22 + /* setup */
-			     20 + /* 2 * setup_texture */
-			     1 + 30 /* verts */);
+	intel_batch_start_atomic(pScrn, 58 +	/* invarient */
+				 22 +	/* setup */
+				 20 +	/* 2 * setup_texture */
+				 1 + 30 /* verts */ );
 
-    if (pI830->needs_render_state_emit)
-	i830_emit_composite_state(pScrn);
+	if (pI830->needs_render_state_emit)
+		i830_emit_composite_state(pScrn);
 
-    i830_emit_composite_primitive(pDst, srcX, srcY, maskX, maskY, dstX, dstY,
-				  w, h);
+	i830_emit_composite_primitive(pDst, srcX, srcY, maskX, maskY, dstX,
+				      dstY, w, h);
 
-    intel_batch_end_atomic(pScrn);
+	intel_batch_end_atomic(pScrn);
 
-    i830_debug_sync(pScrn);
+	i830_debug_sync(pScrn);
 }
 
-void
-i830_batch_flush_notify(ScrnInfoPtr scrn)
+void i830_batch_flush_notify(ScrnInfoPtr scrn)
 {
-    I830Ptr i830 = I830PTR(scrn);
+	I830Ptr i830 = I830PTR(scrn);
 
-    i830->needs_render_state_emit = TRUE;
+	i830->needs_render_state_emit = TRUE;
 }
diff --git a/src/i830_uxa.c b/src/i830_uxa.c
index df77259f..ecd654e3 100644
--- a/src/i830_uxa.c
+++ b/src/i830_uxa.c
@@ -39,44 +39,42 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <string.h>
 #include <sys/mman.h>
 
-const int I830CopyROP[16] =
-{
-   ROP_0,               /* GXclear */
-   ROP_DSa,             /* GXand */
-   ROP_SDna,            /* GXandReverse */
-   ROP_S,               /* GXcopy */
-   ROP_DSna,            /* GXandInverted */
-   ROP_D,               /* GXnoop */
-   ROP_DSx,             /* GXxor */
-   ROP_DSo,             /* GXor */
-   ROP_DSon,            /* GXnor */
-   ROP_DSxn,            /* GXequiv */
-   ROP_Dn,              /* GXinvert*/
-   ROP_SDno,            /* GXorReverse */
-   ROP_Sn,              /* GXcopyInverted */
-   ROP_DSno,            /* GXorInverted */
-   ROP_DSan,            /* GXnand */
-   ROP_1                /* GXset */
+const int I830CopyROP[16] = {
+	ROP_0,			/* GXclear */
+	ROP_DSa,		/* GXand */
+	ROP_SDna,		/* GXandReverse */
+	ROP_S,			/* GXcopy */
+	ROP_DSna,		/* GXandInverted */
+	ROP_D,			/* GXnoop */
+	ROP_DSx,		/* GXxor */
+	ROP_DSo,		/* GXor */
+	ROP_DSon,		/* GXnor */
+	ROP_DSxn,		/* GXequiv */
+	ROP_Dn,			/* GXinvert */
+	ROP_SDno,		/* GXorReverse */
+	ROP_Sn,			/* GXcopyInverted */
+	ROP_DSno,		/* GXorInverted */
+	ROP_DSan,		/* GXnand */
+	ROP_1			/* GXset */
 };
 
-const int I830PatternROP[16] =
-{
-    ROP_0,
-    ROP_DPa,
-    ROP_PDna,
-    ROP_P,
-    ROP_DPna,
-    ROP_D,
-    ROP_DPx,
-    ROP_DPo,
-    ROP_DPon,
-    ROP_PDxn,
-    ROP_Dn,
-    ROP_PDno,
-    ROP_Pn,
-    ROP_DPno,
-    ROP_DPan,
-    ROP_1
+const int I830PatternROP[16] = {
+	ROP_0,
+	ROP_DPa,
+	ROP_PDna,
+	ROP_P,
+	ROP_DPna,
+	ROP_D,
+	ROP_DPx,
+	ROP_DPo,
+	ROP_DPon,
+	ROP_PDxn,
+	ROP_Dn,
+	ROP_PDno,
+	ROP_Pn,
+	ROP_DPno,
+	ROP_DPan,
+	ROP_1
 };
 
 static int uxa_pixmap_index;
@@ -88,56 +86,56 @@ static int uxa_pixmap_index;
  * buffer.  At the point where we are tiling some pixmaps managed by the
  * general allocator, we should move this to using pixmap privates.
  */
-Bool
-i830_pixmap_tiled(PixmapPtr pPixmap)
+Bool i830_pixmap_tiled(PixmapPtr pPixmap)
 {
-    dri_bo *bo;
-    uint32_t tiling_mode, swizzle_mode;
-    int ret;
+	dri_bo *bo;
+	uint32_t tiling_mode, swizzle_mode;
+	int ret;
 
-    bo = i830_get_pixmap_bo(pPixmap);
-    assert(bo != NULL);
+	bo = i830_get_pixmap_bo(pPixmap);
+	assert(bo != NULL);
 
-    ret = drm_intel_bo_get_tiling(bo, &tiling_mode, &swizzle_mode);
-    if (ret != 0) {
-	FatalError("Couldn't get tiling on bo %p: %s\n",
-		   bo, strerror(-ret));
-    }
+	ret = drm_intel_bo_get_tiling(bo, &tiling_mode, &swizzle_mode);
+	if (ret != 0) {
+		FatalError("Couldn't get tiling on bo %p: %s\n",
+			   bo, strerror(-ret));
+	}
 
-    return tiling_mode != I915_TILING_NONE;
+	return tiling_mode != I915_TILING_NONE;
 }
 
 Bool
-i830_get_aperture_space(ScrnInfoPtr pScrn, drm_intel_bo **bo_table, int num_bos)
+i830_get_aperture_space(ScrnInfoPtr pScrn, drm_intel_bo ** bo_table,
+			int num_bos)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    if (pI830->batch_bo == NULL)
-	I830FALLBACK("VT inactive\n");
+	if (pI830->batch_bo == NULL)
+		I830FALLBACK("VT inactive\n");
 
-    bo_table[0] = pI830->batch_bo;
-    if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0) {
-	intel_batch_flush(pScrn, FALSE);
 	bo_table[0] = pI830->batch_bo;
-	if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0)
-	    I830FALLBACK("Couldn't get aperture space for BOs\n");
-    }
-    return TRUE;
+	if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) != 0) {
+		intel_batch_flush(pScrn, FALSE);
+		bo_table[0] = pI830->batch_bo;
+		if (drm_intel_bufmgr_check_aperture_space(bo_table, num_bos) !=
+		    0)
+			I830FALLBACK("Couldn't get aperture space for BOs\n");
+	}
+	return TRUE;
 }
 
-static unsigned long
-i830_pixmap_pitch(PixmapPtr pixmap)
+static unsigned long i830_pixmap_pitch(PixmapPtr pixmap)
 {
-    return pixmap->devKind;
+	return pixmap->devKind;
 }
 
-static int
-i830_pixmap_pitch_is_aligned(PixmapPtr pixmap)
+static int i830_pixmap_pitch_is_aligned(PixmapPtr pixmap)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[pixmap->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    return i830_pixmap_pitch(pixmap) % pI830->accel_pixmap_pitch_alignment == 0;
+	return i830_pixmap_pitch(pixmap) %
+	    pI830->accel_pixmap_pitch_alignment == 0;
 }
 
 /**
@@ -146,91 +144,91 @@ i830_pixmap_pitch_is_aligned(PixmapPtr pixmap)
 static Bool
 i830_uxa_prepare_solid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    unsigned long pitch;
-    drm_intel_bo *bo_table[] = {
-	NULL, /* batch_bo */
-	i830_get_pixmap_bo(pPixmap),
-    };
+	ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	unsigned long pitch;
+	drm_intel_bo *bo_table[] = {
+		NULL,		/* batch_bo */
+		i830_get_pixmap_bo(pPixmap),
+	};
 
-    if (!UXA_PM_IS_SOLID(&pPixmap->drawable, planemask))
-	I830FALLBACK("planemask is not solid");
+	if (!UXA_PM_IS_SOLID(&pPixmap->drawable, planemask))
+		I830FALLBACK("planemask is not solid");
 
-    if (pPixmap->drawable.bitsPerPixel == 24)
-	I830FALLBACK("solid 24bpp unsupported!\n");
+	if (pPixmap->drawable.bitsPerPixel == 24)
+		I830FALLBACK("solid 24bpp unsupported!\n");
 
-    if (pPixmap->drawable.bitsPerPixel < 8)
-	I830FALLBACK("under 8bpp pixmaps unsupported\n");
+	if (pPixmap->drawable.bitsPerPixel < 8)
+		I830FALLBACK("under 8bpp pixmaps unsupported\n");
 
-    i830_exa_check_pitch_2d(pPixmap);
+	i830_exa_check_pitch_2d(pPixmap);
 
-    pitch = i830_pixmap_pitch(pPixmap);
+	pitch = i830_pixmap_pitch(pPixmap);
 
-    if (!i830_pixmap_pitch_is_aligned(pPixmap))
-	I830FALLBACK("pixmap pitch not aligned");
+	if (!i830_pixmap_pitch_is_aligned(pPixmap))
+		I830FALLBACK("pixmap pitch not aligned");
 
-    if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
-	return FALSE;
+	if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
+		return FALSE;
 
-    pI830->BR[13] = (I830PatternROP[alu] & 0xff) << 16 ;
-    switch (pPixmap->drawable.bitsPerPixel) {
+	pI830->BR[13] = (I830PatternROP[alu] & 0xff) << 16;
+	switch (pPixmap->drawable.bitsPerPixel) {
 	case 8:
-	    break;
+		break;
 	case 16:
-	    /* RGB565 */
-	    pI830->BR[13] |= (1 << 24);
-	    break;
+		/* RGB565 */
+		pI830->BR[13] |= (1 << 24);
+		break;
 	case 32:
-	    /* RGB8888 */
-	    pI830->BR[13] |= ((1 << 24) | (1 << 25));
-	    break;
-    }
-    pI830->BR[16] = fg;
-    return TRUE;
+		/* RGB8888 */
+		pI830->BR[13] |= ((1 << 24) | (1 << 25));
+		break;
+	}
+	pI830->BR[16] = fg;
+	return TRUE;
 }
 
-static void
-i830_uxa_solid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2)
+static void i830_uxa_solid(PixmapPtr pPixmap, int x1, int y1, int x2, int y2)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    unsigned long pitch;
-    uint32_t cmd;
+	ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	unsigned long pitch;
+	uint32_t cmd;
 
-    pitch = i830_pixmap_pitch(pPixmap);
+	pitch = i830_pixmap_pitch(pPixmap);
 
-    {
-	BEGIN_BATCH(6);
+	{
+		BEGIN_BATCH(6);
 
-	cmd = XY_COLOR_BLT_CMD;
+		cmd = XY_COLOR_BLT_CMD;
 
-	if (pPixmap->drawable.bitsPerPixel == 32)
-	    cmd |= XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
+		if (pPixmap->drawable.bitsPerPixel == 32)
+			cmd |=
+			    XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
 
-	if (IS_I965G(pI830) && i830_pixmap_tiled(pPixmap)) {
-	    assert((pitch % 512) == 0);
-	    pitch >>= 2;
-	    cmd |= XY_COLOR_BLT_TILED;
-	}
+		if (IS_I965G(pI830) && i830_pixmap_tiled(pPixmap)) {
+			assert((pitch % 512) == 0);
+			pitch >>= 2;
+			cmd |= XY_COLOR_BLT_TILED;
+		}
 
-	OUT_BATCH(cmd);
+		OUT_BATCH(cmd);
 
-	OUT_BATCH(pI830->BR[13] | pitch);
-	OUT_BATCH((y1 << 16) | (x1 & 0xffff));
-	OUT_BATCH((y2 << 16) | (x2 & 0xffff));
-	OUT_RELOC_PIXMAP(pPixmap, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH(pI830->BR[16]);
-	ADVANCE_BATCH();
-    }
+		OUT_BATCH(pI830->BR[13] | pitch);
+		OUT_BATCH((y1 << 16) | (x1 & 0xffff));
+		OUT_BATCH((y2 << 16) | (x2 & 0xffff));
+		OUT_RELOC_PIXMAP(pPixmap, I915_GEM_DOMAIN_RENDER,
+				 I915_GEM_DOMAIN_RENDER, 0);
+		OUT_BATCH(pI830->BR[16]);
+		ADVANCE_BATCH();
+	}
 }
 
-static void
-i830_uxa_done_solid(PixmapPtr pPixmap)
+static void i830_uxa_done_solid(PixmapPtr pPixmap)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
+	ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
 
-    i830_debug_sync(pScrn);
+	i830_debug_sync(pScrn);
 }
 
 /**
@@ -241,137 +239,135 @@ static Bool
 i830_uxa_prepare_copy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
 		      int ydir, int alu, Pixel planemask)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    drm_intel_bo *bo_table[] = {
-	NULL, /* batch_bo */
-	i830_get_pixmap_bo(pSrcPixmap),
-	i830_get_pixmap_bo(pDstPixmap),
-    };
-
-    if (!UXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask))
-	I830FALLBACK("planemask is not solid");
-
-    if (pDstPixmap->drawable.bitsPerPixel < 8)
-	I830FALLBACK("under 8bpp pixmaps unsupported\n");
-
-    if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
-	return FALSE;
-
-    i830_exa_check_pitch_2d(pSrcPixmap);
-    i830_exa_check_pitch_2d(pDstPixmap);
-
-    pI830->pSrcPixmap = pSrcPixmap;
-
-    pI830->BR[13] = I830CopyROP[alu] << 16;
-
-    switch (pSrcPixmap->drawable.bitsPerPixel) {
-    case 8:
-	break;
-    case 16:
-	pI830->BR[13] |= (1 << 24);
-	break;
-    case 32:
-	pI830->BR[13] |= ((1 << 25) | (1 << 24));
-	break;
-    }
-    return TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	drm_intel_bo *bo_table[] = {
+		NULL,		/* batch_bo */
+		i830_get_pixmap_bo(pSrcPixmap),
+		i830_get_pixmap_bo(pDstPixmap),
+	};
+
+	if (!UXA_PM_IS_SOLID(&pSrcPixmap->drawable, planemask))
+		I830FALLBACK("planemask is not solid");
+
+	if (pDstPixmap->drawable.bitsPerPixel < 8)
+		I830FALLBACK("under 8bpp pixmaps unsupported\n");
+
+	if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
+		return FALSE;
+
+	i830_exa_check_pitch_2d(pSrcPixmap);
+	i830_exa_check_pitch_2d(pDstPixmap);
+
+	pI830->pSrcPixmap = pSrcPixmap;
+
+	pI830->BR[13] = I830CopyROP[alu] << 16;
+
+	switch (pSrcPixmap->drawable.bitsPerPixel) {
+	case 8:
+		break;
+	case 16:
+		pI830->BR[13] |= (1 << 24);
+		break;
+	case 32:
+		pI830->BR[13] |= ((1 << 25) | (1 << 24));
+		break;
+	}
+	return TRUE;
 }
 
 static void
 i830_uxa_copy(PixmapPtr pDstPixmap, int src_x1, int src_y1, int dst_x1,
 	      int dst_y1, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    uint32_t cmd;
-    int dst_x2, dst_y2;
-    unsigned int dst_pitch, src_pitch;
-
-    dst_x2 = dst_x1 + w;
-    dst_y2 = dst_y1 + h;
-
-    dst_pitch = i830_pixmap_pitch(pDstPixmap);
-    src_pitch = i830_pixmap_pitch(pI830->pSrcPixmap);
-
-    {
-	BEGIN_BATCH(8);
-
-	cmd = XY_SRC_COPY_BLT_CMD;
-
-	if (pDstPixmap->drawable.bitsPerPixel == 32)
-	    cmd |= XY_SRC_COPY_BLT_WRITE_ALPHA | XY_SRC_COPY_BLT_WRITE_RGB;
-
-	if (IS_I965G(pI830)) {
-	    if (i830_pixmap_tiled(pDstPixmap)) {
-		assert((dst_pitch % 512) == 0);
-		dst_pitch >>= 2;
-		cmd |= XY_SRC_COPY_BLT_DST_TILED;
-	    }
-
-	    if (i830_pixmap_tiled(pI830->pSrcPixmap)) {
-		assert((src_pitch % 512) == 0);
-		src_pitch >>= 2;
-		cmd |= XY_SRC_COPY_BLT_SRC_TILED;
-	    }
-	}
+	ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	uint32_t cmd;
+	int dst_x2, dst_y2;
+	unsigned int dst_pitch, src_pitch;
 
-	OUT_BATCH(cmd);
+	dst_x2 = dst_x1 + w;
+	dst_y2 = dst_y1 + h;
 
-	OUT_BATCH(pI830->BR[13] | dst_pitch);
-	OUT_BATCH((dst_y1 << 16) | (dst_x1 & 0xffff));
-	OUT_BATCH((dst_y2 << 16) | (dst_x2 & 0xffff));
-	OUT_RELOC_PIXMAP(pDstPixmap, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	OUT_BATCH((src_y1 << 16) | (src_x1 & 0xffff));
-	OUT_BATCH(src_pitch);
-	OUT_RELOC_PIXMAP(pI830->pSrcPixmap, I915_GEM_DOMAIN_RENDER, 0, 0);
+	dst_pitch = i830_pixmap_pitch(pDstPixmap);
+	src_pitch = i830_pixmap_pitch(pI830->pSrcPixmap);
 
-	ADVANCE_BATCH();
-    }
+	{
+		BEGIN_BATCH(8);
+
+		cmd = XY_SRC_COPY_BLT_CMD;
+
+		if (pDstPixmap->drawable.bitsPerPixel == 32)
+			cmd |=
+			    XY_SRC_COPY_BLT_WRITE_ALPHA |
+			    XY_SRC_COPY_BLT_WRITE_RGB;
+
+		if (IS_I965G(pI830)) {
+			if (i830_pixmap_tiled(pDstPixmap)) {
+				assert((dst_pitch % 512) == 0);
+				dst_pitch >>= 2;
+				cmd |= XY_SRC_COPY_BLT_DST_TILED;
+			}
+
+			if (i830_pixmap_tiled(pI830->pSrcPixmap)) {
+				assert((src_pitch % 512) == 0);
+				src_pitch >>= 2;
+				cmd |= XY_SRC_COPY_BLT_SRC_TILED;
+			}
+		}
+
+		OUT_BATCH(cmd);
+
+		OUT_BATCH(pI830->BR[13] | dst_pitch);
+		OUT_BATCH((dst_y1 << 16) | (dst_x1 & 0xffff));
+		OUT_BATCH((dst_y2 << 16) | (dst_x2 & 0xffff));
+		OUT_RELOC_PIXMAP(pDstPixmap, I915_GEM_DOMAIN_RENDER,
+				 I915_GEM_DOMAIN_RENDER, 0);
+		OUT_BATCH((src_y1 << 16) | (src_x1 & 0xffff));
+		OUT_BATCH(src_pitch);
+		OUT_RELOC_PIXMAP(pI830->pSrcPixmap, I915_GEM_DOMAIN_RENDER, 0,
+				 0);
+
+		ADVANCE_BATCH();
+	}
 }
 
-static void
-i830_uxa_done_copy(PixmapPtr pDstPixmap)
+static void i830_uxa_done_copy(PixmapPtr pDstPixmap)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
+	ScrnInfoPtr pScrn = xf86Screens[pDstPixmap->drawable.pScreen->myNum];
 
-    i830_debug_sync(pScrn);
+	i830_debug_sync(pScrn);
 }
 
-
 /**
  * Do any cleanup from the Composite operation.
  *
  * This is shared between i830 through i965.
  */
-void
-i830_done_composite(PixmapPtr pDst)
+void i830_done_composite(PixmapPtr pDst)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
 
-    i830_debug_sync(pScrn);
+	i830_debug_sync(pScrn);
 }
 
 #define xFixedToFloat(val) \
 	((float)xFixedToInt(val) + ((float)xFixedFrac(val) / 65536.0))
 
 static Bool
-_i830_transform_point (PictTransformPtr transform,
-		       float		x,
-		       float		y,
-		       float		result[3])
+_i830_transform_point(PictTransformPtr transform,
+		      float x, float y, float result[3])
 {
-    int		    j;
-
-    for (j = 0; j < 3; j++)
-    {
-	result[j] = (xFixedToFloat (transform->matrix[j][0]) * x +
-		     xFixedToFloat (transform->matrix[j][1]) * y +
-		     xFixedToFloat (transform->matrix[j][2]));
-    }
-    if (!result[2])
-	return FALSE;
-    return TRUE;
+	int j;
+
+	for (j = 0; j < 3; j++) {
+		result[j] = (xFixedToFloat(transform->matrix[j][0]) * x +
+			     xFixedToFloat(transform->matrix[j][1]) * y +
+			     xFixedToFloat(transform->matrix[j][2]));
+	}
+	if (!result[2])
+		return FALSE;
+	return TRUE;
 }
 
 /**
@@ -383,18 +379,19 @@ Bool
 i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
 				 float *x_out, float *y_out)
 {
-    if (transform == NULL) {
-	*x_out = x;
-	*y_out = y;
-    } else {
-	float	result[3];
-
-	if (!_i830_transform_point (transform, (float) x, (float) y, result))
-	    return FALSE;
-	*x_out = result[0] / result[2];
-	*y_out = result[1] / result[2];
-    }
-    return TRUE;
+	if (transform == NULL) {
+		*x_out = x;
+		*y_out = y;
+	} else {
+		float result[3];
+
+		if (!_i830_transform_point
+		    (transform, (float)x, (float)y, result))
+			return FALSE;
+		*x_out = result[0] / result[2];
+		*y_out = result[1] / result[2];
+	}
+	return TRUE;
 }
 
 /**
@@ -406,20 +403,21 @@ Bool
 i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
 				    float *x_out, float *y_out, float *w_out)
 {
-    if (transform == NULL) {
-	*x_out = x;
-	*y_out = y;
-	*w_out = 1;
-    } else {
-	float    result[3];
-
-	if (!_i830_transform_point (transform, (float) x, (float) y, result))
-	    return FALSE;
-	*x_out = result[0];
-	*y_out = result[1];
-	*w_out = result[2];
-    }
-    return TRUE;
+	if (transform == NULL) {
+		*x_out = x;
+		*y_out = y;
+		*w_out = 1;
+	} else {
+		float result[3];
+
+		if (!_i830_transform_point
+		    (transform, (float)x, (float)y, result))
+			return FALSE;
+		*x_out = result[0];
+		*y_out = result[1];
+		*w_out = result[2];
+	}
+	return TRUE;
 }
 
 /**
@@ -427,312 +425,300 @@ i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
  *
  * transform may be null.
  */
-Bool
-i830_transform_is_affine (PictTransformPtr t)
+Bool i830_transform_is_affine(PictTransformPtr t)
 {
-    if (t == NULL)
-	return TRUE;
-    return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
+	if (t == NULL)
+		return TRUE;
+	return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
 }
 
-dri_bo *
-i830_get_pixmap_bo(PixmapPtr pixmap)
+dri_bo *i830_get_pixmap_bo(PixmapPtr pixmap)
 {
-    return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
+	return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
 }
 
-void
-i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo *bo)
+void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
 {
-    dri_bo  *old_bo = i830_get_pixmap_bo (pixmap);
+	dri_bo *old_bo = i830_get_pixmap_bo(pixmap);
 
-    if (old_bo)
-	dri_bo_unreference (old_bo);
-    if (bo != NULL)
-	dri_bo_reference(bo);
-    dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
+	if (old_bo)
+		dri_bo_unreference(old_bo);
+	if (bo != NULL)
+		dri_bo_reference(bo);
+	dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
 }
 
-static void
-i830_uxa_set_pixmap_bo (PixmapPtr pixmap, dri_bo *bo)
+static void i830_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
 {
-    dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
+	dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, bo);
 }
 
-static Bool
-i830_uxa_prepare_access (PixmapPtr pixmap, uxa_access_t access)
+static Bool i830_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
 {
-    dri_bo *bo = i830_get_pixmap_bo (pixmap);
-    ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
-    I830Ptr i830 = I830PTR(scrn);
+	dri_bo *bo = i830_get_pixmap_bo(pixmap);
+	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
+	I830Ptr i830 = I830PTR(scrn);
 
-    intel_batch_flush(scrn, FALSE);
+	intel_batch_flush(scrn, FALSE);
 
-    /* No VT sema or GEM?  No GTT mapping. */
-    if (!scrn->vtSema) {
-	if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0)
-	    return FALSE;
-	pixmap->devPrivate.ptr = bo->virtual;
-	return TRUE;
-    }
-
-    /* Kernel manages fences at GTT map/fault time */
-    if (bo->size < i830->max_gtt_map_size) {
-	if (drm_intel_gem_bo_map_gtt(bo)) {
-	    xf86DrvMsg(scrn->scrnIndex, X_WARNING,
-		       "%s: bo map failed\n",
-		       __FUNCTION__);
-	    return FALSE;
+	/* No VT sema or GEM?  No GTT mapping. */
+	if (!scrn->vtSema) {
+		if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0)
+			return FALSE;
+		pixmap->devPrivate.ptr = bo->virtual;
+		return TRUE;
 	}
-    } else {
-	if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0) {
-	    xf86DrvMsg(scrn->scrnIndex, X_WARNING,
-		       "%s: bo map failed\n",
-		       __FUNCTION__);
-		return FALSE;
+
+	/* Kernel manages fences at GTT map/fault time */
+	if (bo->size < i830->max_gtt_map_size) {
+		if (drm_intel_gem_bo_map_gtt(bo)) {
+			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+				   "%s: bo map failed\n", __FUNCTION__);
+			return FALSE;
+		}
+	} else {
+		if (dri_bo_map(bo, access == UXA_ACCESS_RW) != 0) {
+			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+				   "%s: bo map failed\n", __FUNCTION__);
+			return FALSE;
+		}
 	}
-    }
-    pixmap->devPrivate.ptr = bo->virtual;
+	pixmap->devPrivate.ptr = bo->virtual;
 
-    return TRUE;
+	return TRUE;
 }
 
-static void
-i830_uxa_finish_access (PixmapPtr pixmap)
+static void i830_uxa_finish_access(PixmapPtr pixmap)
 {
-    dri_bo *bo = i830_get_pixmap_bo (pixmap);
+	dri_bo *bo = i830_get_pixmap_bo(pixmap);
+
+	if (bo) {
+		ScreenPtr screen = pixmap->drawable.pScreen;
+		ScrnInfoPtr scrn = xf86Screens[screen->myNum];
+		I830Ptr i830 = I830PTR(scrn);
+
+		if (bo == i830->front_buffer->bo)
+			i830->need_flush = TRUE;
+
+		if (!scrn->vtSema) {
+			dri_bo_unmap(bo);
+			pixmap->devPrivate.ptr = NULL;
+			return;
+		}
+
+		if (bo->size < i830->max_gtt_map_size)
+			drm_intel_gem_bo_unmap_gtt(bo);
+		else
+			dri_bo_unmap(bo);
+		pixmap->devPrivate.ptr = NULL;
+	}
+}
 
-    if (bo) {
-	ScreenPtr screen = pixmap->drawable.pScreen;
+void i830_uxa_block_handler(ScreenPtr screen)
+{
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	I830Ptr i830 = I830PTR(scrn);
 
-	if (bo == i830->front_buffer->bo)
-	    i830->need_flush = TRUE;
-
-	if (!scrn->vtSema) {
-	    dri_bo_unmap(bo);
-	    pixmap->devPrivate.ptr = NULL;
-	    return;
+	if (i830->need_flush) {
+		dri_bo_wait_rendering(i830->front_buffer->bo);
+		i830->need_flush = FALSE;
 	}
+}
+
+static Bool i830_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
+{
+	ScreenPtr screen = pixmap->drawable.pScreen;
 
-	if (bo->size < i830->max_gtt_map_size)
-	    drm_intel_gem_bo_unmap_gtt(bo);
-	else
-	    dri_bo_unmap(bo);
-	pixmap->devPrivate.ptr = NULL;
-    }
+	/* The front buffer is always in memory and pinned */
+	if (screen->GetScreenPixmap(screen) == pixmap)
+		return TRUE;
+
+	return i830_get_pixmap_bo(pixmap) != NULL;
 }
 
-void
-i830_uxa_block_handler (ScreenPtr screen)
+static PixmapPtr
+i830_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
+		       unsigned usage)
 {
-    ScrnInfoPtr scrn = xf86Screens[screen->myNum];
-    I830Ptr i830 = I830PTR(scrn);
+	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
+	I830Ptr i830 = I830PTR(scrn);
+	dri_bo *bo;
+	int stride;
+	PixmapPtr pixmap;
+
+	if (w > 32767 || h > 32767)
+		return NullPixmap;
+
+	if (usage == CREATE_PIXMAP_USAGE_GLYPH_PICTURE)
+		return fbCreatePixmap(screen, w, h, depth, usage);
+
+	pixmap = fbCreatePixmap(screen, 0, 0, depth, usage);
+
+	if (w && h) {
+		unsigned int size;
+		uint32_t tiling = I915_TILING_NONE;
+		int pitch_align;
+
+		if (usage == INTEL_CREATE_PIXMAP_TILING_X) {
+			tiling = I915_TILING_X;
+			pitch_align = 512;
+		} else if (usage == INTEL_CREATE_PIXMAP_TILING_Y) {
+			tiling = I915_TILING_Y;
+			pitch_align = 512;
+		} else {
+			pitch_align = i830->accel_pixmap_pitch_alignment;
+		}
+
+		stride = ROUND_TO((w * pixmap->drawable.bitsPerPixel + 7) / 8,
+				  pitch_align);
+
+		if (tiling == I915_TILING_NONE) {
+			/* Round the height up so that the GPU's access to a 2x2 aligned
+			 * subspan doesn't address an invalid page offset beyond the
+			 * end of the GTT.
+			 */
+			size = stride * ALIGN(h, 2);
+		} else {
+			int aligned_h = h;
+			if (tiling == I915_TILING_X)
+				aligned_h = ALIGN(h, 8);
+			else
+				aligned_h = ALIGN(h, 32);
+
+			stride = i830_get_fence_pitch(i830, stride, tiling);
+			/* Round the object up to the size of the fence it will live in
+			 * if necessary.  We could potentially make the kernel allocate
+			 * a larger aperture space and just bind the subset of pages in,
+			 * but this is easier and also keeps us out of trouble (as much)
+			 * with drm_intel_bufmgr_check_aperture().
+			 */
+			size = i830_get_fence_size(i830, stride * aligned_h);
+			assert(size >= stride * aligned_h);
+		}
+
+		/* Fail very large allocations on 32-bit systems.  Large BOs will
+		 * tend to hit SW fallbacks frequently, and also will tend to fail
+		 * to successfully map when doing SW fallbacks because we overcommit
+		 * address space for BO access.
+		 *
+		 * Note that size should fit in 32 bits.  We throw out >32767x32767x4,
+		 * and pitch alignment could get us up to 32768x32767x4.
+		 */
+		if (sizeof(unsigned long) == 4 &&
+		    size > (unsigned int)(1024 * 1024 * 1024)) {
+			fbDestroyPixmap(pixmap);
+			return NullPixmap;
+		}
+
+		if (usage == UXA_CREATE_PIXMAP_FOR_MAP)
+			bo = drm_intel_bo_alloc(i830->bufmgr, "pixmap", size,
+						0);
+		else
+			bo = drm_intel_bo_alloc_for_render(i830->bufmgr,
+							   "pixmap", size, 0);
+		if (!bo) {
+			fbDestroyPixmap(pixmap);
+			return NullPixmap;
+		}
+
+		if (tiling != I915_TILING_NONE)
+			drm_intel_bo_set_tiling(bo, &tiling, stride);
+
+		screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL);
+
+		i830_uxa_set_pixmap_bo(pixmap, bo);
+	}
 
-    if (i830->need_flush) {
-	dri_bo_wait_rendering (i830->front_buffer->bo);
-	i830->need_flush = FALSE;
-    }
+	return pixmap;
 }
 
-static Bool
-i830_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
+static Bool i830_uxa_destroy_pixmap(PixmapPtr pixmap)
 {
-    ScreenPtr screen = pixmap->drawable.pScreen;
+	if (pixmap->refcnt == 1) {
+		dri_bo *bo = i830_get_pixmap_bo(pixmap);
 
-    /* The front buffer is always in memory and pinned */
-    if (screen->GetScreenPixmap(screen) == pixmap)
+		if (bo)
+			dri_bo_unreference(bo);
+	}
+	fbDestroyPixmap(pixmap);
 	return TRUE;
-
-    return i830_get_pixmap_bo (pixmap) != NULL;
 }
 
-static PixmapPtr
-i830_uxa_create_pixmap (ScreenPtr screen, int w, int h, int depth, unsigned usage)
+void i830_uxa_create_screen_resources(ScreenPtr pScreen)
 {
-    ScrnInfoPtr scrn = xf86Screens[screen->myNum];
-    I830Ptr i830 = I830PTR(scrn);
-    dri_bo *bo;
-    int stride;
-    PixmapPtr pixmap;
-    
-    if (w > 32767 || h > 32767)
-	return NullPixmap;
-
-    if (usage == CREATE_PIXMAP_USAGE_GLYPH_PICTURE)
-	return fbCreatePixmap (screen, w, h, depth, usage);
-
-    pixmap = fbCreatePixmap (screen, 0, 0, depth, usage);
-
-    if (w && h)
-    {
-	unsigned int size;
-	uint32_t tiling = I915_TILING_NONE;
-	int pitch_align;
-
-	if (usage == INTEL_CREATE_PIXMAP_TILING_X) {
-	    tiling = I915_TILING_X;
-	    pitch_align = 512;
-	} else if (usage == INTEL_CREATE_PIXMAP_TILING_Y) {
-	    tiling = I915_TILING_Y;
-	    pitch_align = 512;
-	} else {
-	    pitch_align = i830->accel_pixmap_pitch_alignment;
+	ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
+	I830Ptr i830 = I830PTR(scrn);
+	dri_bo *bo = i830->front_buffer->bo;
+
+	if (bo != NULL) {
+		PixmapPtr pixmap = pScreen->GetScreenPixmap(pScreen);
+		i830_uxa_set_pixmap_bo(pixmap, bo);
+		dri_bo_reference(bo);
 	}
+}
 
-	stride = ROUND_TO((w * pixmap->drawable.bitsPerPixel + 7) / 8,
-			  pitch_align);
+Bool i830_uxa_init(ScreenPtr pScreen)
+{
+	ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
+	I830Ptr i830 = I830PTR(scrn);
 
-	if (tiling == I915_TILING_NONE) {
-	    /* Round the height up so that the GPU's access to a 2x2 aligned
-	     * subspan doesn't address an invalid page offset beyond the
-	     * end of the GTT.
-	     */
-	    size = stride * ALIGN(h, 2);
-	} else {
-	    int aligned_h = h;
-	    if (tiling == I915_TILING_X)
-		aligned_h = ALIGN(h, 8);
-	    else
-		aligned_h = ALIGN(h, 32);
-
-	    stride = i830_get_fence_pitch(i830, stride, tiling);
-	    /* Round the object up to the size of the fence it will live in
-	     * if necessary.  We could potentially make the kernel allocate
-	     * a larger aperture space and just bind the subset of pages in,
-	     * but this is easier and also keeps us out of trouble (as much)
-	     * with drm_intel_bufmgr_check_aperture().
-	     */
-	    size = i830_get_fence_size(i830, stride * aligned_h);
-	    assert(size >= stride * aligned_h);
-	}
+	if (!dixRequestPrivate(&uxa_pixmap_index, 0))
+		return FALSE;
 
-	/* Fail very large allocations on 32-bit systems.  Large BOs will
-	 * tend to hit SW fallbacks frequently, and also will tend to fail
-	 * to successfully map when doing SW fallbacks because we overcommit
-	 * address space for BO access.
-	 *
-	 * Note that size should fit in 32 bits.  We throw out >32767x32767x4,
-	 * and pitch alignment could get us up to 32768x32767x4.
-	 */
-	if (sizeof(unsigned long) == 4 &&
-	    size > (unsigned int)(1024 * 1024 * 1024))
-	{
-	    fbDestroyPixmap (pixmap);
-	    return NullPixmap;
-	}
+	i830->uxa_driver = uxa_driver_alloc();
+	if (i830->uxa_driver == NULL)
+		return FALSE;
 
-	if (usage == UXA_CREATE_PIXMAP_FOR_MAP)
-	    bo = drm_intel_bo_alloc(i830->bufmgr, "pixmap", size, 0);
-	else
-	    bo = drm_intel_bo_alloc_for_render(i830->bufmgr, "pixmap", size, 0);
-	if (!bo) {
-	    fbDestroyPixmap (pixmap);
-	    return NullPixmap;
+	memset(i830->uxa_driver, 0, sizeof(*i830->uxa_driver));
+
+	i830->bufferOffset = 0;
+	i830->uxa_driver->uxa_major = 1;
+	i830->uxa_driver->uxa_minor = 0;
+
+	/* Solid fill */
+	i830->uxa_driver->prepare_solid = i830_uxa_prepare_solid;
+	i830->uxa_driver->solid = i830_uxa_solid;
+	i830->uxa_driver->done_solid = i830_uxa_done_solid;
+
+	/* Copy */
+	i830->uxa_driver->prepare_copy = i830_uxa_prepare_copy;
+	i830->uxa_driver->copy = i830_uxa_copy;
+	i830->uxa_driver->done_copy = i830_uxa_done_copy;
+
+	/* Composite */
+	if (!IS_I9XX(i830)) {
+		i830->uxa_driver->check_composite = i830_check_composite;
+		i830->uxa_driver->prepare_composite = i830_prepare_composite;
+		i830->uxa_driver->composite = i830_composite;
+		i830->uxa_driver->done_composite = i830_done_composite;
+	} else if (IS_I915G(i830) || IS_I915GM(i830) ||
+		   IS_I945G(i830) || IS_I945GM(i830) || IS_G33CLASS(i830)) {
+		i830->uxa_driver->check_composite = i915_check_composite;
+		i830->uxa_driver->prepare_composite = i915_prepare_composite;
+		i830->uxa_driver->composite = i915_composite;
+		i830->uxa_driver->done_composite = i830_done_composite;
+	} else {
+		i830->uxa_driver->check_composite = i965_check_composite;
+		i830->uxa_driver->prepare_composite = i965_prepare_composite;
+		i830->uxa_driver->composite = i965_composite;
+		i830->uxa_driver->done_composite = i830_done_composite;
 	}
 
-	if (tiling != I915_TILING_NONE)
-	    drm_intel_bo_set_tiling(bo, &tiling, stride);
-
-	screen->ModifyPixmapHeader (pixmap, w, h, 0, 0, stride, NULL);
-    
-	i830_uxa_set_pixmap_bo (pixmap, bo);
-    }
+	i830->uxa_driver->prepare_access = i830_uxa_prepare_access;
+	i830->uxa_driver->finish_access = i830_uxa_finish_access;
+	i830->uxa_driver->pixmap_is_offscreen = i830_uxa_pixmap_is_offscreen;
 
-    return pixmap;
-}
+	if (!uxa_driver_init(pScreen, i830->uxa_driver)) {
+		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
+			   "UXA initialization failed\n");
+		xfree(i830->uxa_driver);
+		return FALSE;
+	}
 
-static Bool
-i830_uxa_destroy_pixmap (PixmapPtr pixmap)
-{
-    if (pixmap->refcnt == 1) {
-	dri_bo  *bo = i830_get_pixmap_bo (pixmap);
-    
-	if (bo)
-	    dri_bo_unreference (bo);
-    }
-    fbDestroyPixmap (pixmap);
-    return TRUE;
-}
+	pScreen->CreatePixmap = i830_uxa_create_pixmap;
+	pScreen->DestroyPixmap = i830_uxa_destroy_pixmap;
 
-void i830_uxa_create_screen_resources(ScreenPtr pScreen)
-{
-    ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
-    I830Ptr i830 = I830PTR(scrn);
-    dri_bo *bo = i830->front_buffer->bo;
-
-    if (bo != NULL) {
-	PixmapPtr   pixmap = pScreen->GetScreenPixmap(pScreen);
-	i830_uxa_set_pixmap_bo (pixmap, bo);
-	dri_bo_reference(bo);
-    }
-}
+	uxa_set_fallback_debug(pScreen, i830->fallback_debug);
 
-Bool
-i830_uxa_init (ScreenPtr pScreen)
-{
-    ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
-    I830Ptr i830 = I830PTR(scrn);
-
-    if (!dixRequestPrivate(&uxa_pixmap_index, 0))
-	return FALSE;
-
-    i830->uxa_driver = uxa_driver_alloc();
-    if (i830->uxa_driver == NULL)
-	return FALSE;
-
-    memset(i830->uxa_driver, 0, sizeof(*i830->uxa_driver));
-
-    i830->bufferOffset = 0;
-    i830->uxa_driver->uxa_major = 1;
-    i830->uxa_driver->uxa_minor = 0;
-
-    /* Solid fill */
-    i830->uxa_driver->prepare_solid = i830_uxa_prepare_solid;
-    i830->uxa_driver->solid = i830_uxa_solid;
-    i830->uxa_driver->done_solid = i830_uxa_done_solid;
-
-    /* Copy */
-    i830->uxa_driver->prepare_copy = i830_uxa_prepare_copy;
-    i830->uxa_driver->copy = i830_uxa_copy;
-    i830->uxa_driver->done_copy = i830_uxa_done_copy;
-
-    /* Composite */
-    if (!IS_I9XX(i830)) {
-    	i830->uxa_driver->check_composite = i830_check_composite;
-    	i830->uxa_driver->prepare_composite = i830_prepare_composite;
-    	i830->uxa_driver->composite = i830_composite;
-    	i830->uxa_driver->done_composite = i830_done_composite;
-    } else if (IS_I915G(i830) || IS_I915GM(i830) ||
-	       IS_I945G(i830) || IS_I945GM(i830) || IS_G33CLASS(i830))
-    {
-	i830->uxa_driver->check_composite = i915_check_composite;
-   	i830->uxa_driver->prepare_composite = i915_prepare_composite;
-	i830->uxa_driver->composite = i915_composite;
-    	i830->uxa_driver->done_composite = i830_done_composite;
-    } else {
- 	i830->uxa_driver->check_composite = i965_check_composite;
- 	i830->uxa_driver->prepare_composite = i965_prepare_composite;
- 	i830->uxa_driver->composite = i965_composite;
- 	i830->uxa_driver->done_composite = i830_done_composite;
-    }
-
-    i830->uxa_driver->prepare_access = i830_uxa_prepare_access;
-    i830->uxa_driver->finish_access = i830_uxa_finish_access;
-    i830->uxa_driver->pixmap_is_offscreen = i830_uxa_pixmap_is_offscreen;
-
-    if(!uxa_driver_init(pScreen, i830->uxa_driver)) {
-	xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		   "UXA initialization failed\n");
-	xfree(i830->uxa_driver);
-	return FALSE;
-    }
-
-    pScreen->CreatePixmap = i830_uxa_create_pixmap;
-    pScreen->DestroyPixmap = i830_uxa_destroy_pixmap;
-
-    uxa_set_fallback_debug(pScreen, i830->fallback_debug);
-
-    return TRUE;
+	return TRUE;
 }
diff --git a/src/i830_video.c b/src/i830_video.c
index 379a4318..820c2d82 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -77,7 +77,7 @@
 #include "i915_hwmc.h"
 #endif
 
-#define OFF_DELAY 	250		/* milliseconds */
+#define OFF_DELAY 	250	/* milliseconds */
 #define FREE_DELAY 	15000
 
 #define OFF_TIMER 	0x01
@@ -99,7 +99,7 @@ static int I830PutImage(ScrnInfoPtr, short, short, short, short, short, short,
 			short, short, int, unsigned char *, short, short,
 			Bool, RegionPtr, pointer, DrawablePtr);
 static int I830QueryImageAttributes(ScrnInfoPtr, int, unsigned short *,
-					   unsigned short *, int *, int *);
+				    unsigned short *, int *, int *);
 
 #define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
 
@@ -126,338 +126,336 @@ static Atom xvSyncToVblank;
 
 /* client libraries expect an encoding */
 static XF86VideoEncodingRec DummyEncoding[1] = {
-    {
-	0,
-	"XV_IMAGE",
-	IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
-	{1, 1}
-    }
+	{
+	 0,
+	 "XV_IMAGE",
+	 IMAGE_MAX_WIDTH, IMAGE_MAX_HEIGHT,
+	 {1, 1}
+	 }
 };
 
 #define NUM_FORMATS 3
 
 static XF86VideoFormatRec Formats[NUM_FORMATS] = {
-    {15, TrueColor}, {16, TrueColor}, {24, TrueColor}
+	{15, TrueColor}, {16, TrueColor}, {24, TrueColor}
 };
 
 #define CLONE_ATTRIBUTES 1
 static XF86AttributeRec CloneAttributes[CLONE_ATTRIBUTES] = {
-    {XvSettable | XvGettable, -1, 1, "XV_PIPE"}
+	{XvSettable | XvGettable, -1, 1, "XV_PIPE"}
 };
 
 #define NUM_ATTRIBUTES 4
 static XF86AttributeRec Attributes[NUM_ATTRIBUTES] = {
-    {XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
-    {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"},
-    {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"},
-    {XvSettable | XvGettable, 0, 1023, "XV_SATURATION"}
+	{XvSettable | XvGettable, 0, (1 << 24) - 1, "XV_COLORKEY"},
+	{XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"},
+	{XvSettable | XvGettable, 0, 255, "XV_CONTRAST"},
+	{XvSettable | XvGettable, 0, 1023, "XV_SATURATION"}
 };
 
 #define NUM_TEXTURED_ATTRIBUTES 3
 static XF86AttributeRec TexturedAttributes[NUM_TEXTURED_ATTRIBUTES] = {
-    {XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"},
-    {XvSettable | XvGettable, 0, 255, "XV_CONTRAST"},
-    {XvSettable | XvGettable, -1, 1, "XV_SYNC_TO_VBLANK"},
+	{XvSettable | XvGettable, -128, 127, "XV_BRIGHTNESS"},
+	{XvSettable | XvGettable, 0, 255, "XV_CONTRAST"},
+	{XvSettable | XvGettable, -1, 1, "XV_SYNC_TO_VBLANK"},
 };
 
 #define GAMMA_ATTRIBUTES 6
 static XF86AttributeRec GammaAttributes[GAMMA_ATTRIBUTES] = {
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA0"},
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA1"},
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA2"},
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA3"},
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA4"},
-    {XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA5"}
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA0"},
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA1"},
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA2"},
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA3"},
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA4"},
+	{XvSettable | XvGettable, 0, 0xffffff, "XV_GAMMA5"}
 };
 
 #define NUM_IMAGES 5
 
 static XF86ImageRec Images[NUM_IMAGES] = {
-    XVIMAGE_YUY2,
-    XVIMAGE_YV12,
-    XVIMAGE_I420,
-    XVIMAGE_UYVY,
+	XVIMAGE_YUY2,
+	XVIMAGE_YV12,
+	XVIMAGE_I420,
+	XVIMAGE_UYVY,
 #ifdef INTEL_XVMC
-    {
-        /*
-         * Below, a dummy picture type that is used in XvPutImage only to do
-         * an overlay update. Introduced for the XvMC client lib.
-         * Defined to have a zero data size.
-         */
-        FOURCC_XVMC,
-        XvYUV,
-        LSBFirst,
-        {'X', 'V', 'M', 'C',
-         0x00, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0xAA, 0x00,
-         0x38, 0x9B, 0x71},
-        12,
-        XvPlanar,
-        3,
-        0, 0, 0, 0,
-        8, 8, 8,
-        1, 2, 2,
-        1, 2, 2,
-        {'Y', 'V', 'U',
-         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-         0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-        XvTopToBottom
-    },
+	{
+	 /*
+	  * Below, a dummy picture type that is used in XvPutImage only to do
+	  * an overlay update. Introduced for the XvMC client lib.
+	  * Defined to have a zero data size.
+	  */
+	 FOURCC_XVMC,
+	 XvYUV,
+	 LSBFirst,
+	 {'X', 'V', 'M', 'C',
+	  0x00, 0x00, 0x00, 0x10, 0x80, 0x00, 0x00, 0xAA, 0x00,
+	  0x38, 0x9B, 0x71},
+	 12,
+	 XvPlanar,
+	 3,
+	 0, 0, 0, 0,
+	 8, 8, 8,
+	 1, 2, 2,
+	 1, 2, 2,
+	 {'Y', 'V', 'U',
+	  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+	  0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+	 XvTopToBottom},
 #endif
 };
 
 #if VIDEO_DEBUG
-static void
-CompareOverlay(I830Ptr pI830, uint32_t * overlay, int size)
+static void CompareOverlay(I830Ptr pI830, uint32_t * overlay, int size)
 {
-    int i;
-    uint32_t val;
-    int bad = 0;
-
-    for (i = 0; i < size; i += 4) {
-	val = INREG(0x30100 + i);
-	if (val != overlay[i / 4]) {
-	    OVERLAY_DEBUG("0x%05x value doesn't match (0x%lx != 0x%lx)\n",
-			  0x30100 + i, val, overlay[i / 4]);
-	    bad++;
+	int i;
+	uint32_t val;
+	int bad = 0;
+
+	for (i = 0; i < size; i += 4) {
+		val = INREG(0x30100 + i);
+		if (val != overlay[i / 4]) {
+			OVERLAY_DEBUG
+			    ("0x%05x value doesn't match (0x%lx != 0x%lx)\n",
+			     0x30100 + i, val, overlay[i / 4]);
+			bad++;
+		}
 	}
-    }
-    if (!bad)
-	OVERLAY_DEBUG("CompareOverlay: no differences\n");
+	if (!bad)
+		OVERLAY_DEBUG("CompareOverlay: no differences\n");
 }
 #endif
 
 /* kernel modesetting overlay functions */
-static Bool
-drmmode_has_overlay(ScrnInfoPtr pScrn)
+static Bool drmmode_has_overlay(ScrnInfoPtr pScrn)
 {
 #ifdef DRM_MODE_OVERLAY_LANDED
-    I830Ptr p830 = I830PTR(pScrn);
-    struct drm_i915_getparam gp;
-    int has_overlay = 0;
+	I830Ptr p830 = I830PTR(pScrn);
+	struct drm_i915_getparam gp;
+	int has_overlay = 0;
 
-    gp.param = I915_PARAM_HAS_OVERLAY;
-    gp.value = &has_overlay;
-    drmCommandWriteRead(p830->drmSubFD, DRM_I915_GETPARAM,
-			      &gp, sizeof(gp));
+	gp.param = I915_PARAM_HAS_OVERLAY;
+	gp.value = &has_overlay;
+	drmCommandWriteRead(p830->drmSubFD, DRM_I915_GETPARAM, &gp, sizeof(gp));
 
-    return has_overlay ? TRUE : FALSE;
+	return has_overlay ? TRUE : FALSE;
 #else
-    return FALSE;
+	return FALSE;
 #endif
 }
 
-static void
-drmmode_overlay_update_attrs(ScrnInfoPtr pScrn)
+static void drmmode_overlay_update_attrs(ScrnInfoPtr pScrn)
 {
 #ifdef DRM_MODE_OVERLAY_LANDED
-    I830Ptr p830 = I830PTR(pScrn);
-    I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
-    struct drm_intel_overlay_attrs attrs;
-    int ret;
-
-    attrs.flags = I915_OVERLAY_UPDATE_ATTRS;
-    attrs.brightness = pPriv->brightness;
-    attrs.contrast = pPriv->contrast;
-    attrs.saturation = pPriv->saturation;
-    attrs.color_key = pPriv->colorKey;
-    attrs.gamma0 = pPriv->gamma0;
-    attrs.gamma1 = pPriv->gamma1;
-    attrs.gamma2 = pPriv->gamma2;
-    attrs.gamma3 = pPriv->gamma3;
-    attrs.gamma4 = pPriv->gamma4;
-    attrs.gamma5 = pPriv->gamma5;
-
-    ret = drmCommandWriteRead(p830->drmSubFD, DRM_I915_OVERLAY_ATTRS,
-			      &attrs, sizeof(attrs));
-
-    if (ret != 0)
-	    OVERLAY_DEBUG("overlay attrs ioctl failed: %i\n", ret);
+	I830Ptr p830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+	struct drm_intel_overlay_attrs attrs;
+	int ret;
+
+	attrs.flags = I915_OVERLAY_UPDATE_ATTRS;
+	attrs.brightness = pPriv->brightness;
+	attrs.contrast = pPriv->contrast;
+	attrs.saturation = pPriv->saturation;
+	attrs.color_key = pPriv->colorKey;
+	attrs.gamma0 = pPriv->gamma0;
+	attrs.gamma1 = pPriv->gamma1;
+	attrs.gamma2 = pPriv->gamma2;
+	attrs.gamma3 = pPriv->gamma3;
+	attrs.gamma4 = pPriv->gamma4;
+	attrs.gamma5 = pPriv->gamma5;
+
+	ret = drmCommandWriteRead(p830->drmSubFD, DRM_I915_OVERLAY_ATTRS,
+				  &attrs, sizeof(attrs));
+
+	if (ret != 0)
+		OVERLAY_DEBUG("overlay attrs ioctl failed: %i\n", ret);
 #endif
 }
 
-static void
-drmmode_overlay_off(ScrnInfoPtr pScrn)
+static void drmmode_overlay_off(ScrnInfoPtr pScrn)
 {
 #ifdef DRM_MODE_OVERLAY_LANDED
-    I830Ptr p830 = I830PTR(pScrn);
-    struct drm_intel_overlay_put_image request;
-    int ret;
+	I830Ptr p830 = I830PTR(pScrn);
+	struct drm_intel_overlay_put_image request;
+	int ret;
 
-    request.flags = 0;
+	request.flags = 0;
 
-    ret = drmCommandWrite(p830->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
+	ret = drmCommandWrite(p830->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
 			      &request, sizeof(request));
 
-    if (ret != 0)
-	    OVERLAY_DEBUG("overlay switch-off ioctl failed: %i\n", ret);
+	if (ret != 0)
+		OVERLAY_DEBUG("overlay switch-off ioctl failed: %i\n", ret);
 #endif
 }
 
 static Bool
 drmmode_overlay_put_image(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
-		   int id, short width, short height,
-		   int dstPitch, int x1, int y1, int x2, int y2, BoxPtr dstBox,
-		   short src_w, short src_h, short drw_w, short drw_h)
+			  int id, short width, short height,
+			  int dstPitch, int x1, int y1, int x2, int y2,
+			  BoxPtr dstBox, short src_w, short src_h, short drw_w,
+			  short drw_h)
 {
 #ifdef DRM_MODE_OVERLAY_LANDED
-    I830Ptr p830 = I830PTR(pScrn);
-    I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
-    struct drm_intel_overlay_put_image request;
-    int ret;
-    int planar = is_planar_fourcc(id);
-    float scale;
-
-    request.flags = I915_OVERLAY_ENABLE;
-
-    request.bo_handle = pPriv->buf->handle;
-    if (planar) {
-	    request.stride_Y = dstPitch*2;
-	    request.stride_UV = dstPitch;
-    } else {
-	    request.stride_Y = dstPitch;
-	    request.stride_UV = 0;
-    }
-    request.offset_Y = pPriv->YBufOffset;
-    request.offset_U = pPriv->UBufOffset;
-    request.offset_V = pPriv->VBufOffset;
-    OVERLAY_DEBUG("off_Y: %i, off_U: %i, off_V: %i\n", request.offset_Y,
-		    request.offset_U, request.offset_V);
-
-    request.crtc_id = drmmode_crtc_id(crtc);
-    request.dst_x = dstBox->x1;
-    request.dst_y = dstBox->y1;
-    request.dst_width = dstBox->x2 - dstBox->x1;
-    request.dst_height = dstBox->y2 - dstBox->y1;
-
-    request.src_width = width;
-    request.src_height = height;
-    /* adjust src dimensions */
-    if (request.dst_height > 1) {
-	scale = ((float) request.dst_height - 1) / ((float) drw_h - 1);
-	request.src_scan_height = src_h * scale;
-    } else
-	request.src_scan_height = 1;
-
-    if (request.dst_width > 1) {
-	scale = ((float) request.dst_width - 1) / ((float) drw_w - 1);
-	request.src_scan_width = src_w * scale;
-    } else
-	request.src_scan_width = 1;
-
-    if (planar) {
-	request.flags |= I915_OVERLAY_YUV_PLANAR | I915_OVERLAY_YUV420;
-    } else {
-	request.flags |= I915_OVERLAY_YUV_PACKED | I915_OVERLAY_YUV422;
-	if (id == FOURCC_UYVY)
-	    request.flags |= I915_OVERLAY_Y_SWAP;
-    }
-
-    ret = drmCommandWrite(p830->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
+	I830Ptr p830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv = GET_PORT_PRIVATE(pScrn);
+	struct drm_intel_overlay_put_image request;
+	int ret;
+	int planar = is_planar_fourcc(id);
+	float scale;
+
+	request.flags = I915_OVERLAY_ENABLE;
+
+	request.bo_handle = pPriv->buf->handle;
+	if (planar) {
+		request.stride_Y = dstPitch * 2;
+		request.stride_UV = dstPitch;
+	} else {
+		request.stride_Y = dstPitch;
+		request.stride_UV = 0;
+	}
+	request.offset_Y = pPriv->YBufOffset;
+	request.offset_U = pPriv->UBufOffset;
+	request.offset_V = pPriv->VBufOffset;
+	OVERLAY_DEBUG("off_Y: %i, off_U: %i, off_V: %i\n", request.offset_Y,
+		      request.offset_U, request.offset_V);
+
+	request.crtc_id = drmmode_crtc_id(crtc);
+	request.dst_x = dstBox->x1;
+	request.dst_y = dstBox->y1;
+	request.dst_width = dstBox->x2 - dstBox->x1;
+	request.dst_height = dstBox->y2 - dstBox->y1;
+
+	request.src_width = width;
+	request.src_height = height;
+	/* adjust src dimensions */
+	if (request.dst_height > 1) {
+		scale = ((float)request.dst_height - 1) / ((float)drw_h - 1);
+		request.src_scan_height = src_h * scale;
+	} else
+		request.src_scan_height = 1;
+
+	if (request.dst_width > 1) {
+		scale = ((float)request.dst_width - 1) / ((float)drw_w - 1);
+		request.src_scan_width = src_w * scale;
+	} else
+		request.src_scan_width = 1;
+
+	if (planar) {
+		request.flags |= I915_OVERLAY_YUV_PLANAR | I915_OVERLAY_YUV420;
+	} else {
+		request.flags |= I915_OVERLAY_YUV_PACKED | I915_OVERLAY_YUV422;
+		if (id == FOURCC_UYVY)
+			request.flags |= I915_OVERLAY_Y_SWAP;
+	}
+
+	ret = drmCommandWrite(p830->drmSubFD, DRM_I915_OVERLAY_PUT_IMAGE,
 			      &request, sizeof(request));
 
-    /* drop the newly displaying buffer right away */
-    drm_intel_bo_disable_reuse(pPriv->buf);
-    drm_intel_bo_unreference(pPriv->buf);
-    pPriv->buf = NULL;
+	/* drop the newly displaying buffer right away */
+	drm_intel_bo_disable_reuse(pPriv->buf);
+	drm_intel_bo_unreference(pPriv->buf);
+	pPriv->buf = NULL;
 
-    if (ret != 0) {
-	OVERLAY_DEBUG("overlay put-image ioctl failed: %i\n", ret);
-	return FALSE;
-    } else
-	return TRUE;
+	if (ret != 0) {
+		OVERLAY_DEBUG("overlay put-image ioctl failed: %i\n", ret);
+		return FALSE;
+	} else
+		return TRUE;
 #else
-    return FALSE;
+	return FALSE;
 #endif
 }
 
-void
-I830InitVideo(ScreenPtr pScreen)
+void I830InitVideo(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
-    XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL;
-    int num_adaptors;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	XF86VideoAdaptorPtr *adaptors, *newAdaptors = NULL;
+	XF86VideoAdaptorPtr overlayAdaptor = NULL, texturedAdaptor = NULL;
+	int num_adaptors;
 #ifdef INTEL_XVMC
-    Bool xvmc_status = FALSE;
+	Bool xvmc_status = FALSE;
 #endif
 
-    num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
-    /* Give our adaptor list enough space for the overlay and/or texture video
-     * adaptors.
-     */
-    newAdaptors = xalloc((num_adaptors + 2) * sizeof(XF86VideoAdaptorPtr *));
-    if (newAdaptors == NULL)
-	return;
+	num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
+	/* Give our adaptor list enough space for the overlay and/or texture video
+	 * adaptors.
+	 */
+	newAdaptors =
+	    xalloc((num_adaptors + 2) * sizeof(XF86VideoAdaptorPtr *));
+	if (newAdaptors == NULL)
+		return;
 
-    memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr));
-    adaptors = newAdaptors;
-
-    /* Add the adaptors supported by our hardware.  First, set up the atoms
-     * that will be used by both output adaptors.
-     */
-    xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
-    xvContrast = MAKE_ATOM("XV_CONTRAST");
-
-    /* Set up textured video if we can do it at this depth and we are on
-     * supported hardware.
-     */
-    if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830)) &&
-	!(!IS_I965G(pI830) && pScrn->displayWidth > 2048))
-    {
-	texturedAdaptor = I830SetupImageVideoTextured(pScreen);
-	if (texturedAdaptor != NULL) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up textured video\n");
-	} else {
-	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		       "Failed to set up textured video\n");
+	memcpy(newAdaptors, adaptors,
+	       num_adaptors * sizeof(XF86VideoAdaptorPtr));
+	adaptors = newAdaptors;
+
+	/* Add the adaptors supported by our hardware.  First, set up the atoms
+	 * that will be used by both output adaptors.
+	 */
+	xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
+	xvContrast = MAKE_ATOM("XV_CONTRAST");
+
+	/* Set up textured video if we can do it at this depth and we are on
+	 * supported hardware.
+	 */
+	if (pScrn->bitsPerPixel >= 16 && (IS_I9XX(pI830) || IS_I965G(pI830)) &&
+	    !(!IS_I965G(pI830) && pScrn->displayWidth > 2048)) {
+		texturedAdaptor = I830SetupImageVideoTextured(pScreen);
+		if (texturedAdaptor != NULL) {
+			xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+				   "Set up textured video\n");
+		} else {
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+				   "Failed to set up textured video\n");
+		}
 	}
-    }
-
-    /* Set up overlay video if we can do it at this depth. */
-    if (!OVERLAY_NOEXIST(pI830) && pScrn->bitsPerPixel != 8)
-    {
-	pI830->use_drmmode_overlay = drmmode_has_overlay(pScrn);
-	if (pI830->use_drmmode_overlay) {
-	    overlayAdaptor = I830SetupImageVideoOverlay(pScreen);
-	    if (overlayAdaptor != NULL) {
-		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Set up overlay video\n");
-	    } else {
-		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			   "Failed to set up overlay video\n");
-	    }
+
+	/* Set up overlay video if we can do it at this depth. */
+	if (!OVERLAY_NOEXIST(pI830) && pScrn->bitsPerPixel != 8) {
+		pI830->use_drmmode_overlay = drmmode_has_overlay(pScrn);
+		if (pI830->use_drmmode_overlay) {
+			overlayAdaptor = I830SetupImageVideoOverlay(pScreen);
+			if (overlayAdaptor != NULL) {
+				xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+					   "Set up overlay video\n");
+			} else {
+				xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+					   "Failed to set up overlay video\n");
+			}
+		}
 	}
-    }
 
-    if (overlayAdaptor && pI830->XvPreferOverlay)
-       adaptors[num_adaptors++] = overlayAdaptor;
+	if (overlayAdaptor && pI830->XvPreferOverlay)
+		adaptors[num_adaptors++] = overlayAdaptor;
 
-    if (texturedAdaptor)
-       adaptors[num_adaptors++] = texturedAdaptor;
+	if (texturedAdaptor)
+		adaptors[num_adaptors++] = texturedAdaptor;
 
-    if (overlayAdaptor && !pI830->XvPreferOverlay)
-       adaptors[num_adaptors++] = overlayAdaptor;
+	if (overlayAdaptor && !pI830->XvPreferOverlay)
+		adaptors[num_adaptors++] = overlayAdaptor;
 
 #ifdef INTEL_XVMC
-    if (intel_xvmc_probe(pScrn)) {
-	if (texturedAdaptor)
-	    xvmc_status = intel_xvmc_driver_init(pScreen, texturedAdaptor);
-    }
+	if (intel_xvmc_probe(pScrn)) {
+		if (texturedAdaptor)
+			xvmc_status =
+			    intel_xvmc_driver_init(pScreen, texturedAdaptor);
+	}
 #endif
 
-    if (num_adaptors) {
-	xf86XVScreenInit(pScreen, adaptors, num_adaptors);
-    } else {
-	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		   "Disabling Xv because no adaptors could be initialized.\n");
-	pI830->XvEnabled = FALSE;
-    }
+	if (num_adaptors) {
+		xf86XVScreenInit(pScreen, adaptors, num_adaptors);
+	} else {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "Disabling Xv because no adaptors could be initialized.\n");
+		pI830->XvEnabled = FALSE;
+	}
 
 #ifdef INTEL_XVMC
-    if (xvmc_status)
-	intel_xvmc_screen_init(pScreen);
+	if (xvmc_status)
+		intel_xvmc_screen_init(pScreen);
 #endif
-    xfree(adaptors);
+	xfree(adaptors);
 }
 
 #define PFIT_CONTROLS 0x61230
@@ -466,244 +464,244 @@ I830InitVideo(ScreenPtr pScreen)
 #define PFIT_AUTOSCALE_RATIO 0x61238
 #define PFIT_PROGRAMMED_SCALE_RATIO 0x61234
 
-static XF86VideoAdaptorPtr
-I830SetupImageVideoOverlay(ScreenPtr pScreen)
+static XF86VideoAdaptorPtr I830SetupImageVideoOverlay(ScreenPtr pScreen)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    XF86VideoAdaptorPtr adapt;
-    I830PortPrivPtr pPriv;
-    XF86AttributePtr att;
-
-    OVERLAY_DEBUG("I830SetupImageVideoOverlay\n");
-
-    if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
-			  sizeof(I830PortPrivRec) + sizeof(DevUnion))))
-	return NULL;
-
-    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
-    adapt->flags = VIDEO_OVERLAID_IMAGES /*| VIDEO_CLIP_TO_VIEWPORT*/;
-    adapt->name = "Intel(R) Video Overlay";
-    adapt->nEncodings = 1;
-    adapt->pEncodings = DummyEncoding;
-    /* update the DummyEncoding for these two chipsets */
-    if (IS_845G(pI830) || IS_I830(pI830)) {
-	adapt->pEncodings->width = IMAGE_MAX_WIDTH_LEGACY;
-	adapt->pEncodings->height = IMAGE_MAX_HEIGHT_LEGACY;
-    }
-    adapt->nFormats = NUM_FORMATS;
-    adapt->pFormats = Formats;
-    adapt->nPorts = 1;
-    adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
-
-    pPriv = (I830PortPrivPtr) (&adapt->pPortPrivates[1]);
-
-    adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
-    adapt->nAttributes = NUM_ATTRIBUTES;
-    adapt->nAttributes += CLONE_ATTRIBUTES;
-    if (IS_I9XX(pI830))
-	adapt->nAttributes += GAMMA_ATTRIBUTES; /* has gamma */
-    adapt->pAttributes = xnfalloc(sizeof(XF86AttributeRec) * adapt->nAttributes);
-    /* Now copy the attributes */
-    att = adapt->pAttributes;
-    memcpy((char *)att, (char*)Attributes, sizeof(XF86AttributeRec)* NUM_ATTRIBUTES);
-    att+=NUM_ATTRIBUTES;
-    memcpy((char*)att, (char*)CloneAttributes, sizeof(XF86AttributeRec) * CLONE_ATTRIBUTES);
-    att+=CLONE_ATTRIBUTES;
-    if (IS_I9XX(pI830)) {
-	memcpy((char*)att, (char*)GammaAttributes, sizeof(XF86AttributeRec) * GAMMA_ATTRIBUTES);
-	att+=GAMMA_ATTRIBUTES;
-    }
-    adapt->nImages = NUM_IMAGES;
-    adapt->pImages = Images;
-    adapt->PutVideo = NULL;
-    adapt->PutStill = NULL;
-    adapt->GetVideo = NULL;
-    adapt->GetStill = NULL;
-    adapt->StopVideo = I830StopVideo;
-    adapt->SetPortAttribute = I830SetPortAttributeOverlay;
-    adapt->GetPortAttribute = I830GetPortAttribute;
-    adapt->QueryBestSize = I830QueryBestSize;
-    adapt->PutImage = I830PutImage;
-    adapt->QueryImageAttributes = I830QueryImageAttributes;
-
-    pPriv->textured = FALSE;
-    pPriv->colorKey = pI830->colorKey & ((1 << pScrn->depth) - 1);
-    pPriv->videoStatus = 0;
-    pPriv->brightness = -19; /* (255/219) * -16 */
-    pPriv->contrast = 75;  /* 255/219 * 64 */
-    pPriv->saturation = 146; /* 128/112 * 128 */
-    pPriv->current_crtc = NULL;
-    pPriv->desired_crtc = NULL;
-    pPriv->buf = NULL;
-    pPriv->oldBuf = NULL;
-    pPriv->oldBuf_pinned = FALSE;
-    pPriv->gamma5 = 0xc0c0c0;
-    pPriv->gamma4 = 0x808080;
-    pPriv->gamma3 = 0x404040;
-    pPriv->gamma2 = 0x202020;
-    pPriv->gamma1 = 0x101010;
-    pPriv->gamma0 = 0x080808;
-
-    pPriv->rotation = RR_Rotate_0;
-
-    /* gotta uninit this someplace */
-    REGION_NULL(pScreen, &pPriv->clip);
-
-    pI830->adaptor = adapt;
-
-    /* With LFP's we need to detect whether we're in One Line Mode, which
-     * essentially means a resolution greater than 1024x768, and fix up
-     * the scaler accordingly. */
-    pPriv->scaleRatio = 0x10000;
-    pPriv->oneLineMode = FALSE;
-
-    /*
-     * Initialise pPriv->overlayOK.  Set it to TRUE here so that a warning will
-     * be generated if i830_crtc_dpms_video() sets it to FALSE during mode
-     * setup.
-     */
-    pPriv->overlayOK = TRUE;
-
-    xvColorKey = MAKE_ATOM("XV_COLORKEY");
-    xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
-    xvContrast = MAKE_ATOM("XV_CONTRAST");
-    xvSaturation = MAKE_ATOM("XV_SATURATION");
-
-    /* Allow the pipe to be switched from pipe A to B when in clone mode */
-    xvPipe = MAKE_ATOM("XV_PIPE");
-
-    if (IS_I9XX(pI830)) {
-	xvGamma0 = MAKE_ATOM("XV_GAMMA0");
-	xvGamma1 = MAKE_ATOM("XV_GAMMA1");
-	xvGamma2 = MAKE_ATOM("XV_GAMMA2");
-	xvGamma3 = MAKE_ATOM("XV_GAMMA3");
-	xvGamma4 = MAKE_ATOM("XV_GAMMA4");
-	xvGamma5 = MAKE_ATOM("XV_GAMMA5");
-    }
-
-    drmmode_overlay_update_attrs(pScrn);
-
-    return adapt;
-}
-
-static XF86VideoAdaptorPtr
-I830SetupImageVideoTextured(ScreenPtr pScreen)
-{
-    XF86VideoAdaptorPtr adapt;
-    XF86AttributePtr attrs;
-    I830PortPrivPtr portPrivs;
-    DevUnion *devUnions;
-    int nports = 16, i;
-    int nAttributes;
-
-    OVERLAY_DEBUG("I830SetupImageVideoOverlay\n");
-
-    nAttributes = NUM_TEXTURED_ATTRIBUTES;
-
-    adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec));
-    portPrivs = xcalloc(nports, sizeof(I830PortPrivRec));
-    devUnions = xcalloc(nports, sizeof(DevUnion));
-    attrs = xcalloc(nAttributes, sizeof(XF86AttributeRec));
-    if (adapt == NULL || portPrivs == NULL || devUnions == NULL ||
-	attrs == NULL)
-    {
-	xfree(adapt);
-	xfree(portPrivs);
-	xfree(devUnions);
-	xfree(attrs);
-	return NULL;
-    }
-
-    adapt->type = XvWindowMask | XvInputMask | XvImageMask;
-    adapt->flags = 0;
-    adapt->name = "Intel(R) Textured Video";
-    adapt->nEncodings = 1;
-    adapt->pEncodings = DummyEncoding;
-    adapt->nFormats = NUM_FORMATS;
-    adapt->pFormats = Formats;
-    adapt->nPorts = nports;
-    adapt->pPortPrivates = devUnions;
-    adapt->nAttributes = nAttributes;
-    adapt->pAttributes = attrs;
-    memcpy(attrs, TexturedAttributes, nAttributes * sizeof(XF86AttributeRec));
-    adapt->nImages = NUM_IMAGES;
-    adapt->pImages = Images;
-    adapt->PutVideo = NULL;
-    adapt->PutStill = NULL;
-    adapt->GetVideo = NULL;
-    adapt->GetStill = NULL;
-    adapt->StopVideo = I830StopVideo;
-    adapt->SetPortAttribute = I830SetPortAttributeTextured;
-    adapt->GetPortAttribute = I830GetPortAttribute;
-    adapt->QueryBestSize = I830QueryBestSize;
-    adapt->PutImage = I830PutImage;
-    adapt->QueryImageAttributes = I830QueryImageAttributes;
-
-    for (i = 0; i < nports; i++) {
-	I830PortPrivPtr pPriv = &portPrivs[i];
-
-	pPriv->textured = TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	XF86VideoAdaptorPtr adapt;
+	I830PortPrivPtr pPriv;
+	XF86AttributePtr att;
+
+	OVERLAY_DEBUG("I830SetupImageVideoOverlay\n");
+
+	if (!(adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec) +
+			      sizeof(I830PortPrivRec) + sizeof(DevUnion))))
+		return NULL;
+
+	adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+	adapt->flags = VIDEO_OVERLAID_IMAGES /*| VIDEO_CLIP_TO_VIEWPORT */ ;
+	adapt->name = "Intel(R) Video Overlay";
+	adapt->nEncodings = 1;
+	adapt->pEncodings = DummyEncoding;
+	/* update the DummyEncoding for these two chipsets */
+	if (IS_845G(pI830) || IS_I830(pI830)) {
+		adapt->pEncodings->width = IMAGE_MAX_WIDTH_LEGACY;
+		adapt->pEncodings->height = IMAGE_MAX_HEIGHT_LEGACY;
+	}
+	adapt->nFormats = NUM_FORMATS;
+	adapt->pFormats = Formats;
+	adapt->nPorts = 1;
+	adapt->pPortPrivates = (DevUnion *) (&adapt[1]);
+
+	pPriv = (I830PortPrivPtr) (&adapt->pPortPrivates[1]);
+
+	adapt->pPortPrivates[0].ptr = (pointer) (pPriv);
+	adapt->nAttributes = NUM_ATTRIBUTES;
+	adapt->nAttributes += CLONE_ATTRIBUTES;
+	if (IS_I9XX(pI830))
+		adapt->nAttributes += GAMMA_ATTRIBUTES;	/* has gamma */
+	adapt->pAttributes =
+	    xnfalloc(sizeof(XF86AttributeRec) * adapt->nAttributes);
+	/* Now copy the attributes */
+	att = adapt->pAttributes;
+	memcpy((char *)att, (char *)Attributes,
+	       sizeof(XF86AttributeRec) * NUM_ATTRIBUTES);
+	att += NUM_ATTRIBUTES;
+	memcpy((char *)att, (char *)CloneAttributes,
+	       sizeof(XF86AttributeRec) * CLONE_ATTRIBUTES);
+	att += CLONE_ATTRIBUTES;
+	if (IS_I9XX(pI830)) {
+		memcpy((char *)att, (char *)GammaAttributes,
+		       sizeof(XF86AttributeRec) * GAMMA_ATTRIBUTES);
+		att += GAMMA_ATTRIBUTES;
+	}
+	adapt->nImages = NUM_IMAGES;
+	adapt->pImages = Images;
+	adapt->PutVideo = NULL;
+	adapt->PutStill = NULL;
+	adapt->GetVideo = NULL;
+	adapt->GetStill = NULL;
+	adapt->StopVideo = I830StopVideo;
+	adapt->SetPortAttribute = I830SetPortAttributeOverlay;
+	adapt->GetPortAttribute = I830GetPortAttribute;
+	adapt->QueryBestSize = I830QueryBestSize;
+	adapt->PutImage = I830PutImage;
+	adapt->QueryImageAttributes = I830QueryImageAttributes;
+
+	pPriv->textured = FALSE;
+	pPriv->colorKey = pI830->colorKey & ((1 << pScrn->depth) - 1);
 	pPriv->videoStatus = 0;
+	pPriv->brightness = -19;	/* (255/219) * -16 */
+	pPriv->contrast = 75;	/* 255/219 * 64 */
+	pPriv->saturation = 146;	/* 128/112 * 128 */
+	pPriv->current_crtc = NULL;
+	pPriv->desired_crtc = NULL;
 	pPriv->buf = NULL;
 	pPriv->oldBuf = NULL;
 	pPriv->oldBuf_pinned = FALSE;
+	pPriv->gamma5 = 0xc0c0c0;
+	pPriv->gamma4 = 0x808080;
+	pPriv->gamma3 = 0x404040;
+	pPriv->gamma2 = 0x202020;
+	pPriv->gamma1 = 0x101010;
+	pPriv->gamma0 = 0x080808;
 
 	pPriv->rotation = RR_Rotate_0;
-	pPriv->SyncToVblank = 1;
 
-	/* gotta uninit this someplace, XXX: shouldn't be necessary for textured */
+	/* gotta uninit this someplace */
 	REGION_NULL(pScreen, &pPriv->clip);
 
-	adapt->pPortPrivates[i].ptr = (pointer) (pPriv);
-    }
+	pI830->adaptor = adapt;
 
-    xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK");
+	/* With LFP's we need to detect whether we're in One Line Mode, which
+	 * essentially means a resolution greater than 1024x768, and fix up
+	 * the scaler accordingly. */
+	pPriv->scaleRatio = 0x10000;
+	pPriv->oneLineMode = FALSE;
 
-    return adapt;
+	/*
+	 * Initialise pPriv->overlayOK.  Set it to TRUE here so that a warning will
+	 * be generated if i830_crtc_dpms_video() sets it to FALSE during mode
+	 * setup.
+	 */
+	pPriv->overlayOK = TRUE;
+
+	xvColorKey = MAKE_ATOM("XV_COLORKEY");
+	xvBrightness = MAKE_ATOM("XV_BRIGHTNESS");
+	xvContrast = MAKE_ATOM("XV_CONTRAST");
+	xvSaturation = MAKE_ATOM("XV_SATURATION");
+
+	/* Allow the pipe to be switched from pipe A to B when in clone mode */
+	xvPipe = MAKE_ATOM("XV_PIPE");
+
+	if (IS_I9XX(pI830)) {
+		xvGamma0 = MAKE_ATOM("XV_GAMMA0");
+		xvGamma1 = MAKE_ATOM("XV_GAMMA1");
+		xvGamma2 = MAKE_ATOM("XV_GAMMA2");
+		xvGamma3 = MAKE_ATOM("XV_GAMMA3");
+		xvGamma4 = MAKE_ATOM("XV_GAMMA4");
+		xvGamma5 = MAKE_ATOM("XV_GAMMA5");
+	}
+
+	drmmode_overlay_update_attrs(pScrn);
+
+	return adapt;
 }
 
-static void
-i830_free_video_buffers(I830PortPrivPtr pPriv)
+static XF86VideoAdaptorPtr I830SetupImageVideoTextured(ScreenPtr pScreen)
 {
-    if (pPriv->buf) {
-	drm_intel_bo_unreference(pPriv->buf);
-	pPriv->buf = NULL;
-    }
+	XF86VideoAdaptorPtr adapt;
+	XF86AttributePtr attrs;
+	I830PortPrivPtr portPrivs;
+	DevUnion *devUnions;
+	int nports = 16, i;
+	int nAttributes;
+
+	OVERLAY_DEBUG("I830SetupImageVideoOverlay\n");
+
+	nAttributes = NUM_TEXTURED_ATTRIBUTES;
+
+	adapt = xcalloc(1, sizeof(XF86VideoAdaptorRec));
+	portPrivs = xcalloc(nports, sizeof(I830PortPrivRec));
+	devUnions = xcalloc(nports, sizeof(DevUnion));
+	attrs = xcalloc(nAttributes, sizeof(XF86AttributeRec));
+	if (adapt == NULL || portPrivs == NULL || devUnions == NULL ||
+	    attrs == NULL) {
+		xfree(adapt);
+		xfree(portPrivs);
+		xfree(devUnions);
+		xfree(attrs);
+		return NULL;
+	}
 
-    if (pPriv->oldBuf) {
-	if (pPriv->oldBuf_pinned)
-	    drm_intel_bo_unpin(pPriv->oldBuf);
-	drm_intel_bo_unreference(pPriv->oldBuf);
-	pPriv->oldBuf = NULL;
-	pPriv->oldBuf_pinned = FALSE;
-    }
+	adapt->type = XvWindowMask | XvInputMask | XvImageMask;
+	adapt->flags = 0;
+	adapt->name = "Intel(R) Textured Video";
+	adapt->nEncodings = 1;
+	adapt->pEncodings = DummyEncoding;
+	adapt->nFormats = NUM_FORMATS;
+	adapt->pFormats = Formats;
+	adapt->nPorts = nports;
+	adapt->pPortPrivates = devUnions;
+	adapt->nAttributes = nAttributes;
+	adapt->pAttributes = attrs;
+	memcpy(attrs, TexturedAttributes,
+	       nAttributes * sizeof(XF86AttributeRec));
+	adapt->nImages = NUM_IMAGES;
+	adapt->pImages = Images;
+	adapt->PutVideo = NULL;
+	adapt->PutStill = NULL;
+	adapt->GetVideo = NULL;
+	adapt->GetStill = NULL;
+	adapt->StopVideo = I830StopVideo;
+	adapt->SetPortAttribute = I830SetPortAttributeTextured;
+	adapt->GetPortAttribute = I830GetPortAttribute;
+	adapt->QueryBestSize = I830QueryBestSize;
+	adapt->PutImage = I830PutImage;
+	adapt->QueryImageAttributes = I830QueryImageAttributes;
+
+	for (i = 0; i < nports; i++) {
+		I830PortPrivPtr pPriv = &portPrivs[i];
+
+		pPriv->textured = TRUE;
+		pPriv->videoStatus = 0;
+		pPriv->buf = NULL;
+		pPriv->oldBuf = NULL;
+		pPriv->oldBuf_pinned = FALSE;
+
+		pPriv->rotation = RR_Rotate_0;
+		pPriv->SyncToVblank = 1;
+
+		/* gotta uninit this someplace, XXX: shouldn't be necessary for textured */
+		REGION_NULL(pScreen, &pPriv->clip);
+
+		adapt->pPortPrivates[i].ptr = (pointer) (pPriv);
+	}
+
+	xvSyncToVblank = MAKE_ATOM("XV_SYNC_TO_VBLANK");
+
+	return adapt;
 }
 
-static void
-I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
+static void i830_free_video_buffers(I830PortPrivPtr pPriv)
 {
-    I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
+	if (pPriv->buf) {
+		drm_intel_bo_unreference(pPriv->buf);
+		pPriv->buf = NULL;
+	}
 
-    if (pPriv->textured)
-	return;
+	if (pPriv->oldBuf) {
+		if (pPriv->oldBuf_pinned)
+			drm_intel_bo_unpin(pPriv->oldBuf);
+		drm_intel_bo_unreference(pPriv->oldBuf);
+		pPriv->oldBuf = NULL;
+		pPriv->oldBuf_pinned = FALSE;
+	}
+}
 
-    OVERLAY_DEBUG("I830StopVideo\n");
+static void I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
+{
+	I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
 
-    REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+	if (pPriv->textured)
+		return;
 
-    if (shutdown) {
-	if (pPriv->videoStatus & CLIENT_VIDEO_ON)
-	    drmmode_overlay_off(pScrn);
+	OVERLAY_DEBUG("I830StopVideo\n");
 
-	i830_free_video_buffers(pPriv);
-	pPriv->videoStatus = 0;
-    } else {
-	if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
-	    pPriv->videoStatus |= OFF_TIMER;
-	    pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+	REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+
+	if (shutdown) {
+		if (pPriv->videoStatus & CLIENT_VIDEO_ON)
+			drmmode_overlay_off(pScrn);
+
+		i830_free_video_buffers(pPriv);
+		pPriv->videoStatus = 0;
+	} else {
+		if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
+			pPriv->videoStatus |= OFF_TIMER;
+			pPriv->offTime = currentTime.milliseconds + OFF_DELAY;
+		}
 	}
-    }
 
 }
 
@@ -711,138 +709,138 @@ static int
 I830SetPortAttributeTextured(ScrnInfoPtr pScrn,
 			     Atom attribute, INT32 value, pointer data)
 {
-    I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
-
-    if (attribute == xvBrightness) {
-	if ((value < -128) || (value > 127))
-	    return BadValue;
-	pPriv->brightness = value;
-	return Success;
-    } else if (attribute == xvContrast) {
-	if ((value < 0) || (value > 255))
-	    return BadValue;
-	pPriv->contrast = value;
-	return Success;
-    } else if (attribute == xvSyncToVblank) {
-        if ((value < -1) || (value > 1))
-            return BadValue;
-        pPriv->SyncToVblank = value;
-        return Success;
-    } else {
-	return BadMatch;
-    }
+	I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
+
+	if (attribute == xvBrightness) {
+		if ((value < -128) || (value > 127))
+			return BadValue;
+		pPriv->brightness = value;
+		return Success;
+	} else if (attribute == xvContrast) {
+		if ((value < 0) || (value > 255))
+			return BadValue;
+		pPriv->contrast = value;
+		return Success;
+	} else if (attribute == xvSyncToVblank) {
+		if ((value < -1) || (value > 1))
+			return BadValue;
+		pPriv->SyncToVblank = value;
+		return Success;
+	} else {
+		return BadMatch;
+	}
 }
 
 static int
 I830SetPortAttributeOverlay(ScrnInfoPtr pScrn,
-		     Atom attribute, INT32 value, pointer data)
+			    Atom attribute, INT32 value, pointer data)
 {
-    I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    if (attribute == xvBrightness) {
-	if ((value < -128) || (value > 127))
-	    return BadValue;
-	pPriv->brightness = value;
-	OVERLAY_DEBUG("BRIGHTNESS\n");
-    } else if (attribute == xvContrast) {
-	if ((value < 0) || (value > 255))
-	    return BadValue;
-	pPriv->contrast = value;
-	OVERLAY_DEBUG("CONTRAST\n");
-    } else if (attribute == xvSaturation) {
-	if ((value < 0) || (value > 1023))
-	    return BadValue;
-	pPriv->saturation = value;
-    } else if (attribute == xvPipe) {
-	xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-	if ((value < -1) || (value > xf86_config->num_crtc))
-	    return BadValue;
-	if (value < 0)
-	    pPriv->desired_crtc = NULL;
-	else
-	    pPriv->desired_crtc = xf86_config->crtc[value];
-	/*
-	 * Leave this to be updated at the next frame
-	 */
-    } else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
-	pPriv->gamma0 = value;
-    } else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
-	pPriv->gamma1 = value;
-    } else if (attribute == xvGamma2 && (IS_I9XX(pI830))) {
-	pPriv->gamma2 = value;
-    } else if (attribute == xvGamma3 && (IS_I9XX(pI830))) {
-	pPriv->gamma3 = value;
-    } else if (attribute == xvGamma4 && (IS_I9XX(pI830))) {
-	pPriv->gamma4 = value;
-    } else if (attribute == xvGamma5 && (IS_I9XX(pI830))) {
-	pPriv->gamma5 = value;
-    } else if (attribute == xvColorKey) {
-	pPriv->colorKey = value;
-	OVERLAY_DEBUG("COLORKEY\n");
-    } else
-	return BadMatch;
-
-    /* Ensure that the overlay is off, ready for updating */
-    if ((attribute == xvGamma0 ||
-	 attribute == xvGamma1 ||
-	 attribute == xvGamma2 ||
-	 attribute == xvGamma3 ||
-	 attribute == xvGamma4 ||
-	 attribute == xvGamma5) && (IS_I9XX(pI830))) {
-	OVERLAY_DEBUG("GAMMA\n");
-    }
-
-    drmmode_overlay_update_attrs(pScrn);
-
-    if (attribute == xvColorKey)
-	REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+	I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	if (attribute == xvBrightness) {
+		if ((value < -128) || (value > 127))
+			return BadValue;
+		pPriv->brightness = value;
+		OVERLAY_DEBUG("BRIGHTNESS\n");
+	} else if (attribute == xvContrast) {
+		if ((value < 0) || (value > 255))
+			return BadValue;
+		pPriv->contrast = value;
+		OVERLAY_DEBUG("CONTRAST\n");
+	} else if (attribute == xvSaturation) {
+		if ((value < 0) || (value > 1023))
+			return BadValue;
+		pPriv->saturation = value;
+	} else if (attribute == xvPipe) {
+		xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+		if ((value < -1) || (value > xf86_config->num_crtc))
+			return BadValue;
+		if (value < 0)
+			pPriv->desired_crtc = NULL;
+		else
+			pPriv->desired_crtc = xf86_config->crtc[value];
+		/*
+		 * Leave this to be updated at the next frame
+		 */
+	} else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
+		pPriv->gamma0 = value;
+	} else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
+		pPriv->gamma1 = value;
+	} else if (attribute == xvGamma2 && (IS_I9XX(pI830))) {
+		pPriv->gamma2 = value;
+	} else if (attribute == xvGamma3 && (IS_I9XX(pI830))) {
+		pPriv->gamma3 = value;
+	} else if (attribute == xvGamma4 && (IS_I9XX(pI830))) {
+		pPriv->gamma4 = value;
+	} else if (attribute == xvGamma5 && (IS_I9XX(pI830))) {
+		pPriv->gamma5 = value;
+	} else if (attribute == xvColorKey) {
+		pPriv->colorKey = value;
+		OVERLAY_DEBUG("COLORKEY\n");
+	} else
+		return BadMatch;
+
+	/* Ensure that the overlay is off, ready for updating */
+	if ((attribute == xvGamma0 ||
+	     attribute == xvGamma1 ||
+	     attribute == xvGamma2 ||
+	     attribute == xvGamma3 ||
+	     attribute == xvGamma4 ||
+	     attribute == xvGamma5) && (IS_I9XX(pI830))) {
+		OVERLAY_DEBUG("GAMMA\n");
+	}
+
+	drmmode_overlay_update_attrs(pScrn);
 
-    return Success;
+	if (attribute == xvColorKey)
+		REGION_EMPTY(pScrn->pScreen, &pPriv->clip);
+
+	return Success;
 }
 
 static int
 I830GetPortAttribute(ScrnInfoPtr pScrn,
 		     Atom attribute, INT32 * value, pointer data)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
-
-    if (attribute == xvBrightness) {
-	*value = pPriv->brightness;
-    } else if (attribute == xvContrast) {
-	*value = pPriv->contrast;
-    } else if (attribute == xvSaturation) {
-	*value = pPriv->saturation;
-    } else if (attribute == xvPipe) {
-	int		c;
-	xf86CrtcConfigPtr	xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-	for (c = 0; c < xf86_config->num_crtc; c++)
-	    if (xf86_config->crtc[c] == pPriv->desired_crtc)
-		break;
-	if (c == xf86_config->num_crtc)
-	    c = -1;
-	*value = c;
-    } else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma0;
-    } else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma1;
-    } else if (attribute == xvGamma2 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma2;
-    } else if (attribute == xvGamma3 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma3;
-    } else if (attribute == xvGamma4 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma4;
-    } else if (attribute == xvGamma5 && (IS_I9XX(pI830))) {
-	*value = pPriv->gamma5;
-    } else if (attribute == xvColorKey) {
-	*value = pPriv->colorKey;
-    } else if (attribute == xvSyncToVblank) {
-        *value = pPriv->SyncToVblank;
-    } else
-	return BadMatch;
-
-    return Success;
+	I830Ptr pI830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
+
+	if (attribute == xvBrightness) {
+		*value = pPriv->brightness;
+	} else if (attribute == xvContrast) {
+		*value = pPriv->contrast;
+	} else if (attribute == xvSaturation) {
+		*value = pPriv->saturation;
+	} else if (attribute == xvPipe) {
+		int c;
+		xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+		for (c = 0; c < xf86_config->num_crtc; c++)
+			if (xf86_config->crtc[c] == pPriv->desired_crtc)
+				break;
+		if (c == xf86_config->num_crtc)
+			c = -1;
+		*value = c;
+	} else if (attribute == xvGamma0 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma0;
+	} else if (attribute == xvGamma1 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma1;
+	} else if (attribute == xvGamma2 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma2;
+	} else if (attribute == xvGamma3 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma3;
+	} else if (attribute == xvGamma4 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma4;
+	} else if (attribute == xvGamma5 && (IS_I9XX(pI830))) {
+		*value = pPriv->gamma5;
+	} else if (attribute == xvColorKey) {
+		*value = pPriv->colorKey;
+	} else if (attribute == xvSyncToVblank) {
+		*value = pPriv->SyncToVblank;
+	} else
+		return BadMatch;
+
+	return Success;
 }
 
 static void
@@ -852,160 +850,174 @@ I830QueryBestSize(ScrnInfoPtr pScrn,
 		  short drw_w, short drw_h,
 		  unsigned int *p_w, unsigned int *p_h, pointer data)
 {
-    if (vid_w > (drw_w << 1))
-	drw_w = vid_w >> 1;
-    if (vid_h > (drw_h << 1))
-	drw_h = vid_h >> 1;
+	if (vid_w > (drw_w << 1))
+		drw_w = vid_w >> 1;
+	if (vid_h > (drw_h << 1))
+		drw_h = vid_h >> 1;
 
-    *p_w = drw_w;
-    *p_h = drw_h;
+	*p_w = drw_w;
+	*p_h = drw_h;
 }
 
 static void
 I830CopyPackedData(I830PortPrivPtr pPriv,
 		   unsigned char *buf,
-		   int srcPitch,
-		   int dstPitch, int top, int left, int h, int w)
+		   int srcPitch, int dstPitch, int top, int left, int h, int w)
 {
-    unsigned char *src, *dst, *dst_base;
-    int i,j;
-    unsigned char *s;
+	unsigned char *src, *dst, *dst_base;
+	int i, j;
+	unsigned char *s;
 
 #if 0
-    ErrorF("I830CopyPackedData: (%d,%d) (%d,%d)\n"
-	   "srcPitch: %d, dstPitch: %d\n", top, left, h, w,
-	   srcPitch, dstPitch);
+	ErrorF("I830CopyPackedData: (%d,%d) (%d,%d)\n"
+	       "srcPitch: %d, dstPitch: %d\n", top, left, h, w,
+	       srcPitch, dstPitch);
 #endif
 
-    src = buf + (top * srcPitch) + (left << 1);
+	src = buf + (top * srcPitch) + (left << 1);
 
-    drm_intel_bo_map(pPriv->buf, TRUE);
-    dst_base = pPriv->buf->virtual;
+	drm_intel_bo_map(pPriv->buf, TRUE);
+	dst_base = pPriv->buf->virtual;
 
-    dst = dst_base + pPriv->YBufOffset;
+	dst = dst_base + pPriv->YBufOffset;
 
-    switch (pPriv->rotation) {
-    case RR_Rotate_0:
-	w <<= 1;
-	for (i = 0; i < h; i++) {
-	    memcpy(dst, src, w);
-	    src += srcPitch;
-	    dst += dstPitch;
-	}
-	break;
-    case RR_Rotate_90:
-	h <<= 1;
-	for (i = 0; i < h; i+=2) {
-	    s = src;
-	    for (j = 0; j < w; j++) {
-		/* Copy Y */
-		dst[(i + 0) + ((w - j - 1) * dstPitch)] = *s++; 
-		(void)*s++;
-	    }
-	    src += srcPitch;
-	}
-	h >>= 1;
-	src = buf + (top * srcPitch) + (left << 1);
-	for (i = 0; i < h; i+=2) {
-	    for (j = 0; j < w; j+=2) {
-		/* Copy U */
-		dst[((i*2) + 1) + ((w - j - 1) * dstPitch)] = src[(j*2) + 1 + (i * srcPitch)];
-		dst[((i*2) + 1) + ((w - j - 2) * dstPitch)] = src[(j*2) + 1 + ((i+1) * srcPitch)];
-		/* Copy V */
-		dst[((i*2) + 3) + ((w - j - 1) * dstPitch)] = src[(j*2) + 3 + (i * srcPitch)];
-		dst[((i*2) + 3) + ((w - j - 2) * dstPitch)] = src[(j*2) + 3 + ((i+1) * srcPitch)];
-	    }
-	}
-	break;
-    case RR_Rotate_180:
-	w <<= 1;
-	for (i = 0; i < h; i++) {
-	    s = src;
-	    for (j = 0; j < w; j+=4) {
-		dst[(w - j - 4) + ((h - i - 1) * dstPitch)] = *s++;
-		dst[(w - j - 3) + ((h - i - 1) * dstPitch)] = *s++;
-		dst[(w - j - 2) + ((h - i - 1) * dstPitch)] = *s++;
-		dst[(w - j - 1) + ((h - i - 1) * dstPitch)] = *s++;
-	    }
-	    src += srcPitch;
-	}
-	break;
-    case RR_Rotate_270:
-	h <<= 1;
-	for (i = 0; i < h; i+=2) {
-	    s = src;
-	    for (j = 0; j < w; j++) {
-		/* Copy Y */
-		dst[(h - i - 2) + (j * dstPitch)] = *s++;
-		(void)*s++;
-	    }
-	    src += srcPitch;
-	}
-	h >>= 1;
-	src = buf + (top * srcPitch) + (left << 1);
-	for (i = 0; i < h; i+=2) {
-	    for (j = 0; j < w; j+=2) {
-		/* Copy U */
-		dst[(((h - i)*2) - 3) + (j * dstPitch)] = src[(j*2) + 1 + (i * srcPitch)];
-		dst[(((h - i)*2) - 3) + ((j - 1) * dstPitch)] = src[(j*2) + 1 + ((i+1) * srcPitch)];
-		/* Copy V */
-		dst[(((h - i)*2) - 1) + (j * dstPitch)] = src[(j*2) + 3 + (i * srcPitch)];
-		dst[(((h - i)*2) - 1) + ((j - 1) * dstPitch)] = src[(j*2) + 3 + ((i+1) * srcPitch)];
-	    }
+	switch (pPriv->rotation) {
+	case RR_Rotate_0:
+		w <<= 1;
+		for (i = 0; i < h; i++) {
+			memcpy(dst, src, w);
+			src += srcPitch;
+			dst += dstPitch;
+		}
+		break;
+	case RR_Rotate_90:
+		h <<= 1;
+		for (i = 0; i < h; i += 2) {
+			s = src;
+			for (j = 0; j < w; j++) {
+				/* Copy Y */
+				dst[(i + 0) + ((w - j - 1) * dstPitch)] = *s++;
+				(void)*s++;
+			}
+			src += srcPitch;
+		}
+		h >>= 1;
+		src = buf + (top * srcPitch) + (left << 1);
+		for (i = 0; i < h; i += 2) {
+			for (j = 0; j < w; j += 2) {
+				/* Copy U */
+				dst[((i * 2) + 1) + ((w - j - 1) * dstPitch)] =
+				    src[(j * 2) + 1 + (i * srcPitch)];
+				dst[((i * 2) + 1) + ((w - j - 2) * dstPitch)] =
+				    src[(j * 2) + 1 + ((i + 1) * srcPitch)];
+				/* Copy V */
+				dst[((i * 2) + 3) + ((w - j - 1) * dstPitch)] =
+				    src[(j * 2) + 3 + (i * srcPitch)];
+				dst[((i * 2) + 3) + ((w - j - 2) * dstPitch)] =
+				    src[(j * 2) + 3 + ((i + 1) * srcPitch)];
+			}
+		}
+		break;
+	case RR_Rotate_180:
+		w <<= 1;
+		for (i = 0; i < h; i++) {
+			s = src;
+			for (j = 0; j < w; j += 4) {
+				dst[(w - j - 4) + ((h - i - 1) * dstPitch)] =
+				    *s++;
+				dst[(w - j - 3) + ((h - i - 1) * dstPitch)] =
+				    *s++;
+				dst[(w - j - 2) + ((h - i - 1) * dstPitch)] =
+				    *s++;
+				dst[(w - j - 1) + ((h - i - 1) * dstPitch)] =
+				    *s++;
+			}
+			src += srcPitch;
+		}
+		break;
+	case RR_Rotate_270:
+		h <<= 1;
+		for (i = 0; i < h; i += 2) {
+			s = src;
+			for (j = 0; j < w; j++) {
+				/* Copy Y */
+				dst[(h - i - 2) + (j * dstPitch)] = *s++;
+				(void)*s++;
+			}
+			src += srcPitch;
+		}
+		h >>= 1;
+		src = buf + (top * srcPitch) + (left << 1);
+		for (i = 0; i < h; i += 2) {
+			for (j = 0; j < w; j += 2) {
+				/* Copy U */
+				dst[(((h - i) * 2) - 3) + (j * dstPitch)] =
+				    src[(j * 2) + 1 + (i * srcPitch)];
+				dst[(((h - i) * 2) - 3) +
+				    ((j - 1) * dstPitch)] =
+				    src[(j * 2) + 1 + ((i + 1) * srcPitch)];
+				/* Copy V */
+				dst[(((h - i) * 2) - 1) + (j * dstPitch)] =
+				    src[(j * 2) + 3 + (i * srcPitch)];
+				dst[(((h - i) * 2) - 1) +
+				    ((j - 1) * dstPitch)] =
+				    src[(j * 2) + 3 + ((i + 1) * srcPitch)];
+			}
+		}
+		break;
 	}
-	break;
-    }
 
-    drm_intel_bo_unmap(pPriv->buf);
+	drm_intel_bo_unmap(pPriv->buf);
 }
 
 static void i830_memcpy_plane(unsigned char *dst, unsigned char *src,
-		int height, int width,
-		int dstPitch, int srcPitch, Rotation rotation)
+			      int height, int width,
+			      int dstPitch, int srcPitch, Rotation rotation)
 {
-    int i, j = 0;
-    unsigned char *s;
-
-    switch (rotation) {
-    case RR_Rotate_0:
-	/* optimise for the case of no clipping */
-	if (srcPitch == dstPitch && srcPitch == width)
-	    memcpy (dst, src, srcPitch * height);
-	else
-	    for (i = 0; i < height; i++) {
-		memcpy(dst, src, width);
-		src += srcPitch;
-		dst += dstPitch;
-	    }
-	break;
-    case RR_Rotate_90:
-	for (i = 0; i < height; i++) {
-	    s = src;
-	    for (j = 0; j < width; j++) {
-		dst[(i) + ((width - j - 1) * dstPitch)] = *s++;
-	    }
-	    src += srcPitch;
-	}
-	break;
-    case RR_Rotate_180:
-	for (i = 0; i < height; i++) {
-	    s = src;
-	    for (j = 0; j < width; j++) {
-		dst[(width - j - 1) + ((height - i - 1) * dstPitch)] = *s++;
-	    }
-	    src += srcPitch;
-	}
-	break;
-    case RR_Rotate_270:
-	for (i = 0; i < height; i++) {
-	    s = src;
-	    for (j = 0; j < width; j++) {
-		dst[(height - i - 1) + (j * dstPitch)] = *s++;
-	    }
-	    src += srcPitch;
+	int i, j = 0;
+	unsigned char *s;
+
+	switch (rotation) {
+	case RR_Rotate_0:
+		/* optimise for the case of no clipping */
+		if (srcPitch == dstPitch && srcPitch == width)
+			memcpy(dst, src, srcPitch * height);
+		else
+			for (i = 0; i < height; i++) {
+				memcpy(dst, src, width);
+				src += srcPitch;
+				dst += dstPitch;
+			}
+		break;
+	case RR_Rotate_90:
+		for (i = 0; i < height; i++) {
+			s = src;
+			for (j = 0; j < width; j++) {
+				dst[(i) + ((width - j - 1) * dstPitch)] = *s++;
+			}
+			src += srcPitch;
+		}
+		break;
+	case RR_Rotate_180:
+		for (i = 0; i < height; i++) {
+			s = src;
+			for (j = 0; j < width; j++) {
+				dst[(width - j - 1) +
+				    ((height - i - 1) * dstPitch)] = *s++;
+			}
+			src += srcPitch;
+		}
+		break;
+	case RR_Rotate_270:
+		for (i = 0; i < height; i++) {
+			s = src;
+			for (j = 0; j < width; j++) {
+				dst[(height - i - 1) + (j * dstPitch)] = *s++;
+			}
+			src += srcPitch;
+		}
+		break;
 	}
-	break;
-    }
 }
 
 static void
@@ -1014,104 +1026,101 @@ I830CopyPlanarData(I830PortPrivPtr pPriv,
 		   int srcPitch2, int dstPitch, int srcH, int top, int left,
 		   int h, int w, int id)
 {
-    unsigned char *src1, *src2, *src3, *dst_base, *dst1, *dst2, *dst3;
-    int dstPitch2 = dstPitch << 1;
+	unsigned char *src1, *src2, *src3, *dst_base, *dst1, *dst2, *dst3;
+	int dstPitch2 = dstPitch << 1;
 
 #if 0
-    ErrorF("I830CopyPlanarData: srcPitch %d, srcPitch %d, dstPitch %d\n"
-	   "nlines %d, npixels %d, top %d, left %d\n",
-	   srcPitch, srcPitch2, dstPitch,
-	   h, w, top, left);
+	ErrorF("I830CopyPlanarData: srcPitch %d, srcPitch %d, dstPitch %d\n"
+	       "nlines %d, npixels %d, top %d, left %d\n",
+	       srcPitch, srcPitch2, dstPitch, h, w, top, left);
 #endif
 
-    /* Copy Y data */
-    src1 = buf + (top * srcPitch) + left;
+	/* Copy Y data */
+	src1 = buf + (top * srcPitch) + left;
 #if 0
-    ErrorF("src1 is %p, offset is %ld\n", src1,
-	   (unsigned long)src1 - (unsigned long)buf);
+	ErrorF("src1 is %p, offset is %ld\n", src1,
+	       (unsigned long)src1 - (unsigned long)buf);
 #endif
 
-    drm_intel_bo_map(pPriv->buf, TRUE);
-    dst_base = pPriv->buf->virtual;
+	drm_intel_bo_map(pPriv->buf, TRUE);
+	dst_base = pPriv->buf->virtual;
 
-    dst1 = dst_base + pPriv->YBufOffset;
+	dst1 = dst_base + pPriv->YBufOffset;
 
-    i830_memcpy_plane(dst1, src1, h, w, dstPitch2, srcPitch, pPriv->rotation);
+	i830_memcpy_plane(dst1, src1, h, w, dstPitch2, srcPitch,
+			  pPriv->rotation);
 
-    /* Copy V data for YV12, or U data for I420 */
-    src2 = buf +                            /* start of YUV data */
-                (srcH * srcPitch) +         /* move over Luma plane */
-                ((top * srcPitch) >> 2) +   /* move down from by top lines */
-                    (left >> 1);            /* move left by left pixels */
+	/* Copy V data for YV12, or U data for I420 */
+	src2 = buf +		/* start of YUV data */
+	    (srcH * srcPitch) +	/* move over Luma plane */
+	    ((top * srcPitch) >> 2) +	/* move down from by top lines */
+	    (left >> 1);	/* move left by left pixels */
 
 #if 0
-    ErrorF("src2 is %p, offset is %ld\n", src2,
-	   (unsigned long)src2 - (unsigned long)buf);
+	ErrorF("src2 is %p, offset is %ld\n", src2,
+	       (unsigned long)src2 - (unsigned long)buf);
 #endif
-    if (id == FOURCC_I420)
-	dst2 = dst_base + pPriv->UBufOffset;
-    else
-	dst2 = dst_base + pPriv->VBufOffset;
-
-    i830_memcpy_plane(dst2, src2, h/2, w/2,
-		    dstPitch, srcPitch2, pPriv->rotation);
-
-    /* Copy U data for YV12, or V data for I420 */
-    src3 = buf +                            /* start of YUV data */
-                (srcH * srcPitch) +         /* move over Luma plane */
-                ((srcH >> 1) * srcPitch2) + /* move over Chroma plane */
-                ((top * srcPitch) >> 2) +   /* move down from by top lines */
-                    (left >> 1);            /* move left by left pixels */
+	if (id == FOURCC_I420)
+		dst2 = dst_base + pPriv->UBufOffset;
+	else
+		dst2 = dst_base + pPriv->VBufOffset;
+
+	i830_memcpy_plane(dst2, src2, h / 2, w / 2,
+			  dstPitch, srcPitch2, pPriv->rotation);
+
+	/* Copy U data for YV12, or V data for I420 */
+	src3 = buf +		/* start of YUV data */
+	    (srcH * srcPitch) +	/* move over Luma plane */
+	    ((srcH >> 1) * srcPitch2) +	/* move over Chroma plane */
+	    ((top * srcPitch) >> 2) +	/* move down from by top lines */
+	    (left >> 1);	/* move left by left pixels */
 #if 0
-    ErrorF("src3 is %p, offset is %ld\n", src3,
-	   (unsigned long)src3 - (unsigned long)buf);
+	ErrorF("src3 is %p, offset is %ld\n", src3,
+	       (unsigned long)src3 - (unsigned long)buf);
 #endif
-    if (id == FOURCC_I420)
-	dst3 = dst_base + pPriv->VBufOffset;
-    else
-	dst3 = dst_base + pPriv->UBufOffset;
+	if (id == FOURCC_I420)
+		dst3 = dst_base + pPriv->VBufOffset;
+	else
+		dst3 = dst_base + pPriv->UBufOffset;
 
-    i830_memcpy_plane(dst3, src3, h/2, w/2,
-		    dstPitch, srcPitch2, pPriv->rotation);
+	i830_memcpy_plane(dst3, src3, h / 2, w / 2,
+			  dstPitch, srcPitch2, pPriv->rotation);
 
-    drm_intel_bo_unmap(pPriv->buf);
+	drm_intel_bo_unmap(pPriv->buf);
 }
 
 typedef struct {
-    uint8_t sign;
-    uint16_t mantissa;
-    uint8_t exponent;
+	uint8_t sign;
+	uint16_t mantissa;
+	uint8_t exponent;
 } coeffRec, *coeffPtr;
 
-static void
-i830_box_intersect (BoxPtr dest, BoxPtr a, BoxPtr b)
+static void i830_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
 {
-    dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
-    dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
-    dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1;
-    dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2;
-    if (dest->x1 >= dest->x2 || dest->y1 >= dest->y2)
-	dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
+	dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
+	dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
+	dest->y1 = a->y1 > b->y1 ? a->y1 : b->y1;
+	dest->y2 = a->y2 < b->y2 ? a->y2 : b->y2;
+	if (dest->x1 >= dest->x2 || dest->y1 >= dest->y2)
+		dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
 }
 
-static void
-i830_crtc_box (xf86CrtcPtr crtc, BoxPtr crtc_box)
+static void i830_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
 {
-    if (crtc->enabled)
-    {
-	crtc_box->x1 = crtc->x;
-	crtc_box->x2 = crtc->x + xf86ModeWidth (&crtc->mode, crtc->rotation);
-	crtc_box->y1 = crtc->y;
-	crtc_box->y2 = crtc->y + xf86ModeHeight (&crtc->mode, crtc->rotation);
-    }
-    else
-	crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
+	if (crtc->enabled) {
+		crtc_box->x1 = crtc->x;
+		crtc_box->x2 =
+		    crtc->x + xf86ModeWidth(&crtc->mode, crtc->rotation);
+		crtc_box->y1 = crtc->y;
+		crtc_box->y2 =
+		    crtc->y + xf86ModeHeight(&crtc->mode, crtc->rotation);
+	} else
+		crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
 }
 
-static int
-i830_box_area (BoxPtr box)
+static int i830_box_area(BoxPtr box)
 {
-    return (int) (box->x2 - box->x1) * (int) (box->y2 - box->y1);
+	return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1);
 }
 
 /*
@@ -1121,447 +1130,452 @@ i830_box_area (BoxPtr box)
  */
 
 xf86CrtcPtr
-i830_covering_crtc (ScrnInfoPtr pScrn,
-		    BoxPtr	box,
-		    xf86CrtcPtr desired,
-		    BoxPtr	crtc_box_ret)
+i830_covering_crtc(ScrnInfoPtr pScrn,
+		   BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret)
 {
-    xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-    xf86CrtcPtr		crtc, best_crtc;
-    int			coverage, best_coverage;
-    int			c;
-    BoxRec		crtc_box, cover_box;
-
-    best_crtc = NULL;
-    best_coverage = 0;
-    crtc_box_ret->x1 = 0;
-    crtc_box_ret->x2 = 0;
-    crtc_box_ret->y1 = 0;
-    crtc_box_ret->y2 = 0;
-    for (c = 0; c < xf86_config->num_crtc; c++)
-    {
-	crtc = xf86_config->crtc[c];
-
-	/* If the CRTC is off, treat it as not covering */
-	if (!i830_crtc_on(crtc))
-	    continue;
-
-	i830_crtc_box (crtc, &crtc_box);
-	i830_box_intersect (&cover_box, &crtc_box, box);
-	coverage = i830_box_area (&cover_box);
-	if (coverage && crtc == desired)
-	{
-	    *crtc_box_ret = crtc_box;
-	    return crtc;
-	}
-	if (coverage > best_coverage)
-	{
-	    *crtc_box_ret = crtc_box;
-	    best_crtc = crtc;
-	    best_coverage = coverage;
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	xf86CrtcPtr crtc, best_crtc;
+	int coverage, best_coverage;
+	int c;
+	BoxRec crtc_box, cover_box;
+
+	best_crtc = NULL;
+	best_coverage = 0;
+	crtc_box_ret->x1 = 0;
+	crtc_box_ret->x2 = 0;
+	crtc_box_ret->y1 = 0;
+	crtc_box_ret->y2 = 0;
+	for (c = 0; c < xf86_config->num_crtc; c++) {
+		crtc = xf86_config->crtc[c];
+
+		/* If the CRTC is off, treat it as not covering */
+		if (!i830_crtc_on(crtc))
+			continue;
+
+		i830_crtc_box(crtc, &crtc_box);
+		i830_box_intersect(&cover_box, &crtc_box, box);
+		coverage = i830_box_area(&cover_box);
+		if (coverage && crtc == desired) {
+			*crtc_box_ret = crtc_box;
+			return crtc;
+		}
+		if (coverage > best_coverage) {
+			*crtc_box_ret = crtc_box;
+			best_crtc = crtc;
+			best_coverage = coverage;
+		}
 	}
-    }
-    return best_crtc;
+	return best_crtc;
 }
 
 static void
 i830_update_dst_box_to_crtc_coords(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
-		BoxPtr dstBox)
+				   BoxPtr dstBox)
 {
-    int tmp;
-
-    /* for overlay, we should take it from crtc's screen
-     * coordinate to current crtc's display mode.
-     * yeah, a bit confusing.
-     */
-    switch (crtc->rotation & 0xf) {
-    case RR_Rotate_0:
-	dstBox->x1 -= crtc->x;
-	dstBox->x2 -= crtc->x;
-	dstBox->y1 -= crtc->y;
-	dstBox->y2 -= crtc->y;
-	break;
-    case RR_Rotate_90:
-	tmp = dstBox->x1;
-	dstBox->x1 = dstBox->y1 - crtc->x;
-	dstBox->y1 = pScrn->virtualX - tmp - crtc->y;
-	tmp = dstBox->x2;
-	dstBox->x2 = dstBox->y2 - crtc->x;
-	dstBox->y2 = pScrn->virtualX - tmp - crtc->y;
-	tmp = dstBox->y1;
-	dstBox->y1 = dstBox->y2;
-	dstBox->y2 = tmp;
-	break;
-    case RR_Rotate_180:
-	tmp = dstBox->x1;
-	dstBox->x1 = pScrn->virtualX - dstBox->x2 - crtc->x;
-	dstBox->x2 = pScrn->virtualX - tmp - crtc->x;
-	tmp = dstBox->y1;
-	dstBox->y1 = pScrn->virtualY - dstBox->y2 - crtc->y;
-	dstBox->y2 = pScrn->virtualY - tmp - crtc->y;
-	break;
-    case RR_Rotate_270:
-	tmp = dstBox->x1;
-	dstBox->x1 = pScrn->virtualY - dstBox->y1 - crtc->x;
-	dstBox->y1 = tmp - crtc->y;
-	tmp = dstBox->x2;
-	dstBox->x2 = pScrn->virtualY - dstBox->y2 - crtc->x;
-	dstBox->y2 = tmp - crtc->y;
-	tmp = dstBox->x1;
-	dstBox->x1 = dstBox->x2;
-	dstBox->x2 = tmp;
-	break;
-    }
-
-    return;
+	int tmp;
+
+	/* for overlay, we should take it from crtc's screen
+	 * coordinate to current crtc's display mode.
+	 * yeah, a bit confusing.
+	 */
+	switch (crtc->rotation & 0xf) {
+	case RR_Rotate_0:
+		dstBox->x1 -= crtc->x;
+		dstBox->x2 -= crtc->x;
+		dstBox->y1 -= crtc->y;
+		dstBox->y2 -= crtc->y;
+		break;
+	case RR_Rotate_90:
+		tmp = dstBox->x1;
+		dstBox->x1 = dstBox->y1 - crtc->x;
+		dstBox->y1 = pScrn->virtualX - tmp - crtc->y;
+		tmp = dstBox->x2;
+		dstBox->x2 = dstBox->y2 - crtc->x;
+		dstBox->y2 = pScrn->virtualX - tmp - crtc->y;
+		tmp = dstBox->y1;
+		dstBox->y1 = dstBox->y2;
+		dstBox->y2 = tmp;
+		break;
+	case RR_Rotate_180:
+		tmp = dstBox->x1;
+		dstBox->x1 = pScrn->virtualX - dstBox->x2 - crtc->x;
+		dstBox->x2 = pScrn->virtualX - tmp - crtc->x;
+		tmp = dstBox->y1;
+		dstBox->y1 = pScrn->virtualY - dstBox->y2 - crtc->y;
+		dstBox->y2 = pScrn->virtualY - tmp - crtc->y;
+		break;
+	case RR_Rotate_270:
+		tmp = dstBox->x1;
+		dstBox->x1 = pScrn->virtualY - dstBox->y1 - crtc->x;
+		dstBox->y1 = tmp - crtc->y;
+		tmp = dstBox->x2;
+		dstBox->x2 = pScrn->virtualY - dstBox->y2 - crtc->x;
+		dstBox->y2 = tmp - crtc->y;
+		tmp = dstBox->x1;
+		dstBox->x1 = dstBox->x2;
+		dstBox->x2 = tmp;
+		break;
+	}
+
+	return;
 }
 
-int
-is_planar_fourcc(int id)
+int is_planar_fourcc(int id)
 {
-    switch (id) {
-    case FOURCC_YV12:
-    case FOURCC_I420:
+	switch (id) {
+	case FOURCC_YV12:
+	case FOURCC_I420:
 #ifdef INTEL_XVMC
-    case FOURCC_XVMC:
+	case FOURCC_XVMC:
 #endif
-	return 1;
-    case FOURCC_UYVY:
-    case FOURCC_YUY2:
-	return 0;
-    default:
-	ErrorF("Unknown format 0x%x\n", id);
-	return 0;
-    }
+		return 1;
+	case FOURCC_UYVY:
+	case FOURCC_YUY2:
+		return 0;
+	default:
+		ErrorF("Unknown format 0x%x\n", id);
+		return 0;
+	}
 }
 
-static int
-xvmc_passthrough(int id, Rotation rotation)
+static int xvmc_passthrough(int id, Rotation rotation)
 {
 #ifdef INTEL_XVMC
-    return id == FOURCC_XVMC && rotation == RR_Rotate_0;
+	return id == FOURCC_XVMC && rotation == RR_Rotate_0;
 #else
-    return 0;
+	return 0;
 #endif
 }
 
 static Bool
 i830_display_overlay(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
-		   int id, short width, short height,
-		   int dstPitch, int x1, int y1, int x2, int y2, BoxPtr dstBox,
-		   short src_w, short src_h, short drw_w, short drw_h)
+		     int id, short width, short height,
+		     int dstPitch, int x1, int y1, int x2, int y2,
+		     BoxPtr dstBox, short src_w, short src_h, short drw_w,
+		     short drw_h)
 {
-    I830Ptr		pI830 = I830PTR(pScrn);
-    I830PortPrivPtr	pPriv = pI830->adaptor->pPortPrivates[0].ptr;
-    int			tmp;
+	I830Ptr pI830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv = pI830->adaptor->pPortPrivates[0].ptr;
+	int tmp;
 
-    OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
-		  dstPitch);
+	OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
+		      dstPitch);
 
 #if VIDEO_DEBUG
-    CompareOverlay(pI830, (uint32_t *) overlay, 0x100);
+	CompareOverlay(pI830, (uint32_t *) overlay, 0x100);
 #endif
 
-    /*
-     * If the video isn't visible on any CRTC, turn it off
-     */
-    if (!crtc)
-    {
-	pPriv->current_crtc = NULL;
-	drmmode_overlay_off(pScrn);
+	/*
+	 * If the video isn't visible on any CRTC, turn it off
+	 */
+	if (!crtc) {
+		pPriv->current_crtc = NULL;
+		drmmode_overlay_off(pScrn);
 
-	return TRUE;
-    }
-
-    i830_update_dst_box_to_crtc_coords(pScrn, crtc, dstBox);
-
-    if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
-	tmp = width;
-	width = height;
-	height = tmp;
-	tmp = drw_w;
-	drw_w = drw_h;
-	drw_h = tmp;
-	tmp = src_w;
-	src_w = src_h;
-	src_h = tmp;
-    }
-
-    return drmmode_overlay_put_image(pScrn, crtc, id, width, height, dstPitch,
-				     x1, y1, x2, y2, dstBox,
-				     src_w, src_h, drw_w, drw_h);
+		return TRUE;
+	}
+
+	i830_update_dst_box_to_crtc_coords(pScrn, crtc, dstBox);
+
+	if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
+		tmp = width;
+		width = height;
+		height = tmp;
+		tmp = drw_w;
+		drw_w = drw_h;
+		drw_h = tmp;
+		tmp = src_w;
+		src_w = src_h;
+		src_h = tmp;
+	}
+
+	return drmmode_overlay_put_image(pScrn, crtc, id, width, height,
+					 dstPitch, x1, y1, x2, y2, dstBox,
+					 src_w, src_h, drw_w, drw_h);
 }
 
 static Bool
-i830_clip_video_helper (ScrnInfoPtr pScrn,
-			I830PortPrivPtr pPriv,
-			xf86CrtcPtr *crtc_ret,
-			BoxPtr	    dst,
-			INT32	    *xa,
-			INT32	    *xb,
-			INT32	    *ya,
-			INT32	    *yb,
-			RegionPtr   reg,
-			INT32	    width,
-			INT32	    height)
+i830_clip_video_helper(ScrnInfoPtr pScrn,
+		       I830PortPrivPtr pPriv,
+		       xf86CrtcPtr * crtc_ret,
+		       BoxPtr dst,
+		       INT32 * xa,
+		       INT32 * xb,
+		       INT32 * ya,
+		       INT32 * yb, RegionPtr reg, INT32 width, INT32 height)
 {
-    Bool	ret;
-    RegionRec	crtc_region_local;
-    RegionPtr	crtc_region = reg;
-    
-    /*
-     * For overlay video, compute the relevant CRTC and
-     * clip video to that
-     */
-    if (crtc_ret)
-    {
-	BoxRec		crtc_box;
-	xf86CrtcPtr	crtc = i830_covering_crtc (pScrn, dst,
-						   pPriv->desired_crtc,
-						   &crtc_box);
-	
-	/* For textured video, we don't actually want to clip at all. */
-	if (crtc && !pPriv->textured)
-	{
-	    REGION_INIT (pScreen, &crtc_region_local, &crtc_box, 1);
-	    crtc_region = &crtc_region_local;
-	    REGION_INTERSECT (pScreen, crtc_region, crtc_region, reg);
+	Bool ret;
+	RegionRec crtc_region_local;
+	RegionPtr crtc_region = reg;
+
+	/*
+	 * For overlay video, compute the relevant CRTC and
+	 * clip video to that
+	 */
+	if (crtc_ret) {
+		BoxRec crtc_box;
+		xf86CrtcPtr crtc = i830_covering_crtc(pScrn, dst,
+						      pPriv->desired_crtc,
+						      &crtc_box);
+
+		/* For textured video, we don't actually want to clip at all. */
+		if (crtc && !pPriv->textured) {
+			REGION_INIT(pScreen, &crtc_region_local, &crtc_box, 1);
+			crtc_region = &crtc_region_local;
+			REGION_INTERSECT(pScreen, crtc_region, crtc_region,
+					 reg);
+		}
+		*crtc_ret = crtc;
 	}
-	*crtc_ret = crtc;
-    }
-    ret = xf86XVClipVideoHelper (dst, xa, xb, ya, yb, 
-				 crtc_region, width, height);
-    if (crtc_region != reg)
-	REGION_UNINIT (pScreen, &crtc_region_local);
-    return ret;
+	ret = xf86XVClipVideoHelper(dst, xa, xb, ya, yb,
+				    crtc_region, width, height);
+	if (crtc_region != reg)
+		REGION_UNINIT(pScreen, &crtc_region_local);
+	return ret;
 }
 
 static void
-i830_fill_colorkey (ScreenPtr pScreen, uint32_t key, RegionPtr clipboxes)
+i830_fill_colorkey(ScreenPtr pScreen, uint32_t key, RegionPtr clipboxes)
 {
-   DrawablePtr root = &WindowTable[pScreen->myNum]->drawable;
-   XID	       pval[2];
-   BoxPtr      pbox = REGION_RECTS(clipboxes);
-   int	       i, nbox = REGION_NUM_RECTS(clipboxes);
-   xRectangle  *rects;
-   GCPtr       gc;
-
-   if(!xf86Screens[pScreen->myNum]->vtSema) return;
-
-   gc = GetScratchGC(root->depth, pScreen);
-   pval[0] = key;
-   pval[1] = IncludeInferiors;
-   (void) ChangeGC(gc, GCForeground|GCSubwindowMode, pval);
-   ValidateGC(root, gc);
-
-   rects = xalloc (nbox * sizeof(xRectangle));
-
-   for(i = 0; i < nbox; i++, pbox++) 
-   {
-      rects[i].x = pbox->x1;
-      rects[i].y = pbox->y1;
-      rects[i].width = pbox->x2 - pbox->x1;
-      rects[i].height = pbox->y2 - pbox->y1;
-   }
-   
-   (*gc->ops->PolyFillRect)(root, gc, nbox, rects);
-   
-   xfree (rects);
-   FreeScratchGC (gc);
+	DrawablePtr root = &WindowTable[pScreen->myNum]->drawable;
+	XID pval[2];
+	BoxPtr pbox = REGION_RECTS(clipboxes);
+	int i, nbox = REGION_NUM_RECTS(clipboxes);
+	xRectangle *rects;
+	GCPtr gc;
+
+	if (!xf86Screens[pScreen->myNum]->vtSema)
+		return;
+
+	gc = GetScratchGC(root->depth, pScreen);
+	pval[0] = key;
+	pval[1] = IncludeInferiors;
+	(void)ChangeGC(gc, GCForeground | GCSubwindowMode, pval);
+	ValidateGC(root, gc);
+
+	rects = xalloc(nbox * sizeof(xRectangle));
+
+	for (i = 0; i < nbox; i++, pbox++) {
+		rects[i].x = pbox->x1;
+		rects[i].y = pbox->y1;
+		rects[i].width = pbox->x2 - pbox->x1;
+		rects[i].height = pbox->y2 - pbox->y1;
+	}
+
+	(*gc->ops->PolyFillRect) (root, gc, nbox, rects);
+
+	xfree(rects);
+	FreeScratchGC(gc);
 }
 
 static void
 i830_wait_for_scanline(ScrnInfoPtr pScrn, PixmapPtr pPixmap,
-	xf86CrtcPtr crtc, RegionPtr clipBoxes)
+		       xf86CrtcPtr crtc, RegionPtr clipBoxes)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    BoxPtr box;
-    pixman_box16_t box_in_crtc_coordinates;
-    int pipe = -1, event, load_scan_lines_pipe;
-
-    if (pixmap_is_scanout(pPixmap))
-	pipe = i830_crtc_to_pipe(crtc);
-
-    if (pipe >= 0) {
-	if (pipe == 0) {
-	    event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
-	    load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
-	} else {
-	    event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
-	    load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
+	I830Ptr pI830 = I830PTR(pScrn);
+	BoxPtr box;
+	pixman_box16_t box_in_crtc_coordinates;
+	int pipe = -1, event, load_scan_lines_pipe;
+
+	if (pixmap_is_scanout(pPixmap))
+		pipe = i830_crtc_to_pipe(crtc);
+
+	if (pipe >= 0) {
+		if (pipe == 0) {
+			event = MI_WAIT_FOR_PIPEA_SCAN_LINE_WINDOW;
+			load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEA;
+		} else {
+			event = MI_WAIT_FOR_PIPEB_SCAN_LINE_WINDOW;
+			load_scan_lines_pipe = MI_LOAD_SCAN_LINES_DISPLAY_PIPEB;
+		}
+
+		box = REGION_EXTENTS(unused, clipBoxes);
+		box_in_crtc_coordinates = *box;
+		if (crtc->transform_in_use)
+			pixman_f_transform_bounds(&crtc->f_framebuffer_to_crtc,
+						  &box_in_crtc_coordinates);
+
+		BEGIN_BATCH(5);
+		/* The documentation says that the LOAD_SCAN_LINES command
+		 * always comes in pairs. Don't ask me why. */
+		OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
+		OUT_BATCH((box_in_crtc_coordinates.
+			   y1 << 16) | box_in_crtc_coordinates.y2);
+		OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
+		OUT_BATCH((box_in_crtc_coordinates.
+			   y1 << 16) | box_in_crtc_coordinates.y2);
+		OUT_BATCH(MI_WAIT_FOR_EVENT | event);
+		ADVANCE_BATCH();
 	}
-
-	box = REGION_EXTENTS(unused, clipBoxes);
-	box_in_crtc_coordinates = *box;
-	if (crtc->transform_in_use)
-	    pixman_f_transform_bounds (&crtc->f_framebuffer_to_crtc, &box_in_crtc_coordinates);
-
-	BEGIN_BATCH(5);
-	/* The documentation says that the LOAD_SCAN_LINES command
-	 * always comes in pairs. Don't ask me why. */
-	OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
-	OUT_BATCH((box_in_crtc_coordinates.y1 << 16) | box_in_crtc_coordinates.y2);
-	OUT_BATCH(MI_LOAD_SCAN_LINES_INCL | load_scan_lines_pipe);
-	OUT_BATCH((box_in_crtc_coordinates.y1 << 16) | box_in_crtc_coordinates.y2);
-	OUT_BATCH(MI_WAIT_FOR_EVENT | event);
-	ADVANCE_BATCH();
-    }
 }
 
 static Bool
 i830_setup_video_buffer(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
-	int alloc_size, int id)
+			int alloc_size, int id)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    /* Free the current buffer if we're going to have to reallocate */
-    if (pPriv->buf && pPriv->buf->size < alloc_size) {
-	drm_intel_bo_unreference(pPriv->buf);
-	pPriv->buf = NULL;
-    }
-
-    if (xvmc_passthrough(id, pPriv->rotation)) {
-	i830_free_video_buffers(pPriv);
-    } else {
-        if (pPriv->buf == NULL) {
-            pPriv->buf = drm_intel_bo_alloc(pI830->bufmgr,
-                                         "xv buffer", alloc_size, 4096);
-            if (pPriv->buf == NULL)
-                return FALSE;
-        }
-    }
-
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	/* Free the current buffer if we're going to have to reallocate */
+	if (pPriv->buf && pPriv->buf->size < alloc_size) {
+		drm_intel_bo_unreference(pPriv->buf);
+		pPriv->buf = NULL;
+	}
+
+	if (xvmc_passthrough(id, pPriv->rotation)) {
+		i830_free_video_buffers(pPriv);
+	} else {
+		if (pPriv->buf == NULL) {
+			pPriv->buf = drm_intel_bo_alloc(pI830->bufmgr,
+							"xv buffer", alloc_size,
+							4096);
+			if (pPriv->buf == NULL)
+				return FALSE;
+		}
+	}
+
+	return TRUE;
 }
 
 static void
 i830_dst_pitch_and_size(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, short width,
-	short height, int *dstPitch, int *dstPitch2, int *size, int id)
+			short height, int *dstPitch, int *dstPitch2, int *size,
+			int id)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int pitchAlignMask;
-
-    /* Only needs to be DWORD-aligned for textured on i915, but overlay has
-     * stricter requirements.
-     */
-    if (pPriv->textured) {
-	pitchAlignMask = 3;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int pitchAlignMask;
+
+	/* Only needs to be DWORD-aligned for textured on i915, but overlay has
+	 * stricter requirements.
+	 */
+	if (pPriv->textured) {
+		pitchAlignMask = 3;
 #ifdef INTEL_XVMC
-	/* for i915 xvmc, hw requires at least 1kb aligned surface */
-	if ((id == FOURCC_XVMC) && IS_I915(pI830))
-	    pitchAlignMask = 0x3ff;
+		/* for i915 xvmc, hw requires at least 1kb aligned surface */
+		if ((id == FOURCC_XVMC) && IS_I915(pI830))
+			pitchAlignMask = 0x3ff;
 #endif
-    } else {
-	if (IS_I965G(pI830))
-	    pitchAlignMask = 255;
-	else
-	    pitchAlignMask = 63;
-    }
-
-    /* Determine the desired destination pitch (representing the chroma's pitch,
-     * in the planar case.
-     */
-    switch (id) {
-    case FOURCC_YV12:
-    case FOURCC_I420:
-	if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
-	    *dstPitch = ((height / 2) + pitchAlignMask) & ~pitchAlignMask;
-	    *size = *dstPitch * width * 3;
 	} else {
-	    *dstPitch = ((width / 2) + pitchAlignMask) & ~pitchAlignMask;
-	    *size = *dstPitch * height * 3;
+		if (IS_I965G(pI830))
+			pitchAlignMask = 255;
+		else
+			pitchAlignMask = 63;
 	}
-	break;
-    case FOURCC_UYVY:
-    case FOURCC_YUY2:
 
-	if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
-	    *dstPitch = ((height << 1) + pitchAlignMask) & ~pitchAlignMask;
-	    *size = *dstPitch * width;
-	} else {
-	    *dstPitch = ((width << 1) + pitchAlignMask) & ~pitchAlignMask;
-	    *size = *dstPitch * height;
-	}
-	break;
+	/* Determine the desired destination pitch (representing the chroma's pitch,
+	 * in the planar case.
+	 */
+	switch (id) {
+	case FOURCC_YV12:
+	case FOURCC_I420:
+		if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
+			*dstPitch =
+			    ((height / 2) + pitchAlignMask) & ~pitchAlignMask;
+			*size = *dstPitch * width * 3;
+		} else {
+			*dstPitch =
+			    ((width / 2) + pitchAlignMask) & ~pitchAlignMask;
+			*size = *dstPitch * height * 3;
+		}
+		break;
+	case FOURCC_UYVY:
+	case FOURCC_YUY2:
+
+		if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
+			*dstPitch =
+			    ((height << 1) + pitchAlignMask) & ~pitchAlignMask;
+			*size = *dstPitch * width;
+		} else {
+			*dstPitch =
+			    ((width << 1) + pitchAlignMask) & ~pitchAlignMask;
+			*size = *dstPitch * height;
+		}
+		break;
 #ifdef INTEL_XVMC
-    case FOURCC_XVMC:
-	*dstPitch = ((width / 2) + pitchAlignMask ) & ~pitchAlignMask;
-	*dstPitch2 = (width + pitchAlignMask ) & ~pitchAlignMask;
-	*size = 0;
-	break;
+	case FOURCC_XVMC:
+		*dstPitch = ((width / 2) + pitchAlignMask) & ~pitchAlignMask;
+		*dstPitch2 = (width + pitchAlignMask) & ~pitchAlignMask;
+		*size = 0;
+		break;
 #endif
-    default:
-	*dstPitch = 0;
-	*size = 0;
-	break;
-    }
+	default:
+		*dstPitch = 0;
+		*size = 0;
+		break;
+	}
 #if 0
-    ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, *dstPitch, size);
+	ErrorF("srcPitch: %d, dstPitch: %d, size: %d\n", srcPitch, *dstPitch,
+	       size);
 #endif
 }
 
 static Bool
 i830_copy_video_data(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
-	     short width, short height, int *dstPitch, int *dstPitch2,
-	     INT32 x1, INT32 y1, INT32 x2, INT32 y2,
-	     int id, unsigned char *buf)
+		     short width, short height, int *dstPitch, int *dstPitch2,
+		     INT32 x1, INT32 y1, INT32 x2, INT32 y2,
+		     int id, unsigned char *buf)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int srcPitch = 0, srcPitch2 = 0;
-    int top, left, npixels, nlines, size;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int srcPitch = 0, srcPitch2 = 0;
+	int top, left, npixels, nlines, size;
 
-    if (is_planar_fourcc(id)) {
-	srcPitch = (width + 0x3) & ~0x3;
-	srcPitch2 = ((width >> 1) + 0x3) & ~0x3;
-    } else {
-	srcPitch = width << 1;
-    }
+	if (is_planar_fourcc(id)) {
+		srcPitch = (width + 0x3) & ~0x3;
+		srcPitch2 = ((width >> 1) + 0x3) & ~0x3;
+	} else {
+		srcPitch = width << 1;
+	}
 
-    i830_dst_pitch_and_size(pScrn, pPriv, width, height, dstPitch, dstPitch2,
-	    &size, id);
+	i830_dst_pitch_and_size(pScrn, pPriv, width, height, dstPitch,
+				dstPitch2, &size, id);
 
-    if (!i830_setup_video_buffer(pScrn, pPriv, size, id))
-	return FALSE;
+	if (!i830_setup_video_buffer(pScrn, pPriv, size, id))
+		return FALSE;
 
-    /* fixup pointers */
+	/* fixup pointers */
 #ifdef INTEL_XVMC
-    if (id == FOURCC_XVMC && IS_I915(pI830)) {
-	pPriv->YBufOffset = (uint32_t)((uintptr_t)buf);
-	pPriv->VBufOffset = pPriv->YBufOffset + (*dstPitch2 * height);
-	pPriv->UBufOffset = pPriv->VBufOffset + (*dstPitch * height / 2);
-    } else {
-#endif
-	pPriv->YBufOffset = 0;
-
-	if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
-	    pPriv->UBufOffset = pPriv->YBufOffset + (*dstPitch * 2 * width);
-	    pPriv->VBufOffset = pPriv->UBufOffset + (*dstPitch * width / 2);
+	if (id == FOURCC_XVMC && IS_I915(pI830)) {
+		pPriv->YBufOffset = (uint32_t) ((uintptr_t) buf);
+		pPriv->VBufOffset = pPriv->YBufOffset + (*dstPitch2 * height);
+		pPriv->UBufOffset =
+		    pPriv->VBufOffset + (*dstPitch * height / 2);
 	} else {
-	    pPriv->UBufOffset = pPriv->YBufOffset + (*dstPitch * 2 * height);
-	    pPriv->VBufOffset = pPriv->UBufOffset + (*dstPitch * height / 2);
-	}
+#endif
+		pPriv->YBufOffset = 0;
+
+		if (pPriv->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
+			pPriv->UBufOffset =
+			    pPriv->YBufOffset + (*dstPitch * 2 * width);
+			pPriv->VBufOffset =
+			    pPriv->UBufOffset + (*dstPitch * width / 2);
+		} else {
+			pPriv->UBufOffset =
+			    pPriv->YBufOffset + (*dstPitch * 2 * height);
+			pPriv->VBufOffset =
+			    pPriv->UBufOffset + (*dstPitch * height / 2);
+		}
 #ifdef INTEL_XVMC
-    }
+	}
 #endif
 
-    /* copy data */
-    top = y1 >> 16;
-    left = (x1 >> 16) & ~1;
-    npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left;
-
-    if (is_planar_fourcc(id)) {
-	if (!xvmc_passthrough(id, pPriv->rotation)) {
-	    top &= ~1;
-	    nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top;
-	    I830CopyPlanarData(pPriv, buf, srcPitch, srcPitch2, *dstPitch,
-		    height, top, left, nlines, npixels, id);
+	/* copy data */
+	top = y1 >> 16;
+	left = (x1 >> 16) & ~1;
+	npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left;
+
+	if (is_planar_fourcc(id)) {
+		if (!xvmc_passthrough(id, pPriv->rotation)) {
+			top &= ~1;
+			nlines = ((((y2 + 0xffff) >> 16) + 1) & ~1) - top;
+			I830CopyPlanarData(pPriv, buf, srcPitch, srcPitch2,
+					   *dstPitch, height, top, left, nlines,
+					   npixels, id);
+		}
+	} else {
+		nlines = ((y2 + 0xffff) >> 16) - top;
+		I830CopyPackedData(pPriv, buf, srcPitch, *dstPitch, top, left,
+				   nlines, npixels);
 	}
-    } else {
-	nlines = ((y2 + 0xffff) >> 16) - top;
-	I830CopyPackedData(pPriv, buf, srcPitch, *dstPitch, top, left,
-			   nlines, npixels);
-    }
 
-    return TRUE;
+	return TRUE;
 }
 
 /*
@@ -1585,108 +1599,112 @@ I830PutImage(ScrnInfoPtr pScrn,
 	     short drw_w, short drw_h,
 	     int id, unsigned char *buf,
 	     short width, short height,
-	     Bool sync, RegionPtr clipBoxes, pointer data,
-	     DrawablePtr pDraw)
+	     Bool sync, RegionPtr clipBoxes, pointer data, DrawablePtr pDraw)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
-    ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
-    PixmapPtr pPixmap = get_drawable_pixmap(pDraw);;
-    INT32 x1, x2, y1, y2;
-    int dstPitch;
-    int dstPitch2 = 0;
-    BoxRec dstBox;
-    xf86CrtcPtr	crtc;
+	I830Ptr pI830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv = (I830PortPrivPtr) data;
+	ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex];
+	PixmapPtr pPixmap = get_drawable_pixmap(pDraw);;
+	INT32 x1, x2, y1, y2;
+	int dstPitch;
+	int dstPitch2 = 0;
+	BoxRec dstBox;
+	xf86CrtcPtr crtc;
 
 #if 0
-    ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
-	   "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x, drw_y,
-	   drw_w, drw_h, width, height);
+	ErrorF("I830PutImage: src: (%d,%d)(%d,%d), dst: (%d,%d)(%d,%d)\n"
+	       "width %d, height %d\n", src_x, src_y, src_w, src_h, drw_x,
+	       drw_y, drw_w, drw_h, width, height);
 #endif
 
-    if (!pPriv->textured) {
-        /* If dst width and height are less than 1/8th the src size, the
-         * src/dst scale factor becomes larger than 8 and doesn't fit in
-         * the scale register. */
-        if(src_w >= (drw_w * 8))
-            drw_w = src_w/7;
-
-        if(src_h >= (drw_h * 8))
-            drw_h = src_h/7;
-    }
-
-    /* Clip */
-    x1 = src_x;
-    x2 = src_x + src_w;
-    y1 = src_y;
-    y2 = src_y + src_h;
-
-    dstBox.x1 = drw_x;
-    dstBox.x2 = drw_x + drw_w;
-    dstBox.y1 = drw_y;
-    dstBox.y2 = drw_y + drw_h;
-
-    if (!i830_clip_video_helper(pScrn, 
-				pPriv,
-				&crtc,
-				&dstBox, &x1, &x2, &y1, &y2, clipBoxes,
-				width, height))
-	return Success;
+	if (!pPriv->textured) {
+		/* If dst width and height are less than 1/8th the src size, the
+		 * src/dst scale factor becomes larger than 8 and doesn't fit in
+		 * the scale register. */
+		if (src_w >= (drw_w * 8))
+			drw_w = src_w / 7;
 
-    if (!pPriv->textured) {
-	 /* texture video handles rotation differently. */
-	if (crtc)
-	    pPriv->rotation = crtc->rotation;
-	else {
-	    xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		    "Fail to clip video to any crtc!\n");
-	    return Success;
+		if (src_h >= (drw_h * 8))
+			drw_h = src_h / 7;
 	}
-    }
-
-    if (!i830_copy_video_data(pScrn, pPriv, width, height,
-		&dstPitch, &dstPitch2,
-		x1, y1, x2, y2, id, buf))
-	return BadAlloc;
-
-    if (!pPriv->textured) {
-	if (!i830_display_overlay(pScrn, crtc, id, width, height, dstPitch,
-			   x1, y1, x2, y2, &dstBox, src_w, src_h,
-			   drw_w, drw_h))
-	    return BadAlloc;
-	
-	/* update cliplist */
-	if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
-	    REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
-	    i830_fill_colorkey (pScreen, pPriv->colorKey, clipBoxes);
+
+	/* Clip */
+	x1 = src_x;
+	x2 = src_x + src_w;
+	y1 = src_y;
+	y2 = src_y + src_h;
+
+	dstBox.x1 = drw_x;
+	dstBox.x2 = drw_x + drw_w;
+	dstBox.y1 = drw_y;
+	dstBox.y2 = drw_y + drw_h;
+
+	if (!i830_clip_video_helper(pScrn,
+				    pPriv,
+				    &crtc,
+				    &dstBox, &x1, &x2, &y1, &y2, clipBoxes,
+				    width, height))
+		return Success;
+
+	if (!pPriv->textured) {
+		/* texture video handles rotation differently. */
+		if (crtc)
+			pPriv->rotation = crtc->rotation;
+		else {
+			xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+				   "Fail to clip video to any crtc!\n");
+			return Success;
+		}
 	}
-    } else {
-        if (crtc && pPriv->SyncToVblank != 0) {
-	    i830_wait_for_scanline(pScrn, pPixmap, crtc, clipBoxes);
-        }
-
-        if (IS_I965G(pI830)) {
-            if (xvmc_passthrough(id, pPriv->rotation)) {
-		/* XXX: KMS */
-                pPriv->YBufOffset = (uintptr_t)buf;
-                pPriv->UBufOffset = pPriv->YBufOffset + height*width;
-                pPriv->VBufOffset = pPriv->UBufOffset + height*width/4;
-            }
-            I965DisplayVideoTextured(pScrn, pPriv, id, clipBoxes, width, height,
-                                     dstPitch, x1, y1, x2, y2,
-                                     src_w, src_h, drw_w, drw_h, pPixmap);
-        } else {
-            I915DisplayVideoTextured(pScrn, pPriv, id, clipBoxes, width, height,
-                                     dstPitch, dstPitch2, x1, y1, x2, y2,
-                                     src_w, src_h, drw_w, drw_h, pPixmap);
-        }
-
-	DamageDamageRegion(pDraw, clipBoxes);
-    }
-
-    pPriv->videoStatus = CLIENT_VIDEO_ON;
-
-    return Success;
+
+	if (!i830_copy_video_data(pScrn, pPriv, width, height,
+				  &dstPitch, &dstPitch2,
+				  x1, y1, x2, y2, id, buf))
+		return BadAlloc;
+
+	if (!pPriv->textured) {
+		if (!i830_display_overlay
+		    (pScrn, crtc, id, width, height, dstPitch, x1, y1, x2, y2,
+		     &dstBox, src_w, src_h, drw_w, drw_h))
+			return BadAlloc;
+
+		/* update cliplist */
+		if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
+			REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
+			i830_fill_colorkey(pScreen, pPriv->colorKey, clipBoxes);
+		}
+	} else {
+		if (crtc && pPriv->SyncToVblank != 0) {
+			i830_wait_for_scanline(pScrn, pPixmap, crtc, clipBoxes);
+		}
+
+		if (IS_I965G(pI830)) {
+			if (xvmc_passthrough(id, pPriv->rotation)) {
+				/* XXX: KMS */
+				pPriv->YBufOffset = (uintptr_t) buf;
+				pPriv->UBufOffset =
+				    pPriv->YBufOffset + height * width;
+				pPriv->VBufOffset =
+				    pPriv->UBufOffset + height * width / 4;
+			}
+			I965DisplayVideoTextured(pScrn, pPriv, id, clipBoxes,
+						 width, height, dstPitch, x1,
+						 y1, x2, y2, src_w, src_h,
+						 drw_w, drw_h, pPixmap);
+		} else {
+			I915DisplayVideoTextured(pScrn, pPriv, id, clipBoxes,
+						 width, height, dstPitch,
+						 dstPitch2, x1, y1, x2, y2,
+						 src_w, src_h, drw_w, drw_h,
+						 pPixmap);
+		}
+
+		DamageDamageRegion(pDraw, clipBoxes);
+	}
+
+	pPriv->videoStatus = CLIENT_VIDEO_ON;
+
+	return Success;
 }
 
 static int
@@ -1695,120 +1713,121 @@ I830QueryImageAttributes(ScrnInfoPtr pScrn,
 			 unsigned short *w, unsigned short *h,
 			 int *pitches, int *offsets)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int size, tmp;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int size, tmp;
 
 #if 0
-    ErrorF("I830QueryImageAttributes: w is %d, h is %d\n", *w, *h);
+	ErrorF("I830QueryImageAttributes: w is %d, h is %d\n", *w, *h);
 #endif
 
-    if (IS_845G(pI830) || IS_I830(pI830)) {
-	if (*w > IMAGE_MAX_WIDTH_LEGACY)
-	    *w = IMAGE_MAX_WIDTH_LEGACY;
-	if (*h > IMAGE_MAX_HEIGHT_LEGACY)
-	    *h = IMAGE_MAX_HEIGHT_LEGACY;
-    } else {
-	if (*w > IMAGE_MAX_WIDTH)
-	    *w = IMAGE_MAX_WIDTH;
-	if (*h > IMAGE_MAX_HEIGHT)
-	    *h = IMAGE_MAX_HEIGHT;
-    }
-
-    *w = (*w + 1) & ~1;
-    if (offsets)
-	offsets[0] = 0;
-
-    switch (id) {
-	/* IA44 is for XvMC only */
-    case FOURCC_IA44:
-    case FOURCC_AI44:
-	if (pitches)
-	    pitches[0] = *w;
-	size = *w * *h;
-	break;
-    case FOURCC_YV12:
-    case FOURCC_I420:
-	*h = (*h + 1) & ~1;
-	size = (*w + 3) & ~3;
-	if (pitches)
-	    pitches[0] = size;
-	size *= *h;
-	if (offsets)
-	    offsets[1] = size;
-	tmp = ((*w >> 1) + 3) & ~3;
-	if (pitches)
-	    pitches[1] = pitches[2] = tmp;
-	tmp *= (*h >> 1);
-	size += tmp;
+	if (IS_845G(pI830) || IS_I830(pI830)) {
+		if (*w > IMAGE_MAX_WIDTH_LEGACY)
+			*w = IMAGE_MAX_WIDTH_LEGACY;
+		if (*h > IMAGE_MAX_HEIGHT_LEGACY)
+			*h = IMAGE_MAX_HEIGHT_LEGACY;
+	} else {
+		if (*w > IMAGE_MAX_WIDTH)
+			*w = IMAGE_MAX_WIDTH;
+		if (*h > IMAGE_MAX_HEIGHT)
+			*h = IMAGE_MAX_HEIGHT;
+	}
+
+	*w = (*w + 1) & ~1;
 	if (offsets)
-	    offsets[2] = size;
-	size += tmp;
+		offsets[0] = 0;
+
+	switch (id) {
+		/* IA44 is for XvMC only */
+	case FOURCC_IA44:
+	case FOURCC_AI44:
+		if (pitches)
+			pitches[0] = *w;
+		size = *w * *h;
+		break;
+	case FOURCC_YV12:
+	case FOURCC_I420:
+		*h = (*h + 1) & ~1;
+		size = (*w + 3) & ~3;
+		if (pitches)
+			pitches[0] = size;
+		size *= *h;
+		if (offsets)
+			offsets[1] = size;
+		tmp = ((*w >> 1) + 3) & ~3;
+		if (pitches)
+			pitches[1] = pitches[2] = tmp;
+		tmp *= (*h >> 1);
+		size += tmp;
+		if (offsets)
+			offsets[2] = size;
+		size += tmp;
 #if 0
-	if (pitches)
-	    ErrorF("pitch 0 is %d, pitch 1 is %d, pitch 2 is %d\n", pitches[0],
-		   pitches[1], pitches[2]);
-	if (offsets)
-	    ErrorF("offset 1 is %d, offset 2 is %d\n", offsets[1], offsets[2]);
-	if (offsets)
-	    ErrorF("size is %d\n", size);
+		if (pitches)
+			ErrorF("pitch 0 is %d, pitch 1 is %d, pitch 2 is %d\n",
+			       pitches[0], pitches[1], pitches[2]);
+		if (offsets)
+			ErrorF("offset 1 is %d, offset 2 is %d\n", offsets[1],
+			       offsets[2]);
+		if (offsets)
+			ErrorF("size is %d\n", size);
 #endif
-	break;
+		break;
 #ifdef INTEL_XVMC
-    case FOURCC_XVMC:
-        *h = (*h + 1) & ~1;
-        size = sizeof(struct intel_xvmc_command);
-        if (pitches)
-            pitches[0] = size;
-        break;
+	case FOURCC_XVMC:
+		*h = (*h + 1) & ~1;
+		size = sizeof(struct intel_xvmc_command);
+		if (pitches)
+			pitches[0] = size;
+		break;
 #endif
-    case FOURCC_UYVY:
-    case FOURCC_YUY2:
-    default:
-	size = *w << 1;
-	if (pitches)
-	    pitches[0] = size;
-	size *= *h;
-	break;
-    }
-
-    return size;
+	case FOURCC_UYVY:
+	case FOURCC_YUY2:
+	default:
+		size = *w << 1;
+		if (pitches)
+			pitches[0] = size;
+		size *= *h;
+		break;
+	}
+
+	return size;
 }
 
 void
 I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
 		      pointer pReadmask)
 {
-    ScrnInfoPtr pScrn = xf86Screens[i];
-    I830Ptr pI830 = I830PTR(pScrn);
-    I830PortPrivPtr pPriv;
+	ScrnInfoPtr pScrn = xf86Screens[i];
+	I830Ptr pI830 = I830PTR(pScrn);
+	I830PortPrivPtr pPriv;
 
-    /* no overlay */
-    if (pI830->adaptor == NULL)
-        return;
+	/* no overlay */
+	if (pI830->adaptor == NULL)
+		return;
 
-    pPriv = GET_PORT_PRIVATE(pScrn);
+	pPriv = GET_PORT_PRIVATE(pScrn);
 
-    if (pPriv->videoStatus & TIMER_MASK) {
+	if (pPriv->videoStatus & TIMER_MASK) {
 #if 1
-	Time now = currentTime.milliseconds;
+		Time now = currentTime.milliseconds;
 #else
-	UpdateCurrentTime();
+		UpdateCurrentTime();
 #endif
-	if (pPriv->videoStatus & OFF_TIMER) {
-	    if (pPriv->offTime < now) {
-		/* Turn off the overlay */
-		OVERLAY_DEBUG("BLOCKHANDLER\n");
-
-		drmmode_overlay_off(pScrn);
-
-		pPriv->videoStatus = FREE_TIMER;
-		pPriv->freeTime = now + FREE_DELAY;
-	    }
-	} else {				/* FREE_TIMER */
-	    if (pPriv->freeTime < now) {
-		i830_free_video_buffers(pPriv);
-		pPriv->videoStatus = 0;
-	    }
+		if (pPriv->videoStatus & OFF_TIMER) {
+			if (pPriv->offTime < now) {
+				/* Turn off the overlay */
+				OVERLAY_DEBUG("BLOCKHANDLER\n");
+
+				drmmode_overlay_off(pScrn);
+
+				pPriv->videoStatus = FREE_TIMER;
+				pPriv->freeTime = now + FREE_DELAY;
+			}
+		} else {	/* FREE_TIMER */
+			if (pPriv->freeTime < now) {
+				i830_free_video_buffers(pPriv);
+				pPriv->videoStatus = 0;
+			}
+		}
 	}
-    }
 }
diff --git a/src/i830_video.h b/src/i830_video.h
index cdccd162..ac478018 100644
--- a/src/i830_video.h
+++ b/src/i830_video.h
@@ -28,41 +28,41 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xf86_OSproc.h"
 
 typedef struct {
-   uint32_t YBufOffset;
-   uint32_t UBufOffset;
-   uint32_t VBufOffset;
-
-   int brightness;
-   int contrast;
-   int saturation;
-   xf86CrtcPtr current_crtc;
-   xf86CrtcPtr desired_crtc;
-
-   RegionRec clip;
-   uint32_t colorKey;
-
-   uint32_t gamma0;
-   uint32_t gamma1;
-   uint32_t gamma2;
-   uint32_t gamma3;
-   uint32_t gamma4;
-   uint32_t gamma5;
-
-   uint32_t videoStatus;
-   Time offTime;
-   Time freeTime;
+	uint32_t YBufOffset;
+	uint32_t UBufOffset;
+	uint32_t VBufOffset;
+
+	int brightness;
+	int contrast;
+	int saturation;
+	xf86CrtcPtr current_crtc;
+	xf86CrtcPtr desired_crtc;
+
+	RegionRec clip;
+	uint32_t colorKey;
+
+	uint32_t gamma0;
+	uint32_t gamma1;
+	uint32_t gamma2;
+	uint32_t gamma3;
+	uint32_t gamma4;
+	uint32_t gamma5;
+
+	uint32_t videoStatus;
+	Time offTime;
+	Time freeTime;
    /** YUV data buffers */
-   drm_intel_bo *buf; /* current buffer to draw into */
-   drm_intel_bo *oldBuf; /* old buffer, may be in use by the overlay hw */
-   Bool oldBuf_pinned; /* only actually pinned when in use by the overlay hw */
+	drm_intel_bo *buf;	/* current buffer to draw into */
+	drm_intel_bo *oldBuf;	/* old buffer, may be in use by the overlay hw */
+	Bool oldBuf_pinned;	/* only actually pinned when in use by the overlay hw */
 
-   Bool overlayOK;
-   int oneLineMode;
-   int scaleRatio;
-   Bool textured;
-   Rotation rotation; /* should remove I830->rotation later*/
+	Bool overlayOK;
+	int oneLineMode;
+	int scaleRatio;
+	Bool textured;
+	Rotation rotation;	/* should remove I830->rotation later */
 
-   int SyncToVblank; /* -1: auto, 0: off, 1: on */
+	int SyncToVblank;	/* -1: auto, 0: off, 1: on */
 } I830PortPrivRec, *I830PortPrivPtr;
 
 #define GET_PORT_PRIVATE(pScrn) \
@@ -73,16 +73,14 @@ void I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
 			      short height, int video_pitch, int video_pitch2,
 			      int x1, int y1, int x2, int y2,
 			      short src_w, short src_h,
-			      short drw_w, short drw_h,
-			      PixmapPtr pPixmap);
+			      short drw_w, short drw_h, PixmapPtr pPixmap);
 
 void I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv,
 			      int id, RegionPtr dstRegion, short width,
 			      short height, int video_pitch,
 			      int x1, int y1, int x2, int y2,
 			      short src_w, short src_h,
-			      short drw_w, short drw_h,
-			      PixmapPtr pPixmap);
+			      short drw_w, short drw_h, PixmapPtr pPixmap);
 
 void I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
 			   pointer pReadmask);
diff --git a/src/i915_3d.c b/src/i915_3d.c
index b2dbeed4..deee6968 100644
--- a/src/i915_3d.c
+++ b/src/i915_3d.c
@@ -34,78 +34,76 @@
 
 #include "i915_reg.h"
 
-void I915EmitInvarientState( ScrnInfoPtr pScrn )
+void I915EmitInvarientState(ScrnInfoPtr pScrn)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-
-   BEGIN_BATCH(24);
-
-   OUT_BATCH(_3DSTATE_AA_CMD |
-	     AA_LINE_ECAAR_WIDTH_ENABLE |
-	     AA_LINE_ECAAR_WIDTH_1_0 |
-	     AA_LINE_REGION_WIDTH_ENABLE |
-	     AA_LINE_REGION_WIDTH_1_0);
-
-   /* Disable independent alpha blend */
-   OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
-	     IAB_MODIFY_ENABLE |
-	     IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
-	     IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE << IAB_SRC_FACTOR_SHIFT) |
-	     IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO << IAB_DST_FACTOR_SHIFT));
-
-   OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
-   OUT_BATCH(0);
-
-   /* Don't support texture crossbar yet */
-   OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
-	     CSB_TCB(0, 0) |
-	     CSB_TCB(1, 1) |
-	     CSB_TCB(2, 2) |
-	     CSB_TCB(3, 3) |
-	     CSB_TCB(4, 4) |
-	     CSB_TCB(5, 5) |
-	     CSB_TCB(6, 6) |
-	     CSB_TCB(7, 7));
-
-   OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
-	     ENABLE_POINT_RASTER_RULE |
-	     OGL_POINT_RASTER_RULE |
-	     ENABLE_LINE_STRIP_PROVOKE_VRTX |
-	     ENABLE_TRI_FAN_PROVOKE_VRTX |
-	     LINE_STRIP_PROVOKE_VRTX(1) |
-	     TRI_FAN_PROVOKE_VRTX(2) | 
-	     ENABLE_TEXKILL_3D_4D |
-	     TEXKILL_4D);
-
-   OUT_BATCH(_3DSTATE_MODES_4_CMD |
-	     ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
-	     ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
-	     ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
-
-   OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
-   OUT_BATCH(0x00000000);	/* Disable texture coordinate wrap-shortest */
-
-   OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
-   OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
-
-   OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
-   OUT_BATCH(0);
-
-   OUT_BATCH(_3DSTATE_STIPPLE);
-   OUT_BATCH(0x00000000);
-
-   OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE | 0 );
-   OUT_BATCH(MI_NOOP);
-
-   ADVANCE_BATCH();
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	BEGIN_BATCH(24);
+
+	OUT_BATCH(_3DSTATE_AA_CMD |
+		  AA_LINE_ECAAR_WIDTH_ENABLE |
+		  AA_LINE_ECAAR_WIDTH_1_0 |
+		  AA_LINE_REGION_WIDTH_ENABLE | AA_LINE_REGION_WIDTH_1_0);
+
+	/* Disable independent alpha blend */
+	OUT_BATCH(_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD |
+		  IAB_MODIFY_ENABLE |
+		  IAB_MODIFY_FUNC | (BLENDFUNC_ADD << IAB_FUNC_SHIFT) |
+		  IAB_MODIFY_SRC_FACTOR | (BLENDFACT_ONE <<
+					   IAB_SRC_FACTOR_SHIFT) |
+		  IAB_MODIFY_DST_FACTOR | (BLENDFACT_ZERO <<
+					   IAB_DST_FACTOR_SHIFT));
+
+	OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_DFLT_Z_CMD);
+	OUT_BATCH(0);
+
+	/* Don't support texture crossbar yet */
+	OUT_BATCH(_3DSTATE_COORD_SET_BINDINGS |
+		  CSB_TCB(0, 0) |
+		  CSB_TCB(1, 1) |
+		  CSB_TCB(2, 2) |
+		  CSB_TCB(3, 3) |
+		  CSB_TCB(4, 4) |
+		  CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7));
+
+	OUT_BATCH(_3DSTATE_RASTER_RULES_CMD |
+		  ENABLE_POINT_RASTER_RULE |
+		  OGL_POINT_RASTER_RULE |
+		  ENABLE_LINE_STRIP_PROVOKE_VRTX |
+		  ENABLE_TRI_FAN_PROVOKE_VRTX |
+		  LINE_STRIP_PROVOKE_VRTX(1) |
+		  TRI_FAN_PROVOKE_VRTX(2) | ENABLE_TEXKILL_3D_4D | TEXKILL_4D);
+
+	OUT_BATCH(_3DSTATE_MODES_4_CMD |
+		  ENABLE_LOGIC_OP_FUNC | LOGIC_OP_FUNC(LOGICOP_COPY) |
+		  ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff) |
+		  ENABLE_STENCIL_TEST_MASK | STENCIL_TEST_MASK(0xff));
+
+	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
+	OUT_BATCH(0x00000000);	/* Disable texture coordinate wrap-shortest */
+
+	OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
+	OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
+
+	OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0);	/* disable indirect state */
+	OUT_BATCH(0);
+
+	OUT_BATCH(_3DSTATE_STIPPLE);
+	OUT_BATCH(0x00000000);
+
+	OUT_BATCH(_3DSTATE_BACKFACE_STENCIL_OPS | BFO_ENABLE_STENCIL_TWO_SIDE |
+		  0);
+	OUT_BATCH(MI_NOOP);
+
+	ADVANCE_BATCH();
 }
diff --git a/src/i915_3d.h b/src/i915_3d.h
index d3330e5b..117712e5 100644
--- a/src/i915_3d.h
+++ b/src/i915_3d.h
@@ -88,7 +88,7 @@
 #define REG_NR(reg)		((reg) & 0xff)
 
 struct i915_fs_op {
-    uint32_t ui[3];
+	uint32_t ui[3];
 };
 
 #define X_CHANNEL_VAL		1
@@ -106,15 +106,15 @@ struct i915_fs_op {
  */
 struct i915_fs_operand {
     /**< REG_TYPE_* register type */
-    int reg;
+	int reg;
     /**< *_CHANNEL_VAL swizzle value, with optional negation */
-    int x;
+	int x;
     /**< *_CHANNEL_VAL swizzle value, with optional negation */
-    int y;
+	int y;
     /**< *_CHANNEL_VAL swizzle value, with optional negation */
-    int z;
+	int z;
     /**< *_CHANNEL_VAL swizzle value, with optional negation */
-    int w;
+	int w;
 };
 
 /**
@@ -144,24 +144,23 @@ struct i915_fs_operand {
 static inline struct i915_fs_operand
 _i915_fs_operand(int reg, int x, int y, int z, int w)
 {
-    struct i915_fs_operand operand;
+	struct i915_fs_operand operand;
 
-    operand.reg = reg;
-    operand.x = x;
-    operand.y = y;
-    operand.z = z;
-    operand.w = w;
+	operand.reg = reg;
+	operand.x = x;
+	operand.y = y;
+	operand.z = z;
+	operand.w = w;
 
-    return operand;
+	return operand;
 }
 
 /**
  * Returns an operand containing (0.0, 0.0, 0.0, 0.0).
  */
-static inline struct i915_fs_operand
-i915_fs_operand_zero(void)
+static inline struct i915_fs_operand i915_fs_operand_zero(void)
 {
-    return i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO);
+	return i915_fs_operand(FS_R0, ZERO, ZERO, ZERO, ZERO);
 }
 
 /**
@@ -172,33 +171,31 @@ i915_fs_operand_zero(void)
 /**
  * Returns an operand containing (1.0, 1.0, 1.0, 1.0).
  */
-static inline struct i915_fs_operand
-i915_fs_operand_one(void)
+static inline struct i915_fs_operand i915_fs_operand_one(void)
 {
-    return i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE);
+	return i915_fs_operand(FS_R0, ONE, ONE, ONE, ONE);
 }
 
-static inline int
-i915_get_hardware_channel_val(int channel_val)
+static inline int i915_get_hardware_channel_val(int channel_val)
 {
-    if (channel_val < 0)
-	channel_val = -channel_val;
-
-    switch (channel_val) {
-    case X_CHANNEL_VAL:
-	return SRC_X;
-    case Y_CHANNEL_VAL:
-	return SRC_Y;
-    case Z_CHANNEL_VAL:
-	return SRC_Z;
-    case W_CHANNEL_VAL:
-	return SRC_W;
-    case ZERO_CHANNEL_VAL:
-	return SRC_ZERO;
-    case ONE_CHANNEL_VAL:
-	return SRC_ONE;
-    }
-    FatalError("Bad channel value %d\n", channel_val);
+	if (channel_val < 0)
+		channel_val = -channel_val;
+
+	switch (channel_val) {
+	case X_CHANNEL_VAL:
+		return SRC_X;
+	case Y_CHANNEL_VAL:
+		return SRC_Y;
+	case Z_CHANNEL_VAL:
+		return SRC_Z;
+	case W_CHANNEL_VAL:
+		return SRC_W;
+	case ZERO_CHANNEL_VAL:
+		return SRC_ZERO;
+	case ONE_CHANNEL_VAL:
+		return SRC_ONE;
+	}
+	FatalError("Bad channel value %d\n", channel_val);
 }
 
 /**
@@ -213,19 +210,18 @@ do {									\
  * Constructs a fragment shader command to declare a sampler or texture
  * register.
  */
-static inline struct i915_fs_op
-_i915_fs_dcl(int reg)
+static inline struct i915_fs_op _i915_fs_dcl(int reg)
 {
-    struct i915_fs_op op;
+	struct i915_fs_op op;
 
-    op.ui[0] = D0_DCL | (REG_TYPE(reg) << D0_TYPE_SHIFT) |
-	(REG_NR(reg) << D0_NR_SHIFT);
-    op.ui[1] = 0;
-    op.ui[2] = 0;
-    if (REG_TYPE(reg) != REG_TYPE_S)
-	op.ui[0] |= D0_CHANNEL_ALL;
+	op.ui[0] = D0_DCL | (REG_TYPE(reg) << D0_TYPE_SHIFT) |
+	    (REG_NR(reg) << D0_NR_SHIFT);
+	op.ui[1] = 0;
+	op.ui[2] = 0;
+	if (REG_TYPE(reg) != REG_TYPE_S)
+		op.ui[0] |= D0_CHANNEL_ALL;
 
-    return op;
+	return op;
 }
 
 /**
@@ -244,23 +240,23 @@ do {									\
 static inline struct i915_fs_op
 _i915_fs_texld(int load_op, int dest_reg, int sampler_reg, int address_reg)
 {
-    struct i915_fs_op op;
+	struct i915_fs_op op;
 
-    op.ui[0] = 0;
-    op.ui[1] = 0;
-    op.ui[2] = 0;
+	op.ui[0] = 0;
+	op.ui[1] = 0;
+	op.ui[2] = 0;
 
-    if (REG_TYPE(sampler_reg) != REG_TYPE_S)
-	FatalError("Bad sampler reg type\n");
+	if (REG_TYPE(sampler_reg) != REG_TYPE_S)
+		FatalError("Bad sampler reg type\n");
 
-    op.ui[0] |= load_op;
-    op.ui[0] |= REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT;
-    op.ui[0] |= REG_NR(dest_reg) << T0_DEST_NR_SHIFT;
-    op.ui[0] |= REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT;
-    op.ui[1] |= REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT;
-    op.ui[1] |= REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT;
+	op.ui[0] |= load_op;
+	op.ui[0] |= REG_TYPE(dest_reg) << T0_DEST_TYPE_SHIFT;
+	op.ui[0] |= REG_NR(dest_reg) << T0_DEST_NR_SHIFT;
+	op.ui[0] |= REG_NR(sampler_reg) << T0_SAMPLER_NR_SHIFT;
+	op.ui[1] |= REG_TYPE(address_reg) << T1_ADDRESS_REG_TYPE_SHIFT;
+	op.ui[1] |= REG_NR(address_reg) << T1_ADDRESS_REG_NR_SHIFT;
 
-    return op;
+	return op;
 }
 
 #define i915_fs_arith(op, dest_reg, operand0, operand1, operand2)	\
@@ -269,94 +265,93 @@ _i915_fs_texld(int load_op, int dest_reg, int sampler_reg, int address_reg)
 static inline struct i915_fs_op
 _i915_fs_arith(int cmd, int dest_reg,
 	       struct i915_fs_operand operand0,
-	       struct i915_fs_operand operand1,
-	       struct i915_fs_operand operand2)
+	       struct i915_fs_operand operand1, struct i915_fs_operand operand2)
 {
-    struct i915_fs_op op;
-
-    op.ui[0] = 0;
-    op.ui[1] = 0;
-    op.ui[2] = 0;
-
-    /* Set up destination register and write mask */
-    op.ui[0] |= cmd;
-    op.ui[0] |= REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT;
-    op.ui[0] |= REG_NR(dest_reg) << A0_DEST_NR_SHIFT;
-    op.ui[0] |= A0_DEST_CHANNEL_ALL;
-
-    /* Set up operand 0 */
-    op.ui[0] |= REG_TYPE(operand0.reg) << A0_SRC0_TYPE_SHIFT;
-    op.ui[0] |= REG_NR(operand0.reg) << A0_SRC0_NR_SHIFT;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand0.x) <<
-	A1_SRC0_CHANNEL_X_SHIFT;
-    if (operand0.x < 0)
-	op.ui[1] |= A1_SRC0_CHANNEL_X_NEGATE;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand0.y) <<
-	A1_SRC0_CHANNEL_Y_SHIFT;
-    if (operand0.y < 0)
-	op.ui[1] |= A1_SRC0_CHANNEL_Y_NEGATE;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand0.z) <<
-	A1_SRC0_CHANNEL_Z_SHIFT;
-    if (operand0.z < 0)
-	op.ui[1] |= A1_SRC0_CHANNEL_Z_NEGATE;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand0.w) <<
-	A1_SRC0_CHANNEL_W_SHIFT;
-    if (operand0.w < 0)
-	op.ui[1] |= A1_SRC0_CHANNEL_W_NEGATE;
-
-    /* Set up operand 1 */
-    op.ui[1] |= REG_TYPE(operand1.reg) << A1_SRC1_TYPE_SHIFT;
-    op.ui[1] |= REG_NR(operand1.reg) << A1_SRC1_NR_SHIFT;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand1.x) <<
-	A1_SRC1_CHANNEL_X_SHIFT;
-    if (operand1.x < 0)
-	op.ui[1] |= A1_SRC1_CHANNEL_X_NEGATE;
-
-    op.ui[1] |= i915_get_hardware_channel_val(operand1.y) <<
-	A1_SRC1_CHANNEL_Y_SHIFT;
-    if (operand1.y < 0)
-	op.ui[1] |= A1_SRC1_CHANNEL_Y_NEGATE;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand1.z) <<
-	A2_SRC1_CHANNEL_Z_SHIFT;
-    if (operand1.z < 0)
-	op.ui[2] |= A2_SRC1_CHANNEL_Z_NEGATE;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand1.w) <<
-	A2_SRC1_CHANNEL_W_SHIFT;
-    if (operand1.w < 0)
-	op.ui[2] |= A2_SRC1_CHANNEL_W_NEGATE;
-
-    /* Set up operand 2 */
-    op.ui[2] |= REG_TYPE(operand2.reg) << A2_SRC2_TYPE_SHIFT;
-    op.ui[2] |= REG_NR(operand2.reg) << A2_SRC2_NR_SHIFT;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand2.x) <<
-	A2_SRC2_CHANNEL_X_SHIFT;
-    if (operand2.x < 0)
-	op.ui[2] |= A2_SRC2_CHANNEL_X_NEGATE;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand2.y) <<
-	A2_SRC2_CHANNEL_Y_SHIFT;
-    if (operand2.y < 0)
-	op.ui[2] |= A2_SRC2_CHANNEL_Y_NEGATE;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand2.z) <<
-	A2_SRC2_CHANNEL_Z_SHIFT;
-    if (operand2.z < 0)
-	op.ui[2] |= A2_SRC2_CHANNEL_Z_NEGATE;
-
-    op.ui[2] |= i915_get_hardware_channel_val(operand2.w) <<
-	A2_SRC2_CHANNEL_W_SHIFT;
-    if (operand2.w < 0)
-	op.ui[2] |= A2_SRC2_CHANNEL_W_NEGATE;
-
-    return op;
+	struct i915_fs_op op;
+
+	op.ui[0] = 0;
+	op.ui[1] = 0;
+	op.ui[2] = 0;
+
+	/* Set up destination register and write mask */
+	op.ui[0] |= cmd;
+	op.ui[0] |= REG_TYPE(dest_reg) << A0_DEST_TYPE_SHIFT;
+	op.ui[0] |= REG_NR(dest_reg) << A0_DEST_NR_SHIFT;
+	op.ui[0] |= A0_DEST_CHANNEL_ALL;
+
+	/* Set up operand 0 */
+	op.ui[0] |= REG_TYPE(operand0.reg) << A0_SRC0_TYPE_SHIFT;
+	op.ui[0] |= REG_NR(operand0.reg) << A0_SRC0_NR_SHIFT;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand0.x) <<
+	    A1_SRC0_CHANNEL_X_SHIFT;
+	if (operand0.x < 0)
+		op.ui[1] |= A1_SRC0_CHANNEL_X_NEGATE;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand0.y) <<
+	    A1_SRC0_CHANNEL_Y_SHIFT;
+	if (operand0.y < 0)
+		op.ui[1] |= A1_SRC0_CHANNEL_Y_NEGATE;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand0.z) <<
+	    A1_SRC0_CHANNEL_Z_SHIFT;
+	if (operand0.z < 0)
+		op.ui[1] |= A1_SRC0_CHANNEL_Z_NEGATE;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand0.w) <<
+	    A1_SRC0_CHANNEL_W_SHIFT;
+	if (operand0.w < 0)
+		op.ui[1] |= A1_SRC0_CHANNEL_W_NEGATE;
+
+	/* Set up operand 1 */
+	op.ui[1] |= REG_TYPE(operand1.reg) << A1_SRC1_TYPE_SHIFT;
+	op.ui[1] |= REG_NR(operand1.reg) << A1_SRC1_NR_SHIFT;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand1.x) <<
+	    A1_SRC1_CHANNEL_X_SHIFT;
+	if (operand1.x < 0)
+		op.ui[1] |= A1_SRC1_CHANNEL_X_NEGATE;
+
+	op.ui[1] |= i915_get_hardware_channel_val(operand1.y) <<
+	    A1_SRC1_CHANNEL_Y_SHIFT;
+	if (operand1.y < 0)
+		op.ui[1] |= A1_SRC1_CHANNEL_Y_NEGATE;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand1.z) <<
+	    A2_SRC1_CHANNEL_Z_SHIFT;
+	if (operand1.z < 0)
+		op.ui[2] |= A2_SRC1_CHANNEL_Z_NEGATE;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand1.w) <<
+	    A2_SRC1_CHANNEL_W_SHIFT;
+	if (operand1.w < 0)
+		op.ui[2] |= A2_SRC1_CHANNEL_W_NEGATE;
+
+	/* Set up operand 2 */
+	op.ui[2] |= REG_TYPE(operand2.reg) << A2_SRC2_TYPE_SHIFT;
+	op.ui[2] |= REG_NR(operand2.reg) << A2_SRC2_NR_SHIFT;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand2.x) <<
+	    A2_SRC2_CHANNEL_X_SHIFT;
+	if (operand2.x < 0)
+		op.ui[2] |= A2_SRC2_CHANNEL_X_NEGATE;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand2.y) <<
+	    A2_SRC2_CHANNEL_Y_SHIFT;
+	if (operand2.y < 0)
+		op.ui[2] |= A2_SRC2_CHANNEL_Y_NEGATE;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand2.z) <<
+	    A2_SRC2_CHANNEL_Z_SHIFT;
+	if (operand2.z < 0)
+		op.ui[2] |= A2_SRC2_CHANNEL_Z_NEGATE;
+
+	op.ui[2] |= i915_get_hardware_channel_val(operand2.w) <<
+	    A2_SRC2_CHANNEL_W_SHIFT;
+	if (operand2.w < 0)
+		op.ui[2] |= A2_SRC2_CHANNEL_W_NEGATE;
+
+	return op;
 }
 
 /** Move operand0 to dest_reg */
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index 152b42b3..02e5fe88 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -61,37 +61,34 @@
 #define I915_XVMC_MAX_CONTEXTS 4
 #define I915_XVMC_MAX_SURFACES 20
 
-typedef struct _I915XvMCSurfacePriv
-{
-    i830_memory *surface;
-    unsigned long offsets[I915_XVMC_MAX_BUFFERS];
-    drm_handle_t surface_handle;
+typedef struct _I915XvMCSurfacePriv {
+	i830_memory *surface;
+	unsigned long offsets[I915_XVMC_MAX_BUFFERS];
+	drm_handle_t surface_handle;
 } I915XvMCSurfacePriv;
 
-typedef struct _I915XvMCContextPriv
-{
-    i830_memory *mcStaticIndirectState;
-    drm_handle_t sis_handle;
-    i830_memory *mcSamplerState;
-    drm_handle_t ssb_handle;
-    i830_memory *mcMapState;
-    drm_handle_t msb_handle;
-    i830_memory *mcPixelShaderProgram;
-    drm_handle_t psp_handle;
-    i830_memory *mcPixelShaderConstants;
-    drm_handle_t psc_handle;
-    i830_memory *mcCorrdata;
-    drm_handle_t corrdata_handle;
+typedef struct _I915XvMCContextPriv {
+	i830_memory *mcStaticIndirectState;
+	drm_handle_t sis_handle;
+	i830_memory *mcSamplerState;
+	drm_handle_t ssb_handle;
+	i830_memory *mcMapState;
+	drm_handle_t msb_handle;
+	i830_memory *mcPixelShaderProgram;
+	drm_handle_t psp_handle;
+	i830_memory *mcPixelShaderConstants;
+	drm_handle_t psc_handle;
+	i830_memory *mcCorrdata;
+	drm_handle_t corrdata_handle;
 } I915XvMCContextPriv;
 
-typedef struct _I915XvMC
-{
-    XID contexts[I915_XVMC_MAX_CONTEXTS];
-    XID surfaces[I915_XVMC_MAX_SURFACES];
-    I915XvMCSurfacePriv *sfprivs[I915_XVMC_MAX_SURFACES];
-    I915XvMCContextPriv *ctxprivs[I915_XVMC_MAX_CONTEXTS];
-    int ncontexts,nsurfaces;
-    PutImageFuncPtr savePutImage;
+typedef struct _I915XvMC {
+	XID contexts[I915_XVMC_MAX_CONTEXTS];
+	XID surfaces[I915_XVMC_MAX_SURFACES];
+	I915XvMCSurfacePriv *sfprivs[I915_XVMC_MAX_SURFACES];
+	I915XvMCContextPriv *ctxprivs[I915_XVMC_MAX_CONTEXTS];
+	int ncontexts, nsurfaces;
+	PutImageFuncPtr savePutImage;
 } I915XvMC, *I915XvMCPtr;
 
 /*
@@ -108,42 +105,39 @@ static XF86MCImageIDList yv12_subpicture_list =
 };
  */
 
-static XF86MCSurfaceInfoRec i915_YV12_mpg2_surface =
-{
-    SURFACE_TYPE_MPEG2_MPML,
-    XVMC_CHROMA_FORMAT_420,
-    0,
-    720,
-    576,
-    720,
-    576,
-    XVMC_MPEG_2,
-    /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING,*/
-    0,
-    /* &yv12_subpicture_list*/
-    NULL,
+static XF86MCSurfaceInfoRec i915_YV12_mpg2_surface = {
+	SURFACE_TYPE_MPEG2_MPML,
+	XVMC_CHROMA_FORMAT_420,
+	0,
+	720,
+	576,
+	720,
+	576,
+	XVMC_MPEG_2,
+	/* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */
+	0,
+	/* &yv12_subpicture_list */
+	NULL,
 };
 
-static XF86MCSurfaceInfoRec i915_YV12_mpg1_surface =
-{
-    SURFACE_TYPE_MPEG1_MPML,
-    XVMC_CHROMA_FORMAT_420,
-    0,
-    720,
-    576,
-    720,
-    576,
-    XVMC_MPEG_1,
-    /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING,*/
-    0,
-    /* &yv12_subpicture_list*/
-    NULL,
+static XF86MCSurfaceInfoRec i915_YV12_mpg1_surface = {
+	SURFACE_TYPE_MPEG1_MPML,
+	XVMC_CHROMA_FORMAT_420,
+	0,
+	720,
+	576,
+	720,
+	576,
+	XVMC_MPEG_1,
+	/* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */
+	0,
+	/* &yv12_subpicture_list */
+	NULL,
 };
 
-static XF86MCSurfaceInfoPtr ppSI[2] =
-{
-    (XF86MCSurfaceInfoPtr)&i915_YV12_mpg2_surface,
-    (XF86MCSurfaceInfoPtr)&i915_YV12_mpg1_surface
+static XF86MCSurfaceInfoPtr ppSI[2] = {
+	(XF86MCSurfaceInfoPtr) & i915_YV12_mpg2_surface,
+	(XF86MCSurfaceInfoPtr) & i915_YV12_mpg1_surface
 };
 
 #if 0
@@ -151,27 +145,25 @@ static XF86MCSurfaceInfoPtr ppSI[2] =
 static XF86ImageRec ia44_subpicture = XVIMAGE_IA44;
 static XF86ImageRec ai44_subpicture = XVIMAGE_AI44;
 
-static XF86ImagePtr i915_subpicture_list[2] =
-{
-    (XF86ImagePtr)&ia44_subpicture,
-    (XF86ImagePtr)&ai44_subpicture
+static XF86ImagePtr i915_subpicture_list[2] = {
+	(XF86ImagePtr) & ia44_subpicture,
+	(XF86ImagePtr) & ai44_subpicture
 };
 #endif
 
 /* Check context size not exceed surface type max */
-static void
-i915_check_context_size(XvMCContextPtr ctx)
+static void i915_check_context_size(XvMCContextPtr ctx)
 {
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(ppSI); i++) {
-	if (ctx->surface_type_id == ppSI[i]->surface_type_id) {
-	    if (ctx->width > ppSI[i]->max_width)
-		ctx->width = ppSI[i]->max_width;
-	    if (ctx->height > ppSI[i]->max_height)
-		ctx->height = ppSI[i]->max_height;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(ppSI); i++) {
+		if (ctx->surface_type_id == ppSI[i]->surface_type_id) {
+			if (ctx->width > ppSI[i]->max_width)
+				ctx->width = ppSI[i]->max_width;
+			if (ctx->height > ppSI[i]->max_height)
+				ctx->height = ppSI[i]->max_height;
+		}
 	}
-    }
 }
 
 /*
@@ -179,222 +171,231 @@ i915_check_context_size(XvMCContextPtr ctx)
  */
 static void initI915XvMC(I915XvMCPtr xvmc)
 {
-    unsigned int i;
-
-    for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
-        xvmc->contexts[i] = 0;
-        xvmc->ctxprivs[i] = NULL;
-    }
-
-    for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
-        xvmc->surfaces[i] = 0;
-        xvmc->sfprivs[i] = NULL;
-    }
-    xvmc->ncontexts = 0;
-    xvmc->nsurfaces = 0;
+	unsigned int i;
+
+	for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
+		xvmc->contexts[i] = 0;
+		xvmc->ctxprivs[i] = NULL;
+	}
+
+	for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
+		xvmc->surfaces[i] = 0;
+		xvmc->sfprivs[i] = NULL;
+	}
+	xvmc->ncontexts = 0;
+	xvmc->nsurfaces = 0;
 }
 
 static void cleanupI915XvMC(I915XvMCPtr xvmc)
 {
-    int i;
-
-    for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
-        xvmc->contexts[i] = 0;
-        if (xvmc->ctxprivs[i]) {
-            xfree(xvmc->ctxprivs[i]);
-            xvmc->ctxprivs[i] = NULL;
-        }
-    }
-
-    for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
-        xvmc->surfaces[i] = 0;
-        if (xvmc->sfprivs[i]) {
-            xfree(xvmc->sfprivs[i]);
-            xvmc->sfprivs[i] = NULL;
-        }
-    }
+	int i;
+
+	for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
+		xvmc->contexts[i] = 0;
+		if (xvmc->ctxprivs[i]) {
+			xfree(xvmc->ctxprivs[i]);
+			xvmc->ctxprivs[i] = NULL;
+		}
+	}
+
+	for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
+		xvmc->surfaces[i] = 0;
+		if (xvmc->sfprivs[i]) {
+			xfree(xvmc->sfprivs[i]);
+			xvmc->sfprivs[i] = NULL;
+		}
+	}
 }
 
-static Bool i915_map_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpriv)
+static Bool i915_map_xvmc_buffers(ScrnInfoPtr pScrn,
+				  I915XvMCContextPriv * ctxpriv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcStaticIndirectState->offset + pI830->LinearAddr),
-                  ctxpriv->mcStaticIndirectState->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->sis_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(sis_handle) failed!\n");
-        return FALSE;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcSamplerState->offset + pI830->LinearAddr),
-                  ctxpriv->mcSamplerState->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->ssb_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(ssb_handle) failed!\n");
-        return FALSE;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcMapState->offset + pI830->LinearAddr),
-                  ctxpriv->mcMapState->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->msb_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(msb_handle) failed!\n");
-        return FALSE;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcPixelShaderProgram->offset + pI830->LinearAddr),
-                  ctxpriv->mcPixelShaderProgram->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->psp_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(psp_handle) failed!\n");
-        return FALSE;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcPixelShaderConstants->offset + pI830->LinearAddr),
-                  ctxpriv->mcPixelShaderConstants->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->psc_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(psc_handle) failed!\n");
-        return FALSE;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(ctxpriv->mcCorrdata->offset + pI830->LinearAddr),
-                  ctxpriv->mcCorrdata->size, DRM_AGP, 0,
-                  (drmAddress)&ctxpriv->corrdata_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(corrdata_handle) failed!\n");
-        return FALSE;
-    }
-
-        
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcStaticIndirectState->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcStaticIndirectState->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->sis_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(sis_handle) failed!\n");
+		return FALSE;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcSamplerState->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcSamplerState->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->ssb_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(ssb_handle) failed!\n");
+		return FALSE;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcMapState->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcMapState->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->msb_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(msb_handle) failed!\n");
+		return FALSE;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcPixelShaderProgram->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcPixelShaderProgram->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->psp_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(psp_handle) failed!\n");
+		return FALSE;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcPixelShaderConstants->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcPixelShaderConstants->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->psc_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(psc_handle) failed!\n");
+		return FALSE;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (ctxpriv->mcCorrdata->offset +
+				      pI830->LinearAddr),
+		      ctxpriv->mcCorrdata->size, DRM_AGP, 0,
+		      (drmAddress) & ctxpriv->corrdata_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(corrdata_handle) failed!\n");
+		return FALSE;
+	}
+
+	return TRUE;
 }
 
-static void i915_unmap_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpriv)
+static void i915_unmap_xvmc_buffers(ScrnInfoPtr pScrn,
+				    I915XvMCContextPriv * ctxpriv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    
-    if (ctxpriv->sis_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->sis_handle);
-        ctxpriv->sis_handle = 0;
-    }
-
-    if (ctxpriv->ssb_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->ssb_handle);
-        ctxpriv->ssb_handle = 0;
-    }
-
-    if (ctxpriv->msb_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->msb_handle);
-        ctxpriv->msb_handle = 0;
-    }
-
-    if (ctxpriv->psp_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->psp_handle);
-        ctxpriv->psp_handle = 0;
-    }
-
-    if (ctxpriv->psc_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->psc_handle);
-        ctxpriv->psc_handle = 0;
-    }
-
-    if (ctxpriv->corrdata_handle) {
-        drmRmMap(pI830->drmSubFD, ctxpriv->corrdata_handle);
-        ctxpriv->corrdata_handle = 0;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+
+	if (ctxpriv->sis_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->sis_handle);
+		ctxpriv->sis_handle = 0;
+	}
+
+	if (ctxpriv->ssb_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->ssb_handle);
+		ctxpriv->ssb_handle = 0;
+	}
+
+	if (ctxpriv->msb_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->msb_handle);
+		ctxpriv->msb_handle = 0;
+	}
+
+	if (ctxpriv->psp_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->psp_handle);
+		ctxpriv->psp_handle = 0;
+	}
+
+	if (ctxpriv->psc_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->psc_handle);
+		ctxpriv->psc_handle = 0;
+	}
+
+	if (ctxpriv->corrdata_handle) {
+		drmRmMap(pI830->drmSubFD, ctxpriv->corrdata_handle);
+		ctxpriv->corrdata_handle = 0;
+	}
 
 }
 
-static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpriv)
+static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn,
+				       I915XvMCContextPriv * ctxpriv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int flags = ALIGN_BOTH_ENDS;
-
-    /* on 915G/GM, load indirect can only use physical address...sigh */
-    if (IS_I915G(pI830) || IS_I915GM(pI830))
-        flags |= NEED_PHYSICAL_ADDR;
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Static Indirect State",
-                                  &(ctxpriv->mcStaticIndirectState), 4 * 1024,
-                                  flags)) {
-        return FALSE;
-    }
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Sampler State",
-                                  &(ctxpriv->mcSamplerState), 4 * 1024,
-                                  flags)) {
-        return FALSE;
-    }
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Map State",
-                                  &(ctxpriv->mcMapState), 4 * 1024,
-                                  flags)) {
-        return FALSE;
-    }
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Pixel Shader Program",
-                                  &(ctxpriv->mcPixelShaderProgram), 4 * 1024,
-                                  flags)) {
-        return FALSE;
-    }
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Pixel Shader Constants",
-                                  &(ctxpriv->mcPixelShaderConstants), 4 * 1024,
-                                  flags)) {
-        return FALSE;
-    }
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Correction Data Buffer",
-                                   &(ctxpriv->mcCorrdata), 512 * 1024,
-                                   ALIGN_BOTH_ENDS)) {
-        return FALSE;
-    }
-
-    if (1)
-	i830_describe_allocations(pScrn, 1, "i915_mc: ");
-
-    return TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	int flags = ALIGN_BOTH_ENDS;
+
+	/* on 915G/GM, load indirect can only use physical address...sigh */
+	if (IS_I915G(pI830) || IS_I915GM(pI830))
+		flags |= NEED_PHYSICAL_ADDR;
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Static Indirect State",
+				       &(ctxpriv->mcStaticIndirectState),
+				       4 * 1024, flags)) {
+		return FALSE;
+	}
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Sampler State",
+				       &(ctxpriv->mcSamplerState), 4 * 1024,
+				       flags)) {
+		return FALSE;
+	}
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Map State",
+				       &(ctxpriv->mcMapState), 4 * 1024,
+				       flags)) {
+		return FALSE;
+	}
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Pixel Shader Program",
+				       &(ctxpriv->mcPixelShaderProgram),
+				       4 * 1024, flags)) {
+		return FALSE;
+	}
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Pixel Shader Constants",
+				       &(ctxpriv->mcPixelShaderConstants),
+				       4 * 1024, flags)) {
+		return FALSE;
+	}
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Correction Data Buffer",
+				       &(ctxpriv->mcCorrdata), 512 * 1024,
+				       ALIGN_BOTH_ENDS)) {
+		return FALSE;
+	}
+
+	if (1)
+		i830_describe_allocations(pScrn, 1, "i915_mc: ");
+
+	return TRUE;
 }
 
-static void i915_free_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpriv)
+static void i915_free_xvmc_buffers(ScrnInfoPtr pScrn,
+				   I915XvMCContextPriv * ctxpriv)
 {
-    if (ctxpriv->mcStaticIndirectState) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcStaticIndirectState);
-        ctxpriv->mcStaticIndirectState = NULL;
-    }
-
-    if (ctxpriv->mcSamplerState) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcSamplerState);
-        ctxpriv->mcSamplerState = NULL;
-    }
-
-    if (ctxpriv->mcMapState) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcMapState);
-        ctxpriv->mcMapState = NULL;
-    }
-
-    if (ctxpriv->mcPixelShaderProgram) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcPixelShaderProgram);
-        ctxpriv->mcPixelShaderProgram = NULL;
-    }
-
-    if (ctxpriv->mcPixelShaderConstants) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcPixelShaderConstants);
-        ctxpriv->mcPixelShaderConstants = NULL;
-    }
-
-    if (ctxpriv->mcCorrdata) {
-        i830_free_xvmc_buffer(pScrn, ctxpriv->mcCorrdata);
-        ctxpriv->mcCorrdata = NULL;
-    }
+	if (ctxpriv->mcStaticIndirectState) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcStaticIndirectState);
+		ctxpriv->mcStaticIndirectState = NULL;
+	}
+
+	if (ctxpriv->mcSamplerState) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcSamplerState);
+		ctxpriv->mcSamplerState = NULL;
+	}
+
+	if (ctxpriv->mcMapState) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcMapState);
+		ctxpriv->mcMapState = NULL;
+	}
+
+	if (ctxpriv->mcPixelShaderProgram) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcPixelShaderProgram);
+		ctxpriv->mcPixelShaderProgram = NULL;
+	}
+
+	if (ctxpriv->mcPixelShaderConstants) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcPixelShaderConstants);
+		ctxpriv->mcPixelShaderConstants = NULL;
+	}
+
+	if (ctxpriv->mcCorrdata) {
+		i830_free_xvmc_buffer(pScrn, ctxpriv->mcCorrdata);
+		ctxpriv->mcCorrdata = NULL;
+	}
 
 }
 
@@ -411,444 +412,457 @@ static void i915_free_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpr
  *
  **************************************************************************/
 
-static int i915_xvmc_create_context (ScrnInfoPtr pScrn, XvMCContextPtr pContext,
-                                  int *num_priv, long **priv )
+static int i915_xvmc_create_context(ScrnInfoPtr pScrn, XvMCContextPtr pContext,
+				    int *num_priv, long **priv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I915XvMCCreateContextRec *contextRec = NULL;
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    I915XvMCContextPriv *ctxpriv = NULL;
-    int i;
-
-    *priv = NULL;
-    *num_priv = 0;
-
-    if (!pI830->XvMCEnabled) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: XvMC disabled!\n");
-        return BadAlloc;
-    }
-
-    for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
-        if (!pXvMC->contexts[i])
-            break;
-    }
-
-    if (i == I915_XVMC_MAX_CONTEXTS ||
+	I830Ptr pI830 = I830PTR(pScrn);
+	I915XvMCCreateContextRec *contextRec = NULL;
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	I915XvMCContextPriv *ctxpriv = NULL;
+	int i;
+
+	*priv = NULL;
+	*num_priv = 0;
+
+	if (!pI830->XvMCEnabled) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: XvMC disabled!\n");
+		return BadAlloc;
+	}
+
+	for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
+		if (!pXvMC->contexts[i])
+			break;
+	}
+
+	if (i == I915_XVMC_MAX_CONTEXTS ||
 	    pXvMC->ncontexts >= I915_XVMC_MAX_CONTEXTS) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Out of contexts.\n");
-        return BadAlloc;
-    }
-
-    i915_check_context_size(pContext);
-
-    *priv = xcalloc(1, sizeof(I915XvMCCreateContextRec));
-    contextRec = (I915XvMCCreateContextRec *)*priv;
-
-    if (!*priv) {
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    *num_priv = sizeof(I915XvMCCreateContextRec) >> 2;
-
-    ctxpriv = (I915XvMCContextPriv *)xcalloc(1, sizeof(I915XvMCContextPriv));
-
-    if (!ctxpriv) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Unable to allocate memory!\n");
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    if (!i915_allocate_xvmc_buffers(pScrn, ctxpriv)) {
-        i915_free_xvmc_buffers(pScrn, ctxpriv);
-        xfree(ctxpriv);
-        ctxpriv = NULL;
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    if (!i915_map_xvmc_buffers(pScrn, ctxpriv)) {
-        i915_unmap_xvmc_buffers(pScrn, ctxpriv);
-        i915_free_xvmc_buffers(pScrn, ctxpriv);
-        xfree(ctxpriv);
-        ctxpriv = NULL;
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    /* common context items */
-    contextRec->comm.type = xvmc_driver->flag;
-    contextRec->comm.batchbuffer.offset = xvmc_driver->batch->offset;
-    contextRec->comm.batchbuffer.size = xvmc_driver->batch->size;
-    contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
-
-    /* i915 private context */
-    contextRec->ctxno = i;
-    contextRec->sis.handle = ctxpriv->sis_handle;
-    contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset;
-    contextRec->sis.size = ctxpriv->mcStaticIndirectState->size;
-    contextRec->ssb.handle = ctxpriv->ssb_handle;
-    contextRec->ssb.offset = ctxpriv->mcSamplerState->offset;
-    contextRec->ssb.size = ctxpriv->mcSamplerState->size;
-    contextRec->msb.handle = ctxpriv->msb_handle;
-    contextRec->msb.offset = ctxpriv->mcMapState->offset;
-    contextRec->msb.size = ctxpriv->mcMapState->size;
-    contextRec->psp.handle = ctxpriv->psp_handle;
-    contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->offset;
-    contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size;
-    contextRec->psc.handle = ctxpriv->psc_handle;
-    contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->offset;
-    contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size;
-    contextRec->corrdata.handle = ctxpriv->corrdata_handle;
-    contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset;
-    contextRec->corrdata.size = ctxpriv->mcCorrdata->size;
-    contextRec->deviceID = DEVICE_ID(pI830->PciInfo);
-
-    /* XXX: KMS */
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Out of contexts.\n");
+		return BadAlloc;
+	}
+
+	i915_check_context_size(pContext);
+
+	*priv = xcalloc(1, sizeof(I915XvMCCreateContextRec));
+	contextRec = (I915XvMCCreateContextRec *) * priv;
+
+	if (!*priv) {
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	*num_priv = sizeof(I915XvMCCreateContextRec) >> 2;
+
+	ctxpriv =
+	    (I915XvMCContextPriv *) xcalloc(1, sizeof(I915XvMCContextPriv));
+
+	if (!ctxpriv) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Unable to allocate memory!\n");
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	if (!i915_allocate_xvmc_buffers(pScrn, ctxpriv)) {
+		i915_free_xvmc_buffers(pScrn, ctxpriv);
+		xfree(ctxpriv);
+		ctxpriv = NULL;
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	if (!i915_map_xvmc_buffers(pScrn, ctxpriv)) {
+		i915_unmap_xvmc_buffers(pScrn, ctxpriv);
+		i915_free_xvmc_buffers(pScrn, ctxpriv);
+		xfree(ctxpriv);
+		ctxpriv = NULL;
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	/* common context items */
+	contextRec->comm.type = xvmc_driver->flag;
+	contextRec->comm.batchbuffer.offset = xvmc_driver->batch->offset;
+	contextRec->comm.batchbuffer.size = xvmc_driver->batch->size;
+	contextRec->comm.batchbuffer.handle = xvmc_driver->batch_handle;
+
+	/* i915 private context */
+	contextRec->ctxno = i;
+	contextRec->sis.handle = ctxpriv->sis_handle;
+	contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset;
+	contextRec->sis.size = ctxpriv->mcStaticIndirectState->size;
+	contextRec->ssb.handle = ctxpriv->ssb_handle;
+	contextRec->ssb.offset = ctxpriv->mcSamplerState->offset;
+	contextRec->ssb.size = ctxpriv->mcSamplerState->size;
+	contextRec->msb.handle = ctxpriv->msb_handle;
+	contextRec->msb.offset = ctxpriv->mcMapState->offset;
+	contextRec->msb.size = ctxpriv->mcMapState->size;
+	contextRec->psp.handle = ctxpriv->psp_handle;
+	contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->offset;
+	contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size;
+	contextRec->psc.handle = ctxpriv->psc_handle;
+	contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->offset;
+	contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size;
+	contextRec->corrdata.handle = ctxpriv->corrdata_handle;
+	contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset;
+	contextRec->corrdata.size = ctxpriv->mcCorrdata->size;
+	contextRec->deviceID = DEVICE_ID(pI830->PciInfo);
+
+	/* XXX: KMS */
 #if 0
-    if (IS_I915G(pI830) || IS_I915GM(pI830)) {
-	contextRec->sis.bus_addr = ctxpriv->mcStaticIndirectState->bus_addr;
-	contextRec->ssb.bus_addr = ctxpriv->mcSamplerState->bus_addr;
-	contextRec->msb.bus_addr = ctxpriv->mcMapState->bus_addr;
-	contextRec->psp.bus_addr = ctxpriv->mcPixelShaderProgram->bus_addr;
-	contextRec->psc.bus_addr = ctxpriv->mcPixelShaderConstants->bus_addr;
-    }
+	if (IS_I915G(pI830) || IS_I915GM(pI830)) {
+		contextRec->sis.bus_addr =
+		    ctxpriv->mcStaticIndirectState->bus_addr;
+		contextRec->ssb.bus_addr = ctxpriv->mcSamplerState->bus_addr;
+		contextRec->msb.bus_addr = ctxpriv->mcMapState->bus_addr;
+		contextRec->psp.bus_addr =
+		    ctxpriv->mcPixelShaderProgram->bus_addr;
+		contextRec->psc.bus_addr =
+		    ctxpriv->mcPixelShaderConstants->bus_addr;
+	}
 #endif
 
-    pXvMC->ncontexts++;
-    pXvMC->contexts[i] = pContext->context_id;
-    pXvMC->ctxprivs[i] = ctxpriv;
+	pXvMC->ncontexts++;
+	pXvMC->contexts[i] = pContext->context_id;
+	pXvMC->ctxprivs[i] = ctxpriv;
 
-    return Success;
+	return Success;
 }
 
-static int i915_xvmc_create_surface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf,
-                                 int *num_priv, long **priv )
+static int i915_xvmc_create_surface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf,
+				    int *num_priv, long **priv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    I915XvMCSurfacePriv *sfpriv = NULL;
-    I915XvMCCreateSurfaceRec *surfaceRec = NULL;
-    XvMCContextPtr ctx = NULL;
-    unsigned int srfno;
-    unsigned long bufsize;
-
-    if (!pI830->XvMCEnabled) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: XvMC disabled!\n");
-        return BadAlloc;
-    }
-
-    *priv = NULL;
-    *num_priv = 0;
-
-    for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
-        if (!pXvMC->surfaces[srfno])
-            break;
-    }
-
-    if (srfno == I915_XVMC_MAX_SURFACES ||
+	I830Ptr pI830 = I830PTR(pScrn);
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	I915XvMCSurfacePriv *sfpriv = NULL;
+	I915XvMCCreateSurfaceRec *surfaceRec = NULL;
+	XvMCContextPtr ctx = NULL;
+	unsigned int srfno;
+	unsigned long bufsize;
+
+	if (!pI830->XvMCEnabled) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: XvMC disabled!\n");
+		return BadAlloc;
+	}
+
+	*priv = NULL;
+	*num_priv = 0;
+
+	for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
+		if (!pXvMC->surfaces[srfno])
+			break;
+	}
+
+	if (srfno == I915_XVMC_MAX_SURFACES ||
 	    pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Too many surfaces !\n");
-        return BadAlloc;
-    }
-
-    *priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
-    surfaceRec = (I915XvMCCreateSurfaceRec *)*priv;
-
-    if (!*priv) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915:Unable to allocate surface priv ret memory!\n");
-        return BadAlloc;
-    }
-
-    *num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
-    sfpriv = (I915XvMCSurfacePriv *)xcalloc(1, sizeof(I915XvMCSurfacePriv));
-
-    if (!sfpriv) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Unable to allocate surface priv memory!\n");
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    ctx = pSurf->context;
-    bufsize = SIZE_YUV420(ctx->width, ctx->height);
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "XvMC surface",
-                                   &(sfpriv->surface), bufsize,
-                                   ALIGN_BOTH_ENDS)) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915 : Failed to allocate XvMC surface space!\n");
-        xfree(sfpriv);
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    if (0)
-	i830_describe_allocations(pScrn, 1, "");
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(sfpriv->surface->offset + pI830->LinearAddr),
-                  sfpriv->surface->size, DRM_AGP, 0,
-                  (drmAddress)&sfpriv->surface_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(surface_handle) failed!\n");
-        i830_free_xvmc_buffer(pScrn, sfpriv->surface);
-        xfree(sfpriv);
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    surfaceRec->srfno = srfno;
-    surfaceRec->srf.handle = sfpriv->surface_handle;
-    surfaceRec->srf.offset = sfpriv->surface->offset;
-    surfaceRec->srf.size = sfpriv->surface->size;
-
-    pXvMC->surfaces[srfno] = pSurf->surface_id;
-    pXvMC->sfprivs[srfno]= sfpriv;
-    pXvMC->nsurfaces++;
-
-    return Success;
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Too many surfaces !\n");
+		return BadAlloc;
+	}
+
+	*priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
+	surfaceRec = (I915XvMCCreateSurfaceRec *) * priv;
+
+	if (!*priv) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915:Unable to allocate surface priv ret memory!\n");
+		return BadAlloc;
+	}
+
+	*num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
+	sfpriv =
+	    (I915XvMCSurfacePriv *) xcalloc(1, sizeof(I915XvMCSurfacePriv));
+
+	if (!sfpriv) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Unable to allocate surface priv memory!\n");
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	ctx = pSurf->context;
+	bufsize = SIZE_YUV420(ctx->width, ctx->height);
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "XvMC surface",
+				       &(sfpriv->surface), bufsize,
+				       ALIGN_BOTH_ENDS)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915 : Failed to allocate XvMC surface space!\n");
+		xfree(sfpriv);
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	if (0)
+		i830_describe_allocations(pScrn, 1, "");
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (sfpriv->surface->offset +
+				      pI830->LinearAddr), sfpriv->surface->size,
+		      DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(surface_handle) failed!\n");
+		i830_free_xvmc_buffer(pScrn, sfpriv->surface);
+		xfree(sfpriv);
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	surfaceRec->srfno = srfno;
+	surfaceRec->srf.handle = sfpriv->surface_handle;
+	surfaceRec->srf.offset = sfpriv->surface->offset;
+	surfaceRec->srf.size = sfpriv->surface->size;
+
+	pXvMC->surfaces[srfno] = pSurf->surface_id;
+	pXvMC->sfprivs[srfno] = sfpriv;
+	pXvMC->nsurfaces++;
+
+	return Success;
 }
 
 static int i915_xvmc_create_subpict(ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp,
-                                     int *num_priv, long **priv )
+				    int *num_priv, long **priv)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    I915XvMCSurfacePriv *sfpriv = NULL;
-    I915XvMCCreateSurfaceRec *surfaceRec = NULL;
-    XvMCContextPtr ctx = NULL;
-    unsigned int srfno;
-    unsigned int bufsize;
-
-    *priv = NULL;
-    *num_priv = 0;
-
-    for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
-        if (!pXvMC->surfaces[srfno])
-            break;
-    }
-
-    if (srfno == I915_XVMC_MAX_SURFACES ||
+	I830Ptr pI830 = I830PTR(pScrn);
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	I915XvMCSurfacePriv *sfpriv = NULL;
+	I915XvMCCreateSurfaceRec *surfaceRec = NULL;
+	XvMCContextPtr ctx = NULL;
+	unsigned int srfno;
+	unsigned int bufsize;
+
+	*priv = NULL;
+	*num_priv = 0;
+
+	for (srfno = 0; srfno < I915_XVMC_MAX_SURFACES; ++srfno) {
+		if (!pXvMC->surfaces[srfno])
+			break;
+	}
+
+	if (srfno == I915_XVMC_MAX_SURFACES ||
 	    pXvMC->nsurfaces >= I915_XVMC_MAX_SURFACES) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Too many surfaces !\n");
-        return BadAlloc;
-    }
-
-    *priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
-    surfaceRec = (I915XvMCCreateSurfaceRec *)*priv;     
-
-    if (!*priv) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Unable to allocate memory!\n");
-        return BadAlloc;
-    }
-
-    *num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
-    sfpriv = (I915XvMCSurfacePriv *)xcalloc(1, sizeof(I915XvMCSurfacePriv));
-
-    if (!sfpriv) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] i915: Unable to allocate memory!\n");
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    ctx = pSubp->context;
-    bufsize = SIZE_XX44(ctx->width, ctx->height);
-
-    if (!i830_allocate_xvmc_buffer(pScrn, "XvMC surface", 
-                                   &(sfpriv->surface), bufsize,
-                                   ALIGN_BOTH_ENDS)) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[XvMC] I915XvMCCreateSurface: Failed to allocate XvMC surface space!\n");
-        xfree(sfpriv);
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    if (drmAddMap(pI830->drmSubFD,
-                  (drm_handle_t)(sfpriv->surface->offset + pI830->LinearAddr),
-                  sfpriv->surface->size, DRM_AGP, 0,
-                  (drmAddress)&sfpriv->surface_handle) < 0) {
-        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                   "[drm] drmAddMap(surface_handle) failed!\n");
-        i830_free_xvmc_buffer(pScrn, sfpriv->surface);
-        xfree(sfpriv);
-        xfree(*priv);
-        *priv = NULL;
-        *num_priv = 0;
-        return BadAlloc;
-    }
-
-    surfaceRec->srfno = srfno;
-    surfaceRec->srf.handle = sfpriv->surface_handle;
-    surfaceRec->srf.offset = sfpriv->surface->offset;
-    surfaceRec->srf.size = sfpriv->surface->size;
-
-    pXvMC->sfprivs[srfno] = sfpriv;
-    pXvMC->surfaces[srfno] = pSubp->subpicture_id;
-    pXvMC->nsurfaces++;
-
-    return Success;
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Too many surfaces !\n");
+		return BadAlloc;
+	}
+
+	*priv = xcalloc(1, sizeof(I915XvMCCreateSurfaceRec));
+	surfaceRec = (I915XvMCCreateSurfaceRec *) * priv;
+
+	if (!*priv) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Unable to allocate memory!\n");
+		return BadAlloc;
+	}
+
+	*num_priv = sizeof(I915XvMCCreateSurfaceRec) >> 2;
+	sfpriv =
+	    (I915XvMCSurfacePriv *) xcalloc(1, sizeof(I915XvMCSurfacePriv));
+
+	if (!sfpriv) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] i915: Unable to allocate memory!\n");
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	ctx = pSubp->context;
+	bufsize = SIZE_XX44(ctx->width, ctx->height);
+
+	if (!i830_allocate_xvmc_buffer(pScrn, "XvMC surface",
+				       &(sfpriv->surface), bufsize,
+				       ALIGN_BOTH_ENDS)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[XvMC] I915XvMCCreateSurface: Failed to allocate XvMC surface space!\n");
+		xfree(sfpriv);
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	if (drmAddMap(pI830->drmSubFD,
+		      (drm_handle_t) (sfpriv->surface->offset +
+				      pI830->LinearAddr), sfpriv->surface->size,
+		      DRM_AGP, 0, (drmAddress) & sfpriv->surface_handle) < 0) {
+		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+			   "[drm] drmAddMap(surface_handle) failed!\n");
+		i830_free_xvmc_buffer(pScrn, sfpriv->surface);
+		xfree(sfpriv);
+		xfree(*priv);
+		*priv = NULL;
+		*num_priv = 0;
+		return BadAlloc;
+	}
+
+	surfaceRec->srfno = srfno;
+	surfaceRec->srf.handle = sfpriv->surface_handle;
+	surfaceRec->srf.offset = sfpriv->surface->offset;
+	surfaceRec->srf.size = sfpriv->surface->size;
+
+	pXvMC->sfprivs[srfno] = sfpriv;
+	pXvMC->surfaces[srfno] = pSubp->subpicture_id;
+	pXvMC->nsurfaces++;
+
+	return Success;
 }
 
-static void i915_xvmc_destroy_context (ScrnInfoPtr pScrn,
-					XvMCContextPtr pContext)
+static void i915_xvmc_destroy_context(ScrnInfoPtr pScrn,
+				      XvMCContextPtr pContext)
 {
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    int i;
-
-    for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
-        if (pXvMC->contexts[i] == pContext->context_id) {
-            i915_unmap_xvmc_buffers(pScrn, pXvMC->ctxprivs[i]);
-            i915_free_xvmc_buffers(pScrn, pXvMC->ctxprivs[i]);
-            xfree(pXvMC->ctxprivs[i]);
-            pXvMC->ctxprivs[i] = 0;
-            pXvMC->ncontexts--;
-            pXvMC->contexts[i] = 0;
-            return;
-        }
-    }
-
-    return;
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	int i;
+
+	for (i = 0; i < I915_XVMC_MAX_CONTEXTS; i++) {
+		if (pXvMC->contexts[i] == pContext->context_id) {
+			i915_unmap_xvmc_buffers(pScrn, pXvMC->ctxprivs[i]);
+			i915_free_xvmc_buffers(pScrn, pXvMC->ctxprivs[i]);
+			xfree(pXvMC->ctxprivs[i]);
+			pXvMC->ctxprivs[i] = 0;
+			pXvMC->ncontexts--;
+			pXvMC->contexts[i] = 0;
+			return;
+		}
+	}
+
+	return;
 }
 
-static void i915_xvmc_destroy_surface (ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf)
+static void i915_xvmc_destroy_surface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    int i;
-
-    for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
-        if (pXvMC->surfaces[i] == pSurf->surface_id) {
-            drmRmMap(pI830->drmSubFD, pXvMC->sfprivs[i]->surface_handle);
-            i830_free_xvmc_buffer(pScrn, pXvMC->sfprivs[i]->surface);
-            xfree(pXvMC->sfprivs[i]);
-            pXvMC->nsurfaces--;
-            pXvMC->sfprivs[i] = 0;
-            pXvMC->surfaces[i] = 0;
-            return;
-        }
-    }
-
-    return;
+	I830Ptr pI830 = I830PTR(pScrn);
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	int i;
+
+	for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
+		if (pXvMC->surfaces[i] == pSurf->surface_id) {
+			drmRmMap(pI830->drmSubFD,
+				 pXvMC->sfprivs[i]->surface_handle);
+			i830_free_xvmc_buffer(pScrn,
+					      pXvMC->sfprivs[i]->surface);
+			xfree(pXvMC->sfprivs[i]);
+			pXvMC->nsurfaces--;
+			pXvMC->sfprivs[i] = 0;
+			pXvMC->surfaces[i] = 0;
+			return;
+		}
+	}
+
+	return;
 }
 
-static void i915_xvmc_destroy_subpict (ScrnInfoPtr pScrn,
-					XvMCSubpicturePtr pSubp)
+static void i915_xvmc_destroy_subpict(ScrnInfoPtr pScrn,
+				      XvMCSubpicturePtr pSubp)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    int i;
-
-    for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
-        if (pXvMC->surfaces[i] == pSubp->subpicture_id) {
-            drmRmMap(pI830->drmSubFD, pXvMC->sfprivs[i]->surface_handle);
-            i830_free_xvmc_buffer(pScrn, pXvMC->sfprivs[i]->surface);
-            xfree(pXvMC->sfprivs[i]);
-            pXvMC->nsurfaces--;
-            pXvMC->sfprivs[i] = 0;
-            pXvMC->surfaces[i] = 0;
-            return;
-        }
-    }
-
-    return;
+	I830Ptr pI830 = I830PTR(pScrn);
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	int i;
+
+	for (i = 0; i < I915_XVMC_MAX_SURFACES; i++) {
+		if (pXvMC->surfaces[i] == pSubp->subpicture_id) {
+			drmRmMap(pI830->drmSubFD,
+				 pXvMC->sfprivs[i]->surface_handle);
+			i830_free_xvmc_buffer(pScrn,
+					      pXvMC->sfprivs[i]->surface);
+			xfree(pXvMC->sfprivs[i]);
+			pXvMC->nsurfaces--;
+			pXvMC->sfprivs[i] = 0;
+			pXvMC->surfaces[i] = 0;
+			return;
+		}
+	}
+
+	return;
 }
 
 static int i915_xvmc_put_image(ScrnInfoPtr pScrn,
-	short src_x, short src_y,
-	short drw_x, short drw_y, short src_w,
-	short src_h, short drw_w, short drw_h,
-	int id, unsigned char *buf, short width,
-	short height, Bool sync, RegionPtr clipBoxes, pointer data,
-	DrawablePtr pDraw)
+			       short src_x, short src_y,
+			       short drw_x, short drw_y, short src_w,
+			       short src_h, short drw_w, short drw_h,
+			       int id, unsigned char *buf, short width,
+			       short height, Bool sync, RegionPtr clipBoxes,
+			       pointer data, DrawablePtr pDraw)
 {
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
-    struct intel_xvmc_command *xvmc_cmd = (struct intel_xvmc_command *)buf;
-    int ret;
-
-    if (FOURCC_XVMC == id) {
-	switch (xvmc_cmd->command) {
-	    case INTEL_XVMC_COMMAND_DISPLAY:
-		if ((xvmc_cmd->srfNo >= I915_XVMC_MAX_SURFACES) ||
-			!pXvMC->surfaces[xvmc_cmd->srfNo] ||
-			!pXvMC->sfprivs[xvmc_cmd->srfNo]) {
-		    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-			    "[XvMC] i915 put image: Invalid parameters!\n");
-		    return 1;
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
+	struct intel_xvmc_command *xvmc_cmd = (struct intel_xvmc_command *)buf;
+	int ret;
+
+	if (FOURCC_XVMC == id) {
+		switch (xvmc_cmd->command) {
+		case INTEL_XVMC_COMMAND_DISPLAY:
+			if ((xvmc_cmd->srfNo >= I915_XVMC_MAX_SURFACES) ||
+			    !pXvMC->surfaces[xvmc_cmd->srfNo] ||
+			    !pXvMC->sfprivs[xvmc_cmd->srfNo]) {
+				xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+					   "[XvMC] i915 put image: Invalid parameters!\n");
+				return 1;
+			}
+
+			/* use char *buf to hold our surface offset...hacky! */
+			buf =
+			    (unsigned char *)pXvMC->sfprivs[xvmc_cmd->srfNo]->
+			    surface->offset;
+			break;
+		default:
+			return 0;
 		}
-
-		/* use char *buf to hold our surface offset...hacky! */
-		buf = (unsigned char *)pXvMC->sfprivs[xvmc_cmd->srfNo]->surface->offset;
-		break;
-	    default:
-		return 0;
 	}
-    }
 
-    ret = pXvMC->savePutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h,
-                        drw_w, drw_h, id, buf, width, height, sync, clipBoxes,
-			data, pDraw);
-    return ret;
+	ret =
+	    pXvMC->savePutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h,
+				drw_w, drw_h, id, buf, width, height, sync,
+				clipBoxes, data, pDraw);
+	return ret;
 }
 
 static Bool i915_xvmc_init(ScrnInfoPtr pScrn, XF86VideoAdaptorPtr XvAdapt)
 {
-    I915XvMCPtr pXvMC;
-
-    pXvMC = (I915XvMCPtr)xcalloc(1, sizeof(I915XvMC));
-    if (!pXvMC) {
-        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-                   "[XvMC] alloc driver private failed!\n");
-        return FALSE;
-    }
-    xvmc_driver->devPrivate = (void*)pXvMC;
-    if (!intel_xvmc_init_batch(pScrn)) {
-        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-		"[XvMC] fail to init batch buffer\n");
-	xfree(pXvMC);
-	return FALSE;
-    }
-    initI915XvMC(pXvMC);
-
-    /* set up wrappers */
-    pXvMC->savePutImage = XvAdapt->PutImage;
-    XvAdapt->PutImage = i915_xvmc_put_image;
-    return TRUE;
+	I915XvMCPtr pXvMC;
+
+	pXvMC = (I915XvMCPtr) xcalloc(1, sizeof(I915XvMC));
+	if (!pXvMC) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "[XvMC] alloc driver private failed!\n");
+		return FALSE;
+	}
+	xvmc_driver->devPrivate = (void *)pXvMC;
+	if (!intel_xvmc_init_batch(pScrn)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "[XvMC] fail to init batch buffer\n");
+		xfree(pXvMC);
+		return FALSE;
+	}
+	initI915XvMC(pXvMC);
+
+	/* set up wrappers */
+	pXvMC->savePutImage = XvAdapt->PutImage;
+	XvAdapt->PutImage = i915_xvmc_put_image;
+	return TRUE;
 }
 
 static void i915_xvmc_fini(ScrnInfoPtr pScrn)
 {
-    I915XvMCPtr pXvMC = (I915XvMCPtr)xvmc_driver->devPrivate;
+	I915XvMCPtr pXvMC = (I915XvMCPtr) xvmc_driver->devPrivate;
 
-    cleanupI915XvMC(pXvMC);
-    intel_xvmc_fini_batch(pScrn);
-    xfree(xvmc_driver->devPrivate);
+	cleanupI915XvMC(pXvMC);
+	intel_xvmc_fini_batch(pScrn);
+	xfree(xvmc_driver->devPrivate);
 }
 
 /* Fill in the device dependent adaptor record.
@@ -858,30 +872,35 @@ static void i915_xvmc_fini(ScrnInfoPtr pScrn)
  * Surface and Subpicture - see above
  * Function pointers to functions below
  */
-static XF86MCAdaptorRec pAdapt =
-{
-    .name		= "Intel(R) Textured Video",
-    .num_surfaces	= ARRAY_SIZE(ppSI),
-    .surfaces		= ppSI,
+static XF86MCAdaptorRec pAdapt = {
+	.name = "Intel(R) Textured Video",
+	.num_surfaces = ARRAY_SIZE(ppSI),
+	.surfaces = ppSI,
 #if 0
-    .num_subpictures	= ARRARY_SIZE(i915_subpicture_list),
-    .subpictures	= i915_subpicture_list,
+	.num_subpictures = ARRARY_SIZE(i915_subpicture_list),
+	.subpictures = i915_subpicture_list,
 #endif
-    .num_subpictures	= 0,
-    .subpictures	= NULL,
-    .CreateContext	= (xf86XvMCCreateContextProcPtr) i915_xvmc_create_context,
-    .DestroyContext	= (xf86XvMCDestroyContextProcPtr) i915_xvmc_destroy_context,
-    .CreateSurface	= (xf86XvMCCreateSurfaceProcPtr) i915_xvmc_create_surface,
-    .DestroySurface	= (xf86XvMCDestroySurfaceProcPtr) i915_xvmc_destroy_surface,
-    .CreateSubpicture	= (xf86XvMCCreateSubpictureProcPtr) i915_xvmc_create_subpict,
-    .DestroySubpicture	= (xf86XvMCDestroySubpictureProcPtr) i915_xvmc_destroy_subpict,
+	.num_subpictures = 0,
+	.subpictures = NULL,
+	.CreateContext =
+	    (xf86XvMCCreateContextProcPtr) i915_xvmc_create_context,
+	.DestroyContext =
+	    (xf86XvMCDestroyContextProcPtr) i915_xvmc_destroy_context,
+	.CreateSurface =
+	    (xf86XvMCCreateSurfaceProcPtr) i915_xvmc_create_surface,
+	.DestroySurface =
+	    (xf86XvMCDestroySurfaceProcPtr) i915_xvmc_destroy_surface,
+	.CreateSubpicture =
+	    (xf86XvMCCreateSubpictureProcPtr) i915_xvmc_create_subpict,
+	.DestroySubpicture =
+	    (xf86XvMCDestroySubpictureProcPtr) i915_xvmc_destroy_subpict,
 };
 
 /* new xvmc driver interface */
 struct intel_xvmc_driver i915_xvmc_driver = {
-    .name		= "i915_xvmc",
-    .adaptor		= &pAdapt,
-    .flag		= XVMC_I915_MPEG2_MC,
-    .init		= i915_xvmc_init,
-    .fini		= i915_xvmc_fini,
+	.name = "i915_xvmc",
+	.adaptor = &pAdapt,
+	.flag = XVMC_I915_MPEG2_MC,
+	.init = i915_xvmc_init,
+	.fini = i915_xvmc_fini,
 };
diff --git a/src/i915_hwmc.h b/src/i915_hwmc.h
index abd3171e..59940ea1 100644
--- a/src/i915_hwmc.h
+++ b/src/i915_hwmc.h
@@ -39,23 +39,21 @@
 #define I915_NUM_XVMC_ATTRIBUTES       0x02
 #define I915_XVMC_VALID 0x80000000
 
-typedef struct
-{
-    struct _intel_xvmc_common comm;
-    unsigned int ctxno; /* XvMC private context reference number */
-    struct hwmc_buffer sis;
-    struct hwmc_buffer ssb;
-    struct hwmc_buffer msb;
-    struct hwmc_buffer psp;
-    struct hwmc_buffer psc;
-    struct hwmc_buffer corrdata;/* Correction Data Buffer */
-    int deviceID;
+typedef struct {
+	struct _intel_xvmc_common comm;
+	unsigned int ctxno;	/* XvMC private context reference number */
+	struct hwmc_buffer sis;
+	struct hwmc_buffer ssb;
+	struct hwmc_buffer msb;
+	struct hwmc_buffer psp;
+	struct hwmc_buffer psc;
+	struct hwmc_buffer corrdata;	/* Correction Data Buffer */
+	int deviceID;
 } I915XvMCCreateContextRec;
 
-typedef struct 
-{
-    unsigned int srfno;
-    struct hwmc_buffer srf;
+typedef struct {
+	unsigned int srfno;
+	struct hwmc_buffer srf;
 } I915XvMCCreateSurfaceRec;
 
 #endif /* _I915_HWMC_H */
diff --git a/src/i915_reg.h b/src/i915_reg.h
index 4340de93..a61bc401 100644
--- a/src/i915_reg.h
+++ b/src/i915_reg.h
@@ -25,7 +25,6 @@
  * 
  **************************************************************************/
 
-
 #ifndef _I915_REG_H_
 #define _I915_REG_H_
 
@@ -78,7 +77,6 @@
 #define BFO_ENABLE_STENCIL_TWO_SIDE     (1<<1)
 #define BFO_STENCIL_TWO_SIDE            (1<<0)
 
-
 /* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */
 #define _3DSTATE_BACKFACE_STENCIL_MASKS    (CMD_3D | (0x9<<24))
 #define BFM_ENABLE_STENCIL_TEST_MASK      (1<<17)
@@ -88,8 +86,6 @@
 #define BFM_STENCIL_WRITE_MASK_SHIFT      0
 #define BFM_STENCIL_WRITE_MASK_MASK       (0xff<<0)
 
-
-
 /* 3DSTATE_BIN_CONTROL p141 */
 
 /* p143 */
@@ -105,7 +101,6 @@
 /* Dword 2 */
 #define BUF_3D_ADDR(x)		((x) & ~0x3)
 
-
 /* 3DSTATE_CHROMA_KEY */
 
 /* 3DSTATE_CLEAR_PARAMETERS, p150 */
@@ -120,8 +115,6 @@
 /* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */
 #define _3DSTATE_CONST_BLEND_COLOR_CMD	(CMD_3D | (0x1d<<24) | (0x88<<16))
 
-
-
 /* 3DSTATE_COORD_SET_BINDINGS, p154 */
 #define _3DSTATE_COORD_SET_BINDINGS      (CMD_3D | (0x16<<24))
 #define CSB_TCB(iunit, eunit)           ((eunit)<<(iunit*3))
@@ -135,7 +128,6 @@
 /* p158 */
 #define _3DSTATE_DFLT_Z_CMD		(CMD_3D | (0x1d<<24) | (0x98<<16))
 
-
 /* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */
 #define _3DSTATE_DEPTH_OFFSET_SCALE       (CMD_3D | (0x1d<<24) | (0x97<<16))
 /* scale in dword 1 */
@@ -195,12 +187,10 @@
 #define DRAW_YORG(x)			((x)<<16)
 #define DRAW_XORG(x)			(x)
 
-
 /* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */
 
 /* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */
 
-
 /* _3DSTATE_FOG_COLOR, p173 */
 #define _3DSTATE_FOG_COLOR_CMD		(CMD_3D|(0x15<<24))
 #define FOG_COLOR_RED(x)		((x)<<16)
@@ -228,8 +218,6 @@
 /* Dword 3 */
 #define FMC3_D_ONE      		(1<<16)
 
-
-
 /* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */
 #define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD	(CMD_3D|(0x0b<<24))
 #define IAB_MODIFY_ENABLE	        (1<<23)
@@ -306,10 +294,6 @@
 #define PSC0_BUFFER_VALID               (1<<0)
 #define PSC1_BUFFER_LENGTH(x)           ((x)&0xff)
 
-
-
-
-
 /* _3DSTATE_RASTERIZATION_RULES */
 #define _3DSTATE_RASTER_RULES_CMD	(CMD_3D|(0x07<<24))
 #define ENABLE_POINT_RASTER_RULE	(1<<15)
@@ -409,7 +393,6 @@
 		      S4_VFMT_XYZW_MASK     |	\
 		      S4_VFMT_FOG_PARAM)
 
-
 #define S5_WRITEDISABLE_ALPHA          (1<<31)
 #define S5_WRITEDISABLE_RED            (1<<30)
 #define S5_WRITEDISABLE_GREEN          (1<<29)
@@ -434,7 +417,6 @@
 #define S5_COLOR_DITHER_ENABLE         (1<<1)
 #define S5_LOGICOP_ENABLE              (1<<0)
 
-
 #define S6_ALPHA_TEST_ENABLE           (1<<31)
 #define S6_ALPHA_TEST_FUNC_SHIFT       28
 #define S6_ALPHA_TEST_FUNC_MASK        (0x7<<28)
@@ -460,7 +442,6 @@
 /* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */
 /* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */
 
-
 /* _3DSTATE_MODES_4, p218 */
 #define _3DSTATE_MODES_4_CMD		(CMD_3D|(0x0d<<24))
 #define ENABLE_LOGIC_OP_FUNC		(1<<23)
@@ -479,7 +460,6 @@
 #define PIPELINE_FLUSH_RENDER_CACHE	(1<<18)
 #define PIPELINE_FLUSH_TEXTURE_CACHE	(1<<16)
 
-
 /* p221 */
 #define _3DSTATE_PIXEL_SHADER_CONSTANTS  (CMD_3D|(0x1d<<24)|(0x6<<16))
 #define PS1_REG(n)                      (1<<(n))
@@ -490,51 +470,48 @@
 
 /* p222 */
 
-
 #define I915_MAX_TEX_INDIRECT 4
-#define I915_MAX_TEX_INSN     32     
+#define I915_MAX_TEX_INSN     32
 #define I915_MAX_ALU_INSN     64
 #define I915_MAX_DECL_INSN    27
 #define I915_MAX_TEMPORARY    16
 
-
 /* Each instruction is 3 dwords long, though most don't require all
  * this space.  Maximum of 123 instructions.  Smaller maxes per insn
  * type.
  */
 #define _3DSTATE_PIXEL_SHADER_PROGRAM    (CMD_3D|(0x1d<<24)|(0x5<<16))
 
-#define REG_TYPE_R                 0 /* temporary regs, no need to
-				      * dcl, must be written before
-				      * read -- Preserved between
-				      * phases. 
-				      */
-#define REG_TYPE_T                 1 /* Interpolated values, must be
-				      * dcl'ed before use.
-				      *
-				      * 0..7: texture coord,
-				      * 8: diffuse spec,
-				      * 9: specular color,
-				      * 10: fog parameter in w.
-				      */
-#define REG_TYPE_CONST             2 /* Restriction: only one const
-				      * can be referenced per
-				      * instruction, though it may be
-				      * selected for multiple inputs.
-				      * Constants not initialized
-				      * default to zero.
-				      */
-#define REG_TYPE_S                 3 /* sampler */
-#define REG_TYPE_OC                4 /* output color (rgba) */
-#define REG_TYPE_OD                5 /* output depth (w), xyz are
-				      * temporaries.  If not written,
-				      * interpolated depth is used?
-				      */
-#define REG_TYPE_U                 6 /* unpreserved temporaries */
+#define REG_TYPE_R                 0	/* temporary regs, no need to
+					 * dcl, must be written before
+					 * read -- Preserved between
+					 * phases.
+					 */
+#define REG_TYPE_T                 1	/* Interpolated values, must be
+					 * dcl'ed before use.
+					 *
+					 * 0..7: texture coord,
+					 * 8: diffuse spec,
+					 * 9: specular color,
+					 * 10: fog parameter in w.
+					 */
+#define REG_TYPE_CONST             2	/* Restriction: only one const
+					 * can be referenced per
+					 * instruction, though it may be
+					 * selected for multiple inputs.
+					 * Constants not initialized
+					 * default to zero.
+					 */
+#define REG_TYPE_S                 3	/* sampler */
+#define REG_TYPE_OC                4	/* output color (rgba) */
+#define REG_TYPE_OD                5	/* output depth (w), xyz are
+					 * temporaries.  If not written,
+					 * interpolated depth is used?
+					 */
+#define REG_TYPE_U                 6	/* unpreserved temporaries */
 #define REG_TYPE_MASK              0x7
 #define REG_NR_MASK                0xf
 
-
 /* REG_TYPE_T:
  */
 #define T_TEX0     0
@@ -552,29 +529,29 @@
 /* Arithmetic instructions */
 
 /* .replicate_swizzle == selection and replication of a particular
- * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww 
+ * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
  */
-#define A0_NOP    (0x0<<24)		/* no operation */
-#define A0_ADD    (0x1<<24)		/* dst = src0 + src1 */
-#define A0_MOV    (0x2<<24)		/* dst = src0 */
-#define A0_MUL    (0x3<<24)		/* dst = src0 * src1 */
-#define A0_MAD    (0x4<<24)		/* dst = src0 * src1 + src2 */
-#define A0_DP2ADD (0x5<<24)		/* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
-#define A0_DP3    (0x6<<24)		/* dst.xyzw = src0.xyz dot src1.xyz */
-#define A0_DP4    (0x7<<24)		/* dst.xyzw = src0.xyzw dot src1.xyzw */
-#define A0_FRC    (0x8<<24)		/* dst = src0 - floor(src0) */
-#define A0_RCP    (0x9<<24)		/* dst.xyzw = 1/(src0.replicate_swizzle) */
-#define A0_RSQ    (0xa<<24)		/* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
-#define A0_EXP    (0xb<<24)		/* dst.xyzw = exp2(src0.replicate_swizzle) */
-#define A0_LOG    (0xc<<24)		/* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
-#define A0_CMP    (0xd<<24)		/* dst = (src0 >= 0.0) ? src1 : src2 */
-#define A0_MIN    (0xe<<24)		/* dst = (src0 < src1) ? src0 : src1 */
-#define A0_MAX    (0xf<<24)		/* dst = (src0 >= src1) ? src0 : src1 */
-#define A0_FLR    (0x10<<24)		/* dst = floor(src0) */
-#define A0_MOD    (0x11<<24)		/* dst = src0 fmod 1.0 */
-#define A0_TRC    (0x12<<24)		/* dst = int(src0) */
-#define A0_SGE    (0x13<<24)		/* dst = src0 >= src1 ? 1.0 : 0.0 */
-#define A0_SLT    (0x14<<24)		/* dst = src0 < src1 ? 1.0 : 0.0 */
+#define A0_NOP    (0x0<<24)	/* no operation */
+#define A0_ADD    (0x1<<24)	/* dst = src0 + src1 */
+#define A0_MOV    (0x2<<24)	/* dst = src0 */
+#define A0_MUL    (0x3<<24)	/* dst = src0 * src1 */
+#define A0_MAD    (0x4<<24)	/* dst = src0 * src1 + src2 */
+#define A0_DP2ADD (0x5<<24)	/* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
+#define A0_DP3    (0x6<<24)	/* dst.xyzw = src0.xyz dot src1.xyz */
+#define A0_DP4    (0x7<<24)	/* dst.xyzw = src0.xyzw dot src1.xyzw */
+#define A0_FRC    (0x8<<24)	/* dst = src0 - floor(src0) */
+#define A0_RCP    (0x9<<24)	/* dst.xyzw = 1/(src0.replicate_swizzle) */
+#define A0_RSQ    (0xa<<24)	/* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
+#define A0_EXP    (0xb<<24)	/* dst.xyzw = exp2(src0.replicate_swizzle) */
+#define A0_LOG    (0xc<<24)	/* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
+#define A0_CMP    (0xd<<24)	/* dst = (src0 >= 0.0) ? src1 : src2 */
+#define A0_MIN    (0xe<<24)	/* dst = (src0 < src1) ? src0 : src1 */
+#define A0_MAX    (0xf<<24)	/* dst = (src0 >= src1) ? src0 : src1 */
+#define A0_FLR    (0x10<<24)	/* dst = floor(src0) */
+#define A0_MOD    (0x11<<24)	/* dst = src0 fmod 1.0 */
+#define A0_TRC    (0x12<<24)	/* dst = int(src0) */
+#define A0_SGE    (0x13<<24)	/* dst = src0 >= src1 ? 1.0 : 0.0 */
+#define A0_SLT    (0x14<<24)	/* dst = src0 < src1 ? 1.0 : 0.0 */
 #define A0_DEST_SATURATE                 (1<<22)
 #define A0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
@@ -592,7 +569,6 @@
 #define A0_DEST_CHANNEL_XY              (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y)
 #define A0_DEST_CHANNEL_XYZ             (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z)
 
-
 #define SRC_X        0
 #define SRC_Y        1
 #define SRC_Z        2
@@ -630,8 +606,6 @@
 #define A2_SRC2_CHANNEL_W_NEGATE         (1<<3)
 #define A2_SRC2_CHANNEL_W_SHIFT          0
 
-
-
 /* Texture instructions */
 #define T0_TEXLD     (0x15<<24)	/* Sample texture using predeclared
 				 * sampler and address, and output
@@ -653,18 +627,18 @@
 #define T0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
 /* Note: U (unpreserved) regs do not retain their values between
- * phases (cannot be used for feedback) 
+ * phases (cannot be used for feedback)
  *
  * Note: oC and OD registers can only be used as the destination of a
  * texture instruction once per phase (this is an implementation
- * restriction). 
+ * restriction).
  */
 #define T0_DEST_NR_SHIFT                 14
 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
-#define T0_SAMPLER_NR_SHIFT              0 /* This field ignored for TEXKILL */
+#define T0_SAMPLER_NR_SHIFT              0	/* This field ignored for TEXKILL */
 #define T0_SAMPLER_NR_MASK               (0xf<<0)
 
-#define T1_ADDRESS_REG_TYPE_SHIFT        24 /* Reg to use as texture coord */
+#define T1_ADDRESS_REG_TYPE_SHIFT        24	/* Reg to use as texture coord */
 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
 #define T1_ADDRESS_REG_NR_SHIFT          17
 #define T2_MBZ                           0
@@ -694,17 +668,15 @@
 #define D0_CHANNEL_XYZ              (D0_CHANNEL_XY|D0_CHANNEL_Z)
 
 /* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse
- * or specular declarations. 
+ * or specular declarations.
  *
- * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) 
+ * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw)
  *
  * Must be zero for S (sampler) dcls
  */
 #define D1_MBZ                          0
 #define D2_MBZ                          0
 
-
-
 /* p207.
  * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK
  */
@@ -731,12 +703,12 @@
 #define    MAPSURF_4BIT_INDEXED		   (7<<7)
 #define MS3_MT_FORMAT_MASK         (0x7 << 3)
 #define MS3_MT_FORMAT_SHIFT        3
-#define    MT_4BIT_IDX_ARGB8888	           (7<<3) /* SURFACE_4BIT_INDEXED */
-#define    MT_8BIT_I8		           (0<<3) /* SURFACE_8BIT */
+#define    MT_4BIT_IDX_ARGB8888	           (7<<3)	/* SURFACE_4BIT_INDEXED */
+#define    MT_8BIT_I8		           (0<<3)	/* SURFACE_8BIT */
 #define    MT_8BIT_L8		           (1<<3)
 #define    MT_8BIT_A8		           (4<<3)
 #define    MT_8BIT_MONO8	           (5<<3)
-#define    MT_16BIT_RGB565 		   (0<<3) /* SURFACE_16BIT */
+#define    MT_16BIT_RGB565 		   (0<<3)	/* SURFACE_16BIT */
 #define    MT_16BIT_ARGB1555		   (1<<3)
 #define    MT_16BIT_ARGB4444		   (2<<3)
 #define    MT_16BIT_AY88		   (3<<3)
@@ -745,7 +717,7 @@
 #define    MT_16BIT_I16	                   (7<<3)
 #define    MT_16BIT_L16	                   (8<<3)
 #define    MT_16BIT_A16	                   (9<<3)
-#define    MT_32BIT_ARGB8888		   (0<<3) /* SURFACE_32BIT */
+#define    MT_32BIT_ARGB8888		   (0<<3)	/* SURFACE_32BIT */
 #define    MT_32BIT_ABGR8888		   (1<<3)
 #define    MT_32BIT_XRGB8888		   (2<<3)
 #define    MT_32BIT_XBGR8888		   (3<<3)
@@ -761,11 +733,11 @@
 #define    MT_32BIT_xI824	           (0xD<<3)
 #define    MT_32BIT_xA824	           (0xE<<3)
 #define    MT_32BIT_xL824	           (0xF<<3)
-#define    MT_422_YCRCB_SWAPY	           (0<<3) /* SURFACE_422 */
+#define    MT_422_YCRCB_SWAPY	           (0<<3)	/* SURFACE_422 */
 #define    MT_422_YCRCB_NORMAL	           (1<<3)
 #define    MT_422_YCRCB_SWAPUV	           (2<<3)
 #define    MT_422_YCRCB_SWAPUVY	           (3<<3)
-#define    MT_COMPRESS_DXT1		   (0<<3) /* SURFACE_COMPRESSED */
+#define    MT_COMPRESS_DXT1		   (0<<3)	/* SURFACE_COMPRESSED */
 #define    MT_COMPRESS_DXT2_3	           (1<<3)
 #define    MT_COMPRESS_DXT4_5	           (2<<3)
 #define    MT_COMPRESS_FXT1		   (3<<3)
@@ -788,7 +760,7 @@
 #define MS4_MIP_LAYOUT_LEGACY           (0<<8)
 #define MS4_MIP_LAYOUT_BELOW_LPT        (0<<8)
 #define MS4_MIP_LAYOUT_RIGHT_LPT        (1<<8)
-#define MS4_VOLUME_DEPTH_SHIFT          0    
+#define MS4_VOLUME_DEPTH_SHIFT          0
 #define MS4_VOLUME_DEPTH_MASK           (0xff<<0)
 
 /* p244.
@@ -818,7 +790,7 @@
 #define   FILTER_4X4_1    	3
 #define   FILTER_4X4_2    	4
 #define   FILTER_4X4_FLAT 	5
-#define   FILTER_6X5_MONO   	6 /* XXX - check */
+#define   FILTER_6X5_MONO   	6	/* XXX - check */
 #define SS2_MIN_FILTER_SHIFT          14
 #define SS2_MIN_FILTER_MASK           (0x7<<14)
 #define SS2_LOD_BIAS_SHIFT            5
@@ -865,9 +837,7 @@
 #define ST1_ENABLE               (1<<16)
 #define ST1_MASK                 (0xffff)
 
-
 #define FLUSH_MAP_CACHE    (1<<0)
 #define FLUSH_RENDER_CACHE (1<<1)
 
-
 #endif
diff --git a/src/i915_render.c b/src/i915_render.c
index a4c27688..5a578ab0 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -36,280 +36,283 @@
 #include "i915_3d.h"
 
 struct formatinfo {
-    int fmt;
-    uint32_t card_fmt;
+	int fmt;
+	uint32_t card_fmt;
 };
 
 struct blendinfo {
-    Bool dst_alpha;
-    Bool src_alpha;
-    uint32_t src_blend;
-    uint32_t dst_blend;
+	Bool dst_alpha;
+	Bool src_alpha;
+	uint32_t src_blend;
+	uint32_t dst_blend;
 };
 
 static struct blendinfo i915_blend_op[] = {
-    /* Clear */
-    {0, 0, BLENDFACT_ZERO,          BLENDFACT_ZERO},
-    /* Src */
-    {0, 0, BLENDFACT_ONE,           BLENDFACT_ZERO},
-    /* Dst */
-    {0, 0, BLENDFACT_ZERO,          BLENDFACT_ONE},
-    /* Over */
-    {0, 1, BLENDFACT_ONE,           BLENDFACT_INV_SRC_ALPHA},
-    /* OverReverse */
-    {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE},
-    /* In */
-    {1, 0, BLENDFACT_DST_ALPHA,     BLENDFACT_ZERO},
-    /* InReverse */
-    {0, 1, BLENDFACT_ZERO,          BLENDFACT_SRC_ALPHA},
-    /* Out */
-    {1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO},
-    /* OutReverse */
-    {0, 1, BLENDFACT_ZERO,          BLENDFACT_INV_SRC_ALPHA},
-    /* Atop */
-    {1, 1, BLENDFACT_DST_ALPHA,     BLENDFACT_INV_SRC_ALPHA},
-    /* AtopReverse */
-    {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA},
-    /* Xor */
-    {1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
-    /* Add */
-    {0, 0, BLENDFACT_ONE,           BLENDFACT_ONE},
+	/* Clear */
+	{0, 0, BLENDFACT_ZERO, BLENDFACT_ZERO},
+	/* Src */
+	{0, 0, BLENDFACT_ONE, BLENDFACT_ZERO},
+	/* Dst */
+	{0, 0, BLENDFACT_ZERO, BLENDFACT_ONE},
+	/* Over */
+	{0, 1, BLENDFACT_ONE, BLENDFACT_INV_SRC_ALPHA},
+	/* OverReverse */
+	{1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ONE},
+	/* In */
+	{1, 0, BLENDFACT_DST_ALPHA, BLENDFACT_ZERO},
+	/* InReverse */
+	{0, 1, BLENDFACT_ZERO, BLENDFACT_SRC_ALPHA},
+	/* Out */
+	{1, 0, BLENDFACT_INV_DST_ALPHA, BLENDFACT_ZERO},
+	/* OutReverse */
+	{0, 1, BLENDFACT_ZERO, BLENDFACT_INV_SRC_ALPHA},
+	/* Atop */
+	{1, 1, BLENDFACT_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
+	/* AtopReverse */
+	{1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_SRC_ALPHA},
+	/* Xor */
+	{1, 1, BLENDFACT_INV_DST_ALPHA, BLENDFACT_INV_SRC_ALPHA},
+	/* Add */
+	{0, 0, BLENDFACT_ONE, BLENDFACT_ONE},
 };
 
 static struct formatinfo i915_tex_formats[] = {
-    {PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888 },
-    {PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888 },
-    {PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888 },
-    {PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888 },
-    {PICT_r5g6b5,   MAPSURF_16BIT | MT_16BIT_RGB565   },
-    {PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
-    {PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555 },
-    {PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
-    {PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444 },
-    {PICT_a8,       MAPSURF_8BIT | MT_8BIT_A8 	  },
+	{PICT_a8r8g8b8, MAPSURF_32BIT | MT_32BIT_ARGB8888},
+	{PICT_x8r8g8b8, MAPSURF_32BIT | MT_32BIT_XRGB8888},
+	{PICT_a8b8g8r8, MAPSURF_32BIT | MT_32BIT_ABGR8888},
+	{PICT_x8b8g8r8, MAPSURF_32BIT | MT_32BIT_XBGR8888},
+	{PICT_r5g6b5, MAPSURF_16BIT | MT_16BIT_RGB565},
+	{PICT_a1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555},
+	{PICT_x1r5g5b5, MAPSURF_16BIT | MT_16BIT_ARGB1555},
+	{PICT_a4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444},
+	{PICT_x4r4g4b4, MAPSURF_16BIT | MT_16BIT_ARGB4444},
+	{PICT_a8, MAPSURF_8BIT | MT_8BIT_A8},
 };
 
 static uint32_t i915_get_blend_cntl(int op, PicturePtr pMask,
 				    uint32_t dst_format)
 {
-    uint32_t sblend, dblend;
-
-    sblend = i915_blend_op[op].src_blend;
-    dblend = i915_blend_op[op].dst_blend;
-
-    /* If there's no dst alpha channel, adjust the blend op so that we'll treat
-     * it as always 1.
-     */
-    if (PICT_FORMAT_A(dst_format) == 0 && i915_blend_op[op].dst_alpha) {
-        if (sblend == BLENDFACT_DST_ALPHA)
-            sblend = BLENDFACT_ONE;
-        else if (sblend == BLENDFACT_INV_DST_ALPHA)
-            sblend = BLENDFACT_ZERO;
-    }
-
-    /* i915 engine reads 8bit color buffer into green channel in cases
-       like color buffer blending .etc, and also writes back green channel.
-       So with dst_alpha blend we should use color factor. See spec on
-       "8-bit rendering" */
-    if ((dst_format == PICT_a8) && i915_blend_op[op].dst_alpha) {
-        if (sblend == BLENDFACT_DST_ALPHA)
-            sblend = BLENDFACT_DST_COLR;
-        else if (sblend == BLENDFACT_INV_DST_ALPHA)
-            sblend = BLENDFACT_INV_DST_COLR;
-    }
-
-    /* If the source alpha is being used, then we should only be in a case
-     * where the source blend factor is 0, and the source blend value is the
-     * mask channels multiplied by the source picture's alpha.
-     */
-    if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) &&
-	i915_blend_op[op].src_alpha)
-    {
-        if (dblend == BLENDFACT_SRC_ALPHA) {
-	    dblend = BLENDFACT_SRC_COLR;
-        } else if (dblend == BLENDFACT_INV_SRC_ALPHA) {
-	    dblend = BLENDFACT_INV_SRC_COLR;
-        }
-    }
-
-    return (sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
-	(dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
+	uint32_t sblend, dblend;
+
+	sblend = i915_blend_op[op].src_blend;
+	dblend = i915_blend_op[op].dst_blend;
+
+	/* If there's no dst alpha channel, adjust the blend op so that we'll
+	 * treat it as always 1.
+	 */
+	if (PICT_FORMAT_A(dst_format) == 0 && i915_blend_op[op].dst_alpha) {
+		if (sblend == BLENDFACT_DST_ALPHA)
+			sblend = BLENDFACT_ONE;
+		else if (sblend == BLENDFACT_INV_DST_ALPHA)
+			sblend = BLENDFACT_ZERO;
+	}
+
+	/* i915 engine reads 8bit color buffer into green channel in cases
+	   like color buffer blending .etc, and also writes back green channel.
+	   So with dst_alpha blend we should use color factor. See spec on
+	   "8-bit rendering" */
+	if ((dst_format == PICT_a8) && i915_blend_op[op].dst_alpha) {
+		if (sblend == BLENDFACT_DST_ALPHA)
+			sblend = BLENDFACT_DST_COLR;
+		else if (sblend == BLENDFACT_INV_DST_ALPHA)
+			sblend = BLENDFACT_INV_DST_COLR;
+	}
+
+	/* If the source alpha is being used, then we should only be in a case
+	 * where the source blend factor is 0, and the source blend value is the
+	 * mask channels multiplied by the source picture's alpha.
+	 */
+	if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) &&
+	    i915_blend_op[op].src_alpha) {
+		if (dblend == BLENDFACT_SRC_ALPHA) {
+			dblend = BLENDFACT_SRC_COLR;
+		} else if (dblend == BLENDFACT_INV_SRC_ALPHA) {
+			dblend = BLENDFACT_INV_SRC_COLR;
+		}
+	}
+
+	return (sblend << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
+	    (dblend << S6_CBUF_DST_BLEND_FACT_SHIFT);
 }
 
-static Bool i915_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
+static Bool i915_get_dest_format(PicturePtr pDstPicture, uint32_t * dst_format)
 {
-    switch (pDstPicture->format) {
-    case PICT_a8r8g8b8:
-    case PICT_x8r8g8b8:
-        *dst_format = COLR_BUF_ARGB8888;
-        break;
-    case PICT_r5g6b5:
-        *dst_format = COLR_BUF_RGB565;
-        break;
-    case PICT_a1r5g5b5:
-    case PICT_x1r5g5b5:
-        *dst_format = COLR_BUF_ARGB1555;
-        break;
-    case PICT_a8:
-        *dst_format = COLR_BUF_8BIT;
-        break;
-    case PICT_a4r4g4b4:
-    case PICT_x4r4g4b4:
-	*dst_format = COLR_BUF_ARGB4444;
-	break;
-    default:
-	{
-	    ScrnInfoPtr pScrn;
+	switch (pDstPicture->format) {
+	case PICT_a8r8g8b8:
+	case PICT_x8r8g8b8:
+		*dst_format = COLR_BUF_ARGB8888;
+		break;
+	case PICT_r5g6b5:
+		*dst_format = COLR_BUF_RGB565;
+		break;
+	case PICT_a1r5g5b5:
+	case PICT_x1r5g5b5:
+		*dst_format = COLR_BUF_ARGB1555;
+		break;
+	case PICT_a8:
+		*dst_format = COLR_BUF_8BIT;
+		break;
+	case PICT_a4r4g4b4:
+	case PICT_x4r4g4b4:
+		*dst_format = COLR_BUF_ARGB4444;
+		break;
+	default:
+		{
+			ScrnInfoPtr pScrn;
+
+			pScrn =
+			    xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+			I830FALLBACK("Unsupported dest format 0x%x\n",
+				     (int)pDstPicture->format);
+		}
+	}
+	return TRUE;
+}
 
-	    pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-	    I830FALLBACK("Unsupported dest format 0x%x\n",
-			 (int)pDstPicture->format);
+static Bool i915_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict,
+					 int unit)
+{
+	if (pPict->repeatType > RepeatReflect)
+		I830FALLBACK("Unsupported picture repeat %d\n",
+			     pPict->repeatType);
+
+	if (pPict->filter != PictFilterNearest &&
+	    pPict->filter != PictFilterBilinear)
+		I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+
+	if (pPict->pDrawable) {
+		int w, h, i;
+
+		w = pPict->pDrawable->width;
+		h = pPict->pDrawable->height;
+		if ((w > 2048) || (h > 2048))
+			I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+
+		for (i = 0;
+		     i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]);
+		     i++) {
+			if (i915_tex_formats[i].fmt == pPict->format)
+				break;
+		}
+		if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]))
+			I830FALLBACK("Unsupported picture format 0x%x\n",
+				     (int)pPict->format);
 	}
-    }
-    return TRUE;
+
+	return TRUE;
 }
 
-static Bool i915_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict, int unit)
+Bool
+i915_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
+		     PicturePtr pDstPicture)
 {
-    if (pPict->repeatType > RepeatReflect)
-        I830FALLBACK("Unsupported picture repeat %d\n", pPict->repeatType);
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+	uint32_t tmp1;
+
+	/* Check for unsupported compositing operations. */
+	if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0]))
+		I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+	if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
+	    PICT_FORMAT_RGB(pMaskPicture->format)) {
+		/* Check if it's component alpha that relies on a source alpha
+		 * and on the source value.  We can only get one of those
+		 * into the single source value that we get to blend with.
+		 */
+		if (i915_blend_op[op].src_alpha &&
+		    (i915_blend_op[op].src_blend != BLENDFACT_ZERO))
+			I830FALLBACK("Component alpha not supported with "
+				     "source alpha and source value "
+				     "blending.\n");
+	}
+
+	if (!i915_check_composite_texture(pScrn, pSrcPicture, 0))
+		I830FALLBACK("Check Src picture texture\n");
+	if (pMaskPicture != NULL
+	    && !i915_check_composite_texture(pScrn, pMaskPicture, 1))
+		I830FALLBACK("Check Mask picture texture\n");
 
-    if (pPict->filter != PictFilterNearest &&
-        pPict->filter != PictFilterBilinear)
-        I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+	if (!i915_get_dest_format(pDstPicture, &tmp1))
+		I830FALLBACK("Get Color buffer format\n");
 
-    if (pPict->pDrawable)
-    {
+	return TRUE;
+}
+
+static Bool i915_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
+{
+	ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	uint32_t format, pitch, filter;
 	int w, h, i;
+	uint32_t wrap_mode;
 
+	pitch = intel_get_pixmap_pitch(pPix);
 	w = pPict->pDrawable->width;
 	h = pPict->pDrawable->height;
-	if ((w > 2048) || (h > 2048))
-	    I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+	pI830->scale_units[unit][0] = pPix->drawable.width;
+	pI830->scale_units[unit][1] = pPix->drawable.height;
 
 	for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]);
-	     i++)
-	{
-	    if (i915_tex_formats[i].fmt == pPict->format)
-		break;
+	     i++) {
+		if (i915_tex_formats[i].fmt == pPict->format)
+			break;
 	}
 	if (i == sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]))
-	    I830FALLBACK("Unsupported picture format 0x%x\n",
-			 (int)pPict->format);
-    }
+		I830FALLBACK("unknown texture format\n");
+	format = i915_tex_formats[i].card_fmt;
 
-    return TRUE;
-}
+	switch (pPict->repeatType) {
+	case RepeatNone:
+		wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
+		break;
+	case RepeatNormal:
+		wrap_mode = TEXCOORDMODE_WRAP;
+		break;
+	case RepeatPad:
+		wrap_mode = TEXCOORDMODE_CLAMP_EDGE;
+		break;
+	case RepeatReflect:
+		wrap_mode = TEXCOORDMODE_MIRROR;
+		break;
+	default:
+		FatalError("Unknown repeat type %d\n", pPict->repeatType);
+	}
 
-Bool
-i915_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
-		     PicturePtr pDstPicture)
-{
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-    uint32_t tmp1;
-
-    /* Check for unsupported compositing operations. */
-    if (op >= sizeof(i915_blend_op) / sizeof(i915_blend_op[0]))
-        I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-    if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
-	PICT_FORMAT_RGB(pMaskPicture->format))
-    {
-        /* Check if it's component alpha that relies on a source alpha and on
-         * the source value.  We can only get one of those into the single
-         * source value that we get to blend with.
-         */
-        if (i915_blend_op[op].src_alpha &&
-            (i915_blend_op[op].src_blend != BLENDFACT_ZERO))
-            	I830FALLBACK("Component alpha not supported with source "
-			     "alpha and source value blending.\n");
-    }
-
-    if (!i915_check_composite_texture(pScrn, pSrcPicture, 0))
-        I830FALLBACK("Check Src picture texture\n");
-    if (pMaskPicture != NULL && !i915_check_composite_texture(pScrn, pMaskPicture, 1))
-        I830FALLBACK("Check Mask picture texture\n");
-
-    if (!i915_get_dest_format(pDstPicture, &tmp1))
-	I830FALLBACK("Get Color buffer format\n");
-
-    return TRUE;
-}
+	switch (pPict->filter) {
+	case PictFilterNearest:
+		filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) |
+		    (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
+		break;
+	case PictFilterBilinear:
+		filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+		    (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
+		break;
+	default:
+		filter = 0;
+		I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
+	}
 
-static Bool
-i915_texture_setup(PicturePtr pPict, PixmapPtr pPix, int unit)
-{
-    ScrnInfoPtr pScrn = xf86Screens[pPict->pDrawable->pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    uint32_t format, pitch, filter;
-    int w, h, i;
-    uint32_t wrap_mode;
-
-    pitch = intel_get_pixmap_pitch(pPix);
-    w = pPict->pDrawable->width;
-    h = pPict->pDrawable->height;
-    pI830->scale_units[unit][0] = pPix->drawable.width;
-    pI830->scale_units[unit][1] = pPix->drawable.height;
-
-    for (i = 0; i < sizeof(i915_tex_formats) / sizeof(i915_tex_formats[0]);
-	 i++)
-    {
-        if (i915_tex_formats[i].fmt == pPict->format)
-	    break;
-    }
-    if (i == sizeof(i915_tex_formats)/ sizeof(i915_tex_formats[0]))
-	I830FALLBACK("unknown texture format\n");
-    format = i915_tex_formats[i].card_fmt;
-
-    switch (pPict->repeatType) {
-    case RepeatNone:
-	wrap_mode = TEXCOORDMODE_CLAMP_BORDER;
-	break;
-    case RepeatNormal:
-	wrap_mode = TEXCOORDMODE_WRAP;
-	break;
-    case RepeatPad:
-	wrap_mode = TEXCOORDMODE_CLAMP_EDGE;
-	break;
-    case RepeatReflect:
-	wrap_mode = TEXCOORDMODE_MIRROR;
-	break;
-    default:
-	FatalError("Unknown repeat type %d\n", pPict->repeatType);
-    }
-
-    switch (pPict->filter) {
-    case PictFilterNearest:
-        filter = (FILTER_NEAREST << SS2_MAG_FILTER_SHIFT) |
-	    (FILTER_NEAREST << SS2_MIN_FILTER_SHIFT);
-        break;
-    case PictFilterBilinear:
-        filter = (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
-	    (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT);
-        break;
-    default:
-	filter = 0;
-        I830FALLBACK("Bad filter 0x%x\n", pPict->filter);
-    }
-
-    pI830->mapstate[unit * 3 + 0] = 0; /* offset filled in at emit time */
-    pI830->mapstate[unit * 3 + 1] = format |
-	MS3_USE_FENCE_REGS |
-	((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
-	((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
-    pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
-
-    pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
-					 SS2_MIP_FILTER_SHIFT);
-    pI830->samplerstate[unit * 3 + 0] |= filter;
-    pI830->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS;
-    pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCX_ADDR_MODE_SHIFT;
-    pI830->samplerstate[unit * 3 + 1] |= wrap_mode << SS3_TCY_ADDR_MODE_SHIFT;
-    pI830->samplerstate[unit * 3 + 1] |= unit << SS3_TEXTUREMAP_INDEX_SHIFT;
-    pI830->samplerstate[unit * 3 + 2] = 0x00000000; /* border color */
-
-    pI830->transform[unit] = pPict->transform;
-
-    return TRUE;
+	/* offset filled in at emit time */
+	pI830->mapstate[unit * 3 + 0] = 0;
+	pI830->mapstate[unit * 3 + 1] = format |
+	    MS3_USE_FENCE_REGS |
+	    ((pPix->drawable.height - 1) << MS3_HEIGHT_SHIFT) |
+	    ((pPix->drawable.width - 1) << MS3_WIDTH_SHIFT);
+	pI830->mapstate[unit * 3 + 2] = ((pitch / 4) - 1) << MS4_PITCH_SHIFT;
+
+	pI830->samplerstate[unit * 3 + 0] = (MIPFILTER_NONE <<
+					     SS2_MIP_FILTER_SHIFT);
+	pI830->samplerstate[unit * 3 + 0] |= filter;
+	pI830->samplerstate[unit * 3 + 1] = SS3_NORMALIZED_COORDS;
+	pI830->samplerstate[unit * 3 + 1] |=
+	    wrap_mode << SS3_TCX_ADDR_MODE_SHIFT;
+	pI830->samplerstate[unit * 3 + 1] |=
+	    wrap_mode << SS3_TCY_ADDR_MODE_SHIFT;
+	pI830->samplerstate[unit * 3 + 1] |= unit << SS3_TEXTUREMAP_INDEX_SHIFT;
+	pI830->samplerstate[unit * 3 + 2] = 0x00000000;	/* border color */
+
+	pI830->transform[unit] = pPict->transform;
+
+	return TRUE;
 }
 
 Bool
@@ -317,237 +320,245 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
 		       PicturePtr pMaskPicture, PicturePtr pDstPicture,
 		       PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    drm_intel_bo *bo_table[] = {
-	NULL, /* batch_bo */
-	i830_get_pixmap_bo(pSrc),
-	pMask ? i830_get_pixmap_bo(pMask) : NULL,
-	i830_get_pixmap_bo(pDst),
-    };
-
-    pI830->render_src_picture = pSrcPicture;
-    pI830->render_src = pSrc;
-    pI830->render_mask_picture = pMaskPicture;
-    pI830->render_mask = pMask;
-    pI830->render_dst_picture = pDstPicture;
-    pI830->render_dst = pDst;
-
-    i830_exa_check_pitch_3d(pSrc);
-    if (pMask)
-	i830_exa_check_pitch_3d(pMask);
-    i830_exa_check_pitch_3d(pDst);
-
-    if (!i915_get_dest_format(pDstPicture,
-			      &pI830->i915_render_state.dst_format))
-	return FALSE;
-
-    if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
-	return FALSE;
-
-    if (!i915_texture_setup(pSrcPicture, pSrc, 0))
-	I830FALLBACK("fail to setup src texture\n");
-
-    pI830->dst_coord_adjust = 0;
-    pI830->src_coord_adjust = 0;
-    pI830->mask_coord_adjust = 0;
-    if (pSrcPicture->filter == PictFilterNearest)
-	pI830->dst_coord_adjust = -0.125;
-    if (pMask != NULL) {
-	if (!i915_texture_setup(pMaskPicture, pMask, 1))
-	    I830FALLBACK("fail to setup mask texture\n");
-
-	if (pMaskPicture->filter == PictFilterNearest)
-	    pI830->dst_coord_adjust = -0.125;
-    } else {
-	pI830->transform[1] = NULL;
-	pI830->scale_units[1][0] = -1;
-	pI830->scale_units[1][1] = -1;
-    }
-
-    pI830->i915_render_state.op = op;
-    pI830->i915_render_state.needs_emit = TRUE;
-
-    return TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pSrcPicture->pDrawable->pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	drm_intel_bo *bo_table[] = {
+		NULL,		/* batch_bo */
+		i830_get_pixmap_bo(pSrc),
+		pMask ? i830_get_pixmap_bo(pMask) : NULL,
+		i830_get_pixmap_bo(pDst),
+	};
+
+	pI830->render_src_picture = pSrcPicture;
+	pI830->render_src = pSrc;
+	pI830->render_mask_picture = pMaskPicture;
+	pI830->render_mask = pMask;
+	pI830->render_dst_picture = pDstPicture;
+	pI830->render_dst = pDst;
+
+	i830_exa_check_pitch_3d(pSrc);
+	if (pMask)
+		i830_exa_check_pitch_3d(pMask);
+	i830_exa_check_pitch_3d(pDst);
+
+	if (!i915_get_dest_format(pDstPicture,
+				  &pI830->i915_render_state.dst_format))
+		return FALSE;
+
+	if (!i830_get_aperture_space(pScrn, bo_table, ARRAY_SIZE(bo_table)))
+		return FALSE;
+
+	if (!i915_texture_setup(pSrcPicture, pSrc, 0))
+		I830FALLBACK("fail to setup src texture\n");
+
+	pI830->dst_coord_adjust = 0;
+	pI830->src_coord_adjust = 0;
+	pI830->mask_coord_adjust = 0;
+	if (pSrcPicture->filter == PictFilterNearest)
+		pI830->dst_coord_adjust = -0.125;
+	if (pMask != NULL) {
+		if (!i915_texture_setup(pMaskPicture, pMask, 1))
+			I830FALLBACK("fail to setup mask texture\n");
+
+		if (pMaskPicture->filter == PictFilterNearest)
+			pI830->dst_coord_adjust = -0.125;
+	} else {
+		pI830->transform[1] = NULL;
+		pI830->scale_units[1][0] = -1;
+		pI830->scale_units[1][1] = -1;
+	}
+
+	pI830->i915_render_state.op = op;
+	pI830->i915_render_state.needs_emit = TRUE;
+
+	return TRUE;
 }
 
-static void
-i915_emit_composite_setup(ScrnInfoPtr pScrn)
+static void i915_emit_composite_setup(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int op = pI830->i915_render_state.op;
-    PicturePtr pSrcPicture = pI830->render_src_picture;
-    PicturePtr pMaskPicture = pI830->render_mask_picture;
-    PicturePtr pDstPicture = pI830->render_dst_picture;
-    PixmapPtr pSrc = pI830->render_src;
-    PixmapPtr pMask = pI830->render_mask;
-    PixmapPtr pDst = pI830->render_dst;
-    uint32_t dst_format = pI830->i915_render_state.dst_format, dst_pitch;
-    uint32_t blendctl;
-    int out_reg = FS_OC;
-    FS_LOCALS(20);
-    Bool is_affine_src, is_affine_mask;
-
-    pI830->i915_render_state.needs_emit = FALSE;
-
-    IntelEmitInvarientState(pScrn);
-    pI830->last_3d = LAST_3D_RENDER;
-
-    dst_pitch = intel_get_pixmap_pitch(pDst);
-
-    is_affine_src = i830_transform_is_affine (pI830->transform[0]);
-    is_affine_mask = i830_transform_is_affine (pI830->transform[1]);
-
-    if (pMask == NULL) {
-	BEGIN_BATCH(10);
-	OUT_BATCH(_3DSTATE_MAP_STATE | 3);
-	OUT_BATCH(0x00000001); /* map 0 */
-	OUT_RELOC_PIXMAP(pSrc, I915_GEM_DOMAIN_SAMPLER, 0, 0);
-	OUT_BATCH(pI830->mapstate[1]);
-	OUT_BATCH(pI830->mapstate[2]);
-
-	OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3);
-	OUT_BATCH(0x00000001); /* sampler 0 */
-	OUT_BATCH(pI830->samplerstate[0]);
-	OUT_BATCH(pI830->samplerstate[1]);
-	OUT_BATCH(pI830->samplerstate[2]);
-	ADVANCE_BATCH();
-    } else {
-	BEGIN_BATCH(16);
-	OUT_BATCH(_3DSTATE_MAP_STATE | 6);
-	OUT_BATCH(0x00000003); /* map 0,1 */
-	OUT_RELOC_PIXMAP(pSrc, I915_GEM_DOMAIN_SAMPLER, 0, 0);
-	OUT_BATCH(pI830->mapstate[1]);
-	OUT_BATCH(pI830->mapstate[2]);
-	OUT_RELOC_PIXMAP(pMask, I915_GEM_DOMAIN_SAMPLER, 0, 0);
-	OUT_BATCH(pI830->mapstate[4]);
-	OUT_BATCH(pI830->mapstate[5]);
-
-	OUT_BATCH(_3DSTATE_SAMPLER_STATE | 6);
-	OUT_BATCH(0x00000003); /* sampler 0,1 */
-	OUT_BATCH(pI830->samplerstate[0]);
-	OUT_BATCH(pI830->samplerstate[1]);
-	OUT_BATCH(pI830->samplerstate[2]);
-	OUT_BATCH(pI830->samplerstate[3]);
-	OUT_BATCH(pI830->samplerstate[4]);
-	OUT_BATCH(pI830->samplerstate[5]);
-	ADVANCE_BATCH();
-    }
-    {
-	uint32_t ss2;
-
-	BEGIN_BATCH(16);
-	OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
-	OUT_BATCH(BUF_3D_ID_COLOR_BACK| BUF_3D_USE_FENCE|
-		  BUF_3D_PITCH(dst_pitch));
-	OUT_RELOC_PIXMAP(pDst, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-
-	OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
-	OUT_BATCH(dst_format);
-
-	OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
-		  I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
-	ss2 = S2_TEXCOORD_FMT(0, is_affine_src ? TEXCOORDFMT_2D : TEXCOORDFMT_4D);
-	if (pMask)
-		ss2 |= S2_TEXCOORD_FMT(1, is_affine_mask ? TEXCOORDFMT_2D : TEXCOORDFMT_4D);
-	else
-		ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT);
-	ss2 |= S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT);
-	OUT_BATCH(ss2);
-	OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
-		  S4_CULLMODE_NONE| S4_VFMT_XY);
-	blendctl = i915_get_blend_cntl(op, pMaskPicture, pDstPicture->format);
-	OUT_BATCH(0x00000000); /* Disable stencil buffer */
-	OUT_BATCH(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
-		  (BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) | blendctl);
-
-	/* draw rect is unconditional */
-	OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
-	OUT_BATCH(0x00000000);
-	OUT_BATCH(0x00000000);  /* ymin, xmin*/
-	OUT_BATCH(DRAW_YMAX(pDst->drawable.height - 1) |
-		  DRAW_XMAX(pDst->drawable.width - 1));
-	OUT_BATCH(0x00000000);  /* yorig, xorig (relate to color buffer?)*/
-	OUT_BATCH(MI_NOOP);
-	ADVANCE_BATCH();
-    }
-
-    if (dst_format == COLR_BUF_8BIT)
-	out_reg = FS_U0;
-
-    FS_BEGIN();
-
-    /* Declare the registers necessary for our program.  I don't think the
-     * S then T ordering is necessary.
-     */
-    i915_fs_dcl(FS_S0);
-    if (pMask)
-	i915_fs_dcl(FS_S1);
-    i915_fs_dcl(FS_T0);
-    if (pMask)
-	i915_fs_dcl(FS_T1);
-
-    /* Load the pSrcPicture texel */
-    if (is_affine_src) {
-	i915_fs_texld(FS_R0, FS_S0, FS_T0);
-    } else {
-	i915_fs_texldp(FS_R0, FS_S0, FS_T0);
-    }
-
-    /* If the texture lacks an alpha channel, force the alpha to 1. */
-    if (PICT_FORMAT_A(pSrcPicture->format) == 0)
-	i915_fs_mov_masked(FS_R0, MASK_W, i915_fs_operand_one());
-
-    if (!pMask) {
-	/* No mask, so move to output color */
-	i915_fs_mov(out_reg, i915_fs_operand_reg(FS_R0));
-    } else {
-	/* Load the pMaskPicture texel */
-	if (is_affine_mask) {
-	    i915_fs_texld(FS_R1, FS_S1, FS_T1);
+	I830Ptr pI830 = I830PTR(pScrn);
+	int op = pI830->i915_render_state.op;
+	PicturePtr pSrcPicture = pI830->render_src_picture;
+	PicturePtr pMaskPicture = pI830->render_mask_picture;
+	PicturePtr pDstPicture = pI830->render_dst_picture;
+	PixmapPtr pSrc = pI830->render_src;
+	PixmapPtr pMask = pI830->render_mask;
+	PixmapPtr pDst = pI830->render_dst;
+	uint32_t dst_format = pI830->i915_render_state.dst_format, dst_pitch;
+	uint32_t blendctl;
+	int out_reg = FS_OC;
+	FS_LOCALS(20);
+	Bool is_affine_src, is_affine_mask;
+
+	pI830->i915_render_state.needs_emit = FALSE;
+
+	IntelEmitInvarientState(pScrn);
+	pI830->last_3d = LAST_3D_RENDER;
+
+	dst_pitch = intel_get_pixmap_pitch(pDst);
+
+	is_affine_src = i830_transform_is_affine(pI830->transform[0]);
+	is_affine_mask = i830_transform_is_affine(pI830->transform[1]);
+
+	if (pMask == NULL) {
+		BEGIN_BATCH(10);
+		OUT_BATCH(_3DSTATE_MAP_STATE | 3);
+		OUT_BATCH(0x00000001);	/* map 0 */
+		OUT_RELOC_PIXMAP(pSrc, I915_GEM_DOMAIN_SAMPLER, 0, 0);
+		OUT_BATCH(pI830->mapstate[1]);
+		OUT_BATCH(pI830->mapstate[2]);
+
+		OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3);
+		OUT_BATCH(0x00000001);	/* sampler 0 */
+		OUT_BATCH(pI830->samplerstate[0]);
+		OUT_BATCH(pI830->samplerstate[1]);
+		OUT_BATCH(pI830->samplerstate[2]);
+		ADVANCE_BATCH();
 	} else {
-	    i915_fs_texldp(FS_R1, FS_S1, FS_T1);
+		BEGIN_BATCH(16);
+		OUT_BATCH(_3DSTATE_MAP_STATE | 6);
+		OUT_BATCH(0x00000003);	/* map 0,1 */
+		OUT_RELOC_PIXMAP(pSrc, I915_GEM_DOMAIN_SAMPLER, 0, 0);
+		OUT_BATCH(pI830->mapstate[1]);
+		OUT_BATCH(pI830->mapstate[2]);
+		OUT_RELOC_PIXMAP(pMask, I915_GEM_DOMAIN_SAMPLER, 0, 0);
+		OUT_BATCH(pI830->mapstate[4]);
+		OUT_BATCH(pI830->mapstate[5]);
+
+		OUT_BATCH(_3DSTATE_SAMPLER_STATE | 6);
+		OUT_BATCH(0x00000003);	/* sampler 0,1 */
+		OUT_BATCH(pI830->samplerstate[0]);
+		OUT_BATCH(pI830->samplerstate[1]);
+		OUT_BATCH(pI830->samplerstate[2]);
+		OUT_BATCH(pI830->samplerstate[3]);
+		OUT_BATCH(pI830->samplerstate[4]);
+		OUT_BATCH(pI830->samplerstate[5]);
+		ADVANCE_BATCH();
 	}
-	/* If the texture lacks an alpha channel, force the alpha to 1. */
-	if (PICT_FORMAT_A(pMaskPicture->format) == 0)
-	    i915_fs_mov_masked(FS_R1, MASK_W, i915_fs_operand_one());
-
-	/* If component alpha is active in the mask and the blend operation
-	 * uses the source alpha, then we know we don't need the source
-	 * value (otherwise we would have hit a fallback earlier), so we
-	 * provide the source alpha (src.A * mask.X) as output color.
-	 * Conversely, if CA is set and we don't need the source alpha, then
-	 * we produce the source value (src.X * mask.X) and the source alpha
-	 * is unused..  Otherwise, we provide the non-CA source value
-	 * (src.X * mask.A).
-	 */
-	if (pMaskPicture->componentAlpha &&
-	    PICT_FORMAT_RGB(pMaskPicture->format))
 	{
-	    if (i915_blend_op[op].src_alpha) {
-		i915_fs_mul(out_reg, i915_fs_operand(FS_R0, W, W, W, W),
-			    i915_fs_operand_reg(FS_R1));
-	    } else {
-		i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
-			    i915_fs_operand_reg(FS_R1));
-	    }
+		uint32_t ss2;
+
+		BEGIN_BATCH(16);
+		OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
+		OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
+			  BUF_3D_PITCH(dst_pitch));
+		OUT_RELOC_PIXMAP(pDst, I915_GEM_DOMAIN_RENDER,
+				 I915_GEM_DOMAIN_RENDER, 0);
+
+		OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
+		OUT_BATCH(dst_format);
+
+		OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
+			  I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
+		ss2 = S2_TEXCOORD_FMT(0,
+				      is_affine_src ? TEXCOORDFMT_2D :
+				      TEXCOORDFMT_4D);
+		if (pMask)
+			ss2 |= S2_TEXCOORD_FMT(1,
+					       is_affine_mask ? TEXCOORDFMT_2D :
+					       TEXCOORDFMT_4D);
+		else
+			ss2 |= S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT);
+		ss2 |= S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT);
+		OUT_BATCH(ss2);
+		OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
+			  S4_CULLMODE_NONE | S4_VFMT_XY);
+		blendctl =
+		    i915_get_blend_cntl(op, pMaskPicture, pDstPicture->format);
+		OUT_BATCH(0x00000000);	/* Disable stencil buffer */
+		OUT_BATCH(S6_CBUF_BLEND_ENABLE | S6_COLOR_WRITE_ENABLE |
+			  (BLENDFUNC_ADD << S6_CBUF_BLEND_FUNC_SHIFT) |
+			  blendctl);
+
+		/* draw rect is unconditional */
+		OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
+		OUT_BATCH(0x00000000);
+		OUT_BATCH(0x00000000);	/* ymin, xmin */
+		OUT_BATCH(DRAW_YMAX(pDst->drawable.height - 1) |
+			  DRAW_XMAX(pDst->drawable.width - 1));
+		/* yorig, xorig (relate to color buffer?) */
+		OUT_BATCH(0x00000000);
+		OUT_BATCH(MI_NOOP);
+		ADVANCE_BATCH();
+	}
+
+	if (dst_format == COLR_BUF_8BIT)
+		out_reg = FS_U0;
+
+	FS_BEGIN();
+
+	/* Declare the registers necessary for our program.  I don't think the
+	 * S then T ordering is necessary.
+	 */
+	i915_fs_dcl(FS_S0);
+	if (pMask)
+		i915_fs_dcl(FS_S1);
+	i915_fs_dcl(FS_T0);
+	if (pMask)
+		i915_fs_dcl(FS_T1);
+
+	/* Load the pSrcPicture texel */
+	if (is_affine_src) {
+		i915_fs_texld(FS_R0, FS_S0, FS_T0);
 	} else {
-	    i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
-			i915_fs_operand(FS_R1, W, W, W, W));
+		i915_fs_texldp(FS_R0, FS_S0, FS_T0);
 	}
-    }
-    if (dst_format == COLR_BUF_8BIT)
-	i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W));
 
-    FS_END();
-}
+	/* If the texture lacks an alpha channel, force the alpha to 1. */
+	if (PICT_FORMAT_A(pSrcPicture->format) == 0)
+		i915_fs_mov_masked(FS_R0, MASK_W, i915_fs_operand_one());
 
+	if (!pMask) {
+		/* No mask, so move to output color */
+		i915_fs_mov(out_reg, i915_fs_operand_reg(FS_R0));
+	} else {
+		/* Load the pMaskPicture texel */
+		if (is_affine_mask) {
+			i915_fs_texld(FS_R1, FS_S1, FS_T1);
+		} else {
+			i915_fs_texldp(FS_R1, FS_S1, FS_T1);
+		}
+		/* If the texture lacks an alpha channel, force the alpha to 1.
+		 */
+		if (PICT_FORMAT_A(pMaskPicture->format) == 0)
+			i915_fs_mov_masked(FS_R1, MASK_W,
+					   i915_fs_operand_one());
+
+		/* If component alpha is active in the mask and the blend
+		 * operation uses the source alpha, then we know we don't
+		 * need the source value (otherwise we would have hit a
+		 * fallback earlier), so we provide the source alpha (src.A *
+		 * mask.X) as output color.
+		 * Conversely, if CA is set and we don't need the source alpha,
+		 * then we produce the source value (src.X * mask.X) and the
+		 * source alpha is unused.  Otherwise, we provide the non-CA
+		 * source value (src.X * mask.A).
+		 */
+		if (pMaskPicture->componentAlpha &&
+		    PICT_FORMAT_RGB(pMaskPicture->format)) {
+			if (i915_blend_op[op].src_alpha) {
+				i915_fs_mul(out_reg,
+					    i915_fs_operand(FS_R0, W, W, W, W),
+					    i915_fs_operand_reg(FS_R1));
+			} else {
+				i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
+					    i915_fs_operand_reg(FS_R1));
+			}
+		} else {
+			i915_fs_mul(out_reg, i915_fs_operand_reg(FS_R0),
+				    i915_fs_operand(FS_R1, W, W, W, W));
+		}
+	}
+	if (dst_format == COLR_BUF_8BIT)
+		i915_fs_mov(FS_OC, i915_fs_operand(out_reg, W, W, W, W));
 
+	FS_END();
+}
 
 /* Emit the vertices for a single composite rectangle.
  *
@@ -557,194 +568,210 @@ static void
 i915_emit_composite_primitive(PixmapPtr pDst,
 			      int srcX, int srcY,
 			      int maskX, int maskY,
-			      int dstX, int dstY,
-			      int w, int h)
+			      int dstX, int dstY, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    Bool is_affine_src, is_affine_mask = TRUE;
-    int per_vertex, num_floats;
-    float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	Bool is_affine_src, is_affine_mask = TRUE;
+	int per_vertex, num_floats;
+	float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
 
-    per_vertex = 2; /* dest x/y */
+	per_vertex = 2;		/* dest x/y */
 
-    {
-	float x = srcX + pI830->src_coord_adjust;
-	float y = srcY + pI830->src_coord_adjust;
+	{
+		float x = srcX + pI830->src_coord_adjust;
+		float y = srcY + pI830->src_coord_adjust;
+
+		is_affine_src = i830_transform_is_affine(pI830->transform[0]);
+		if (is_affine_src) {
+			if (!i830_get_transformed_coordinates(x, y,
+							      pI830->
+							      transform[0],
+							      &src_x[0],
+							      &src_y[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x, y + h,
+							      pI830->
+							      transform[0],
+							      &src_x[1],
+							      &src_y[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x + w, y + h,
+							      pI830->
+							      transform[0],
+							      &src_x[2],
+							      &src_y[2]))
+				return;
+
+			per_vertex += 2;	/* src x/y */
+		} else {
+			if (!i830_get_transformed_coordinates_3d(x, y,
+								 pI830->
+								 transform[0],
+								 &src_x[0],
+								 &src_y[0],
+								 &src_w[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x, y + h,
+								 pI830->
+								 transform[0],
+								 &src_x[1],
+								 &src_y[1],
+								 &src_w[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+								 pI830->
+								 transform[0],
+								 &src_x[2],
+								 &src_y[2],
+								 &src_w[2]))
+				return;
+
+			per_vertex += 4;	/* src x/y/z/w */
+		}
+	}
 
-	is_affine_src = i830_transform_is_affine (pI830->transform[0]);
-	if (is_affine_src) {
-	    if (!i830_get_transformed_coordinates(x, y,
-						  pI830->transform[0],
-						  &src_x[0], &src_y[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x, y + h,
-						  pI830->transform[0],
-						  &src_x[1], &src_y[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x + w, y + h,
-						  pI830->transform[0],
-						  &src_x[2], &src_y[2]))
-		return;
-
-	    per_vertex += 2;    /* src x/y */
-	} else {
-	    if (!i830_get_transformed_coordinates_3d(x, y,
-						     pI830->transform[0],
-						     &src_x[0],
-						     &src_y[0],
-						     &src_w[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x, y + h,
-						     pI830->transform[0],
-						     &src_x[1],
-						     &src_y[1],
-						     &src_w[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x + w, y + h,
-						     pI830->transform[0],
-						     &src_x[2],
-						     &src_y[2],
-						     &src_w[2]))
-		return;
-
-	    per_vertex += 4;    /* src x/y/z/w */
+	if (pI830->render_mask) {
+		float x = maskX + pI830->mask_coord_adjust;
+		float y = maskY + pI830->mask_coord_adjust;
+
+		is_affine_mask = i830_transform_is_affine(pI830->transform[1]);
+		if (is_affine_mask) {
+			if (!i830_get_transformed_coordinates(x, y,
+							      pI830->
+							      transform[1],
+							      &mask_x[0],
+							      &mask_y[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x, y + h,
+							      pI830->
+							      transform[1],
+							      &mask_x[1],
+							      &mask_y[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates(x + w, y + h,
+							      pI830->
+							      transform[1],
+							      &mask_x[2],
+							      &mask_y[2]))
+				return;
+
+			per_vertex += 2;	/* mask x/y */
+		} else {
+			if (!i830_get_transformed_coordinates_3d(x, y,
+								 pI830->
+								 transform[1],
+								 &mask_x[0],
+								 &mask_y[0],
+								 &mask_w[0]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x, y + h,
+								 pI830->
+								 transform[1],
+								 &mask_x[1],
+								 &mask_y[1],
+								 &mask_w[1]))
+				return;
+
+			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+								 pI830->
+								 transform[1],
+								 &mask_x[2],
+								 &mask_y[2],
+								 &mask_w[2]))
+				return;
+
+			per_vertex += 4;	/* mask x/y/z/w */
+		}
 	}
-    }
-
-    if (pI830->render_mask) {
-	float x = maskX + pI830->mask_coord_adjust;
-	float y = maskY + pI830->mask_coord_adjust;
-
-	is_affine_mask = i830_transform_is_affine (pI830->transform[1]);
-	if (is_affine_mask) {
-	    if (!i830_get_transformed_coordinates(x, y,
-						  pI830->transform[1],
-						  &mask_x[0], &mask_y[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x, y + h,
-						  pI830->transform[1],
-						  &mask_x[1], &mask_y[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates(x + w, y + h,
-						  pI830->transform[1],
-						  &mask_x[2], &mask_y[2]))
-		return;
-
-	    per_vertex += 2;	/* mask x/y */
-	} else {
-	    if (!i830_get_transformed_coordinates_3d(x, y,
-						     pI830->transform[1],
-						     &mask_x[0],
-						     &mask_y[0],
-						     &mask_w[0]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x, y + h,
-						     pI830->transform[1],
-						     &mask_x[1],
-						     &mask_y[1],
-						     &mask_w[1]))
-		return;
-
-	    if (!i830_get_transformed_coordinates_3d(x + w, y + h,
-						     pI830->transform[1],
-						     &mask_x[2],
-						     &mask_y[2],
-						     &mask_w[2]))
-		return;
-
-	    per_vertex += 4;	/* mask x/y/z/w */
+
+	num_floats = 3 * per_vertex;
+
+	BEGIN_BATCH(1 + num_floats);
+
+	OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (num_floats - 1));
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX + w);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
+	OUT_BATCH_F(src_x[2] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[2] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(0.0);
+		OUT_BATCH_F(src_w[2]);
+	}
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[2] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[2] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(mask_w[2]);
+		}
 	}
-    }
-
-    num_floats = 3 * per_vertex;
-
-    BEGIN_BATCH(1 + num_floats);
-
-    OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (num_floats-1));
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX + w);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
-    OUT_BATCH_F(src_x[2] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[2] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(0.0);
-	OUT_BATCH_F(src_w[2]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[2] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[2] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(0.0);
-	    OUT_BATCH_F(mask_w[2]);
+
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
+	OUT_BATCH_F(src_x[1] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[1] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(0.0);
+		OUT_BATCH_F(src_w[1]);
+	}
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[1] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[1] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(mask_w[1]);
+		}
 	}
-    }
-
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY + h);
-    OUT_BATCH_F(src_x[1] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[1] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(0.0);
-	OUT_BATCH_F(src_w[1]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[1] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[1] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(0.0);
-	    OUT_BATCH_F(mask_w[1]);
+
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
+	OUT_BATCH_F(pI830->dst_coord_adjust + dstY);
+	OUT_BATCH_F(src_x[0] / pI830->scale_units[0][0]);
+	OUT_BATCH_F(src_y[0] / pI830->scale_units[0][1]);
+	if (!is_affine_src) {
+		OUT_BATCH_F(0.0);
+		OUT_BATCH_F(src_w[0]);
 	}
-    }
-
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstX);
-    OUT_BATCH_F(pI830->dst_coord_adjust + dstY);
-    OUT_BATCH_F(src_x[0] / pI830->scale_units[0][0]);
-    OUT_BATCH_F(src_y[0] / pI830->scale_units[0][1]);
-    if (!is_affine_src) {
-	OUT_BATCH_F(0.0);
-	OUT_BATCH_F(src_w[0]);
-    }
-    if (pI830->render_mask) {
-	OUT_BATCH_F(mask_x[0] / pI830->scale_units[1][0]);
-	OUT_BATCH_F(mask_y[0] / pI830->scale_units[1][1]);
-	if (!is_affine_mask) {
-	    OUT_BATCH_F(0.0);
-	    OUT_BATCH_F(mask_w[0]);
+	if (pI830->render_mask) {
+		OUT_BATCH_F(mask_x[0] / pI830->scale_units[1][0]);
+		OUT_BATCH_F(mask_y[0] / pI830->scale_units[1][1]);
+		if (!is_affine_mask) {
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(mask_w[0]);
+		}
 	}
-    }
 
-    ADVANCE_BATCH();
+	ADVANCE_BATCH();
 }
 
 void
 i915_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 	       int dstX, int dstY, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    intel_batch_start_atomic(pScrn, 150);
+	intel_batch_start_atomic(pScrn, 150);
 
-    if (pI830->i915_render_state.needs_emit)
-	i915_emit_composite_setup(pScrn);
+	if (pI830->i915_render_state.needs_emit)
+		i915_emit_composite_setup(pScrn);
 
-    i915_emit_composite_primitive(pDst, srcX, srcY, maskX, maskY, dstX, dstY,
-				  w, h);
+	i915_emit_composite_primitive(pDst, srcX, srcY, maskX, maskY, dstX,
+				      dstY, w, h);
 
-    intel_batch_end_atomic(pScrn);
+	intel_batch_end_atomic(pScrn);
 }
 
-void
-i915_batch_flush_notify(ScrnInfoPtr pScrn)
+void i915_batch_flush_notify(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
+	I830Ptr pI830 = I830PTR(pScrn);
 
-    pI830->i915_render_state.needs_emit = TRUE;
+	pI830->i915_render_state.needs_emit = TRUE;
 }
diff --git a/src/i915_video.c b/src/i915_video.c
index 8e8e9626..59118319 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -42,390 +42,417 @@
 void
 I915DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
 			 RegionPtr dstRegion,
-			 short width, short height, int video_pitch, int video_pitch2,
-			 int x1, int y1, int x2, int y2,
+			 short width, short height, int video_pitch,
+			 int video_pitch2, int x1, int y1, int x2, int y2,
 			 short src_w, short src_h, short drw_w, short drw_h,
 			 PixmapPtr pPixmap)
 {
-   I830Ptr pI830 = I830PTR(pScrn);
-   uint32_t format, ms3, s5;
-   BoxPtr pbox = REGION_RECTS(dstRegion);
-   int nbox_total = REGION_NUM_RECTS(dstRegion);
-   int nbox_this_time;
-   int dxo, dyo, pix_xoff, pix_yoff;
+	I830Ptr pI830 = I830PTR(pScrn);
+	uint32_t format, ms3, s5;
+	BoxPtr pbox = REGION_RECTS(dstRegion);
+	int nbox_total = REGION_NUM_RECTS(dstRegion);
+	int nbox_this_time;
+	int dxo, dyo, pix_xoff, pix_yoff;
 
 #if 0
-   ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height,
-	  video_pitch);
+	ErrorF("I915DisplayVideo: %dx%d (pitch %d)\n", width, height,
+	       video_pitch);
 #endif
 
 #define BYTES_FOR_BOXES(n)	((200 + (n) * 20) * 4)
 #define BOXES_IN_BYTES(s)	((((s)/4) - 200) / 20)
 #define BATCH_BYTES(p)		((p)->batch_bo->size - 16)
 
-   while (nbox_total) {
-	nbox_this_time = nbox_total;
-	if (BYTES_FOR_BOXES(nbox_this_time) > BATCH_BYTES(pI830))
-		nbox_this_time = BOXES_IN_BYTES(BATCH_BYTES(pI830));
-	nbox_total -= nbox_this_time;
-
-   intel_batch_start_atomic(pScrn, 200 + 20 * nbox_this_time);
-
-   IntelEmitInvarientState(pScrn);
-   pI830->last_3d = LAST_3D_VIDEO;
-
-   BEGIN_BATCH(20);
-
-   /* flush map & render cache */
-   OUT_BATCH(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
-   OUT_BATCH(0x00000000);
-
-   /* draw rect -- just clipping */
-   OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
-   OUT_BATCH(DRAW_DITHER_OFS_X(pPixmap->drawable.x & 3) |
-	     DRAW_DITHER_OFS_Y(pPixmap->drawable.y & 3));
-   OUT_BATCH(0x00000000);	/* ymin, xmin */
-   OUT_BATCH((pPixmap->drawable.width - 1) |
-	     (pPixmap->drawable.height - 1) << 16); /* ymax, xmax */
-   OUT_BATCH(0x00000000);	/* yorigin, xorigin */
-   OUT_BATCH(MI_NOOP);
-
-   OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
-	     I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
-   OUT_BATCH(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
-	     S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
-	     S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
-   OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
-	     S4_CULLMODE_NONE | S4_VFMT_XY);
-   s5 = 0x0;
-   if (pI830->cpp == 2)
-      s5 |= S5_COLOR_DITHER_ENABLE;
-   OUT_BATCH(s5); /* S5 - enable bits */
-   OUT_BATCH((2 << S6_DEPTH_TEST_FUNC_SHIFT) |
-	     (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
-	     (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) | S6_COLOR_WRITE_ENABLE |
-	     (2 << S6_TRISTRIP_PV_SHIFT));
-
-   OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD);
-   OUT_BATCH(0x00000000);
-
-   OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
-   if (pI830->cpp == 2)
-      format = COLR_BUF_RGB565;
-   else
-      format = COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
-
-   OUT_BATCH(LOD_PRECLAMP_OGL |
-	     DSTORG_HORT_BIAS(0x8) |
-	     DSTORG_VERT_BIAS(0x8) |
-	     format);
-
-   /* front buffer, pitch, offset */
-   OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
-   OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
-	     BUF_3D_PITCH(intel_get_pixmap_pitch(pPixmap)));
-   OUT_RELOC_PIXMAP(pPixmap, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-   ADVANCE_BATCH();
-
-   if (!is_planar_fourcc(id)) {
-      FS_LOCALS(10);
-
-      BEGIN_BATCH(16);
-      OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | 4);
-      OUT_BATCH(0x0000001);	/* constant 0 */
-      /* constant 0: brightness/contrast */
-      OUT_BATCH_F(pPriv->brightness / 128.0);
-      OUT_BATCH_F(pPriv->contrast / 255.0);
-      OUT_BATCH_F(0.0);
-      OUT_BATCH_F(0.0);
-
-      OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3);
-      OUT_BATCH(0x00000001);
-      OUT_BATCH(SS2_COLORSPACE_CONVERSION |
-		(FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
-		(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
-      OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
-		(TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
-		(0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
-		SS3_NORMALIZED_COORDS);
-      OUT_BATCH(0x00000000);
-
-      OUT_BATCH(_3DSTATE_MAP_STATE | 3);
-      OUT_BATCH(0x00000001);	/* texture map #1 */
-      if (pPriv->buf)
-          OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER, 0, pPriv->YBufOffset);
-      else
-          OUT_BATCH(pPriv->YBufOffset);
-
-      ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
-      switch (id) {
-      case FOURCC_YUY2:
-	 ms3 |= MT_422_YCRCB_NORMAL;
-	 break;
-      case FOURCC_UYVY:
-	 ms3 |= MT_422_YCRCB_SWAPY;
-	 break;
-      }
-      ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
-      ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
-      OUT_BATCH(ms3);
-      OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
-
-      ADVANCE_BATCH();
-
-      FS_BEGIN();
-      i915_fs_dcl(FS_S0);
-      i915_fs_dcl(FS_T0);
-      i915_fs_texld(FS_OC, FS_S0, FS_T0);
-      if (pPriv->brightness != 0) {
-	  i915_fs_add(FS_OC,
-		      i915_fs_operand_reg(FS_OC),
-		      i915_fs_operand(FS_C0, X, X, X, ZERO));
-      }
-      FS_END();
-   } else {
-      FS_LOCALS(16);
-
-      BEGIN_BATCH(22 + 11 + 11);
-      /* For the planar formats, we set up three samplers -- one for each plane,
-       * in a Y8 format.  Because I couldn't get the special PLANAR_TO_PACKED
-       * shader setup to work, I did the manual pixel shader:
-       *
-       * y' = y - .0625
-       * u' = u - .5
-       * v' = v - .5;
-       *
-       * r = 1.1643 * y' + 0.0     * u' + 1.5958  * v'
-       * g = 1.1643 * y' - 0.39173 * u' - 0.81290 * v'
-       * b = 1.1643 * y' + 2.017   * u' + 0.0     * v'
-       *
-       * register assignment:
-       * r0 = (y',u',v',0)
-       * r1 = (y,y,y,y)
-       * r2 = (u,u,u,u)
-       * r3 = (v,v,v,v)
-       * OC = (r,g,b,1)
-       */
-      OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (22 - 2));
-      OUT_BATCH(0x000001f);	/* constants 0-4 */
-      /* constant 0: normalization offsets */
-      OUT_BATCH_F(-0.0625);
-      OUT_BATCH_F(-0.5);
-      OUT_BATCH_F(-0.5);
-      OUT_BATCH_F(0.0);
-      /* constant 1: r coefficients*/
-      OUT_BATCH_F(1.1643);
-      OUT_BATCH_F(0.0);
-      OUT_BATCH_F(1.5958);
-      OUT_BATCH_F(0.0);
-      /* constant 2: g coefficients */
-      OUT_BATCH_F(1.1643);
-      OUT_BATCH_F(-0.39173);
-      OUT_BATCH_F(-0.81290);
-      OUT_BATCH_F(0.0);
-      /* constant 3: b coefficients */
-      OUT_BATCH_F(1.1643);
-      OUT_BATCH_F(2.017);
-      OUT_BATCH_F(0.0);
-      OUT_BATCH_F(0.0);
-      /* constant 4: brightness/contrast */
-      OUT_BATCH_F(pPriv->brightness / 128.0);
-      OUT_BATCH_F(pPriv->contrast / 255.0);
-      OUT_BATCH_F(0.0);
-      OUT_BATCH_F(0.0);
-
-      OUT_BATCH(_3DSTATE_SAMPLER_STATE | 9);
-      OUT_BATCH(0x00000007);
-      /* sampler 0 */
-      OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
-	       (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
-      OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
-	       (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
-	       (0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
-	       SS3_NORMALIZED_COORDS);
-      OUT_BATCH(0x00000000);
-      /* sampler 1 */
-      OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
-	       (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
-      OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
-	       (TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
-	       (1 << SS3_TEXTUREMAP_INDEX_SHIFT) |
-	       SS3_NORMALIZED_COORDS);
-      OUT_BATCH(0x00000000);
-      /* sampler 2 */
-      OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
-		(FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
-      OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE << SS3_TCX_ADDR_MODE_SHIFT) |
-		(TEXCOORDMODE_CLAMP_EDGE << SS3_TCY_ADDR_MODE_SHIFT) |
-		(2 << SS3_TEXTUREMAP_INDEX_SHIFT) |
-		SS3_NORMALIZED_COORDS);
-      OUT_BATCH(0x00000000);
-
-      OUT_BATCH(_3DSTATE_MAP_STATE | 9);
-      OUT_BATCH(0x00000007);
-
-      if (pPriv->buf)
-          OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER, 0, pPriv->YBufOffset);
-      else
-          OUT_BATCH(pPriv->YBufOffset);
-
-      ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
-      ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
-      ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
-      OUT_BATCH(ms3);
-      /* check to see if Y has special pitch than normal double u/v pitch,
-       * e.g i915 XvMC hw requires at least 1K alignment, so Y pitch might
-       * be same as U/V's.*/
-      if (video_pitch2)
-	  OUT_BATCH(((video_pitch2 / 4) - 1) << MS4_PITCH_SHIFT);
-      else
-	  OUT_BATCH(((video_pitch * 2 / 4) - 1) << MS4_PITCH_SHIFT);
-
-      if (pPriv->buf)
-          OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER, 0, pPriv->UBufOffset);
-      else
-          OUT_BATCH(pPriv->UBufOffset);
-
-      ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
-      ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
-      ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
-      OUT_BATCH(ms3);
-      OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
-
-      if (pPriv->buf)
-          OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER, 0, pPriv->VBufOffset);
-      else
-          OUT_BATCH(pPriv->VBufOffset);
-
-      ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
-      ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
-      ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
-      OUT_BATCH(ms3);
-      OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
-      ADVANCE_BATCH();
-
-      FS_BEGIN();
-      /* Declare samplers */
-      i915_fs_dcl(FS_S0); /* Y */
-      i915_fs_dcl(FS_S1); /* U */
-      i915_fs_dcl(FS_S2); /* V */
-      i915_fs_dcl(FS_T0); /* normalized coords */
-
-      /* Load samplers to temporaries. */
-      i915_fs_texld(FS_R1, FS_S0, FS_T0);
-      i915_fs_texld(FS_R2, FS_S1, FS_T0);
-      i915_fs_texld(FS_R3, FS_S2, FS_T0);
-
-      /* Move the sampled YUV data in R[123] to the first 3 channels of R0. */
-      i915_fs_mov_masked(FS_R0, MASK_X, i915_fs_operand_reg(FS_R1));
-      i915_fs_mov_masked(FS_R0, MASK_Y, i915_fs_operand_reg(FS_R2));
-      i915_fs_mov_masked(FS_R0, MASK_Z, i915_fs_operand_reg(FS_R3));
-
-      /* Normalize the YUV data */
-      i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0),
-                 i915_fs_operand_reg(FS_C0));
-      /* dot-product the YUV data in R0 by the vectors of coefficients for
-       * calculating R, G, and B, storing the results in the R, G, or B
-       * channels of the output color.  The OC results are implicitly clamped
-       * at the end of the program.
-       */
-      i915_fs_dp3_masked(FS_OC, MASK_X,
-                        i915_fs_operand_reg(FS_R0),
-                        i915_fs_operand_reg(FS_C1));
-      i915_fs_dp3_masked(FS_OC, MASK_Y,
-                        i915_fs_operand_reg(FS_R0),
-                        i915_fs_operand_reg(FS_C2));
-      i915_fs_dp3_masked(FS_OC, MASK_Z,
-                        i915_fs_operand_reg(FS_R0),
-                        i915_fs_operand_reg(FS_C3));
-      /* Set alpha of the output to 1.0, by wiring W to 1 and not actually using
-       * the source.
-       */
-      i915_fs_mov_masked(FS_OC, MASK_W, i915_fs_operand_one());
-
-      if (pPriv->brightness != 0) {
-	  i915_fs_add(FS_OC,
-		      i915_fs_operand_reg(FS_OC),
-		      i915_fs_operand(FS_C4, X, X, X, ZERO));
-      }
-      FS_END();
-   }
-   
-   {
-      BEGIN_BATCH(2);
-      OUT_BATCH(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
-      OUT_BATCH(0x00000000);
-      ADVANCE_BATCH();
-   }
-
-   /* Set up the offset for translating from the given region (in screen
-    * coordinates) to the backing pixmap.
-    */
+	while (nbox_total) {
+		nbox_this_time = nbox_total;
+		if (BYTES_FOR_BOXES(nbox_this_time) > BATCH_BYTES(pI830))
+			nbox_this_time = BOXES_IN_BYTES(BATCH_BYTES(pI830));
+		nbox_total -= nbox_this_time;
+
+		intel_batch_start_atomic(pScrn, 200 + 20 * nbox_this_time);
+
+		IntelEmitInvarientState(pScrn);
+		pI830->last_3d = LAST_3D_VIDEO;
+
+		BEGIN_BATCH(20);
+
+		/* flush map & render cache */
+		OUT_BATCH(MI_FLUSH | MI_WRITE_DIRTY_STATE |
+			  MI_INVALIDATE_MAP_CACHE);
+		OUT_BATCH(0x00000000);
+
+		/* draw rect -- just clipping */
+		OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
+		OUT_BATCH(DRAW_DITHER_OFS_X(pPixmap->drawable.x & 3) |
+			  DRAW_DITHER_OFS_Y(pPixmap->drawable.y & 3));
+		OUT_BATCH(0x00000000);	/* ymin, xmin */
+		/* ymax, xmax */
+		OUT_BATCH((pPixmap->drawable.width - 1) |
+			  (pPixmap->drawable.height - 1) << 16);
+		OUT_BATCH(0x00000000);	/* yorigin, xorigin */
+		OUT_BATCH(MI_NOOP);
+
+		OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
+			  I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
+		OUT_BATCH(S2_TEXCOORD_FMT(0, TEXCOORDFMT_2D) |
+			  S2_TEXCOORD_FMT(1, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(2, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(3, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(4, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(5, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(6, TEXCOORDFMT_NOT_PRESENT) |
+			  S2_TEXCOORD_FMT(7, TEXCOORDFMT_NOT_PRESENT));
+		OUT_BATCH((1 << S4_POINT_WIDTH_SHIFT) | S4_LINE_WIDTH_ONE |
+			  S4_CULLMODE_NONE | S4_VFMT_XY);
+		s5 = 0x0;
+		if (pI830->cpp == 2)
+			s5 |= S5_COLOR_DITHER_ENABLE;
+		OUT_BATCH(s5);	/* S5 - enable bits */
+		OUT_BATCH((2 << S6_DEPTH_TEST_FUNC_SHIFT) |
+			  (2 << S6_CBUF_SRC_BLEND_FACT_SHIFT) |
+			  (1 << S6_CBUF_DST_BLEND_FACT_SHIFT) |
+			  S6_COLOR_WRITE_ENABLE | (2 << S6_TRISTRIP_PV_SHIFT));
+
+		OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD);
+		OUT_BATCH(0x00000000);
+
+		OUT_BATCH(_3DSTATE_DST_BUF_VARS_CMD);
+		if (pI830->cpp == 2)
+			format = COLR_BUF_RGB565;
+		else
+			format =
+			    COLR_BUF_ARGB8888 | DEPTH_FRMT_24_FIXED_8_OTHER;
+
+		OUT_BATCH(LOD_PRECLAMP_OGL |
+			  DSTORG_HORT_BIAS(0x8) |
+			  DSTORG_VERT_BIAS(0x8) | format);
+
+		/* front buffer, pitch, offset */
+		OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
+		OUT_BATCH(BUF_3D_ID_COLOR_BACK | BUF_3D_USE_FENCE |
+			  BUF_3D_PITCH(intel_get_pixmap_pitch(pPixmap)));
+		OUT_RELOC_PIXMAP(pPixmap, I915_GEM_DOMAIN_RENDER,
+				 I915_GEM_DOMAIN_RENDER, 0);
+		ADVANCE_BATCH();
+
+		if (!is_planar_fourcc(id)) {
+			FS_LOCALS(10);
+
+			BEGIN_BATCH(16);
+			OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | 4);
+			OUT_BATCH(0x0000001);	/* constant 0 */
+			/* constant 0: brightness/contrast */
+			OUT_BATCH_F(pPriv->brightness / 128.0);
+			OUT_BATCH_F(pPriv->contrast / 255.0);
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(0.0);
+
+			OUT_BATCH(_3DSTATE_SAMPLER_STATE | 3);
+			OUT_BATCH(0x00000001);
+			OUT_BATCH(SS2_COLORSPACE_CONVERSION |
+				  (FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+				  (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
+			OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCX_ADDR_MODE_SHIFT) |
+				  (TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCY_ADDR_MODE_SHIFT) |
+				  (0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+				  SS3_NORMALIZED_COORDS);
+			OUT_BATCH(0x00000000);
+
+			OUT_BATCH(_3DSTATE_MAP_STATE | 3);
+			OUT_BATCH(0x00000001);	/* texture map #1 */
+			if (pPriv->buf)
+				OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER,
+					  0, pPriv->YBufOffset);
+			else
+				OUT_BATCH(pPriv->YBufOffset);
+
+			ms3 = MAPSURF_422 | MS3_USE_FENCE_REGS;
+			switch (id) {
+			case FOURCC_YUY2:
+				ms3 |= MT_422_YCRCB_NORMAL;
+				break;
+			case FOURCC_UYVY:
+				ms3 |= MT_422_YCRCB_SWAPY;
+				break;
+			}
+			ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
+			ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
+			OUT_BATCH(ms3);
+			OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
+
+			ADVANCE_BATCH();
+
+			FS_BEGIN();
+			i915_fs_dcl(FS_S0);
+			i915_fs_dcl(FS_T0);
+			i915_fs_texld(FS_OC, FS_S0, FS_T0);
+			if (pPriv->brightness != 0) {
+				i915_fs_add(FS_OC,
+					    i915_fs_operand_reg(FS_OC),
+					    i915_fs_operand(FS_C0, X, X, X,
+							    ZERO));
+			}
+			FS_END();
+		} else {
+			FS_LOCALS(16);
+
+			BEGIN_BATCH(22 + 11 + 11);
+			/* For the planar formats, we set up three samplers --
+			 * one for each plane, in a Y8 format.  Because I
+			 * couldn't get the special PLANAR_TO_PACKED
+			 * shader setup to work, I did the manual pixel shader:
+			 *
+			 * y' = y - .0625
+			 * u' = u - .5
+			 * v' = v - .5;
+			 *
+			 * r = 1.1643 * y' + 0.0     * u' + 1.5958  * v'
+			 * g = 1.1643 * y' - 0.39173 * u' - 0.81290 * v'
+			 * b = 1.1643 * y' + 2.017   * u' + 0.0     * v'
+			 *
+			 * register assignment:
+			 * r0 = (y',u',v',0)
+			 * r1 = (y,y,y,y)
+			 * r2 = (u,u,u,u)
+			 * r3 = (v,v,v,v)
+			 * OC = (r,g,b,1)
+			 */
+			OUT_BATCH(_3DSTATE_PIXEL_SHADER_CONSTANTS | (22 - 2));
+			OUT_BATCH(0x000001f);	/* constants 0-4 */
+			/* constant 0: normalization offsets */
+			OUT_BATCH_F(-0.0625);
+			OUT_BATCH_F(-0.5);
+			OUT_BATCH_F(-0.5);
+			OUT_BATCH_F(0.0);
+			/* constant 1: r coefficients */
+			OUT_BATCH_F(1.1643);
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(1.5958);
+			OUT_BATCH_F(0.0);
+			/* constant 2: g coefficients */
+			OUT_BATCH_F(1.1643);
+			OUT_BATCH_F(-0.39173);
+			OUT_BATCH_F(-0.81290);
+			OUT_BATCH_F(0.0);
+			/* constant 3: b coefficients */
+			OUT_BATCH_F(1.1643);
+			OUT_BATCH_F(2.017);
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(0.0);
+			/* constant 4: brightness/contrast */
+			OUT_BATCH_F(pPriv->brightness / 128.0);
+			OUT_BATCH_F(pPriv->contrast / 255.0);
+			OUT_BATCH_F(0.0);
+			OUT_BATCH_F(0.0);
+
+			OUT_BATCH(_3DSTATE_SAMPLER_STATE | 9);
+			OUT_BATCH(0x00000007);
+			/* sampler 0 */
+			OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+				  (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
+			OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCX_ADDR_MODE_SHIFT) |
+				  (TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCY_ADDR_MODE_SHIFT) |
+				  (0 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+				  SS3_NORMALIZED_COORDS);
+			OUT_BATCH(0x00000000);
+			/* sampler 1 */
+			OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+				  (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
+			OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCX_ADDR_MODE_SHIFT) |
+				  (TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCY_ADDR_MODE_SHIFT) |
+				  (1 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+				  SS3_NORMALIZED_COORDS);
+			OUT_BATCH(0x00000000);
+			/* sampler 2 */
+			OUT_BATCH((FILTER_LINEAR << SS2_MAG_FILTER_SHIFT) |
+				  (FILTER_LINEAR << SS2_MIN_FILTER_SHIFT));
+			OUT_BATCH((TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCX_ADDR_MODE_SHIFT) |
+				  (TEXCOORDMODE_CLAMP_EDGE <<
+				   SS3_TCY_ADDR_MODE_SHIFT) |
+				  (2 << SS3_TEXTUREMAP_INDEX_SHIFT) |
+				  SS3_NORMALIZED_COORDS);
+			OUT_BATCH(0x00000000);
+
+			OUT_BATCH(_3DSTATE_MAP_STATE | 9);
+			OUT_BATCH(0x00000007);
+
+			if (pPriv->buf)
+				OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER,
+					  0, pPriv->YBufOffset);
+			else
+				OUT_BATCH(pPriv->YBufOffset);
+
+			ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
+			ms3 |= (height - 1) << MS3_HEIGHT_SHIFT;
+			ms3 |= (width - 1) << MS3_WIDTH_SHIFT;
+			OUT_BATCH(ms3);
+			/* check to see if Y has special pitch than normal
+			 * double u/v pitch, e.g i915 XvMC hw requires at
+			 * least 1K alignment, so Y pitch might
+			 * be same as U/V's.*/
+			if (video_pitch2)
+				OUT_BATCH(((video_pitch2 / 4) -
+					   1) << MS4_PITCH_SHIFT);
+			else
+				OUT_BATCH(((video_pitch * 2 / 4) -
+					   1) << MS4_PITCH_SHIFT);
+
+			if (pPriv->buf)
+				OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER,
+					  0, pPriv->UBufOffset);
+			else
+				OUT_BATCH(pPriv->UBufOffset);
+
+			ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
+			ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
+			ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
+			OUT_BATCH(ms3);
+			OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
+
+			if (pPriv->buf)
+				OUT_RELOC(pPriv->buf, I915_GEM_DOMAIN_SAMPLER,
+					  0, pPriv->VBufOffset);
+			else
+				OUT_BATCH(pPriv->VBufOffset);
+
+			ms3 = MAPSURF_8BIT | MT_8BIT_I8 | MS3_USE_FENCE_REGS;
+			ms3 |= (height / 2 - 1) << MS3_HEIGHT_SHIFT;
+			ms3 |= (width / 2 - 1) << MS3_WIDTH_SHIFT;
+			OUT_BATCH(ms3);
+			OUT_BATCH(((video_pitch / 4) - 1) << MS4_PITCH_SHIFT);
+			ADVANCE_BATCH();
+
+			FS_BEGIN();
+			/* Declare samplers */
+			i915_fs_dcl(FS_S0);	/* Y */
+			i915_fs_dcl(FS_S1);	/* U */
+			i915_fs_dcl(FS_S2);	/* V */
+			i915_fs_dcl(FS_T0);	/* normalized coords */
+
+			/* Load samplers to temporaries. */
+			i915_fs_texld(FS_R1, FS_S0, FS_T0);
+			i915_fs_texld(FS_R2, FS_S1, FS_T0);
+			i915_fs_texld(FS_R3, FS_S2, FS_T0);
+
+			/* Move the sampled YUV data in R[123] to the first
+			 * 3 channels of R0.
+			 */
+			i915_fs_mov_masked(FS_R0, MASK_X,
+					   i915_fs_operand_reg(FS_R1));
+			i915_fs_mov_masked(FS_R0, MASK_Y,
+					   i915_fs_operand_reg(FS_R2));
+			i915_fs_mov_masked(FS_R0, MASK_Z,
+					   i915_fs_operand_reg(FS_R3));
+
+			/* Normalize the YUV data */
+			i915_fs_add(FS_R0, i915_fs_operand_reg(FS_R0),
+				    i915_fs_operand_reg(FS_C0));
+			/* dot-product the YUV data in R0 by the vectors of
+			 * coefficients for calculating R, G, and B, storing
+			 * the results in the R, G, or B channels of the output
+			 * color.  The OC results are implicitly clamped
+			 * at the end of the program.
+			 */
+			i915_fs_dp3_masked(FS_OC, MASK_X,
+					   i915_fs_operand_reg(FS_R0),
+					   i915_fs_operand_reg(FS_C1));
+			i915_fs_dp3_masked(FS_OC, MASK_Y,
+					   i915_fs_operand_reg(FS_R0),
+					   i915_fs_operand_reg(FS_C2));
+			i915_fs_dp3_masked(FS_OC, MASK_Z,
+					   i915_fs_operand_reg(FS_R0),
+					   i915_fs_operand_reg(FS_C3));
+			/* Set alpha of the output to 1.0, by wiring W to 1
+			 * and not actually using the source.
+			 */
+			i915_fs_mov_masked(FS_OC, MASK_W,
+					   i915_fs_operand_one());
+
+			if (pPriv->brightness != 0) {
+				i915_fs_add(FS_OC,
+					    i915_fs_operand_reg(FS_OC),
+					    i915_fs_operand(FS_C4, X, X, X,
+							    ZERO));
+			}
+			FS_END();
+		}
+
+		{
+			BEGIN_BATCH(2);
+			OUT_BATCH(MI_FLUSH | MI_WRITE_DIRTY_STATE |
+				  MI_INVALIDATE_MAP_CACHE);
+			OUT_BATCH(0x00000000);
+			ADVANCE_BATCH();
+		}
+
+		/* Set up the offset for translating from the given region
+		 * (in screen coordinates) to the backing pixmap.
+		 */
 #ifdef COMPOSITE
-   pix_xoff = -pPixmap->screen_x + pPixmap->drawable.x;
-   pix_yoff = -pPixmap->screen_y + pPixmap->drawable.y;
+		pix_xoff = -pPixmap->screen_x + pPixmap->drawable.x;
+		pix_yoff = -pPixmap->screen_y + pPixmap->drawable.y;
 #else
-   pix_xoff = 0;
-   pix_yoff = 0;
+		pix_xoff = 0;
+		pix_yoff = 0;
 #endif
 
-   dxo = dstRegion->extents.x1;
-   dyo = dstRegion->extents.y1;
-
-   while (nbox_this_time--)
-   {
-      int box_x1 = pbox->x1;
-      int box_y1 = pbox->y1;
-      int box_x2 = pbox->x2;
-      int box_y2 = pbox->y2;
-      float src_scale_x, src_scale_y;
-
-      pbox++;
-
-      src_scale_x = ((float)src_w / width) / drw_w;
-      src_scale_y  = ((float)src_h / height) / drw_h;
-
-      BEGIN_BATCH(8 + 12);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-      OUT_BATCH(MI_NOOP);
-
-      /* vertex data - rect list consists of bottom right, bottom left, and top
-       * left vertices.
-       */
-      OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (12 - 1));
-
-      /* bottom right */
-      OUT_BATCH_F(box_x2 + pix_xoff);
-      OUT_BATCH_F(box_y2 + pix_yoff);
-      OUT_BATCH_F((box_x2 - dxo) * src_scale_x);
-      OUT_BATCH_F((box_y2 - dyo) * src_scale_y);
-
-      /* bottom left */
-      OUT_BATCH_F(box_x1 + pix_xoff);
-      OUT_BATCH_F(box_y2 + pix_yoff);
-      OUT_BATCH_F((box_x1 - dxo) * src_scale_x);
-      OUT_BATCH_F((box_y2 - dyo) * src_scale_y);
-
-      /* top left */
-      OUT_BATCH_F(box_x1 + pix_xoff);
-      OUT_BATCH_F(box_y1 + pix_yoff);
-      OUT_BATCH_F((box_x1 - dxo) * src_scale_x);
-      OUT_BATCH_F((box_y1 - dyo) * src_scale_y);
-
-      ADVANCE_BATCH();
-   }
-
-   intel_batch_end_atomic(pScrn);
-   }
+		dxo = dstRegion->extents.x1;
+		dyo = dstRegion->extents.y1;
+
+		while (nbox_this_time--) {
+			int box_x1 = pbox->x1;
+			int box_y1 = pbox->y1;
+			int box_x2 = pbox->x2;
+			int box_y2 = pbox->y2;
+			float src_scale_x, src_scale_y;
+
+			pbox++;
+
+			src_scale_x = ((float)src_w / width) / drw_w;
+			src_scale_y = ((float)src_h / height) / drw_h;
+
+			BEGIN_BATCH(8 + 12);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+			OUT_BATCH(MI_NOOP);
+
+			/* vertex data - rect list consists of bottom right,
+			 * bottom left, and top left vertices.
+			 */
+			OUT_BATCH(PRIM3D_INLINE | PRIM3D_RECTLIST | (12 - 1));
+
+			/* bottom right */
+			OUT_BATCH_F(box_x2 + pix_xoff);
+			OUT_BATCH_F(box_y2 + pix_yoff);
+			OUT_BATCH_F((box_x2 - dxo) * src_scale_x);
+			OUT_BATCH_F((box_y2 - dyo) * src_scale_y);
+
+			/* bottom left */
+			OUT_BATCH_F(box_x1 + pix_xoff);
+			OUT_BATCH_F(box_y2 + pix_yoff);
+			OUT_BATCH_F((box_x1 - dxo) * src_scale_x);
+			OUT_BATCH_F((box_y2 - dyo) * src_scale_y);
+
+			/* top left */
+			OUT_BATCH_F(box_x1 + pix_xoff);
+			OUT_BATCH_F(box_y1 + pix_yoff);
+			OUT_BATCH_F((box_x1 - dxo) * src_scale_x);
+			OUT_BATCH_F((box_y1 - dyo) * src_scale_y);
+
+			ADVANCE_BATCH();
+		}
+
+		intel_batch_end_atomic(pScrn);
+	}
 }
-
diff --git a/src/i965_hwmc.c b/src/i965_hwmc.c
index 7f00ba63..3c10f4e8 100644
--- a/src/i965_hwmc.c
+++ b/src/i965_hwmc.c
@@ -50,97 +50,98 @@
 
 static PutImageFuncPtr XvPutImage;
 
-
-static int create_context(ScrnInfoPtr pScrn, 
-	XvMCContextPtr context, int *num_privates, CARD32 **private)
+static int create_context(ScrnInfoPtr pScrn,
+			  XvMCContextPtr context, int *num_privates,
+			  CARD32 ** private)
 {
-    struct i965_xvmc_context *private_context, *context_dup;
-    I830Ptr I830 = I830PTR(pScrn);
-
-    unsigned int blocknum = 
-	(((context->width + 15)/16)*((context->height+15)/16));
-    unsigned int blocksize = 6*blocknum*64*sizeof(short);
-    blocksize = (blocksize + 4095)&(~4095);
-    if ((private_context = Xcalloc(sizeof(*private_context))) == NULL) {
-	ErrorF("XVMC Can not allocate private context\n");
-	return BadAlloc;
-    }
-
-    if ((context_dup = Xcalloc(sizeof(*private_context))) == NULL) {
-	ErrorF("XVMC Can not allocate private context\n");
-	return BadAlloc;
-    }
-
-    private_context->is_g4x = IS_G4X(I830);
-    private_context->is_965_q = IS_965_Q(I830);
-    private_context->is_igdng = IS_IGDNG(I830);
-    private_context->comm.kernel_exec_fencing = 1;
-    private_context->comm.type = xvmc_driver->flag;
-
-    *num_privates = sizeof(*private_context)/sizeof(CARD32);
-    *private = (CARD32 *)private_context;
-    memcpy(context_dup, private_context, sizeof(*private_context));
-    context->driver_priv = context_dup;
-
-    return Success;
+	struct i965_xvmc_context *private_context, *context_dup;
+	I830Ptr I830 = I830PTR(pScrn);
+
+	unsigned int blocknum =
+	    (((context->width + 15) / 16) * ((context->height + 15) / 16));
+	unsigned int blocksize = 6 * blocknum * 64 * sizeof(short);
+	blocksize = (blocksize + 4095) & (~4095);
+	if ((private_context = Xcalloc(sizeof(*private_context))) == NULL) {
+		ErrorF("XVMC Can not allocate private context\n");
+		return BadAlloc;
+	}
+
+	if ((context_dup = Xcalloc(sizeof(*private_context))) == NULL) {
+		ErrorF("XVMC Can not allocate private context\n");
+		return BadAlloc;
+	}
+
+	private_context->is_g4x = IS_G4X(I830);
+	private_context->is_965_q = IS_965_Q(I830);
+	private_context->is_igdng = IS_IGDNG(I830);
+	private_context->comm.kernel_exec_fencing = 1;
+	private_context->comm.type = xvmc_driver->flag;
+
+	*num_privates = sizeof(*private_context) / sizeof(CARD32);
+	*private = (CARD32 *) private_context;
+	memcpy(context_dup, private_context, sizeof(*private_context));
+	context->driver_priv = context_dup;
+
+	return Success;
 }
 
 static void destroy_context(ScrnInfoPtr pScrn, XvMCContextPtr context)
 {
-    struct i965_xvmc_context *private_context;
-    private_context = context->driver_priv;
-    Xfree(private_context);
+	struct i965_xvmc_context *private_context;
+	private_context = context->driver_priv;
+	Xfree(private_context);
 }
 
 static int create_surface(ScrnInfoPtr pScrn, XvMCSurfacePtr surface,
-  int *num_priv, CARD32 **priv)
+			  int *num_priv, CARD32 ** priv)
 {
 	XvMCContextPtr ctx = surface->context;
 
 	struct i965_xvmc_surface *priv_surface, *surface_dup;
 	struct i965_xvmc_context *priv_ctx = ctx->driver_priv;
 	int i;
-	for (i = 0 ; i < I965_MAX_SURFACES; i++) {
-	    if (priv_ctx->surfaces[i] == NULL) {
-		priv_surface = Xcalloc(sizeof(*priv_surface));
-		if (priv_surface == NULL)
-		    return BadAlloc;
-		surface_dup = Xcalloc(sizeof(*priv_surface));
-		if (surface_dup == NULL)
-		    return BadAlloc;
-		
-		priv_surface->no = i;
-		priv_surface->handle = priv_surface;
-		priv_surface->w = ctx->width;
-		priv_surface->h = ctx->height;
-		priv_ctx->surfaces[i] = surface->driver_priv 
-		    = priv_surface;
-		memcpy(surface_dup, priv_surface, sizeof(*priv_surface));
-		*num_priv = sizeof(*priv_surface)/sizeof(CARD32);
-		*priv = (CARD32 *)surface_dup;
-		break;
-	    }
+	for (i = 0; i < I965_MAX_SURFACES; i++) {
+		if (priv_ctx->surfaces[i] == NULL) {
+			priv_surface = Xcalloc(sizeof(*priv_surface));
+			if (priv_surface == NULL)
+				return BadAlloc;
+			surface_dup = Xcalloc(sizeof(*priv_surface));
+			if (surface_dup == NULL)
+				return BadAlloc;
+
+			priv_surface->no = i;
+			priv_surface->handle = priv_surface;
+			priv_surface->w = ctx->width;
+			priv_surface->h = ctx->height;
+			priv_ctx->surfaces[i] = surface->driver_priv
+			    = priv_surface;
+			memcpy(surface_dup, priv_surface,
+			       sizeof(*priv_surface));
+			*num_priv = sizeof(*priv_surface) / sizeof(CARD32);
+			*priv = (CARD32 *) surface_dup;
+			break;
+		}
 	}
 
 	if (i >= I965_MAX_SURFACES) {
-	    ErrorF("I965 XVMC too many surfaces in one context\n");
-	    return BadAlloc;
+		ErrorF("I965 XVMC too many surfaces in one context\n");
+		return BadAlloc;
 	}
-	
+
 	return Success;
 }
 
 static void destory_surface(ScrnInfoPtr pScrn, XvMCSurfacePtr surface)
 {
 	XvMCContextPtr ctx = surface->context;
-	struct i965_xvmc_surface *priv_surface = surface->driver_priv; 
+	struct i965_xvmc_surface *priv_surface = surface->driver_priv;
 	struct i965_xvmc_context *priv_ctx = ctx->driver_priv;
 	priv_ctx->surfaces[priv_surface->no] = NULL;
 	Xfree(priv_surface);
 }
 
 static int create_subpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr subpicture,
-  int *num_priv, CARD32 **priv)
+			     int *num_priv, CARD32 ** priv)
 {
 	return Success;
 }
@@ -150,32 +151,33 @@ static void destroy_subpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr subpicture)
 }
 
 static int put_image(ScrnInfoPtr pScrn,
-        short src_x, short src_y,
-        short drw_x, short drw_y, short src_w,
-        short src_h, short drw_w, short drw_h,
-        int id, unsigned char *buf, short width,
-        short height, Bool sync, RegionPtr clipBoxes, pointer data,
-        DrawablePtr pDraw)
+		     short src_x, short src_y,
+		     short drw_x, short drw_y, short src_w,
+		     short src_h, short drw_w, short drw_h,
+		     int id, unsigned char *buf, short width,
+		     short height, Bool sync, RegionPtr clipBoxes, pointer data,
+		     DrawablePtr pDraw)
 {
 	I830Ptr pI830 = I830PTR(pScrn);
 	struct intel_xvmc_command *cmd = (struct intel_xvmc_command *)buf;
 	dri_bo *bo;
 
 	if (id == FOURCC_XVMC) {
-            bo = intel_bo_gem_create_from_name(pI830->bufmgr, "surface", cmd->handle);
-            dri_bo_pin(bo, 0x1000);
-	/* XXX: KMS */
+		bo = intel_bo_gem_create_from_name(pI830->bufmgr, "surface",
+						   cmd->handle);
+		dri_bo_pin(bo, 0x1000);
+		/* XXX: KMS */
 #if 0
-	    buf = pI830->FbBase + bo->offset;
+		buf = pI830->FbBase + bo->offset;
 #endif
 	}
 	XvPutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h,
-		drw_w, drw_h, id, buf, width, height, sync, clipBoxes,
-		data, pDraw);
+		   drw_w, drw_h, id, buf, width, height, sync, clipBoxes,
+		   data, pDraw);
 
 	if (id == FOURCC_XVMC) {
-	    dri_bo_unpin(bo);
-	    dri_bo_unreference(bo);
+		dri_bo_unpin(bo);
+		dri_bo_unreference(bo);
 	}
 
 	return Success;
@@ -183,113 +185,109 @@ static int put_image(ScrnInfoPtr pScrn,
 
 static Bool init(ScrnInfoPtr screen_info, XF86VideoAdaptorPtr adaptor)
 {
-    XvPutImage = adaptor->PutImage;
-    adaptor->PutImage = put_image;
+	XvPutImage = adaptor->PutImage;
+	adaptor->PutImage = put_image;
 
-    return TRUE;
+	return TRUE;
 }
 
 static void fini(ScrnInfoPtr screen_info)
 {
 }
 
-static XF86MCSurfaceInfoRec yv12_mpeg2_vld_surface =
-{
-    FOURCC_YV12,
-    XVMC_CHROMA_FORMAT_420,
-    0,
-    1936,
-    1096,
-    1920,
-    1080,
-    XVMC_MPEG_2|XVMC_VLD,
-    XVMC_INTRA_UNSIGNED,
-    NULL
+static XF86MCSurfaceInfoRec yv12_mpeg2_vld_surface = {
+	FOURCC_YV12,
+	XVMC_CHROMA_FORMAT_420,
+	0,
+	1936,
+	1096,
+	1920,
+	1080,
+	XVMC_MPEG_2 | XVMC_VLD,
+	XVMC_INTRA_UNSIGNED,
+	NULL
 };
 
-static XF86MCSurfaceInfoRec yv12_mpeg2_surface =
-{
-    FOURCC_YV12,
-    XVMC_CHROMA_FORMAT_420,
-    0,
-    1936,
-    1096,
-    1920,
-    1080,
-    XVMC_MPEG_2|XVMC_MOCOMP,
-    /* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING,*/
-    XVMC_INTRA_UNSIGNED,
-    /* &yv12_subpicture_list*/
-    NULL
+static XF86MCSurfaceInfoRec yv12_mpeg2_surface = {
+	FOURCC_YV12,
+	XVMC_CHROMA_FORMAT_420,
+	0,
+	1936,
+	1096,
+	1920,
+	1080,
+	XVMC_MPEG_2 | XVMC_MOCOMP,
+	/* XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING, */
+	XVMC_INTRA_UNSIGNED,
+	/* &yv12_subpicture_list */
+	NULL
 };
 
-static XF86MCSurfaceInfoRec yv12_mpeg1_surface =
-{
-    FOURCC_YV12,
-    XVMC_CHROMA_FORMAT_420,
-    0,
-    1920,
-    1080,
-    1920,
-    1080,
-    XVMC_MPEG_1|XVMC_MOCOMP,
-    /*XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING |
-    XVMC_INTRA_UNSIGNED,*/
-    XVMC_INTRA_UNSIGNED,
-    	
-    /*&yv12_subpicture_list*/
-    NULL
+static XF86MCSurfaceInfoRec yv12_mpeg1_surface = {
+	FOURCC_YV12,
+	XVMC_CHROMA_FORMAT_420,
+	0,
+	1920,
+	1080,
+	1920,
+	1080,
+	XVMC_MPEG_1 | XVMC_MOCOMP,
+	/*XVMC_OVERLAID_SURFACE | XVMC_SUBPICTURE_INDEPENDENT_SCALING |
+	   XVMC_INTRA_UNSIGNED, */
+	XVMC_INTRA_UNSIGNED,
+
+	/*&yv12_subpicture_list */
+	NULL
 };
 
 static XF86MCSurfaceInfoPtr surface_info[] = {
-    &yv12_mpeg2_surface,
-    &yv12_mpeg1_surface
+	&yv12_mpeg2_surface,
+	&yv12_mpeg1_surface
 };
 
 static XF86MCSurfaceInfoPtr surface_info_vld[] = {
-    &yv12_mpeg2_vld_surface,
-    &yv12_mpeg2_surface,
+	&yv12_mpeg2_vld_surface,
+	&yv12_mpeg2_surface,
 };
 
 static XF86MCAdaptorRec adaptor_vld = {
-    .name               = "Intel(R) Textured Video",
-    .num_surfaces       = sizeof(surface_info_vld)/sizeof(surface_info_vld[0]),
-    .surfaces           = surface_info_vld,
-
-    .CreateContext 	= create_context,
-    .DestroyContext	= destroy_context,
-    .CreateSurface 	= create_surface, 
-    .DestroySurface 	= destory_surface,
-    .CreateSubpicture   = create_subpicture,
-    .DestroySubpicture  = destroy_subpicture
+	.name = "Intel(R) Textured Video",
+	.num_surfaces = sizeof(surface_info_vld) / sizeof(surface_info_vld[0]),
+	.surfaces = surface_info_vld,
+
+	.CreateContext = create_context,
+	.DestroyContext = destroy_context,
+	.CreateSurface = create_surface,
+	.DestroySurface = destory_surface,
+	.CreateSubpicture = create_subpicture,
+	.DestroySubpicture = destroy_subpicture
 };
 
 static XF86MCAdaptorRec adaptor = {
-    .name               = "Intel(R) Textured Video",
-    .num_surfaces       = sizeof(surface_info)/sizeof(surface_info[0]),
-    .surfaces           = surface_info,
-
-    .CreateContext 	= create_context,
-    .DestroyContext	= destroy_context,
-    .CreateSurface 	= create_surface, 
-    .DestroySurface 	= destory_surface,
-    .CreateSubpicture   = create_subpicture,
-    .DestroySubpicture  = destroy_subpicture
+	.name = "Intel(R) Textured Video",
+	.num_surfaces = sizeof(surface_info) / sizeof(surface_info[0]),
+	.surfaces = surface_info,
+
+	.CreateContext = create_context,
+	.DestroyContext = destroy_context,
+	.CreateSurface = create_surface,
+	.DestroySurface = destory_surface,
+	.CreateSubpicture = create_subpicture,
+	.DestroySubpicture = destroy_subpicture
 };
 
 struct intel_xvmc_driver i965_xvmc_driver = {
-    .name               = "i965_xvmc",
-    .adaptor            = &adaptor,
-    .flag               = XVMC_I965_MPEG2_MC,
-    .init 		= init,
-    .fini		= fini
+	.name = "i965_xvmc",
+	.adaptor = &adaptor,
+	.flag = XVMC_I965_MPEG2_MC,
+	.init = init,
+	.fini = fini
 };
 
-struct intel_xvmc_driver vld_xvmc_driver =  {
-    .name               = "xvmc_vld",
-    .adaptor            = &adaptor_vld,
-    .flag               = XVMC_I965_MPEG2_VLD,
-    .init 		= init,
-    .fini		= fini
+struct intel_xvmc_driver vld_xvmc_driver = {
+	.name = "xvmc_vld",
+	.adaptor = &adaptor_vld,
+	.flag = XVMC_I965_MPEG2_VLD,
+	.init = init,
+	.fini = fini
 };
-
diff --git a/src/i965_hwmc.h b/src/i965_hwmc.h
index 12d977b2..5bdd4525 100644
--- a/src/i965_hwmc.h
+++ b/src/i965_hwmc.h
@@ -1,28 +1,28 @@
 #define I965_MC_STATIC_BUFFER_SIZE	(1024*512)
 #define I965_MAX_SURFACES		12
 struct _i830_memory;
-struct  drm_memory_block {
-    struct 		_i830_memory *buffer;
-    drm_handle_t 	handle;
-    drmAddress 		ptr;
-    size_t 		size;
-    unsigned long 	offset;
+struct drm_memory_block {
+	struct _i830_memory *buffer;
+	drm_handle_t handle;
+	drmAddress ptr;
+	size_t size;
+	unsigned long offset;
 };
 
 struct i965_xvmc_surface {
-    int			w, h;
-    unsigned int 	no;
-    void 		*handle; 
-    dri_bo		*bo;
+	int w, h;
+	unsigned int no;
+	void *handle;
+	dri_bo *bo;
 };
 
 struct i965_xvmc_context {
-    struct 	_intel_xvmc_common comm;
-    struct 	drm_memory_block static_buffer;
-    struct 	drm_memory_block blocks;
-    struct 	drm_memory_block slice;
-    struct 	i965_xvmc_surface *surfaces[I965_MAX_SURFACES];
-    unsigned    int is_g4x:1;
-    unsigned    int is_965_q:1;
-    unsigned    int is_igdng:1;   
+	struct _intel_xvmc_common comm;
+	struct drm_memory_block static_buffer;
+	struct drm_memory_block blocks;
+	struct drm_memory_block slice;
+	struct i965_xvmc_surface *surfaces[I965_MAX_SURFACES];
+	unsigned int is_g4x:1;
+	unsigned int is_965_q:1;
+	unsigned int is_igdng:1;
 };
diff --git a/src/i965_render.c b/src/i965_render.c
index 7d8056ae..8fa3c0f1 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -52,48 +52,49 @@
 #define VERTEX_BUFFER_SIZE		(256 * VERTEX_FLOATS_PER_COMPOSITE)
 
 struct blendinfo {
-    Bool dst_alpha;
-    Bool src_alpha;
-    uint32_t src_blend;
-    uint32_t dst_blend;
+	Bool dst_alpha;
+	Bool src_alpha;
+	uint32_t src_blend;
+	uint32_t dst_blend;
 };
 
 struct formatinfo {
-    int fmt;
-    uint32_t card_fmt;
+	int fmt;
+	uint32_t card_fmt;
 };
 
 // refer vol2, 3d rasterization 3.8.1
 
 /* defined in brw_defines.h */
 static struct blendinfo i965_blend_op[] = {
-    /* Clear */
-    {0, 0, BRW_BLENDFACTOR_ZERO,          BRW_BLENDFACTOR_ZERO},
-    /* Src */
-    {0, 0, BRW_BLENDFACTOR_ONE,           BRW_BLENDFACTOR_ZERO},
-    /* Dst */
-    {0, 0, BRW_BLENDFACTOR_ZERO,          BRW_BLENDFACTOR_ONE},
-    /* Over */
-    {0, 1, BRW_BLENDFACTOR_ONE,           BRW_BLENDFACTOR_INV_SRC_ALPHA},
-    /* OverReverse */
-    {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
-    /* In */
-    {1, 0, BRW_BLENDFACTOR_DST_ALPHA,     BRW_BLENDFACTOR_ZERO},
-    /* InReverse */
-    {0, 1, BRW_BLENDFACTOR_ZERO,          BRW_BLENDFACTOR_SRC_ALPHA},
-    /* Out */
-    {1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
-    /* OutReverse */
-    {0, 1, BRW_BLENDFACTOR_ZERO,          BRW_BLENDFACTOR_INV_SRC_ALPHA},
-    /* Atop */
-    {1, 1, BRW_BLENDFACTOR_DST_ALPHA,     BRW_BLENDFACTOR_INV_SRC_ALPHA},
-    /* AtopReverse */
-    {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_SRC_ALPHA},
-    /* Xor */
-    {1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
-    /* Add */
-    {0, 0, BRW_BLENDFACTOR_ONE,           BRW_BLENDFACTOR_ONE},
+	/* Clear */
+	{0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ZERO},
+	/* Src */
+	{0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ZERO},
+	/* Dst */
+	{0, 0, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_ONE},
+	/* Over */
+	{0, 1, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+	/* OverReverse */
+	{1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ONE},
+	/* In */
+	{1, 0, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
+	/* InReverse */
+	{0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_SRC_ALPHA},
+	/* Out */
+	{1, 0, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_ZERO},
+	/* OutReverse */
+	{0, 1, BRW_BLENDFACTOR_ZERO, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+	/* Atop */
+	{1, 1, BRW_BLENDFACTOR_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+	/* AtopReverse */
+	{1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_SRC_ALPHA},
+	/* Xor */
+	{1, 1, BRW_BLENDFACTOR_INV_DST_ALPHA, BRW_BLENDFACTOR_INV_SRC_ALPHA},
+	/* Add */
+	{0, 0, BRW_BLENDFACTOR_ONE, BRW_BLENDFACTOR_ONE},
 };
+
 /**
  * Highest-valued BLENDFACTOR used in i965_blend_op.
  *
@@ -107,149 +108,149 @@ static struct blendinfo i965_blend_op[] = {
  * 1.7.2
  */
 static struct formatinfo i965_tex_formats[] = {
-    {PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM },
-    {PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM },
-    {PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM },
-    {PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM },
-    {PICT_r5g6b5,   BRW_SURFACEFORMAT_B5G6R5_UNORM   },
-    {PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM },
-    {PICT_a8,       BRW_SURFACEFORMAT_A8_UNORM	 },
+	{PICT_a8r8g8b8, BRW_SURFACEFORMAT_B8G8R8A8_UNORM},
+	{PICT_x8r8g8b8, BRW_SURFACEFORMAT_B8G8R8X8_UNORM},
+	{PICT_a8b8g8r8, BRW_SURFACEFORMAT_R8G8B8A8_UNORM},
+	{PICT_x8b8g8r8, BRW_SURFACEFORMAT_R8G8B8X8_UNORM},
+	{PICT_r5g6b5, BRW_SURFACEFORMAT_B5G6R5_UNORM},
+	{PICT_a1r5g5b5, BRW_SURFACEFORMAT_B5G5R5A1_UNORM},
+	{PICT_a8, BRW_SURFACEFORMAT_A8_UNORM},
 };
 
 static void i965_get_blend_cntl(int op, PicturePtr pMask, uint32_t dst_format,
-				uint32_t *sblend, uint32_t *dblend)
+				uint32_t * sblend, uint32_t * dblend)
 {
 
-    *sblend = i965_blend_op[op].src_blend;
-    *dblend = i965_blend_op[op].dst_blend;
-
-    /* If there's no dst alpha channel, adjust the blend op so that we'll treat
-     * it as always 1.
-     */
-    if (PICT_FORMAT_A(dst_format) == 0 && i965_blend_op[op].dst_alpha) {
-        if (*sblend == BRW_BLENDFACTOR_DST_ALPHA)
-            *sblend = BRW_BLENDFACTOR_ONE;
-        else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA)
-            *sblend = BRW_BLENDFACTOR_ZERO;
-    }
-
-    /* If the source alpha is being used, then we should only be in a case where
-     * the source blend factor is 0, and the source blend value is the mask
-     * channels multiplied by the source picture's alpha.
-     */
-    if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format)
-            && i965_blend_op[op].src_alpha) {
-        if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) {
-	    *dblend = BRW_BLENDFACTOR_SRC_COLOR;
-        } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
-	    *dblend = BRW_BLENDFACTOR_INV_SRC_COLOR;
-        }
-    }
+	*sblend = i965_blend_op[op].src_blend;
+	*dblend = i965_blend_op[op].dst_blend;
+
+	/* If there's no dst alpha channel, adjust the blend op so that we'll treat
+	 * it as always 1.
+	 */
+	if (PICT_FORMAT_A(dst_format) == 0 && i965_blend_op[op].dst_alpha) {
+		if (*sblend == BRW_BLENDFACTOR_DST_ALPHA)
+			*sblend = BRW_BLENDFACTOR_ONE;
+		else if (*sblend == BRW_BLENDFACTOR_INV_DST_ALPHA)
+			*sblend = BRW_BLENDFACTOR_ZERO;
+	}
+
+	/* If the source alpha is being used, then we should only be in a case where
+	 * the source blend factor is 0, and the source blend value is the mask
+	 * channels multiplied by the source picture's alpha.
+	 */
+	if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format)
+	    && i965_blend_op[op].src_alpha) {
+		if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) {
+			*dblend = BRW_BLENDFACTOR_SRC_COLOR;
+		} else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) {
+			*dblend = BRW_BLENDFACTOR_INV_SRC_COLOR;
+		}
+	}
 
 }
 
-static Bool i965_get_dest_format(PicturePtr pDstPicture, uint32_t *dst_format)
+static Bool i965_get_dest_format(PicturePtr pDstPicture, uint32_t * dst_format)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-
-    switch (pDstPicture->format) {
-    case PICT_a8r8g8b8:
-    case PICT_x8r8g8b8:
-        *dst_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
-        break;
-    case PICT_r5g6b5:
-        *dst_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
-        break;
-    case PICT_a1r5g5b5:
-    	*dst_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
-	break;
-    case PICT_x1r5g5b5:
-        *dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM;
-        break;
-    case PICT_a8:
-        *dst_format = BRW_SURFACEFORMAT_A8_UNORM;
-        break;
-    case PICT_a4r4g4b4:
-    case PICT_x4r4g4b4:
-	*dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
-	break;
-    default:
-        I830FALLBACK("Unsupported dest format 0x%x\n",
-		     (int)pDstPicture->format);
-    }
-
-    return TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+
+	switch (pDstPicture->format) {
+	case PICT_a8r8g8b8:
+	case PICT_x8r8g8b8:
+		*dst_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+		break;
+	case PICT_r5g6b5:
+		*dst_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
+		break;
+	case PICT_a1r5g5b5:
+		*dst_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
+		break;
+	case PICT_x1r5g5b5:
+		*dst_format = BRW_SURFACEFORMAT_B5G5R5X1_UNORM;
+		break;
+	case PICT_a8:
+		*dst_format = BRW_SURFACEFORMAT_A8_UNORM;
+		break;
+	case PICT_a4r4g4b4:
+	case PICT_x4r4g4b4:
+		*dst_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
+		break;
+	default:
+		I830FALLBACK("Unsupported dest format 0x%x\n",
+			     (int)pDstPicture->format);
+	}
+
+	return TRUE;
 }
 
-static Bool i965_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict, int unit)
+static Bool i965_check_composite_texture(ScrnInfoPtr pScrn, PicturePtr pPict,
+					 int unit)
 {
-    if (pPict->repeatType > RepeatReflect)
-	I830FALLBACK("extended repeat (%d) not supported\n",
-		     pPict->repeatType);
+	if (pPict->repeatType > RepeatReflect)
+		I830FALLBACK("extended repeat (%d) not supported\n",
+			     pPict->repeatType);
 
-    if (pPict->filter != PictFilterNearest &&
-        pPict->filter != PictFilterBilinear)
-    {
-        I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
-    }
+	if (pPict->filter != PictFilterNearest &&
+	    pPict->filter != PictFilterBilinear) {
+		I830FALLBACK("Unsupported filter 0x%x\n", pPict->filter);
+	}
 
-    if (pPict->pDrawable)
-    {
-	int w, h, i;
+	if (pPict->pDrawable) {
+		int w, h, i;
 
-	w = pPict->pDrawable->width;
-	h = pPict->pDrawable->height;
-	if ((w > 8192) || (h > 8192))
-	    I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
+		w = pPict->pDrawable->width;
+		h = pPict->pDrawable->height;
+		if ((w > 8192) || (h > 8192))
+			I830FALLBACK("Picture w/h too large (%dx%d)\n", w, h);
 
-	for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
-	     i++)
-	{
-	    if (i965_tex_formats[i].fmt == pPict->format)
-		break;
+		for (i = 0;
+		     i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
+		     i++) {
+			if (i965_tex_formats[i].fmt == pPict->format)
+				break;
+		}
+		if (i == sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]))
+			I830FALLBACK("Unsupported picture format 0x%x\n",
+				     (int)pPict->format);
 	}
-	if (i == sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]))
-	    I830FALLBACK("Unsupported picture format 0x%x\n",
-			 (int)pPict->format);
-    }
 
-    return TRUE;
+	return TRUE;
 }
 
 Bool
 i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 		     PicturePtr pDstPicture)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-    uint32_t tmp1;
-
-    /* Check for unsupported compositing operations. */
-    if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0]))
-        I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-
-    if (pMaskPicture && pMaskPicture->componentAlpha &&
-            PICT_FORMAT_RGB(pMaskPicture->format)) {
-        /* Check if it's component alpha that relies on a source alpha and on
-         * the source value.  We can only get one of those into the single
-         * source value that we get to blend with.
-         */
-        if (i965_blend_op[op].src_alpha &&
-            (i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO))
-	{
-	    I830FALLBACK("Component alpha not supported with source "
-			 "alpha and source value blending.\n");
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+	uint32_t tmp1;
+
+	/* Check for unsupported compositing operations. */
+	if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0]))
+		I830FALLBACK("Unsupported Composite op 0x%x\n", op);
+
+	if (pMaskPicture && pMaskPicture->componentAlpha &&
+	    PICT_FORMAT_RGB(pMaskPicture->format)) {
+		/* Check if it's component alpha that relies on a source alpha and on
+		 * the source value.  We can only get one of those into the single
+		 * source value that we get to blend with.
+		 */
+		if (i965_blend_op[op].src_alpha &&
+		    (i965_blend_op[op].src_blend != BRW_BLENDFACTOR_ZERO)) {
+			I830FALLBACK
+			    ("Component alpha not supported with source "
+			     "alpha and source value blending.\n");
+		}
 	}
-    } 
 
-    if (!i965_check_composite_texture(pScrn, pSrcPicture, 0))
-        I830FALLBACK("Check Src picture texture\n");
-    if (pMaskPicture != NULL && !i965_check_composite_texture(pScrn, pMaskPicture, 1))
-        I830FALLBACK("Check Mask picture texture\n");
+	if (!i965_check_composite_texture(pScrn, pSrcPicture, 0))
+		I830FALLBACK("Check Src picture texture\n");
+	if (pMaskPicture != NULL
+	    && !i965_check_composite_texture(pScrn, pMaskPicture, 1))
+		I830FALLBACK("Check Mask picture texture\n");
 
-    if (!i965_get_dest_format(pDstPicture, &tmp1))
-	I830FALLBACK("Get Color buffer format\n");
+	if (!i965_get_dest_format(pDstPicture, &tmp1))
+		I830FALLBACK("Get Color buffer format\n");
 
-    return TRUE;
+	return TRUE;
 
 }
 
@@ -261,8 +262,8 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 #define URB_CS_ENTRY_SIZE     0
 #define URB_CS_ENTRIES	      0
 
-#define URB_VS_ENTRY_SIZE     1	  // each 512-bit row
-#define URB_VS_ENTRIES	      8	  // we needs at least 8 entries
+#define URB_VS_ENTRY_SIZE     1	// each 512-bit row
+#define URB_VS_ENTRIES	      8	// we needs at least 8 entries
 
 #define URB_GS_ENTRY_SIZE     0
 #define URB_GS_ENTRIES	      0
@@ -275,25 +276,25 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
 
 static const uint32_t sip_kernel_static[][4] = {
 /*    wait (1) a0<1>UW a145<0,1,0>UW { align1 +  } */
-    { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
+	{0x00000030, 0x20000108, 0x00001220, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 };
 
 /*
@@ -316,21 +317,21 @@ static const uint32_t sf_kernel_mask_static[][4] = {
 #define PS_KERNEL_NUM_GRF   32
 #define PS_MAX_THREADS	    48
 
-static const uint32_t ps_kernel_nomask_affine_static [][4] = {
+static const uint32_t ps_kernel_nomask_affine_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_affine.g4b"
 #include "exa_wm_src_sample_argb.g4b"
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_nomask_projective_static [][4] = {
+static const uint32_t ps_kernel_nomask_projective_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_projective.g4b"
 #include "exa_wm_src_sample_argb.g4b"
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_maskca_affine_static [][4] = {
+static const uint32_t ps_kernel_maskca_affine_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_affine.g4b"
 #include "exa_wm_src_sample_argb.g4b"
@@ -340,7 +341,7 @@ static const uint32_t ps_kernel_maskca_affine_static [][4] = {
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_maskca_projective_static [][4] = {
+static const uint32_t ps_kernel_maskca_projective_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_projective.g4b"
 #include "exa_wm_src_sample_argb.g4b"
@@ -350,7 +351,7 @@ static const uint32_t ps_kernel_maskca_projective_static [][4] = {
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_maskca_srcalpha_affine_static [][4] = {
+static const uint32_t ps_kernel_maskca_srcalpha_affine_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_affine.g4b"
 #include "exa_wm_src_sample_a.g4b"
@@ -360,7 +361,7 @@ static const uint32_t ps_kernel_maskca_srcalpha_affine_static [][4] = {
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_maskca_srcalpha_projective_static [][4] = {
+static const uint32_t ps_kernel_maskca_srcalpha_projective_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_projective.g4b"
 #include "exa_wm_src_sample_a.g4b"
@@ -370,7 +371,7 @@ static const uint32_t ps_kernel_maskca_srcalpha_projective_static [][4] = {
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_masknoca_affine_static [][4] = {
+static const uint32_t ps_kernel_masknoca_affine_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_affine.g4b"
 #include "exa_wm_src_sample_argb.g4b"
@@ -380,7 +381,7 @@ static const uint32_t ps_kernel_masknoca_affine_static [][4] = {
 #include "exa_wm_write.g4b"
 };
 
-static const uint32_t ps_kernel_masknoca_projective_static [][4] = {
+static const uint32_t ps_kernel_masknoca_projective_static[][4] = {
 #include "exa_wm_xy.g4b"
 #include "exa_wm_src_projective.g4b"
 #include "exa_wm_src_sample_argb.g4b"
@@ -399,21 +400,21 @@ static const uint32_t sf_kernel_mask_static_gen5[][4] = {
 #include "exa_sf_mask.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_nomask_affine_static_gen5 [][4] = {
+static const uint32_t ps_kernel_nomask_affine_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_affine.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_nomask_projective_static_gen5 [][4] = {
+static const uint32_t ps_kernel_nomask_projective_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_projective.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_maskca_affine_static_gen5 [][4] = {
+static const uint32_t ps_kernel_maskca_affine_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_affine.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
@@ -423,7 +424,7 @@ static const uint32_t ps_kernel_maskca_affine_static_gen5 [][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_maskca_projective_static_gen5 [][4] = {
+static const uint32_t ps_kernel_maskca_projective_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_projective.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
@@ -433,7 +434,7 @@ static const uint32_t ps_kernel_maskca_projective_static_gen5 [][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen5 [][4] = {
+static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_affine.g4b.gen5"
 #include "exa_wm_src_sample_a.g4b.gen5"
@@ -443,7 +444,7 @@ static const uint32_t ps_kernel_maskca_srcalpha_affine_static_gen5 [][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen5 [][4] = {
+static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_projective.g4b.gen5"
 #include "exa_wm_src_sample_a.g4b.gen5"
@@ -453,7 +454,7 @@ static const uint32_t ps_kernel_maskca_srcalpha_projective_static_gen5 [][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_masknoca_affine_static_gen5 [][4] = {
+static const uint32_t ps_kernel_masknoca_affine_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_affine.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
@@ -463,7 +464,7 @@ static const uint32_t ps_kernel_masknoca_affine_static_gen5 [][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static const uint32_t ps_kernel_masknoca_projective_static_gen5 [][4] = {
+static const uint32_t ps_kernel_masknoca_projective_static_gen5[][4] = {
 #include "exa_wm_xy.g4b.gen5"
 #include "exa_wm_src_projective.g4b.gen5"
 #include "exa_wm_src_sample_argb.g4b.gen5"
@@ -487,135 +488,136 @@ static const uint32_t ps_kernel_masknoca_projective_static_gen5 [][4] = {
 #define PAD64(previous, idx) PAD64_MULTI(previous, idx, 1)
 
 typedef enum {
-    SAMPLER_STATE_FILTER_NEAREST,
-    SAMPLER_STATE_FILTER_BILINEAR,
-    SAMPLER_STATE_FILTER_COUNT
+	SAMPLER_STATE_FILTER_NEAREST,
+	SAMPLER_STATE_FILTER_BILINEAR,
+	SAMPLER_STATE_FILTER_COUNT
 } sampler_state_filter_t;
 
 typedef enum {
-    SAMPLER_STATE_EXTEND_NONE,
-    SAMPLER_STATE_EXTEND_REPEAT,
-    SAMPLER_STATE_EXTEND_PAD,
-    SAMPLER_STATE_EXTEND_REFLECT,
-    SAMPLER_STATE_EXTEND_COUNT
+	SAMPLER_STATE_EXTEND_NONE,
+	SAMPLER_STATE_EXTEND_REPEAT,
+	SAMPLER_STATE_EXTEND_PAD,
+	SAMPLER_STATE_EXTEND_REFLECT,
+	SAMPLER_STATE_EXTEND_COUNT
 } sampler_state_extend_t;
 
 typedef enum {
-    WM_KERNEL_NOMASK_AFFINE,
-    WM_KERNEL_NOMASK_PROJECTIVE,
-    WM_KERNEL_MASKCA_AFFINE,
-    WM_KERNEL_MASKCA_PROJECTIVE,
-    WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
-    WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
-    WM_KERNEL_MASKNOCA_AFFINE,
-    WM_KERNEL_MASKNOCA_PROJECTIVE,
-    WM_KERNEL_COUNT
+	WM_KERNEL_NOMASK_AFFINE,
+	WM_KERNEL_NOMASK_PROJECTIVE,
+	WM_KERNEL_MASKCA_AFFINE,
+	WM_KERNEL_MASKCA_PROJECTIVE,
+	WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
+	WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
+	WM_KERNEL_MASKNOCA_AFFINE,
+	WM_KERNEL_MASKNOCA_PROJECTIVE,
+	WM_KERNEL_COUNT
 } wm_kernel_t;
 
 #define KERNEL(kernel_enum, kernel, masked) \
     [kernel_enum] = {&kernel, sizeof(kernel), masked}
 struct wm_kernel_info {
-    void *data;
-    unsigned int size;
-    Bool has_mask;
+	void *data;
+	unsigned int size;
+	Bool has_mask;
 };
 
 static struct wm_kernel_info wm_kernels[] = {
-    KERNEL(WM_KERNEL_NOMASK_AFFINE,
-	   ps_kernel_nomask_affine_static, FALSE),
-    KERNEL(WM_KERNEL_NOMASK_PROJECTIVE,
-	   ps_kernel_nomask_projective_static, FALSE),
-    KERNEL(WM_KERNEL_MASKCA_AFFINE,
-	   ps_kernel_maskca_affine_static, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_PROJECTIVE,
-	   ps_kernel_maskca_projective_static, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
-	   ps_kernel_maskca_srcalpha_affine_static, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
-	   ps_kernel_maskca_srcalpha_projective_static, TRUE),
-    KERNEL(WM_KERNEL_MASKNOCA_AFFINE,
-	   ps_kernel_masknoca_affine_static, TRUE),
-    KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE,
-	   ps_kernel_masknoca_projective_static, TRUE),
+	KERNEL(WM_KERNEL_NOMASK_AFFINE,
+	       ps_kernel_nomask_affine_static, FALSE),
+	KERNEL(WM_KERNEL_NOMASK_PROJECTIVE,
+	       ps_kernel_nomask_projective_static, FALSE),
+	KERNEL(WM_KERNEL_MASKCA_AFFINE,
+	       ps_kernel_maskca_affine_static, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_PROJECTIVE,
+	       ps_kernel_maskca_projective_static, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
+	       ps_kernel_maskca_srcalpha_affine_static, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
+	       ps_kernel_maskca_srcalpha_projective_static, TRUE),
+	KERNEL(WM_KERNEL_MASKNOCA_AFFINE,
+	       ps_kernel_masknoca_affine_static, TRUE),
+	KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE,
+	       ps_kernel_masknoca_projective_static, TRUE),
 };
 
 static struct wm_kernel_info wm_kernels_gen5[] = {
-    KERNEL(WM_KERNEL_NOMASK_AFFINE,
-	   ps_kernel_nomask_affine_static_gen5, FALSE),
-    KERNEL(WM_KERNEL_NOMASK_PROJECTIVE,
-	   ps_kernel_nomask_projective_static_gen5, FALSE),
-    KERNEL(WM_KERNEL_MASKCA_AFFINE,
-	   ps_kernel_maskca_affine_static_gen5, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_PROJECTIVE,
-	   ps_kernel_maskca_projective_static_gen5, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
-	   ps_kernel_maskca_srcalpha_affine_static_gen5, TRUE),
-    KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
-	   ps_kernel_maskca_srcalpha_projective_static_gen5, TRUE),
-    KERNEL(WM_KERNEL_MASKNOCA_AFFINE,
-	   ps_kernel_masknoca_affine_static_gen5, TRUE),
-    KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE,
-	   ps_kernel_masknoca_projective_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_NOMASK_AFFINE,
+	       ps_kernel_nomask_affine_static_gen5, FALSE),
+	KERNEL(WM_KERNEL_NOMASK_PROJECTIVE,
+	       ps_kernel_nomask_projective_static_gen5, FALSE),
+	KERNEL(WM_KERNEL_MASKCA_AFFINE,
+	       ps_kernel_maskca_affine_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_PROJECTIVE,
+	       ps_kernel_maskca_projective_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_SRCALPHA_AFFINE,
+	       ps_kernel_maskca_srcalpha_affine_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE,
+	       ps_kernel_maskca_srcalpha_projective_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_MASKNOCA_AFFINE,
+	       ps_kernel_masknoca_affine_static_gen5, TRUE),
+	KERNEL(WM_KERNEL_MASKNOCA_PROJECTIVE,
+	       ps_kernel_masknoca_projective_static_gen5, TRUE),
 };
+
 #undef KERNEL
 
 typedef struct _brw_cc_unit_state_padded {
-    struct brw_cc_unit_state state;
-    char pad[64 - sizeof (struct brw_cc_unit_state)];
+	struct brw_cc_unit_state state;
+	char pad[64 - sizeof(struct brw_cc_unit_state)];
 } brw_cc_unit_state_padded;
 
 typedef struct brw_surface_state_padded {
-    struct brw_surface_state state;
-    char pad[32 - sizeof (struct brw_surface_state)];
+	struct brw_surface_state state;
+	char pad[32 - sizeof(struct brw_surface_state)];
 } brw_surface_state_padded;
 
 struct gen4_cc_unit_state {
-    /* Index by [src_blend][dst_blend] */
-    brw_cc_unit_state_padded cc_state[BRW_BLENDFACTOR_COUNT]
-				     [BRW_BLENDFACTOR_COUNT];
+	/* Index by [src_blend][dst_blend] */
+	brw_cc_unit_state_padded cc_state[BRW_BLENDFACTOR_COUNT]
+	    [BRW_BLENDFACTOR_COUNT];
 };
 
 typedef float gen4_vertex_buffer[VERTEX_BUFFER_SIZE];
 
 typedef struct gen4_composite_op {
-    int		op;
-    PicturePtr	source_picture;
-    PicturePtr	mask_picture;
-    PicturePtr	dest_picture;
-    PixmapPtr	source;
-    PixmapPtr	mask;
-    PixmapPtr	dest;
-    drm_intel_bo *binding_table_bo;
-    sampler_state_filter_t src_filter;
-    sampler_state_filter_t mask_filter;
-    sampler_state_extend_t src_extend;
-    sampler_state_extend_t mask_extend;
-    Bool is_affine;
-    wm_kernel_t wm_kernel;
+	int op;
+	PicturePtr source_picture;
+	PicturePtr mask_picture;
+	PicturePtr dest_picture;
+	PixmapPtr source;
+	PixmapPtr mask;
+	PixmapPtr dest;
+	drm_intel_bo *binding_table_bo;
+	sampler_state_filter_t src_filter;
+	sampler_state_filter_t mask_filter;
+	sampler_state_extend_t src_extend;
+	sampler_state_extend_t mask_extend;
+	Bool is_affine;
+	wm_kernel_t wm_kernel;
 } gen4_composite_op;
 
 /** Private data for gen4 render accel implementation. */
 struct gen4_render_state {
-    drm_intel_bo *vs_state_bo;
-    drm_intel_bo *sf_state_bo;
-    drm_intel_bo *sf_mask_state_bo;
-    drm_intel_bo *cc_state_bo;
-    drm_intel_bo *wm_state_bo[WM_KERNEL_COUNT]
-			     [SAMPLER_STATE_FILTER_COUNT]
-			     [SAMPLER_STATE_EXTEND_COUNT]
-			     [SAMPLER_STATE_FILTER_COUNT]
-			     [SAMPLER_STATE_EXTEND_COUNT];
-    drm_intel_bo *wm_kernel_bo[WM_KERNEL_COUNT];
-
-    drm_intel_bo *sip_kernel_bo;
-    dri_bo* vertex_buffer_bo;
-
-    gen4_composite_op composite_op;
-
-    int vb_offset;
-    int vertex_size;
-
-    Bool needs_state_emit;
+	drm_intel_bo *vs_state_bo;
+	drm_intel_bo *sf_state_bo;
+	drm_intel_bo *sf_mask_state_bo;
+	drm_intel_bo *cc_state_bo;
+	drm_intel_bo *wm_state_bo[WM_KERNEL_COUNT]
+	    [SAMPLER_STATE_FILTER_COUNT]
+	    [SAMPLER_STATE_EXTEND_COUNT]
+	    [SAMPLER_STATE_FILTER_COUNT]
+	    [SAMPLER_STATE_EXTEND_COUNT];
+	drm_intel_bo *wm_kernel_bo[WM_KERNEL_COUNT];
+
+	drm_intel_bo *sip_kernel_bo;
+	dri_bo *vertex_buffer_bo;
+
+	gen4_composite_op composite_op;
+
+	int vb_offset;
+	int vertex_size;
+
+	Bool needs_state_emit;
 };
 
 /**
@@ -625,409 +627,400 @@ struct gen4_render_state {
  * calculate dA/dx and dA/dy.  Hand these interpolation coefficients
  * back to SF which then hands pixels off to WM.
  */
-static drm_intel_bo *
-gen4_create_sf_state(ScrnInfoPtr scrn, drm_intel_bo *kernel_bo)
+static drm_intel_bo *gen4_create_sf_state(ScrnInfoPtr scrn,
+					  drm_intel_bo * kernel_bo)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    struct brw_sf_unit_state *sf_state;
-    drm_intel_bo *sf_state_bo;
-
-    sf_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 SF state",
-				     sizeof(*sf_state), 4096);
-    drm_intel_bo_map(sf_state_bo, TRUE);
-    sf_state = sf_state_bo->virtual;
-
-    memset(sf_state, 0, sizeof(*sf_state));
-    sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
-    sf_state->thread0.kernel_start_pointer =
-	intel_emit_reloc(sf_state_bo,
-			 offsetof(struct brw_sf_unit_state, thread0),
-			 kernel_bo, sf_state->thread0.grf_reg_count << 1,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
-    sf_state->sf1.single_program_flow = 1;
-    sf_state->sf1.binding_table_entry_count = 0;
-    sf_state->sf1.thread_priority = 0;
-    sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
-    sf_state->sf1.illegal_op_exception_enable = 1;
-    sf_state->sf1.mask_stack_exception_enable = 1;
-    sf_state->sf1.sw_exception_enable = 1;
-    sf_state->thread2.per_thread_scratch_space = 0;
-    /* scratch space is not used in our kernel */
-    sf_state->thread2.scratch_space_base_pointer = 0;
-    sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
-    sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
-    sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
-    /* don't smash vertex header, read start from dw8 */
-    sf_state->thread3.urb_entry_read_offset = 1;
-    sf_state->thread3.dispatch_grf_start_reg = 3;
-    sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
-    sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
-    sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
-    sf_state->thread4.stats_enable = 1;
-    sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
-    sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
-    sf_state->sf6.scissor = 0;
-    sf_state->sf7.trifan_pv = 2;
-    sf_state->sf6.dest_org_vbias = 0x8;
-    sf_state->sf6.dest_org_hbias = 0x8;
-
-    drm_intel_bo_unmap(sf_state_bo);
-
-    return sf_state_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	struct brw_sf_unit_state *sf_state;
+	drm_intel_bo *sf_state_bo;
+
+	sf_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 SF state",
+					 sizeof(*sf_state), 4096);
+	drm_intel_bo_map(sf_state_bo, TRUE);
+	sf_state = sf_state_bo->virtual;
+
+	memset(sf_state, 0, sizeof(*sf_state));
+	sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
+	sf_state->thread0.kernel_start_pointer =
+	    intel_emit_reloc(sf_state_bo,
+			     offsetof(struct brw_sf_unit_state, thread0),
+			     kernel_bo, sf_state->thread0.grf_reg_count << 1,
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
+	sf_state->sf1.single_program_flow = 1;
+	sf_state->sf1.binding_table_entry_count = 0;
+	sf_state->sf1.thread_priority = 0;
+	sf_state->sf1.floating_point_mode = 0;	/* Mesa does this */
+	sf_state->sf1.illegal_op_exception_enable = 1;
+	sf_state->sf1.mask_stack_exception_enable = 1;
+	sf_state->sf1.sw_exception_enable = 1;
+	sf_state->thread2.per_thread_scratch_space = 0;
+	/* scratch space is not used in our kernel */
+	sf_state->thread2.scratch_space_base_pointer = 0;
+	sf_state->thread3.const_urb_entry_read_length = 0;	/* no const URBs */
+	sf_state->thread3.const_urb_entry_read_offset = 0;	/* no const URBs */
+	sf_state->thread3.urb_entry_read_length = 1;	/* 1 URB per vertex */
+	/* don't smash vertex header, read start from dw8 */
+	sf_state->thread3.urb_entry_read_offset = 1;
+	sf_state->thread3.dispatch_grf_start_reg = 3;
+	sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
+	sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
+	sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
+	sf_state->thread4.stats_enable = 1;
+	sf_state->sf5.viewport_transform = FALSE;	/* skip viewport */
+	sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
+	sf_state->sf6.scissor = 0;
+	sf_state->sf7.trifan_pv = 2;
+	sf_state->sf6.dest_org_vbias = 0x8;
+	sf_state->sf6.dest_org_hbias = 0x8;
+
+	drm_intel_bo_unmap(sf_state_bo);
+
+	return sf_state_bo;
 }
 
-static drm_intel_bo *
-sampler_border_color_create(ScrnInfoPtr scrn)
+static drm_intel_bo *sampler_border_color_create(ScrnInfoPtr scrn)
 {
-    struct brw_sampler_legacy_border_color sampler_border_color;
-
-    /* Set up the sampler border color (always transparent black) */
-    memset(&sampler_border_color, 0, sizeof(sampler_border_color));
-    sampler_border_color.color[0] = 0; /* R */
-    sampler_border_color.color[1] = 0; /* G */
-    sampler_border_color.color[2] = 0; /* B */
-    sampler_border_color.color[3] = 0; /* A */
-
-    return intel_bo_alloc_for_data(scrn,
-				   &sampler_border_color,
-				   sizeof(sampler_border_color),
-				   "gen4 render sampler border color");
+	struct brw_sampler_legacy_border_color sampler_border_color;
+
+	/* Set up the sampler border color (always transparent black) */
+	memset(&sampler_border_color, 0, sizeof(sampler_border_color));
+	sampler_border_color.color[0] = 0;	/* R */
+	sampler_border_color.color[1] = 0;	/* G */
+	sampler_border_color.color[2] = 0;	/* B */
+	sampler_border_color.color[3] = 0;	/* A */
+
+	return intel_bo_alloc_for_data(scrn,
+				       &sampler_border_color,
+				       sizeof(sampler_border_color),
+				       "gen4 render sampler border color");
 }
 
 static void
-sampler_state_init (drm_intel_bo *sampler_state_bo,
-		    struct brw_sampler_state *sampler_state,
-		    sampler_state_filter_t filter,
-		    sampler_state_extend_t extend,
-		    drm_intel_bo *border_color_bo)
+sampler_state_init(drm_intel_bo * sampler_state_bo,
+		   struct brw_sampler_state *sampler_state,
+		   sampler_state_filter_t filter,
+		   sampler_state_extend_t extend,
+		   drm_intel_bo * border_color_bo)
 {
-    uint32_t sampler_state_offset;
-
-    sampler_state_offset = (char *)sampler_state -
-	(char *)sampler_state_bo->virtual;
-
-    /* PS kernel use this sampler */
-    memset(sampler_state, 0, sizeof(*sampler_state));
-
-    sampler_state->ss0.lod_preclamp = 1; /* GL mode */
-
-    /* We use the legacy mode to get the semantics specified by
-     * the Render extension. */
-    sampler_state->ss0.border_color_mode = BRW_BORDER_COLOR_MODE_LEGACY;
-
-    switch(filter) {
-    default:
-    case SAMPLER_STATE_FILTER_NEAREST:
-	sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
-	sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
-	break;
-    case SAMPLER_STATE_FILTER_BILINEAR:
-	sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
-	sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
-	break;
-    }
-
-    switch (extend) {
-    default:
-    case SAMPLER_STATE_EXTEND_NONE:
-	sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
-	sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
-	sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
-	break;
-    case SAMPLER_STATE_EXTEND_REPEAT:
-	sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
-	sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
-	sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
-	break;
-    case SAMPLER_STATE_EXTEND_PAD:
-	sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-	sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-	sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-	break;
-    case SAMPLER_STATE_EXTEND_REFLECT:
-	sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
-	sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
-	sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
-	break;
-    }
-
-    sampler_state->ss2.border_color_pointer =
-	intel_emit_reloc(sampler_state_bo, sampler_state_offset +
-			 offsetof(struct brw_sampler_state, ss2),
-			 border_color_bo, 0,
-			 I915_GEM_DOMAIN_SAMPLER, 0) >> 5;
-
-    sampler_state->ss3.chroma_key_enable = 0; /* disable chromakey */
+	uint32_t sampler_state_offset;
+
+	sampler_state_offset = (char *)sampler_state -
+	    (char *)sampler_state_bo->virtual;
+
+	/* PS kernel use this sampler */
+	memset(sampler_state, 0, sizeof(*sampler_state));
+
+	sampler_state->ss0.lod_preclamp = 1;	/* GL mode */
+
+	/* We use the legacy mode to get the semantics specified by
+	 * the Render extension. */
+	sampler_state->ss0.border_color_mode = BRW_BORDER_COLOR_MODE_LEGACY;
+
+	switch (filter) {
+	default:
+	case SAMPLER_STATE_FILTER_NEAREST:
+		sampler_state->ss0.min_filter = BRW_MAPFILTER_NEAREST;
+		sampler_state->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
+		break;
+	case SAMPLER_STATE_FILTER_BILINEAR:
+		sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+		sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
+		break;
+	}
+
+	switch (extend) {
+	default:
+	case SAMPLER_STATE_EXTEND_NONE:
+		sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+		sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+		sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP_BORDER;
+		break;
+	case SAMPLER_STATE_EXTEND_REPEAT:
+		sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+		sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+		sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
+		break;
+	case SAMPLER_STATE_EXTEND_PAD:
+		sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+		sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+		sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+		break;
+	case SAMPLER_STATE_EXTEND_REFLECT:
+		sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
+		sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
+		sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_MIRROR;
+		break;
+	}
+
+	sampler_state->ss2.border_color_pointer =
+	    intel_emit_reloc(sampler_state_bo, sampler_state_offset +
+			     offsetof(struct brw_sampler_state, ss2),
+			     border_color_bo, 0,
+			     I915_GEM_DOMAIN_SAMPLER, 0) >> 5;
+
+	sampler_state->ss3.chroma_key_enable = 0;	/* disable chromakey */
 }
 
-static drm_intel_bo *
-gen4_create_sampler_state(ScrnInfoPtr scrn,
-			  sampler_state_filter_t src_filter,
-			  sampler_state_extend_t src_extend,
-			  sampler_state_filter_t mask_filter,
-			  sampler_state_extend_t mask_extend,
-			  drm_intel_bo *border_color_bo)
+static drm_intel_bo *gen4_create_sampler_state(ScrnInfoPtr scrn,
+					       sampler_state_filter_t
+					       src_filter,
+					       sampler_state_extend_t
+					       src_extend,
+					       sampler_state_filter_t
+					       mask_filter,
+					       sampler_state_extend_t
+					       mask_extend,
+					       drm_intel_bo * border_color_bo)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *sampler_state_bo;
-    struct brw_sampler_state *sampler_state;
-
-    sampler_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 sampler state",
-					  sizeof(struct brw_sampler_state) * 2,
-					  4096);
-    drm_intel_bo_map(sampler_state_bo, TRUE);
-    sampler_state = sampler_state_bo->virtual;
-
-    sampler_state_init(sampler_state_bo,
-		       &sampler_state[0],
-		       src_filter, src_extend,
-		       border_color_bo);
-    sampler_state_init(sampler_state_bo,
-		       &sampler_state[1],
-		       mask_filter, mask_extend,
-		       border_color_bo);
-
-    drm_intel_bo_unmap(sampler_state_bo);
-
-    return sampler_state_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *sampler_state_bo;
+	struct brw_sampler_state *sampler_state;
+
+	sampler_state_bo =
+	    drm_intel_bo_alloc(pI830->bufmgr, "gen4 sampler state",
+			       sizeof(struct brw_sampler_state) * 2, 4096);
+	drm_intel_bo_map(sampler_state_bo, TRUE);
+	sampler_state = sampler_state_bo->virtual;
+
+	sampler_state_init(sampler_state_bo,
+			   &sampler_state[0],
+			   src_filter, src_extend, border_color_bo);
+	sampler_state_init(sampler_state_bo,
+			   &sampler_state[1],
+			   mask_filter, mask_extend, border_color_bo);
+
+	drm_intel_bo_unmap(sampler_state_bo);
+
+	return sampler_state_bo;
 }
 
 static void
-cc_state_init (drm_intel_bo *cc_state_bo,
-	       uint32_t cc_state_offset,
-	       int src_blend,
-	       int dst_blend,
-	       drm_intel_bo *cc_vp_bo)
+cc_state_init(drm_intel_bo * cc_state_bo,
+	      uint32_t cc_state_offset,
+	      int src_blend, int dst_blend, drm_intel_bo * cc_vp_bo)
 {
-    struct brw_cc_unit_state *cc_state;
-
-    cc_state = (struct brw_cc_unit_state *)((char *)cc_state_bo->virtual +
-					    cc_state_offset);
-
-    memset(cc_state, 0, sizeof(*cc_state));
-    cc_state->cc0.stencil_enable = 0;   /* disable stencil */
-    cc_state->cc2.depth_test = 0;       /* disable depth test */
-    cc_state->cc2.logicop_enable = 0;   /* disable logic op */
-    cc_state->cc3.ia_blend_enable = 0;  /* blend alpha same as colors */
-    cc_state->cc3.blend_enable = 1;     /* enable color blend */
-    cc_state->cc3.alpha_test = 0;       /* disable alpha test */
-
-    cc_state->cc4.cc_viewport_state_offset =
-	intel_emit_reloc(cc_state_bo, cc_state_offset +
-			 offsetof(struct brw_cc_unit_state, cc4),
-			 cc_vp_bo, 0,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
-
-    cc_state->cc5.dither_enable = 0;    /* disable dither */
-    cc_state->cc5.logicop_func = 0xc;   /* COPY */
-    cc_state->cc5.statistics_enable = 1;
-    cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
-
-    /* Fill in alpha blend factors same as color, for the future. */
-    cc_state->cc5.ia_src_blend_factor = src_blend;
-    cc_state->cc5.ia_dest_blend_factor = dst_blend;
-
-    cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
-    cc_state->cc6.clamp_post_alpha_blend = 1;
-    cc_state->cc6.clamp_pre_alpha_blend = 1;
-    cc_state->cc6.clamp_range = 0;  /* clamp range [0,1] */
-
-    cc_state->cc6.src_blend_factor = src_blend;
-    cc_state->cc6.dest_blend_factor = dst_blend;
+	struct brw_cc_unit_state *cc_state;
+
+	cc_state = (struct brw_cc_unit_state *)((char *)cc_state_bo->virtual +
+						cc_state_offset);
+
+	memset(cc_state, 0, sizeof(*cc_state));
+	cc_state->cc0.stencil_enable = 0;	/* disable stencil */
+	cc_state->cc2.depth_test = 0;	/* disable depth test */
+	cc_state->cc2.logicop_enable = 0;	/* disable logic op */
+	cc_state->cc3.ia_blend_enable = 0;	/* blend alpha same as colors */
+	cc_state->cc3.blend_enable = 1;	/* enable color blend */
+	cc_state->cc3.alpha_test = 0;	/* disable alpha test */
+
+	cc_state->cc4.cc_viewport_state_offset =
+	    intel_emit_reloc(cc_state_bo, cc_state_offset +
+			     offsetof(struct brw_cc_unit_state, cc4),
+			     cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
+
+	cc_state->cc5.dither_enable = 0;	/* disable dither */
+	cc_state->cc5.logicop_func = 0xc;	/* COPY */
+	cc_state->cc5.statistics_enable = 1;
+	cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
+
+	/* Fill in alpha blend factors same as color, for the future. */
+	cc_state->cc5.ia_src_blend_factor = src_blend;
+	cc_state->cc5.ia_dest_blend_factor = dst_blend;
+
+	cc_state->cc6.blend_function = BRW_BLENDFUNCTION_ADD;
+	cc_state->cc6.clamp_post_alpha_blend = 1;
+	cc_state->cc6.clamp_pre_alpha_blend = 1;
+	cc_state->cc6.clamp_range = 0;	/* clamp range [0,1] */
+
+	cc_state->cc6.src_blend_factor = src_blend;
+	cc_state->cc6.dest_blend_factor = dst_blend;
 }
 
-static drm_intel_bo *
-gen4_create_wm_state(ScrnInfoPtr scrn,
-		     Bool has_mask, drm_intel_bo *kernel_bo,
-		     drm_intel_bo *sampler_bo)
+static drm_intel_bo *gen4_create_wm_state(ScrnInfoPtr scrn,
+					  Bool has_mask,
+					  drm_intel_bo * kernel_bo,
+					  drm_intel_bo * sampler_bo)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    struct brw_wm_unit_state *wm_state;
-    drm_intel_bo *wm_state_bo;
-
-    wm_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 WM state",
-				     sizeof(*wm_state), 4096);
-    drm_intel_bo_map(wm_state_bo, TRUE);
-    wm_state = wm_state_bo->virtual;
-
-    memset(wm_state, 0, sizeof (*wm_state));
-    wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
-    wm_state->thread0.kernel_start_pointer =
-	intel_emit_reloc(wm_state_bo,
-			 offsetof(struct brw_wm_unit_state, thread0),
-                         kernel_bo, wm_state->thread0.grf_reg_count << 1,
-                         I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
-
-    wm_state->thread1.single_program_flow = 0;
-
-    /* scratch space is not used in our kernel */
-    wm_state->thread2.scratch_space_base_pointer = 0;
-    wm_state->thread2.per_thread_scratch_space = 0;
-
-    wm_state->thread3.const_urb_entry_read_length = 0;
-    wm_state->thread3.const_urb_entry_read_offset = 0;
-
-    wm_state->thread3.urb_entry_read_offset = 0;
-    /* wm kernel use urb from 3, see wm_program in compiler module */
-    wm_state->thread3.dispatch_grf_start_reg = 3; /* must match kernel */
-
-    wm_state->wm4.stats_enable = 1;  /* statistic */
-    
-    if (IS_IGDNG(pI830))
-        wm_state->wm4.sampler_count = 0; /* hardware requirement */
-    else
-        wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
-
-    wm_state->wm4.sampler_state_pointer =
-	intel_emit_reloc(wm_state_bo, offsetof(struct brw_wm_unit_state, wm4),
-			 sampler_bo,
-			 wm_state->wm4.stats_enable +
-			 (wm_state->wm4.sampler_count << 2),
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
-    wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
-    wm_state->wm5.transposed_urb_read = 0;
-    wm_state->wm5.thread_dispatch_enable = 1;
-    /* just use 16-pixel dispatch (4 subspans), don't need to change kernel
-     * start point
-     */
-    wm_state->wm5.enable_16_pix = 1;
-    wm_state->wm5.enable_8_pix = 0;
-    wm_state->wm5.early_depth_test = 1;
-
-    /* Each pair of attributes (src/mask coords) is two URB entries */
-    if (has_mask) {
-	wm_state->thread1.binding_table_entry_count = 3; /* 2 tex and fb */
-	wm_state->thread3.urb_entry_read_length = 4;
-    } else {
-	wm_state->thread1.binding_table_entry_count = 2; /* 1 tex and fb */
-	wm_state->thread3.urb_entry_read_length = 2;
-    }
-
-    /* binding table entry count is only used for prefetching, and it has to 
-     * be set 0 for IGDNG
-     */
-    if (IS_IGDNG(pI830))
-        wm_state->thread1.binding_table_entry_count = 0;
-
-    drm_intel_bo_unmap(wm_state_bo);
-
-    return wm_state_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	struct brw_wm_unit_state *wm_state;
+	drm_intel_bo *wm_state_bo;
+
+	wm_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 WM state",
+					 sizeof(*wm_state), 4096);
+	drm_intel_bo_map(wm_state_bo, TRUE);
+	wm_state = wm_state_bo->virtual;
+
+	memset(wm_state, 0, sizeof(*wm_state));
+	wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
+	wm_state->thread0.kernel_start_pointer =
+	    intel_emit_reloc(wm_state_bo,
+			     offsetof(struct brw_wm_unit_state, thread0),
+			     kernel_bo, wm_state->thread0.grf_reg_count << 1,
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
+
+	wm_state->thread1.single_program_flow = 0;
+
+	/* scratch space is not used in our kernel */
+	wm_state->thread2.scratch_space_base_pointer = 0;
+	wm_state->thread2.per_thread_scratch_space = 0;
+
+	wm_state->thread3.const_urb_entry_read_length = 0;
+	wm_state->thread3.const_urb_entry_read_offset = 0;
+
+	wm_state->thread3.urb_entry_read_offset = 0;
+	/* wm kernel use urb from 3, see wm_program in compiler module */
+	wm_state->thread3.dispatch_grf_start_reg = 3;	/* must match kernel */
+
+	wm_state->wm4.stats_enable = 1;	/* statistic */
+
+	if (IS_IGDNG(pI830))
+		wm_state->wm4.sampler_count = 0;	/* hardware requirement */
+	else
+		wm_state->wm4.sampler_count = 1;	/* 1-4 samplers used */
+
+	wm_state->wm4.sampler_state_pointer =
+	    intel_emit_reloc(wm_state_bo,
+			     offsetof(struct brw_wm_unit_state, wm4),
+			     sampler_bo,
+			     wm_state->wm4.stats_enable +
+			     (wm_state->wm4.sampler_count << 2),
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
+	wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
+	wm_state->wm5.transposed_urb_read = 0;
+	wm_state->wm5.thread_dispatch_enable = 1;
+	/* just use 16-pixel dispatch (4 subspans), don't need to change kernel
+	 * start point
+	 */
+	wm_state->wm5.enable_16_pix = 1;
+	wm_state->wm5.enable_8_pix = 0;
+	wm_state->wm5.early_depth_test = 1;
+
+	/* Each pair of attributes (src/mask coords) is two URB entries */
+	if (has_mask) {
+		wm_state->thread1.binding_table_entry_count = 3;	/* 2 tex and fb */
+		wm_state->thread3.urb_entry_read_length = 4;
+	} else {
+		wm_state->thread1.binding_table_entry_count = 2;	/* 1 tex and fb */
+		wm_state->thread3.urb_entry_read_length = 2;
+	}
+
+	/* binding table entry count is only used for prefetching, and it has to
+	 * be set 0 for IGDNG
+	 */
+	if (IS_IGDNG(pI830))
+		wm_state->thread1.binding_table_entry_count = 0;
+
+	drm_intel_bo_unmap(wm_state_bo);
+
+	return wm_state_bo;
 }
 
-static drm_intel_bo *
-gen4_create_cc_viewport(ScrnInfoPtr scrn)
+static drm_intel_bo *gen4_create_cc_viewport(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *bo;
-    struct brw_cc_viewport cc_viewport;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *bo;
+	struct brw_cc_viewport cc_viewport;
 
-    cc_viewport.min_depth = -1.e35;
-    cc_viewport.max_depth = 1.e35;
+	cc_viewport.min_depth = -1.e35;
+	cc_viewport.max_depth = 1.e35;
 
-    bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 render unit state",
-			    sizeof(cc_viewport), 4096);
-    drm_intel_bo_subdata(bo, 0, sizeof(cc_viewport), &cc_viewport);
+	bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 render unit state",
+				sizeof(cc_viewport), 4096);
+	drm_intel_bo_subdata(bo, 0, sizeof(cc_viewport), &cc_viewport);
 
-    return bo;
+	return bo;
 }
 
-static drm_intel_bo *
-gen4_create_vs_unit_state(ScrnInfoPtr scrn)
+static drm_intel_bo *gen4_create_vs_unit_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    struct brw_vs_unit_state vs_state;
-    memset(&vs_state, 0, sizeof(vs_state));
-
-    /* Set up the vertex shader to be disabled (passthrough) */
-    if (IS_IGDNG(pI830))
-        vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2; /* hardware requirement */
-    else
-        vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
-    vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
-    vs_state.vs6.vs_enable = 0;
-    vs_state.vs6.vert_cache_disable = 1;
-
-    return intel_bo_alloc_for_data(scrn, &vs_state, sizeof(vs_state),
-				   "gen4 render VS state");
+	I830Ptr pI830 = I830PTR(scrn);
+	struct brw_vs_unit_state vs_state;
+	memset(&vs_state, 0, sizeof(vs_state));
+
+	/* Set up the vertex shader to be disabled (passthrough) */
+	if (IS_IGDNG(pI830))
+		vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;	/* hardware requirement */
+	else
+		vs_state.thread4.nr_urb_entries = URB_VS_ENTRIES;
+	vs_state.thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
+	vs_state.vs6.vs_enable = 0;
+	vs_state.vs6.vert_cache_disable = 1;
+
+	return intel_bo_alloc_for_data(scrn, &vs_state, sizeof(vs_state),
+				       "gen4 render VS state");
 }
 
 /**
  * Set up all combinations of cc state: each blendfactor for source and
  * dest.
  */
-static drm_intel_bo *
-gen4_create_cc_unit_state(ScrnInfoPtr scrn)
+static drm_intel_bo *gen4_create_cc_unit_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    struct gen4_cc_unit_state *cc_state;
-    drm_intel_bo *cc_state_bo, *cc_vp_bo;
-    int i, j;
-
-    cc_vp_bo = gen4_create_cc_viewport(scrn);
-
-    cc_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 CC state",
-				     sizeof(*cc_state), 4096);
-    drm_intel_bo_map(cc_state_bo, TRUE);
-    cc_state = cc_state_bo->virtual;
-    for (i = 0; i < BRW_BLENDFACTOR_COUNT; i++) {
-	for (j = 0; j < BRW_BLENDFACTOR_COUNT; j++) {
-	    cc_state_init(cc_state_bo,
-			  offsetof(struct gen4_cc_unit_state,
-				   cc_state[i][j].state),
-			  i, j, cc_vp_bo);
+	I830Ptr pI830 = I830PTR(scrn);
+	struct gen4_cc_unit_state *cc_state;
+	drm_intel_bo *cc_state_bo, *cc_vp_bo;
+	int i, j;
+
+	cc_vp_bo = gen4_create_cc_viewport(scrn);
+
+	cc_state_bo = drm_intel_bo_alloc(pI830->bufmgr, "gen4 CC state",
+					 sizeof(*cc_state), 4096);
+	drm_intel_bo_map(cc_state_bo, TRUE);
+	cc_state = cc_state_bo->virtual;
+	for (i = 0; i < BRW_BLENDFACTOR_COUNT; i++) {
+		for (j = 0; j < BRW_BLENDFACTOR_COUNT; j++) {
+			cc_state_init(cc_state_bo,
+				      offsetof(struct gen4_cc_unit_state,
+					       cc_state[i][j].state),
+				      i, j, cc_vp_bo);
+		}
 	}
-    }
-    drm_intel_bo_unmap(cc_state_bo);
+	drm_intel_bo_unmap(cc_state_bo);
 
-    drm_intel_bo_unreference(cc_vp_bo);
+	drm_intel_bo_unreference(cc_vp_bo);
 
-    return cc_state_bo;
+	return cc_state_bo;
 }
 
-static uint32_t 
-i965_get_card_format(PicturePtr pPict)
+static uint32_t i965_get_card_format(PicturePtr pPict)
 {
-    int i;
+	int i;
 
-    for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
-	 i++)
-    {
-	if (i965_tex_formats[i].fmt == pPict->format)
-	    break;
-    }
-    assert(i != sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]));
+	for (i = 0; i < sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]);
+	     i++) {
+		if (i965_tex_formats[i].fmt == pPict->format)
+			break;
+	}
+	assert(i != sizeof(i965_tex_formats) / sizeof(i965_tex_formats[0]));
 
-    return i965_tex_formats[i].card_fmt;
+	return i965_tex_formats[i].card_fmt;
 }
 
-static sampler_state_filter_t
-sampler_state_filter_from_picture (int filter)
+static sampler_state_filter_t sampler_state_filter_from_picture(int filter)
 {
-    switch (filter) {
-    case PictFilterNearest:
-	return SAMPLER_STATE_FILTER_NEAREST;
-    case PictFilterBilinear:
-	return SAMPLER_STATE_FILTER_BILINEAR;
-    default:
-	return -1;
-    }
+	switch (filter) {
+	case PictFilterNearest:
+		return SAMPLER_STATE_FILTER_NEAREST;
+	case PictFilterBilinear:
+		return SAMPLER_STATE_FILTER_BILINEAR;
+	default:
+		return -1;
+	}
 }
 
-static sampler_state_extend_t
-sampler_state_extend_from_picture (int repeat_type)
+static sampler_state_extend_t sampler_state_extend_from_picture(int repeat_type)
 {
-    switch (repeat_type) {
-    case RepeatNone:
-	return SAMPLER_STATE_EXTEND_NONE;
-    case RepeatNormal:
-	return SAMPLER_STATE_EXTEND_REPEAT;
-    case RepeatPad:
-	return SAMPLER_STATE_EXTEND_PAD;
-    case RepeatReflect:
-	return SAMPLER_STATE_EXTEND_REFLECT;
-    default:
-	return -1;
-    }
+	switch (repeat_type) {
+	case RepeatNone:
+		return SAMPLER_STATE_EXTEND_NONE;
+	case RepeatNormal:
+		return SAMPLER_STATE_EXTEND_REPEAT;
+	case RepeatPad:
+		return SAMPLER_STATE_EXTEND_PAD;
+	case RepeatReflect:
+		return SAMPLER_STATE_EXTEND_REFLECT;
+	default:
+		return -1;
+	}
 }
 
 /**
@@ -1035,401 +1028,412 @@ sampler_state_extend_from_picture (int repeat_type)
  * picture in the given surface state buffer.
  */
 static void
-i965_set_picture_surface_state(dri_bo *ss_bo, int ss_index,
+i965_set_picture_surface_state(dri_bo * ss_bo, int ss_index,
 			       PicturePtr pPicture, PixmapPtr pPixmap,
 			       Bool is_dst)
 {
-    struct brw_surface_state_padded *ss;
-    struct brw_surface_state local_ss;
-    dri_bo *pixmap_bo = i830_get_pixmap_bo(pPixmap);
-
-    ss = (struct brw_surface_state_padded *)ss_bo->virtual + ss_index;
-
-    /* Since ss is a pointer to WC memory, do all of our bit operations
-     * into a local temporary first.
-     */
-    memset(&local_ss, 0, sizeof(local_ss));
-    local_ss.ss0.surface_type = BRW_SURFACE_2D;
-    if (is_dst) {
-	uint32_t dst_format = 0;
-	Bool ret = TRUE;
-
-	ret = i965_get_dest_format(pPicture, &dst_format);
-	assert(ret == TRUE);
-	local_ss.ss0.surface_format = dst_format;
-    } else {
-	local_ss.ss0.surface_format = i965_get_card_format(pPicture);
-    }
-
-    local_ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
-    local_ss.ss0.writedisable_alpha = 0;
-    local_ss.ss0.writedisable_red = 0;
-    local_ss.ss0.writedisable_green = 0;
-    local_ss.ss0.writedisable_blue = 0;
-    local_ss.ss0.color_blend = 1;
-    local_ss.ss0.vert_line_stride = 0;
-    local_ss.ss0.vert_line_stride_ofs = 0;
-    local_ss.ss0.mipmap_layout_mode = 0;
-    local_ss.ss0.render_cache_read_mode = 0;
-    local_ss.ss1.base_addr = pixmap_bo->offset;
-
-    local_ss.ss2.mip_count = 0;
-    local_ss.ss2.render_target_rotation = 0;
-    local_ss.ss2.height = pPixmap->drawable.height - 1;
-    local_ss.ss2.width = pPixmap->drawable.width - 1;
-    local_ss.ss3.pitch = intel_get_pixmap_pitch(pPixmap) - 1;
-    local_ss.ss3.tile_walk = 0; /* Tiled X */
-    local_ss.ss3.tiled_surface = i830_pixmap_tiled(pPixmap) ? 1 : 0;
-
-    memcpy(ss, &local_ss, sizeof(local_ss));
-
-    if (pixmap_bo != NULL) {
-	uint32_t write_domain, read_domains;
+	struct brw_surface_state_padded *ss;
+	struct brw_surface_state local_ss;
+	dri_bo *pixmap_bo = i830_get_pixmap_bo(pPixmap);
 
+	ss = (struct brw_surface_state_padded *)ss_bo->virtual + ss_index;
+
+	/* Since ss is a pointer to WC memory, do all of our bit operations
+	 * into a local temporary first.
+	 */
+	memset(&local_ss, 0, sizeof(local_ss));
+	local_ss.ss0.surface_type = BRW_SURFACE_2D;
 	if (is_dst) {
-	    write_domain = I915_GEM_DOMAIN_RENDER;
-	    read_domains = I915_GEM_DOMAIN_RENDER;
+		uint32_t dst_format = 0;
+		Bool ret = TRUE;
+
+		ret = i965_get_dest_format(pPicture, &dst_format);
+		assert(ret == TRUE);
+		local_ss.ss0.surface_format = dst_format;
 	} else {
-	    write_domain = 0;
-	    read_domains = I915_GEM_DOMAIN_SAMPLER;
+		local_ss.ss0.surface_format = i965_get_card_format(pPicture);
+	}
+
+	local_ss.ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
+	local_ss.ss0.writedisable_alpha = 0;
+	local_ss.ss0.writedisable_red = 0;
+	local_ss.ss0.writedisable_green = 0;
+	local_ss.ss0.writedisable_blue = 0;
+	local_ss.ss0.color_blend = 1;
+	local_ss.ss0.vert_line_stride = 0;
+	local_ss.ss0.vert_line_stride_ofs = 0;
+	local_ss.ss0.mipmap_layout_mode = 0;
+	local_ss.ss0.render_cache_read_mode = 0;
+	local_ss.ss1.base_addr = pixmap_bo->offset;
+
+	local_ss.ss2.mip_count = 0;
+	local_ss.ss2.render_target_rotation = 0;
+	local_ss.ss2.height = pPixmap->drawable.height - 1;
+	local_ss.ss2.width = pPixmap->drawable.width - 1;
+	local_ss.ss3.pitch = intel_get_pixmap_pitch(pPixmap) - 1;
+	local_ss.ss3.tile_walk = 0;	/* Tiled X */
+	local_ss.ss3.tiled_surface = i830_pixmap_tiled(pPixmap) ? 1 : 0;
+
+	memcpy(ss, &local_ss, sizeof(local_ss));
+
+	if (pixmap_bo != NULL) {
+		uint32_t write_domain, read_domains;
+
+		if (is_dst) {
+			write_domain = I915_GEM_DOMAIN_RENDER;
+			read_domains = I915_GEM_DOMAIN_RENDER;
+		} else {
+			write_domain = 0;
+			read_domains = I915_GEM_DOMAIN_SAMPLER;
+		}
+		dri_bo_emit_reloc(ss_bo, read_domains, write_domain,
+				  0,
+				  ss_index * sizeof(*ss) +
+				  offsetof(struct brw_surface_state, ss1),
+				  pixmap_bo);
 	}
-	dri_bo_emit_reloc(ss_bo, read_domains, write_domain,
-			  0,
-			  ss_index * sizeof(*ss) +
-			  offsetof(struct brw_surface_state, ss1),
-			  pixmap_bo);
-    }
 }
 
-static void
-i965_emit_composite_state(ScrnInfoPtr pScrn)
+static void i965_emit_composite_state(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state= pI830->gen4_render_state;
-    gen4_composite_op *composite_op = &render_state->composite_op;
-    int op = composite_op->op;
-    PicturePtr pMaskPicture = composite_op->mask_picture;
-    PicturePtr pDstPicture = composite_op->dest_picture;
-    PixmapPtr pMask = composite_op->mask;
-    PixmapPtr pDst = composite_op->dest;
-    sampler_state_filter_t src_filter = composite_op->src_filter;
-    sampler_state_filter_t mask_filter = composite_op->mask_filter;
-    sampler_state_extend_t src_extend = composite_op->src_extend;
-    sampler_state_extend_t mask_extend = composite_op->mask_extend;
-    Bool is_affine = composite_op->is_affine;
-    int urb_vs_start, urb_vs_size;
-    int urb_gs_start, urb_gs_size;
-    int urb_clip_start, urb_clip_size;
-    int urb_sf_start, urb_sf_size;
-    int urb_cs_start, urb_cs_size;
-    uint32_t src_blend, dst_blend;
-    dri_bo *binding_table_bo = composite_op->binding_table_bo;
-
-    render_state->needs_state_emit = FALSE;
-
-    IntelEmitInvarientState(pScrn);
-    pI830->last_3d = LAST_3D_RENDER;
-
-    urb_vs_start = 0;
-    urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
-    urb_gs_start = urb_vs_start + urb_vs_size;
-    urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
-    urb_clip_start = urb_gs_start + urb_gs_size;
-    urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
-    urb_sf_start = urb_clip_start + urb_clip_size;
-    urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
-    urb_cs_start = urb_sf_start + urb_sf_size;
-    urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
-
-    i965_get_blend_cntl(op, pMaskPicture, pDstPicture->format,
-			&src_blend, &dst_blend);
-
-    /* Begin the long sequence of commands needed to set up the 3D
-     * rendering pipe
-     */
-    {
-	BEGIN_BATCH(2);
-	OUT_BATCH(MI_FLUSH |
-		  MI_STATE_INSTRUCTION_CACHE_FLUSH |
-		  BRW_MI_GLOBAL_SNAPSHOT_RESET);
-	OUT_BATCH(MI_NOOP);
-	ADVANCE_BATCH();
-    }
-    {
-        if (IS_IGDNG(pI830))
-            BEGIN_BATCH(14);
-        else
-            BEGIN_BATCH(12);
-
-        /* Match Mesa driver setup */
-	if (IS_G4X(pI830) || IS_IGDNG(pI830))
-	    OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-	else
-	    OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-
-	OUT_BATCH(BRW_CS_URB_STATE | 0);
-	OUT_BATCH((0 << 4) |  /* URB Entry Allocation Size */
-		  (0 << 0));  /* Number of URB Entries */
-
-	/* Zero out the two base address registers so all offsets are
-	 * absolute.
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+	gen4_composite_op *composite_op = &render_state->composite_op;
+	int op = composite_op->op;
+	PicturePtr pMaskPicture = composite_op->mask_picture;
+	PicturePtr pDstPicture = composite_op->dest_picture;
+	PixmapPtr pMask = composite_op->mask;
+	PixmapPtr pDst = composite_op->dest;
+	sampler_state_filter_t src_filter = composite_op->src_filter;
+	sampler_state_filter_t mask_filter = composite_op->mask_filter;
+	sampler_state_extend_t src_extend = composite_op->src_extend;
+	sampler_state_extend_t mask_extend = composite_op->mask_extend;
+	Bool is_affine = composite_op->is_affine;
+	int urb_vs_start, urb_vs_size;
+	int urb_gs_start, urb_gs_size;
+	int urb_clip_start, urb_clip_size;
+	int urb_sf_start, urb_sf_size;
+	int urb_cs_start, urb_cs_size;
+	uint32_t src_blend, dst_blend;
+	dri_bo *binding_table_bo = composite_op->binding_table_bo;
+
+	render_state->needs_state_emit = FALSE;
+
+	IntelEmitInvarientState(pScrn);
+	pI830->last_3d = LAST_3D_RENDER;
+
+	urb_vs_start = 0;
+	urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
+	urb_gs_start = urb_vs_start + urb_vs_size;
+	urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
+	urb_clip_start = urb_gs_start + urb_gs_size;
+	urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
+	urb_sf_start = urb_clip_start + urb_clip_size;
+	urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
+	urb_cs_start = urb_sf_start + urb_sf_size;
+	urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
+
+	i965_get_blend_cntl(op, pMaskPicture, pDstPicture->format,
+			    &src_blend, &dst_blend);
+
+	/* Begin the long sequence of commands needed to set up the 3D
+	 * rendering pipe
 	 */
-        if (IS_IGDNG(pI830)) {
-            OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6);
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Generate state base address */
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Surface state base address */
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* media base addr, don't care */
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Instruction base address */
-            /* general state max addr, disabled */
-            OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-            /* media object state max addr, disabled */
-            OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-            /* Instruction max addr, disabled */
-            OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-        } else {
-            OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Generate state base address */
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Surface state base address */
-            OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* media base addr, don't care */
-            /* general state max addr, disabled */
-            OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-            /* media object state max addr, disabled */
-            OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-        }
-	/* Set system instruction pointer */
-	OUT_BATCH(BRW_STATE_SIP | 0);
-	OUT_RELOC(render_state->sip_kernel_bo,
-		  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-	OUT_BATCH(MI_NOOP);
-	ADVANCE_BATCH();
-    }
-    {
-	int pipe_ctrl;        
-	BEGIN_BATCH(26);
-	/* Pipe control */
-        
-	if (IS_IGDNG(pI830))
-            pipe_ctrl = BRW_PIPE_CONTROL_NOWRITE;
-	else
-            pipe_ctrl = BRW_PIPE_CONTROL_NOWRITE | BRW_PIPE_CONTROL_IS_FLUSH;
-
-	OUT_BATCH(BRW_PIPE_CONTROL | pipe_ctrl | 2);
-	OUT_BATCH(0);			       /* Destination address */
-	OUT_BATCH(0);			       /* Immediate data low DW */
-	OUT_BATCH(0);			       /* Immediate data high DW */
-
-	/* Binding table pointers */
-	OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
-	OUT_BATCH(0); /* vs */
-	OUT_BATCH(0); /* gs */
-	OUT_BATCH(0); /* clip */
-	OUT_BATCH(0); /* sf */
-	/* Only the PS uses the binding table */
-	OUT_RELOC(binding_table_bo, I915_GEM_DOMAIN_SAMPLER, 0, 0);
-
-	/* The drawing rectangle clipping is always on.  Set it to values that
-	 * shouldn't do any clipping.
-	 */
-	OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2);
-	OUT_BATCH(0x00000000);	/* ymin, xmin */
-	OUT_BATCH(DRAW_YMAX(pDst->drawable.height - 1) |
-		  DRAW_XMAX(pDst->drawable.width - 1)); /* ymax, xmax */
-	OUT_BATCH(0x00000000);	/* yorigin, xorigin */
-
-	/* skip the depth buffer */
-	/* skip the polygon stipple */
-	/* skip the polygon stipple offset */
-	/* skip the line stipple */
-
-	/* Set the pointers to the 3d pipeline state */
-	OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5);
-	OUT_RELOC(render_state->vs_state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-	OUT_BATCH(BRW_GS_DISABLE);   /* disable GS, resulting in passthrough */
-	OUT_BATCH(BRW_CLIP_DISABLE); /* disable CLIP, resulting in passthrough */
-	if (pMask) {
-	    OUT_RELOC(render_state->sf_mask_state_bo,
-		      I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-	} else {
-	    OUT_RELOC(render_state->sf_state_bo,
-		      I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	{
+		BEGIN_BATCH(2);
+		OUT_BATCH(MI_FLUSH |
+			  MI_STATE_INSTRUCTION_CACHE_FLUSH |
+			  BRW_MI_GLOBAL_SNAPSHOT_RESET);
+		OUT_BATCH(MI_NOOP);
+		ADVANCE_BATCH();
 	}
-
-	OUT_RELOC(render_state->wm_state_bo[composite_op->wm_kernel]
-		  [src_filter][src_extend]
-		  [mask_filter][mask_extend],
-		  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-
-	OUT_RELOC(render_state->cc_state_bo,
-		  I915_GEM_DOMAIN_INSTRUCTION, 0,
-		  offsetof(struct gen4_cc_unit_state,
-			   cc_state[src_blend][dst_blend]));
-
-	/* URB fence */
-	OUT_BATCH(BRW_URB_FENCE |
-		  UF0_CS_REALLOC |
-		  UF0_SF_REALLOC |
-		  UF0_CLIP_REALLOC |
-		  UF0_GS_REALLOC |
-		  UF0_VS_REALLOC |
-		  1);
-	OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
-		  ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
-		  ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
-	OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
-		  ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
-
-	/* Constant buffer state */
-	OUT_BATCH(BRW_CS_URB_STATE | 0);
-	OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) |
-		  (URB_CS_ENTRIES << 0));
-	ADVANCE_BATCH();
-    }
-    {
-	/* 
-	 * number of extra parameters per vertex
-	 */
-        int nelem = pMask ? 2: 1;
-	/* 
-	 * size of extra parameters:
-	 *  3 for homogenous (xyzw)
-	 *  2 for cartesian (xy)
-	 */
-	int selem = is_affine ? 2 : 3;
-	uint32_t    w_component;
-	uint32_t    src_format;
-
-	render_state->vertex_size = 4 * (2 + nelem * selem);
-	
-	if (is_affine)
 	{
-	    src_format = BRW_SURFACEFORMAT_R32G32_FLOAT;
-	    w_component = BRW_VFCOMPONENT_STORE_1_FLT;
+		if (IS_IGDNG(pI830))
+			BEGIN_BATCH(14);
+		else
+			BEGIN_BATCH(12);
+
+		/* Match Mesa driver setup */
+		if (IS_G4X(pI830) || IS_IGDNG(pI830))
+			OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+		else
+			OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+
+		OUT_BATCH(BRW_CS_URB_STATE | 0);
+		OUT_BATCH((0 << 4) |	/* URB Entry Allocation Size */
+			  (0 << 0));	/* Number of URB Entries */
+
+		/* Zero out the two base address registers so all offsets are
+		 * absolute.
+		 */
+		if (IS_IGDNG(pI830)) {
+			OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6);
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Generate state base address */
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Surface state base address */
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* media base addr, don't care */
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Instruction base address */
+			/* general state max addr, disabled */
+			OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+			/* media object state max addr, disabled */
+			OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+			/* Instruction max addr, disabled */
+			OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+		} else {
+			OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Generate state base address */
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Surface state base address */
+			OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* media base addr, don't care */
+			/* general state max addr, disabled */
+			OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+			/* media object state max addr, disabled */
+			OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+		}
+		/* Set system instruction pointer */
+		OUT_BATCH(BRW_STATE_SIP | 0);
+		OUT_RELOC(render_state->sip_kernel_bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+		OUT_BATCH(MI_NOOP);
+		ADVANCE_BATCH();
 	}
-	else
 	{
-	    src_format = BRW_SURFACEFORMAT_R32G32B32_FLOAT;
-	    w_component = BRW_VFCOMPONENT_STORE_SRC;
+		int pipe_ctrl;
+		BEGIN_BATCH(26);
+		/* Pipe control */
+
+		if (IS_IGDNG(pI830))
+			pipe_ctrl = BRW_PIPE_CONTROL_NOWRITE;
+		else
+			pipe_ctrl =
+			    BRW_PIPE_CONTROL_NOWRITE |
+			    BRW_PIPE_CONTROL_IS_FLUSH;
+
+		OUT_BATCH(BRW_PIPE_CONTROL | pipe_ctrl | 2);
+		OUT_BATCH(0);	/* Destination address */
+		OUT_BATCH(0);	/* Immediate data low DW */
+		OUT_BATCH(0);	/* Immediate data high DW */
+
+		/* Binding table pointers */
+		OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
+		OUT_BATCH(0);	/* vs */
+		OUT_BATCH(0);	/* gs */
+		OUT_BATCH(0);	/* clip */
+		OUT_BATCH(0);	/* sf */
+		/* Only the PS uses the binding table */
+		OUT_RELOC(binding_table_bo, I915_GEM_DOMAIN_SAMPLER, 0, 0);
+
+		/* The drawing rectangle clipping is always on.  Set it to values that
+		 * shouldn't do any clipping.
+		 */
+		OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2);
+		OUT_BATCH(0x00000000);	/* ymin, xmin */
+		OUT_BATCH(DRAW_YMAX(pDst->drawable.height - 1) | DRAW_XMAX(pDst->drawable.width - 1));	/* ymax, xmax */
+		OUT_BATCH(0x00000000);	/* yorigin, xorigin */
+
+		/* skip the depth buffer */
+		/* skip the polygon stipple */
+		/* skip the polygon stipple offset */
+		/* skip the line stipple */
+
+		/* Set the pointers to the 3d pipeline state */
+		OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5);
+		OUT_RELOC(render_state->vs_state_bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+		OUT_BATCH(BRW_GS_DISABLE);	/* disable GS, resulting in passthrough */
+		OUT_BATCH(BRW_CLIP_DISABLE);	/* disable CLIP, resulting in passthrough */
+		if (pMask) {
+			OUT_RELOC(render_state->sf_mask_state_bo,
+				  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+		} else {
+			OUT_RELOC(render_state->sf_state_bo,
+				  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+		}
+
+		OUT_RELOC(render_state->wm_state_bo[composite_op->wm_kernel]
+			  [src_filter][src_extend]
+			  [mask_filter][mask_extend],
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+
+		OUT_RELOC(render_state->cc_state_bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0,
+			  offsetof(struct gen4_cc_unit_state,
+				   cc_state[src_blend][dst_blend]));
+
+		/* URB fence */
+		OUT_BATCH(BRW_URB_FENCE |
+			  UF0_CS_REALLOC |
+			  UF0_SF_REALLOC |
+			  UF0_CLIP_REALLOC |
+			  UF0_GS_REALLOC | UF0_VS_REALLOC | 1);
+		OUT_BATCH(((urb_clip_start +
+			    urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
+			  ((urb_gs_start +
+			    urb_gs_size) << UF1_GS_FENCE_SHIFT) | ((urb_vs_start
+								    +
+								    urb_vs_size)
+								   <<
+								   UF1_VS_FENCE_SHIFT));
+		OUT_BATCH(((urb_cs_start +
+			    urb_cs_size) << UF2_CS_FENCE_SHIFT) | ((urb_sf_start
+								    +
+								    urb_sf_size)
+								   <<
+								   UF2_SF_FENCE_SHIFT));
+
+		/* Constant buffer state */
+		OUT_BATCH(BRW_CS_URB_STATE | 0);
+		OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) |
+			  (URB_CS_ENTRIES << 0));
+		ADVANCE_BATCH();
 	}
+	{
+		/*
+		 * number of extra parameters per vertex
+		 */
+		int nelem = pMask ? 2 : 1;
+		/*
+		 * size of extra parameters:
+		 *  3 for homogenous (xyzw)
+		 *  2 for cartesian (xy)
+		 */
+		int selem = is_affine ? 2 : 3;
+		uint32_t w_component;
+		uint32_t src_format;
+
+		render_state->vertex_size = 4 * (2 + nelem * selem);
+
+		if (is_affine) {
+			src_format = BRW_SURFACEFORMAT_R32G32_FLOAT;
+			w_component = BRW_VFCOMPONENT_STORE_1_FLT;
+		} else {
+			src_format = BRW_SURFACEFORMAT_R32G32B32_FLOAT;
+			w_component = BRW_VFCOMPONENT_STORE_SRC;
+		}
 
-        if (IS_IGDNG(pI830)) {
-            BEGIN_BATCH(pMask?9:7);
-	    /*
-	     * The reason to add this extra vertex element in the header is that
-	     * IGDNG has different vertex header definition and origin method to
-	     * set destination element offset doesn't exist anymore, which means
-	     * hardware requires a predefined vertex element layout.
-	     *
-	     * haihao proposed this approach to fill the first vertex element, so
-	     * origin layout for Gen4 doesn't need to change, and origin shader
-	     * programs behavior is also kept.
-	     *
-	     * I think this is not bad. - zhenyu
-	     */
-
-	    OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * (2 + nelem)) - 1));
-	    OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-                      VE0_VALID |
-                      (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-                      (0 << VE0_OFFSET_SHIFT));
-
-	    OUT_BATCH((BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_2_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_3_SHIFT));
-        } else {
-            BEGIN_BATCH(pMask?7:5);
-            /* Set up our vertex elements, sourced from the single vertex buffer.
-             * that will be set up later.
-             */
-            OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * (1 + nelem)) - 1));
-        }
-
-	/* x,y */
-	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-		  VE0_VALID |
-		  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-		  (0                            << VE0_OFFSET_SHIFT));
-
-        if (IS_IGDNG(pI830))
-            OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_0_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_1_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_2_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_3_SHIFT));
-        else
-            OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_0_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_1_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_2_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_3_SHIFT) |
-                      (4				<< VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-	/* u0, v0, w0 */
-	OUT_BATCH((0				<< VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-		  VE0_VALID					     |
-		  (src_format			<< VE0_FORMAT_SHIFT) |
-		  ((2 * 4)                      << VE0_OFFSET_SHIFT)); /* offset vb in bytes */
-
-        if (IS_IGDNG(pI830))
-            OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_0_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_1_SHIFT) |
-                      (w_component			<< VE1_VFCOMPONENT_2_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_3_SHIFT));
-        else
-            OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_0_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_SRC	<< VE1_VFCOMPONENT_1_SHIFT) |
-                      (w_component			<< VE1_VFCOMPONENT_2_SHIFT) |
-                      (BRW_VFCOMPONENT_STORE_1_FLT	<< VE1_VFCOMPONENT_3_SHIFT) |
-                      ((4 + 4)			<< VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* VUE offset in dwords */
-	/* u1, v1, w1 */
-   	if (pMask) {
-	    OUT_BATCH((0			    << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-		      VE0_VALID							    |
-		      (src_format		    << VE0_FORMAT_SHIFT) |
-		      (((2 + selem) * 4)            << VE0_OFFSET_SHIFT));  /* vb offset in bytes */
-	    
-            if (IS_IGDNG(pI830))
-                OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC    << VE1_VFCOMPONENT_0_SHIFT) |
-                          (BRW_VFCOMPONENT_STORE_SRC    << VE1_VFCOMPONENT_1_SHIFT) |
-                          (w_component		    << VE1_VFCOMPONENT_2_SHIFT) |
-                          (BRW_VFCOMPONENT_STORE_1_FLT  << VE1_VFCOMPONENT_3_SHIFT));
-            else
-                OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC    << VE1_VFCOMPONENT_0_SHIFT) |
-                          (BRW_VFCOMPONENT_STORE_SRC    << VE1_VFCOMPONENT_1_SHIFT) |
-                          (w_component		    << VE1_VFCOMPONENT_2_SHIFT) |
-                          (BRW_VFCOMPONENT_STORE_1_FLT  << VE1_VFCOMPONENT_3_SHIFT) |
-                          ((4 + 4 + 4)		    << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* VUE offset in dwords */
-   	}
+		if (IS_IGDNG(pI830)) {
+			BEGIN_BATCH(pMask ? 9 : 7);
+			/*
+			 * The reason to add this extra vertex element in the header is that
+			 * IGDNG has different vertex header definition and origin method to
+			 * set destination element offset doesn't exist anymore, which means
+			 * hardware requires a predefined vertex element layout.
+			 *
+			 * haihao proposed this approach to fill the first vertex element, so
+			 * origin layout for Gen4 doesn't need to change, and origin shader
+			 * programs behavior is also kept.
+			 *
+			 * I think this is not bad. - zhenyu
+			 */
+
+			OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS |
+				  ((2 * (2 + nelem)) - 1));
+			OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+				  VE0_VALID | (BRW_SURFACEFORMAT_R32G32_FLOAT <<
+					       VE0_FORMAT_SHIFT) | (0 <<
+								    VE0_OFFSET_SHIFT));
+
+			OUT_BATCH((BRW_VFCOMPONENT_STORE_0 <<
+				   VE1_VFCOMPONENT_0_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_0 <<
+				   VE1_VFCOMPONENT_1_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_0 <<
+				   VE1_VFCOMPONENT_2_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_0 <<
+				   VE1_VFCOMPONENT_3_SHIFT));
+		} else {
+			BEGIN_BATCH(pMask ? 7 : 5);
+			/* Set up our vertex elements, sourced from the single vertex buffer.
+			 * that will be set up later.
+			 */
+			OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS |
+				  ((2 * (1 + nelem)) - 1));
+		}
 
-	ADVANCE_BATCH();
-    }
+		/* x,y */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+			  VE0_VALID |
+			  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+			  (0 << VE0_OFFSET_SHIFT));
+
+		if (IS_IGDNG(pI830))
+			OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_0_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_1_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_1_FLT <<
+				   VE1_VFCOMPONENT_2_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_1_FLT <<
+				   VE1_VFCOMPONENT_3_SHIFT));
+		else
+			OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_0_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_1_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_1_FLT <<
+				   VE1_VFCOMPONENT_2_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_1_FLT <<
+				   VE1_VFCOMPONENT_3_SHIFT) | (4 <<
+							       VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+		/* u0, v0, w0 */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | ((2 * 4) << VE0_OFFSET_SHIFT));	/* offset vb in bytes */
+
+		if (IS_IGDNG(pI830))
+			OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_0_SHIFT) |
+				  (BRW_VFCOMPONENT_STORE_SRC <<
+				   VE1_VFCOMPONENT_1_SHIFT) | (w_component <<
+							       VE1_VFCOMPONENT_2_SHIFT)
+				  | (BRW_VFCOMPONENT_STORE_1_FLT <<
+				     VE1_VFCOMPONENT_3_SHIFT));
+		else
+			OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | ((4 + 4) << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));	/* VUE offset in dwords */
+		/* u1, v1, w1 */
+		if (pMask) {
+			OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) | VE0_VALID | (src_format << VE0_FORMAT_SHIFT) | (((2 + selem) * 4) << VE0_OFFSET_SHIFT));	/* vb offset in bytes */
+
+			if (IS_IGDNG(pI830))
+				OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC <<
+					   VE1_VFCOMPONENT_0_SHIFT) |
+					  (BRW_VFCOMPONENT_STORE_SRC <<
+					   VE1_VFCOMPONENT_1_SHIFT) |
+					  (w_component <<
+					   VE1_VFCOMPONENT_2_SHIFT) |
+					  (BRW_VFCOMPONENT_STORE_1_FLT <<
+					   VE1_VFCOMPONENT_3_SHIFT));
+			else
+				OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) | (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) | (w_component << VE1_VFCOMPONENT_2_SHIFT) | (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) | ((4 + 4 + 4) << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));	/* VUE offset in dwords */
+		}
+
+		ADVANCE_BATCH();
+	}
 }
 
 /**
  * Returns whether the current set of composite state plus vertex buffer is
  * expected to fit in the aperture.
  */
-static Bool
-i965_composite_check_aperture(ScrnInfoPtr pScrn)
+static Bool i965_composite_check_aperture(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state= pI830->gen4_render_state;
-    gen4_composite_op *composite_op = &render_state->composite_op;
-    drm_intel_bo *bo_table[] = {
-	pI830->batch_bo,
-	composite_op->binding_table_bo,
-	render_state->vertex_buffer_bo,
-	render_state->vs_state_bo,
-	render_state->sf_state_bo,
-	render_state->sf_mask_state_bo,
-	render_state->wm_state_bo[composite_op->wm_kernel]
-				 [composite_op->src_filter]
-				 [composite_op->src_extend]
-				 [composite_op->mask_filter]
-				 [composite_op->mask_extend],
-	render_state->cc_state_bo,
-	render_state->sip_kernel_bo,
-    };
-
-    return drm_intel_bufmgr_check_aperture_space(bo_table,
-						 ARRAY_SIZE(bo_table)) == 0;
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+	gen4_composite_op *composite_op = &render_state->composite_op;
+	drm_intel_bo *bo_table[] = {
+		pI830->batch_bo,
+		composite_op->binding_table_bo,
+		render_state->vertex_buffer_bo,
+		render_state->vs_state_bo,
+		render_state->sf_state_bo,
+		render_state->sf_mask_state_bo,
+		render_state->wm_state_bo[composite_op->wm_kernel]
+		    [composite_op->src_filter]
+		    [composite_op->src_extend]
+		    [composite_op->mask_filter]
+		    [composite_op->mask_extend],
+		render_state->cc_state_bo,
+		render_state->sip_kernel_bo,
+	};
+
+	return drm_intel_bufmgr_check_aperture_space(bo_table,
+						     ARRAY_SIZE(bo_table)) == 0;
 }
 
 Bool
@@ -1437,515 +1441,540 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 		       PicturePtr pMaskPicture, PicturePtr pDstPicture,
 		       PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state= pI830->gen4_render_state;
-    gen4_composite_op *composite_op = &render_state->composite_op;
-    uint32_t *binding_table;
-    drm_intel_bo *binding_table_bo, *surface_state_bo;
-
-    if (composite_op->src_filter < 0)
-	I830FALLBACK("Bad src filter 0x%x\n", pSrcPicture->filter);
-    composite_op->src_extend =
-	sampler_state_extend_from_picture(pSrcPicture->repeatType);
-    if (composite_op->src_extend < 0)
-	I830FALLBACK("Bad src repeat 0x%x\n", pSrcPicture->repeatType);
-
-    if (pMaskPicture) {
-	composite_op->mask_filter =
-	    sampler_state_filter_from_picture(pMaskPicture->filter);
-	if (composite_op->mask_filter < 0)
-	    I830FALLBACK("Bad mask filter 0x%x\n", pMaskPicture->filter);
-	composite_op->mask_extend =
-	    sampler_state_extend_from_picture(pMaskPicture->repeatType);
-	if (composite_op->mask_extend < 0)
-	    I830FALLBACK("Bad mask repeat 0x%x\n", pMaskPicture->repeatType);
-    } else {
-	composite_op->mask_filter = SAMPLER_STATE_FILTER_NEAREST;
-	composite_op->mask_extend = SAMPLER_STATE_EXTEND_NONE;
-    }
-
-    /* Set up the surface states. */
-    surface_state_bo = dri_bo_alloc(pI830->bufmgr, "surface_state",
-				    3 * sizeof (brw_surface_state_padded),
-				    4096);
-    if (dri_bo_map(surface_state_bo, 1) != 0) {
-	dri_bo_unreference(surface_state_bo);
-	return FALSE;
-    }
-    /* Set up the state buffer for the destination surface */
-    i965_set_picture_surface_state(surface_state_bo, 0,
-				   pDstPicture, pDst, TRUE);
-    /* Set up the source surface state buffer */
-    i965_set_picture_surface_state(surface_state_bo, 1,
-				   pSrcPicture, pSrc, FALSE);
-    if (pMask) {
-	/* Set up the mask surface state buffer */
-	i965_set_picture_surface_state(surface_state_bo, 2,
-				       pMaskPicture, pMask,
-				       FALSE);
-    }
-    dri_bo_unmap(surface_state_bo);
-
-    /* Set up the binding table of surface indices to surface state. */
-    binding_table_bo = dri_bo_alloc(pI830->bufmgr, "binding_table",
-				    3 * sizeof(uint32_t), 4096);
-    if (dri_bo_map (binding_table_bo, 1) != 0) {
-	dri_bo_unreference(binding_table_bo);
-	dri_bo_unreference(surface_state_bo);
-	return FALSE;
-    }
-
-    binding_table = binding_table_bo->virtual;
-    binding_table[0] = intel_emit_reloc(binding_table_bo,
-					0 * sizeof(uint32_t),
-					surface_state_bo,
-					0 * sizeof(brw_surface_state_padded),
-					I915_GEM_DOMAIN_INSTRUCTION, 0);
-
-    binding_table[1] = intel_emit_reloc(binding_table_bo,
-					1 * sizeof(uint32_t),
-					surface_state_bo,
-					1 * sizeof(brw_surface_state_padded),
-					I915_GEM_DOMAIN_INSTRUCTION, 0);
-
-    if (pMask) {
-	binding_table[2] = intel_emit_reloc(binding_table_bo,
-					    2 * sizeof(uint32_t),
+	ScrnInfoPtr pScrn = xf86Screens[pDstPicture->pDrawable->pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+	gen4_composite_op *composite_op = &render_state->composite_op;
+	uint32_t *binding_table;
+	drm_intel_bo *binding_table_bo, *surface_state_bo;
+
+	if (composite_op->src_filter < 0)
+		I830FALLBACK("Bad src filter 0x%x\n", pSrcPicture->filter);
+	composite_op->src_extend =
+	    sampler_state_extend_from_picture(pSrcPicture->repeatType);
+	if (composite_op->src_extend < 0)
+		I830FALLBACK("Bad src repeat 0x%x\n", pSrcPicture->repeatType);
+
+	if (pMaskPicture) {
+		composite_op->mask_filter =
+		    sampler_state_filter_from_picture(pMaskPicture->filter);
+		if (composite_op->mask_filter < 0)
+			I830FALLBACK("Bad mask filter 0x%x\n",
+				     pMaskPicture->filter);
+		composite_op->mask_extend =
+		    sampler_state_extend_from_picture(pMaskPicture->repeatType);
+		if (composite_op->mask_extend < 0)
+			I830FALLBACK("Bad mask repeat 0x%x\n",
+				     pMaskPicture->repeatType);
+	} else {
+		composite_op->mask_filter = SAMPLER_STATE_FILTER_NEAREST;
+		composite_op->mask_extend = SAMPLER_STATE_EXTEND_NONE;
+	}
+
+	/* Set up the surface states. */
+	surface_state_bo = dri_bo_alloc(pI830->bufmgr, "surface_state",
+					3 * sizeof(brw_surface_state_padded),
+					4096);
+	if (dri_bo_map(surface_state_bo, 1) != 0) {
+		dri_bo_unreference(surface_state_bo);
+		return FALSE;
+	}
+	/* Set up the state buffer for the destination surface */
+	i965_set_picture_surface_state(surface_state_bo, 0,
+				       pDstPicture, pDst, TRUE);
+	/* Set up the source surface state buffer */
+	i965_set_picture_surface_state(surface_state_bo, 1,
+				       pSrcPicture, pSrc, FALSE);
+	if (pMask) {
+		/* Set up the mask surface state buffer */
+		i965_set_picture_surface_state(surface_state_bo, 2,
+					       pMaskPicture, pMask, FALSE);
+	}
+	dri_bo_unmap(surface_state_bo);
+
+	/* Set up the binding table of surface indices to surface state. */
+	binding_table_bo = dri_bo_alloc(pI830->bufmgr, "binding_table",
+					3 * sizeof(uint32_t), 4096);
+	if (dri_bo_map(binding_table_bo, 1) != 0) {
+		dri_bo_unreference(binding_table_bo);
+		dri_bo_unreference(surface_state_bo);
+		return FALSE;
+	}
+
+	binding_table = binding_table_bo->virtual;
+	binding_table[0] = intel_emit_reloc(binding_table_bo,
+					    0 * sizeof(uint32_t),
 					    surface_state_bo,
-					    2 * sizeof(brw_surface_state_padded),
+					    0 *
+					    sizeof(brw_surface_state_padded),
 					    I915_GEM_DOMAIN_INSTRUCTION, 0);
-    } else {
-	binding_table[2] = 0;
-    }
-    dri_bo_unmap(binding_table_bo);
-    /* All refs to surface_state are now contained in binding_table_bo. */
-    drm_intel_bo_unreference(surface_state_bo);
-
-    composite_op->op = op;
-    composite_op->source_picture = pSrcPicture;
-    composite_op->mask_picture = pMaskPicture;
-    composite_op->dest_picture = pDstPicture;
-    composite_op->source = pSrc;
-    composite_op->mask = pMask;
-    composite_op->dest = pDst;
-    drm_intel_bo_unreference(composite_op->binding_table_bo);
-    composite_op->binding_table_bo = binding_table_bo;
-    composite_op->src_filter =
-	sampler_state_filter_from_picture(pSrcPicture->filter);
-
-    pI830->scale_units[0][0] = pSrc->drawable.width;
-    pI830->scale_units[0][1] = pSrc->drawable.height;
-
-    pI830->transform[0] = pSrcPicture->transform;
-    composite_op->is_affine =
-	i830_transform_is_affine(pI830->transform[0]);
-
-    if (!pMask) {
-	pI830->transform[1] = NULL;
-	pI830->scale_units[1][0] = -1;
-	pI830->scale_units[1][1] = -1;
-    } else {
-	pI830->transform[1] = pMaskPicture->transform;
-	pI830->scale_units[1][0] = pMask->drawable.width;
-	pI830->scale_units[1][1] = pMask->drawable.height;
-	composite_op->is_affine |=
-	    i830_transform_is_affine(pI830->transform[1]);
-    }
-
-
-    if (pMask) {
-	if (pMaskPicture->componentAlpha &&
-	    PICT_FORMAT_RGB(pMaskPicture->format))
-	{
-	    if (i965_blend_op[op].src_alpha) {
-		if (composite_op->is_affine)
-		    composite_op->wm_kernel = WM_KERNEL_MASKCA_SRCALPHA_AFFINE;
-		else
-		    composite_op->wm_kernel = WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE;
-	    } else {
+
+	binding_table[1] = intel_emit_reloc(binding_table_bo,
+					    1 * sizeof(uint32_t),
+					    surface_state_bo,
+					    1 *
+					    sizeof(brw_surface_state_padded),
+					    I915_GEM_DOMAIN_INSTRUCTION, 0);
+
+	if (pMask) {
+		binding_table[2] = intel_emit_reloc(binding_table_bo,
+						    2 * sizeof(uint32_t),
+						    surface_state_bo,
+						    2 *
+						    sizeof
+						    (brw_surface_state_padded),
+						    I915_GEM_DOMAIN_INSTRUCTION,
+						    0);
+	} else {
+		binding_table[2] = 0;
+	}
+	dri_bo_unmap(binding_table_bo);
+	/* All refs to surface_state are now contained in binding_table_bo. */
+	drm_intel_bo_unreference(surface_state_bo);
+
+	composite_op->op = op;
+	composite_op->source_picture = pSrcPicture;
+	composite_op->mask_picture = pMaskPicture;
+	composite_op->dest_picture = pDstPicture;
+	composite_op->source = pSrc;
+	composite_op->mask = pMask;
+	composite_op->dest = pDst;
+	drm_intel_bo_unreference(composite_op->binding_table_bo);
+	composite_op->binding_table_bo = binding_table_bo;
+	composite_op->src_filter =
+	    sampler_state_filter_from_picture(pSrcPicture->filter);
+
+	pI830->scale_units[0][0] = pSrc->drawable.width;
+	pI830->scale_units[0][1] = pSrc->drawable.height;
+
+	pI830->transform[0] = pSrcPicture->transform;
+	composite_op->is_affine = i830_transform_is_affine(pI830->transform[0]);
+
+	if (!pMask) {
+		pI830->transform[1] = NULL;
+		pI830->scale_units[1][0] = -1;
+		pI830->scale_units[1][1] = -1;
+	} else {
+		pI830->transform[1] = pMaskPicture->transform;
+		pI830->scale_units[1][0] = pMask->drawable.width;
+		pI830->scale_units[1][1] = pMask->drawable.height;
+		composite_op->is_affine |=
+		    i830_transform_is_affine(pI830->transform[1]);
+	}
+
+	if (pMask) {
+		if (pMaskPicture->componentAlpha &&
+		    PICT_FORMAT_RGB(pMaskPicture->format)) {
+			if (i965_blend_op[op].src_alpha) {
+				if (composite_op->is_affine)
+					composite_op->wm_kernel =
+					    WM_KERNEL_MASKCA_SRCALPHA_AFFINE;
+				else
+					composite_op->wm_kernel =
+					    WM_KERNEL_MASKCA_SRCALPHA_PROJECTIVE;
+			} else {
+				if (composite_op->is_affine)
+					composite_op->wm_kernel =
+					    WM_KERNEL_MASKCA_AFFINE;
+				else
+					composite_op->wm_kernel =
+					    WM_KERNEL_MASKCA_PROJECTIVE;
+			}
+		} else {
+			if (composite_op->is_affine)
+				composite_op->wm_kernel =
+				    WM_KERNEL_MASKNOCA_AFFINE;
+			else
+				composite_op->wm_kernel =
+				    WM_KERNEL_MASKNOCA_PROJECTIVE;
+		}
+	} else {
 		if (composite_op->is_affine)
-		    composite_op->wm_kernel = WM_KERNEL_MASKCA_AFFINE;
+			composite_op->wm_kernel = WM_KERNEL_NOMASK_AFFINE;
 		else
-		    composite_op->wm_kernel = WM_KERNEL_MASKCA_PROJECTIVE;
-	    }
-	} else {
-	    if (composite_op->is_affine)
-		composite_op->wm_kernel = WM_KERNEL_MASKNOCA_AFFINE;
-	    else
-		composite_op->wm_kernel = WM_KERNEL_MASKNOCA_PROJECTIVE;
+			composite_op->wm_kernel = WM_KERNEL_NOMASK_PROJECTIVE;
 	}
-    } else {
-	if (composite_op->is_affine)
-	    composite_op->wm_kernel = WM_KERNEL_NOMASK_AFFINE;
-	else
-	    composite_op->wm_kernel = WM_KERNEL_NOMASK_PROJECTIVE;
-    }
 
-    if (!i965_composite_check_aperture(pScrn)) {
-	intel_batch_flush(pScrn, FALSE);
-	if (!i965_composite_check_aperture(pScrn))
-	    I830FALLBACK("Couldn't fit render operation in aperture\n");
-    }
+	if (!i965_composite_check_aperture(pScrn)) {
+		intel_batch_flush(pScrn, FALSE);
+		if (!i965_composite_check_aperture(pScrn))
+			I830FALLBACK
+			    ("Couldn't fit render operation in aperture\n");
+	}
 
-    render_state->needs_state_emit = TRUE;
+	render_state->needs_state_emit = TRUE;
 
-    return TRUE;
+	return TRUE;
 }
 
-static drm_intel_bo *
-i965_get_vb_space(ScrnInfoPtr pScrn)
+static drm_intel_bo *i965_get_vb_space(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state = pI830->gen4_render_state;
-
-    /* If the vertex buffer is too full, then we free the old and a new one
-     * gets made.
-     */
-    if (render_state->vb_offset + VERTEX_FLOATS_PER_COMPOSITE >
-	VERTEX_BUFFER_SIZE) {
-	drm_intel_bo_unreference(render_state->vertex_buffer_bo);
-	render_state->vertex_buffer_bo = NULL;
-    }
-
-    /* Alloc a new vertex buffer if necessary. */
-    if (render_state->vertex_buffer_bo == NULL) {
-	render_state->vertex_buffer_bo = drm_intel_bo_alloc(pI830->bufmgr, "vb",
-							    sizeof(gen4_vertex_buffer),
-							    4096);
-	render_state->vb_offset = 0;
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+
+	/* If the vertex buffer is too full, then we free the old and a new one
+	 * gets made.
+	 */
+	if (render_state->vb_offset + VERTEX_FLOATS_PER_COMPOSITE >
+	    VERTEX_BUFFER_SIZE) {
+		drm_intel_bo_unreference(render_state->vertex_buffer_bo);
+		render_state->vertex_buffer_bo = NULL;
+	}
+
+	/* Alloc a new vertex buffer if necessary. */
+	if (render_state->vertex_buffer_bo == NULL) {
+		render_state->vertex_buffer_bo =
+		    drm_intel_bo_alloc(pI830->bufmgr, "vb",
+				       sizeof(gen4_vertex_buffer), 4096);
+		render_state->vb_offset = 0;
+	}
 
-    drm_intel_bo_reference(render_state->vertex_buffer_bo);
-    return render_state->vertex_buffer_bo;
+	drm_intel_bo_reference(render_state->vertex_buffer_bo);
+	return render_state->vertex_buffer_bo;
 }
 
 void
 i965_composite(PixmapPtr pDst, int srcX, int srcY, int maskX, int maskY,
 	       int dstX, int dstY, int w, int h)
 {
-    ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state = pI830->gen4_render_state;
-    Bool has_mask;
-    float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
-    int i;
-    drm_intel_bo *vb_bo;
-    float vb[18];
-    Bool is_affine = render_state->composite_op.is_affine;
-
-    if (is_affine)
-    {
-	if (!i830_get_transformed_coordinates(srcX, srcY,
-					      pI830->transform[0],
-					      &src_x[0], &src_y[0]))
-	    return;
-	if (!i830_get_transformed_coordinates(srcX, srcY + h,
-					      pI830->transform[0],
-					      &src_x[1], &src_y[1]))
-	    return;
-	if (!i830_get_transformed_coordinates(srcX + w, srcY + h,
-					      pI830->transform[0],
-					      &src_x[2], &src_y[2]))
-	    return;
-    }
-    else
-    {
-	if (!i830_get_transformed_coordinates_3d(srcX, srcY,
-						 pI830->transform[0],
-						 &src_x[0], &src_y[0],
-						 &src_w[0]))
-	    return;
-	if (!i830_get_transformed_coordinates_3d(srcX, srcY + h,
-						 pI830->transform[0],
-						 &src_x[1], &src_y[1],
-						 &src_w[1]))
-	    return;
-	if (!i830_get_transformed_coordinates_3d(srcX + w, srcY + h,
-						 pI830->transform[0],
-						 &src_x[2], &src_y[2],
-						 &src_w[2]))
-	    return;
-    }
-
-    if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
-	has_mask = FALSE;
-    } else {
-	has_mask = TRUE;
+	ScrnInfoPtr pScrn = xf86Screens[pDst->drawable.pScreen->myNum];
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+	Bool has_mask;
+	float src_x[3], src_y[3], src_w[3], mask_x[3], mask_y[3], mask_w[3];
+	int i;
+	drm_intel_bo *vb_bo;
+	float vb[18];
+	Bool is_affine = render_state->composite_op.is_affine;
+
 	if (is_affine) {
-	    if (!i830_get_transformed_coordinates(maskX, maskY,
-						  pI830->transform[1],
-						  &mask_x[0], &mask_y[0]))
-		return;
-	    if (!i830_get_transformed_coordinates(maskX, maskY + h,
-						  pI830->transform[1],
-						  &mask_x[1], &mask_y[1]))
-		return;
-	    if (!i830_get_transformed_coordinates(maskX + w, maskY + h,
-						  pI830->transform[1],
-						  &mask_x[2], &mask_y[2]))
-		return;
+		if (!i830_get_transformed_coordinates(srcX, srcY,
+						      pI830->transform[0],
+						      &src_x[0], &src_y[0]))
+			return;
+		if (!i830_get_transformed_coordinates(srcX, srcY + h,
+						      pI830->transform[0],
+						      &src_x[1], &src_y[1]))
+			return;
+		if (!i830_get_transformed_coordinates(srcX + w, srcY + h,
+						      pI830->transform[0],
+						      &src_x[2], &src_y[2]))
+			return;
 	} else {
-	    if (!i830_get_transformed_coordinates_3d(maskX, maskY,
-						     pI830->transform[1],
-						     &mask_x[0], &mask_y[0],
-						     &mask_w[0]))
-		return;
-	    if (!i830_get_transformed_coordinates_3d(maskX, maskY + h,
-						     pI830->transform[1],
-						     &mask_x[1], &mask_y[1],
-						     &mask_w[1]))
-		return;
-	    if (!i830_get_transformed_coordinates_3d(maskX + w, maskY + h,
-						     pI830->transform[1],
-						     &mask_x[2], &mask_y[2],
-						     &mask_w[2]))
-		return;
+		if (!i830_get_transformed_coordinates_3d(srcX, srcY,
+							 pI830->transform[0],
+							 &src_x[0], &src_y[0],
+							 &src_w[0]))
+			return;
+		if (!i830_get_transformed_coordinates_3d(srcX, srcY + h,
+							 pI830->transform[0],
+							 &src_x[1], &src_y[1],
+							 &src_w[1]))
+			return;
+		if (!i830_get_transformed_coordinates_3d(srcX + w, srcY + h,
+							 pI830->transform[0],
+							 &src_x[2], &src_y[2],
+							 &src_w[2]))
+			return;
+	}
+
+	if (pI830->scale_units[1][0] == -1 || pI830->scale_units[1][1] == -1) {
+		has_mask = FALSE;
+	} else {
+		has_mask = TRUE;
+		if (is_affine) {
+			if (!i830_get_transformed_coordinates(maskX, maskY,
+							      pI830->
+							      transform[1],
+							      &mask_x[0],
+							      &mask_y[0]))
+				return;
+			if (!i830_get_transformed_coordinates(maskX, maskY + h,
+							      pI830->
+							      transform[1],
+							      &mask_x[1],
+							      &mask_y[1]))
+				return;
+			if (!i830_get_transformed_coordinates
+			    (maskX + w, maskY + h, pI830->transform[1],
+			     &mask_x[2], &mask_y[2]))
+				return;
+		} else {
+			if (!i830_get_transformed_coordinates_3d(maskX, maskY,
+								 pI830->
+								 transform[1],
+								 &mask_x[0],
+								 &mask_y[0],
+								 &mask_w[0]))
+				return;
+			if (!i830_get_transformed_coordinates_3d
+			    (maskX, maskY + h, pI830->transform[1], &mask_x[1],
+			     &mask_y[1], &mask_w[1]))
+				return;
+			if (!i830_get_transformed_coordinates_3d
+			    (maskX + w, maskY + h, pI830->transform[1],
+			     &mask_x[2], &mask_y[2], &mask_w[2]))
+				return;
+		}
 	}
-    }
-
-    vb_bo = i965_get_vb_space(pScrn);
-    if (vb_bo == NULL)
-	return;
-    i = 0;
-    /* rect (x2,y2) */
-    vb[i++] = (float)(dstX + w);
-    vb[i++] = (float)(dstY + h);
-    vb[i++] = src_x[2] / pI830->scale_units[0][0];
-    vb[i++] = src_y[2] / pI830->scale_units[0][1];
-    if (!is_affine)
-	vb[i++] = src_w[2];
-    if (has_mask) {
-        vb[i++] = mask_x[2] / pI830->scale_units[1][0];
-        vb[i++] = mask_y[2] / pI830->scale_units[1][1];
+
+	vb_bo = i965_get_vb_space(pScrn);
+	if (vb_bo == NULL)
+		return;
+	i = 0;
+	/* rect (x2,y2) */
+	vb[i++] = (float)(dstX + w);
+	vb[i++] = (float)(dstY + h);
+	vb[i++] = src_x[2] / pI830->scale_units[0][0];
+	vb[i++] = src_y[2] / pI830->scale_units[0][1];
 	if (!is_affine)
-	    vb[i++] = mask_w[2];
-    }
-
-    /* rect (x1,y2) */
-    vb[i++] = (float)dstX;
-    vb[i++] = (float)(dstY + h);
-    vb[i++] = src_x[1] / pI830->scale_units[0][0];
-    vb[i++] = src_y[1] / pI830->scale_units[0][1];
-    if (!is_affine)
-	vb[i++] = src_w[1];
-    if (has_mask) {
-        vb[i++] = mask_x[1] / pI830->scale_units[1][0];
-        vb[i++] = mask_y[1] / pI830->scale_units[1][1];
+		vb[i++] = src_w[2];
+	if (has_mask) {
+		vb[i++] = mask_x[2] / pI830->scale_units[1][0];
+		vb[i++] = mask_y[2] / pI830->scale_units[1][1];
+		if (!is_affine)
+			vb[i++] = mask_w[2];
+	}
+
+	/* rect (x1,y2) */
+	vb[i++] = (float)dstX;
+	vb[i++] = (float)(dstY + h);
+	vb[i++] = src_x[1] / pI830->scale_units[0][0];
+	vb[i++] = src_y[1] / pI830->scale_units[0][1];
 	if (!is_affine)
-	    vb[i++] = mask_w[1];
-    }
-
-    /* rect (x1,y1) */
-    vb[i++] = (float)dstX;
-    vb[i++] = (float)dstY;
-    vb[i++] = src_x[0] / pI830->scale_units[0][0];
-    vb[i++] = src_y[0] / pI830->scale_units[0][1];
-    if (!is_affine)
-	vb[i++] = src_w[0];
-    if (has_mask) {
-        vb[i++] = mask_x[0] / pI830->scale_units[1][0];
-        vb[i++] = mask_y[0] / pI830->scale_units[1][1];
+		vb[i++] = src_w[1];
+	if (has_mask) {
+		vb[i++] = mask_x[1] / pI830->scale_units[1][0];
+		vb[i++] = mask_y[1] / pI830->scale_units[1][1];
+		if (!is_affine)
+			vb[i++] = mask_w[1];
+	}
+
+	/* rect (x1,y1) */
+	vb[i++] = (float)dstX;
+	vb[i++] = (float)dstY;
+	vb[i++] = src_x[0] / pI830->scale_units[0][0];
+	vb[i++] = src_y[0] / pI830->scale_units[0][1];
 	if (!is_affine)
-	    vb[i++] = mask_w[0];
-    }
-    assert (i <= VERTEX_BUFFER_SIZE);
-    drm_intel_bo_subdata(vb_bo, render_state->vb_offset * 4, i * 4, vb);
-
-    if (!i965_composite_check_aperture(pScrn))
-	intel_batch_flush(pScrn, FALSE);
-
-    intel_batch_start_atomic(pScrn, 200);
-    if (render_state->needs_state_emit)
-	i965_emit_composite_state(pScrn);
-
-    BEGIN_BATCH(12);
-    OUT_BATCH(MI_FLUSH);
-    /* Set up the pointer to our (single) vertex buffer */
-    OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3);
-    OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
-	      VB0_VERTEXDATA |
-	      (render_state->vertex_size << VB0_BUFFER_PITCH_SHIFT));
-    OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, render_state->vb_offset * 4);
-
-    if (IS_IGDNG(pI830))
-        OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, render_state->vb_offset * 4 + i * 4);
-    else
-        OUT_BATCH(3);
-
-    OUT_BATCH(0); // ignore for VERTEXDATA, but still there
-
-    OUT_BATCH(BRW_3DPRIMITIVE |
-	      BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
-	      (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
-	      (0 << 9) |  /* CTG - indirect vertex count */
-	      4);
-    OUT_BATCH(3);  /* vertex count per instance */
-    OUT_BATCH(0); /* start vertex offset */
-    OUT_BATCH(1); /* single instance */
-    OUT_BATCH(0); /* start instance location */
-    OUT_BATCH(0); /* index buffer offset, ignored */
-    ADVANCE_BATCH();
-
-    render_state->vb_offset += i;
-    drm_intel_bo_unreference(vb_bo);
-
-    intel_batch_end_atomic(pScrn);
-
-    i830_debug_sync(pScrn);
+		vb[i++] = src_w[0];
+	if (has_mask) {
+		vb[i++] = mask_x[0] / pI830->scale_units[1][0];
+		vb[i++] = mask_y[0] / pI830->scale_units[1][1];
+		if (!is_affine)
+			vb[i++] = mask_w[0];
+	}
+	assert(i <= VERTEX_BUFFER_SIZE);
+	drm_intel_bo_subdata(vb_bo, render_state->vb_offset * 4, i * 4, vb);
+
+	if (!i965_composite_check_aperture(pScrn))
+		intel_batch_flush(pScrn, FALSE);
+
+	intel_batch_start_atomic(pScrn, 200);
+	if (render_state->needs_state_emit)
+		i965_emit_composite_state(pScrn);
+
+	BEGIN_BATCH(12);
+	OUT_BATCH(MI_FLUSH);
+	/* Set up the pointer to our (single) vertex buffer */
+	OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3);
+	OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
+		  VB0_VERTEXDATA |
+		  (render_state->vertex_size << VB0_BUFFER_PITCH_SHIFT));
+	OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
+		  render_state->vb_offset * 4);
+
+	if (IS_IGDNG(pI830))
+		OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
+			  render_state->vb_offset * 4 + i * 4);
+	else
+		OUT_BATCH(3);
+
+	OUT_BATCH(0);		// ignore for VERTEXDATA, but still there
+
+	OUT_BATCH(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) |	/* CTG - indirect vertex count */
+		  4);
+	OUT_BATCH(3);		/* vertex count per instance */
+	OUT_BATCH(0);		/* start vertex offset */
+	OUT_BATCH(1);		/* single instance */
+	OUT_BATCH(0);		/* start instance location */
+	OUT_BATCH(0);		/* index buffer offset, ignored */
+	ADVANCE_BATCH();
+
+	render_state->vb_offset += i;
+	drm_intel_bo_unreference(vb_bo);
+
+	intel_batch_end_atomic(pScrn);
+
+	i830_debug_sync(pScrn);
 }
 
-void
-i965_batch_flush_notify(ScrnInfoPtr pScrn)
+void i965_batch_flush_notify(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state = pI830->gen4_render_state;
-
-    /* Once a batch is emitted, we never want to map again any buffer
-     * object being referenced by that batch, (which would be very
-     * expensive). */
-    if (render_state->vertex_buffer_bo) {
-	dri_bo_unreference (render_state->vertex_buffer_bo);
-	render_state->vertex_buffer_bo = NULL;
-    }
-
-    render_state->needs_state_emit = TRUE;
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+
+	/* Once a batch is emitted, we never want to map again any buffer
+	 * object being referenced by that batch, (which would be very
+	 * expensive). */
+	if (render_state->vertex_buffer_bo) {
+		dri_bo_unreference(render_state->vertex_buffer_bo);
+		render_state->vertex_buffer_bo = NULL;
+	}
+
+	render_state->needs_state_emit = TRUE;
 }
 
 /**
  * Called at EnterVT so we can set up our offsets into the state buffer.
  */
-void
-gen4_render_state_init(ScrnInfoPtr pScrn)
+void gen4_render_state_init(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state;
-    int i, j, k, l, m;
-    drm_intel_bo *sf_kernel_bo, *sf_kernel_mask_bo;
-    drm_intel_bo *border_color_bo;
-
-    if (pI830->gen4_render_state == NULL)
-	pI830->gen4_render_state = calloc(sizeof(*render_state), 1);
-
-    render_state = pI830->gen4_render_state;
-    render_state->vb_offset = 0;
-
-    render_state->vs_state_bo = gen4_create_vs_unit_state(pScrn);
-
-    /* Set up the two SF states (one for blending with a mask, one without) */
-    if (IS_IGDNG(pI830)) {
-	sf_kernel_bo = intel_bo_alloc_for_data(pScrn,
-					       sf_kernel_static_gen5,
-					       sizeof(sf_kernel_static_gen5),
-					       "sf kernel gen5");
-	sf_kernel_mask_bo = intel_bo_alloc_for_data(pScrn,
-						    sf_kernel_mask_static_gen5,
-						    sizeof(sf_kernel_mask_static_gen5),
-						    "sf mask kernel");
-    } else {
-	sf_kernel_bo = intel_bo_alloc_for_data(pScrn,
-					       sf_kernel_static,
-					       sizeof(sf_kernel_static),
-					       "sf kernel");
-	sf_kernel_mask_bo = intel_bo_alloc_for_data(pScrn,
-						    sf_kernel_mask_static,
-						    sizeof(sf_kernel_mask_static),
-						    "sf mask kernel");
-    }
-    render_state->sf_state_bo = gen4_create_sf_state(pScrn, sf_kernel_bo);
-    render_state->sf_mask_state_bo = gen4_create_sf_state(pScrn,
-							  sf_kernel_mask_bo);
-    drm_intel_bo_unreference(sf_kernel_bo);
-    drm_intel_bo_unreference(sf_kernel_mask_bo);
-
-    for (m = 0; m < WM_KERNEL_COUNT; m++) {
-	if (IS_IGDNG(pI830))
-	    render_state->wm_kernel_bo[m] =
-		intel_bo_alloc_for_data(pScrn,
-				        wm_kernels_gen5[m].data, wm_kernels_gen5[m].size,
-				        "WM kernel gen5");
-	else
-	    render_state->wm_kernel_bo[m] =
-		intel_bo_alloc_for_data(pScrn,
-				        wm_kernels[m].data, wm_kernels[m].size,
-				        "WM kernel");
-    }
-
-    /* Set up the WM states: each filter/extend type for source and mask, per
-     * kernel.
-     */
-    border_color_bo = sampler_border_color_create(pScrn);
-    for (i = 0; i < SAMPLER_STATE_FILTER_COUNT; i++) {
-	for (j = 0; j < SAMPLER_STATE_EXTEND_COUNT; j++) {
-	    for (k = 0; k < SAMPLER_STATE_FILTER_COUNT; k++) {
-		for (l = 0; l < SAMPLER_STATE_EXTEND_COUNT; l++) {
-		    drm_intel_bo *sampler_state_bo;
-
-		    sampler_state_bo =
-			gen4_create_sampler_state(pScrn,
-						  i, j,
-						  k, l,
-						  border_color_bo);
-
-		    for (m = 0; m < WM_KERNEL_COUNT; m++) {
-			if (IS_IGDNG(pI830))
-			    render_state->wm_state_bo[m][i][j][k][l] =
-				gen4_create_wm_state(pScrn,
-						     wm_kernels_gen5[m].has_mask,
-						     render_state->wm_kernel_bo[m],
-						     sampler_state_bo);
-			else
-			    render_state->wm_state_bo[m][i][j][k][l] =
-				gen4_create_wm_state(pScrn,
-						     wm_kernels[m].has_mask,
-						     render_state->wm_kernel_bo[m],
-						     sampler_state_bo);
-		    }
-		    drm_intel_bo_unreference(sampler_state_bo);
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state;
+	int i, j, k, l, m;
+	drm_intel_bo *sf_kernel_bo, *sf_kernel_mask_bo;
+	drm_intel_bo *border_color_bo;
+
+	if (pI830->gen4_render_state == NULL)
+		pI830->gen4_render_state = calloc(sizeof(*render_state), 1);
+
+	render_state = pI830->gen4_render_state;
+	render_state->vb_offset = 0;
+
+	render_state->vs_state_bo = gen4_create_vs_unit_state(pScrn);
+
+	/* Set up the two SF states (one for blending with a mask, one without) */
+	if (IS_IGDNG(pI830)) {
+		sf_kernel_bo = intel_bo_alloc_for_data(pScrn,
+						       sf_kernel_static_gen5,
+						       sizeof
+						       (sf_kernel_static_gen5),
+						       "sf kernel gen5");
+		sf_kernel_mask_bo =
+		    intel_bo_alloc_for_data(pScrn, sf_kernel_mask_static_gen5,
+					    sizeof(sf_kernel_mask_static_gen5),
+					    "sf mask kernel");
+	} else {
+		sf_kernel_bo = intel_bo_alloc_for_data(pScrn,
+						       sf_kernel_static,
+						       sizeof(sf_kernel_static),
+						       "sf kernel");
+		sf_kernel_mask_bo = intel_bo_alloc_for_data(pScrn,
+							    sf_kernel_mask_static,
+							    sizeof
+							    (sf_kernel_mask_static),
+							    "sf mask kernel");
+	}
+	render_state->sf_state_bo = gen4_create_sf_state(pScrn, sf_kernel_bo);
+	render_state->sf_mask_state_bo = gen4_create_sf_state(pScrn,
+							      sf_kernel_mask_bo);
+	drm_intel_bo_unreference(sf_kernel_bo);
+	drm_intel_bo_unreference(sf_kernel_mask_bo);
+
+	for (m = 0; m < WM_KERNEL_COUNT; m++) {
+		if (IS_IGDNG(pI830))
+			render_state->wm_kernel_bo[m] =
+			    intel_bo_alloc_for_data(pScrn,
+						    wm_kernels_gen5[m].data,
+						    wm_kernels_gen5[m].size,
+						    "WM kernel gen5");
+		else
+			render_state->wm_kernel_bo[m] =
+			    intel_bo_alloc_for_data(pScrn,
+						    wm_kernels[m].data,
+						    wm_kernels[m].size,
+						    "WM kernel");
+	}
+
+	/* Set up the WM states: each filter/extend type for source and mask, per
+	 * kernel.
+	 */
+	border_color_bo = sampler_border_color_create(pScrn);
+	for (i = 0; i < SAMPLER_STATE_FILTER_COUNT; i++) {
+		for (j = 0; j < SAMPLER_STATE_EXTEND_COUNT; j++) {
+			for (k = 0; k < SAMPLER_STATE_FILTER_COUNT; k++) {
+				for (l = 0; l < SAMPLER_STATE_EXTEND_COUNT; l++) {
+					drm_intel_bo *sampler_state_bo;
+
+					sampler_state_bo =
+					    gen4_create_sampler_state(pScrn,
+								      i, j,
+								      k, l,
+								      border_color_bo);
+
+					for (m = 0; m < WM_KERNEL_COUNT; m++) {
+						if (IS_IGDNG(pI830))
+							render_state->
+							    wm_state_bo[m][i][j]
+							    [k][l] =
+							    gen4_create_wm_state
+							    (pScrn,
+							     wm_kernels_gen5[m].
+							     has_mask,
+							     render_state->
+							     wm_kernel_bo[m],
+							     sampler_state_bo);
+						else
+							render_state->
+							    wm_state_bo[m][i][j]
+							    [k][l] =
+							    gen4_create_wm_state
+							    (pScrn,
+							     wm_kernels[m].
+							     has_mask,
+							     render_state->
+							     wm_kernel_bo[m],
+							     sampler_state_bo);
+					}
+					drm_intel_bo_unreference
+					    (sampler_state_bo);
+				}
+			}
 		}
-	    }
 	}
-    }
-    drm_intel_bo_unreference(border_color_bo);
-
-    render_state->cc_state_bo = gen4_create_cc_unit_state(pScrn);
-    render_state->sip_kernel_bo = intel_bo_alloc_for_data(pScrn,
-							  sip_kernel_static,
-							  sizeof(sip_kernel_static),
-							  "sip kernel");
+	drm_intel_bo_unreference(border_color_bo);
+
+	render_state->cc_state_bo = gen4_create_cc_unit_state(pScrn);
+	render_state->sip_kernel_bo = intel_bo_alloc_for_data(pScrn,
+							      sip_kernel_static,
+							      sizeof
+							      (sip_kernel_static),
+							      "sip kernel");
 }
 
 /**
  * Called at LeaveVT.
  */
-void
-gen4_render_state_cleanup(ScrnInfoPtr pScrn)
+void gen4_render_state_cleanup(ScrnInfoPtr pScrn)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    struct gen4_render_state *render_state= pI830->gen4_render_state;
-    int i, j, k, l, m;
-    gen4_composite_op *composite_op = &render_state->composite_op;
+	I830Ptr pI830 = I830PTR(pScrn);
+	struct gen4_render_state *render_state = pI830->gen4_render_state;
+	int i, j, k, l, m;
+	gen4_composite_op *composite_op = &render_state->composite_op;
 
-    drm_intel_bo_unreference(composite_op->binding_table_bo);
-    drm_intel_bo_unreference(render_state->vertex_buffer_bo);
+	drm_intel_bo_unreference(composite_op->binding_table_bo);
+	drm_intel_bo_unreference(render_state->vertex_buffer_bo);
 
-    drm_intel_bo_unreference(render_state->vs_state_bo);
-    drm_intel_bo_unreference(render_state->sf_state_bo);
-    drm_intel_bo_unreference(render_state->sf_mask_state_bo);
+	drm_intel_bo_unreference(render_state->vs_state_bo);
+	drm_intel_bo_unreference(render_state->sf_state_bo);
+	drm_intel_bo_unreference(render_state->sf_mask_state_bo);
 
-    for (i = 0; i < WM_KERNEL_COUNT; i++)
-	drm_intel_bo_unreference(render_state->wm_kernel_bo[i]);
+	for (i = 0; i < WM_KERNEL_COUNT; i++)
+		drm_intel_bo_unreference(render_state->wm_kernel_bo[i]);
 
-    for (i = 0; i < SAMPLER_STATE_FILTER_COUNT; i++)
-	for (j = 0; j < SAMPLER_STATE_EXTEND_COUNT; j++)
-	    for (k = 0; k < SAMPLER_STATE_FILTER_COUNT; k++)
-		for (l = 0; l < SAMPLER_STATE_EXTEND_COUNT; l++)
-		    for (m = 0; m < WM_KERNEL_COUNT; m++)
-			drm_intel_bo_unreference(render_state->wm_state_bo[m][i][j][k][l]);
+	for (i = 0; i < SAMPLER_STATE_FILTER_COUNT; i++)
+		for (j = 0; j < SAMPLER_STATE_EXTEND_COUNT; j++)
+			for (k = 0; k < SAMPLER_STATE_FILTER_COUNT; k++)
+				for (l = 0; l < SAMPLER_STATE_EXTEND_COUNT; l++)
+					for (m = 0; m < WM_KERNEL_COUNT; m++)
+						drm_intel_bo_unreference
+						    (render_state->
+						     wm_state_bo[m][i][j][k]
+						     [l]);
 
-    drm_intel_bo_unreference(render_state->cc_state_bo);
-    drm_intel_bo_unreference(render_state->sip_kernel_bo);
+	drm_intel_bo_unreference(render_state->cc_state_bo);
+	drm_intel_bo_unreference(render_state->sip_kernel_bo);
 
-    free(pI830->gen4_render_state);
-    pI830->gen4_render_state = NULL;
+	free(pI830->gen4_render_state);
+	pI830->gen4_render_state = NULL;
 }
diff --git a/src/i965_video.c b/src/i965_video.c
index aa0a501d..881554c9 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -48,25 +48,25 @@
 
 static const uint32_t sip_kernel_static[][4] = {
 /*    wait (1) a0<1>UW a145<0,1,0>UW { align1 +  } */
-    { 0x00000030, 0x20000108, 0x00001220, 0x00000000 },
+	{0x00000030, 0x20000108, 0x00001220, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 /*    nop (4) g0<1>UD { align1 +  } */
-    { 0x0040007e, 0x20000c21, 0x00690000, 0x00000000 },
+	{0x0040007e, 0x20000c21, 0x00690000, 0x00000000},
 };
 
 /*
@@ -131,40 +131,43 @@ static const uint32_t ps_kernel_planar_static_gen5[][4] = {
 #include "exa_wm_write.g4b.gen5"
 };
 
-static uint32_t float_to_uint (float f) {
-    union {uint32_t i; float f;} x;
-    x.f = f;
-    return x.i;
+static uint32_t float_to_uint(float f)
+{
+	union {
+		uint32_t i;
+		float f;
+	} x;
+	x.f = f;
+	return x.i;
 }
 
 #if 0
 static struct {
-    uint32_t svg_ctl;
-    char *name;
+	uint32_t svg_ctl;
+	char *name;
 } svg_ctl_bits[] = {
-    { BRW_SVG_CTL_GS_BA, "General State Base Address" },
-    { BRW_SVG_CTL_SS_BA, "Surface State Base Address" },
-    { BRW_SVG_CTL_IO_BA, "Indirect Object Base Address" },
-    { BRW_SVG_CTL_GS_AUB, "Generate State Access Upper Bound" },
-    { BRW_SVG_CTL_IO_AUB, "Indirect Object Access Upper Bound" },
-    { BRW_SVG_CTL_SIP, "System Instruction Pointer" },
-    { 0, 0 },
-};
-
-static void
-brw_debug (ScrnInfoPtr pScrn, char *when)
+	{
+	BRW_SVG_CTL_GS_BA, "General State Base Address"}, {
+	BRW_SVG_CTL_SS_BA, "Surface State Base Address"}, {
+	BRW_SVG_CTL_IO_BA, "Indirect Object Base Address"}, {
+	BRW_SVG_CTL_GS_AUB, "Generate State Access Upper Bound"}, {
+	BRW_SVG_CTL_IO_AUB, "Indirect Object Access Upper Bound"}, {
+	BRW_SVG_CTL_SIP, "System Instruction Pointer"}, {
+0, 0},};
+
+static void brw_debug(ScrnInfoPtr pScrn, char *when)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int	i;
-    uint32_t v;
-
-    I830Sync (pScrn);
-    ErrorF("brw_debug: %s\n", when);
-    for (i = 0; svg_ctl_bits[i].name; i++) {
-	OUTREG(BRW_SVG_CTL, svg_ctl_bits[i].svg_ctl);
-	v = INREG(BRW_SVG_RDATA);
-	ErrorF("\t%34.34s: 0x%08x\n", svg_ctl_bits[i].name, v);
-    }
+	I830Ptr pI830 = I830PTR(pScrn);
+	int i;
+	uint32_t v;
+
+	I830Sync(pScrn);
+	ErrorF("brw_debug: %s\n", when);
+	for (i = 0; svg_ctl_bits[i].name; i++) {
+		OUTREG(BRW_SVG_CTL, svg_ctl_bits[i].svg_ctl);
+		v = INREG(BRW_SVG_RDATA);
+		ErrorF("\t%34.34s: 0x%08x\n", svg_ctl_bits[i].name, v);
+	}
 }
 #endif
 
@@ -172,150 +175,142 @@ brw_debug (ScrnInfoPtr pScrn, char *when)
 #define WATCH_WIZ 0
 #define WATCH_STATS 0
 
-static void
-i965_pre_draw_debug(ScrnInfoPtr scrn)
+static void i965_pre_draw_debug(ScrnInfoPtr scrn)
 {
 #if 0
-    I830Ptr pI830 = I830PTR(scrn);
+	I830Ptr pI830 = I830PTR(scrn);
 #endif
 
 #if 0
-    ErrorF ("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n",
-	    INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0),
-	    INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0));
-
-    OUTREG(BRW_VF_CTL,
-	   BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID |
-	   BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX |
-	   BRW_VF_CTL_SNAPSHOT_ENABLE);
-    OUTREG(BRW_VF_STRG_VAL, 0);
+	ErrorF("before EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n",
+	       INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0),
+	       INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0));
+
+	OUTREG(BRW_VF_CTL,
+	       BRW_VF_CTL_SNAPSHOT_MUX_SELECT_THREADID |
+	       BRW_VF_CTL_SNAPSHOT_TYPE_VERTEX_INDEX |
+	       BRW_VF_CTL_SNAPSHOT_ENABLE);
+	OUTREG(BRW_VF_STRG_VAL, 0);
 #endif
 
 #if 0
-    OUTREG(BRW_VS_CTL,
-	   BRW_VS_CTL_SNAPSHOT_ALL_THREADS |
-	   BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT |
-	   BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE);
+	OUTREG(BRW_VS_CTL,
+	       BRW_VS_CTL_SNAPSHOT_ALL_THREADS |
+	       BRW_VS_CTL_SNAPSHOT_MUX_VALID_COUNT |
+	       BRW_VS_CTL_THREAD_SNAPSHOT_ENABLE);
 
-    OUTREG(BRW_VS_STRG_VAL, 0);
+	OUTREG(BRW_VS_STRG_VAL, 0);
 #endif
 
 #if WATCH_SF
-    OUTREG(BRW_SF_CTL,
-	   BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT |
-	   BRW_SF_CTL_SNAPSHOT_ALL_THREADS |
-	   BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE);
-    OUTREG(BRW_SF_STRG_VAL, 0);
+	OUTREG(BRW_SF_CTL,
+	       BRW_SF_CTL_SNAPSHOT_MUX_VERTEX_COUNT |
+	       BRW_SF_CTL_SNAPSHOT_ALL_THREADS |
+	       BRW_SF_CTL_THREAD_SNAPSHOT_ENABLE);
+	OUTREG(BRW_SF_STRG_VAL, 0);
 #endif
 
 #if WATCH_WIZ
-    OUTREG(BRW_WIZ_CTL,
-	   BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE |
-	   BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS |
-	   BRW_WIZ_CTL_SNAPSHOT_ENABLE);
-    OUTREG(BRW_WIZ_STRG_VAL,
-	   (box_x1) | (box_y1 << 16));
+	OUTREG(BRW_WIZ_CTL,
+	       BRW_WIZ_CTL_SNAPSHOT_MUX_SUBSPAN_INSTANCE |
+	       BRW_WIZ_CTL_SNAPSHOT_ALL_THREADS | BRW_WIZ_CTL_SNAPSHOT_ENABLE);
+	OUTREG(BRW_WIZ_STRG_VAL, (box_x1) | (box_y1 << 16));
 #endif
 
 #if 0
-    OUTREG(BRW_TS_CTL,
-	   BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR |
-	   BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS |
-	   BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS |
-	   BRW_TS_CTL_SNAPSHOT_ENABLE);
+	OUTREG(BRW_TS_CTL,
+	       BRW_TS_CTL_SNAPSHOT_MESSAGE_ERROR |
+	       BRW_TS_CTL_SNAPSHOT_ALL_CHILD_THREADS |
+	       BRW_TS_CTL_SNAPSHOT_ALL_ROOT_THREADS |
+	       BRW_TS_CTL_SNAPSHOT_ENABLE);
 #endif
 }
 
-static void
-i965_post_draw_debug(ScrnInfoPtr scrn)
+static void i965_post_draw_debug(ScrnInfoPtr scrn)
 {
 #if 0
-    I830Ptr pI830 = I830PTR(scrn);
+	I830Ptr pI830 = I830PTR(scrn);
 #endif
 
 #if 0
-    for (j = 0; j < 100000; j++) {
-	ctl = INREG(BRW_VF_CTL);
-	if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE)
-	    break;
-    }
-
-    rdata = INREG(BRW_VF_RDATA);
-    OUTREG(BRW_VF_CTL, 0);
-    ErrorF ("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata);
+	for (j = 0; j < 100000; j++) {
+		ctl = INREG(BRW_VF_CTL);
+		if (ctl & BRW_VF_CTL_SNAPSHOT_COMPLETE)
+			break;
+	}
+
+	rdata = INREG(BRW_VF_RDATA);
+	OUTREG(BRW_VF_CTL, 0);
+	ErrorF("VF_CTL: 0x%08x VF_RDATA: 0x%08x\n", ctl, rdata);
 #endif
 
 #if 0
-    for (j = 0; j < 1000000; j++) {
-	ctl = INREG(BRW_VS_CTL);
-	if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE)
-	    break;
-    }
-
-    rdata = INREG(BRW_VS_RDATA);
-    for (k = 0; k <= 3; k++) {
-	OUTREG(BRW_VS_CTL,
-	       BRW_VS_CTL_SNAPSHOT_COMPLETE |
-	       (k << 8));
+	for (j = 0; j < 1000000; j++) {
+		ctl = INREG(BRW_VS_CTL);
+		if (ctl & BRW_VS_CTL_SNAPSHOT_COMPLETE)
+			break;
+	}
+
 	rdata = INREG(BRW_VS_RDATA);
-	ErrorF ("VS_CTL: 0x%08x VS_RDATA(%d): 0x%08x\n", ctl, k, rdata);
-    }
+	for (k = 0; k <= 3; k++) {
+		OUTREG(BRW_VS_CTL, BRW_VS_CTL_SNAPSHOT_COMPLETE | (k << 8));
+		rdata = INREG(BRW_VS_RDATA);
+		ErrorF("VS_CTL: 0x%08x VS_RDATA(%d): 0x%08x\n", ctl, k, rdata);
+	}
 
-    OUTREG(BRW_VS_CTL, 0);
+	OUTREG(BRW_VS_CTL, 0);
 #endif
 
 #if WATCH_SF
-    for (j = 0; j < 1000000; j++) {
-	ctl = INREG(BRW_SF_CTL);
-	if (ctl & BRW_SF_CTL_SNAPSHOT_COMPLETE)
-	    break;
-    }
+	for (j = 0; j < 1000000; j++) {
+		ctl = INREG(BRW_SF_CTL);
+		if (ctl & BRW_SF_CTL_SNAPSHOT_COMPLETE)
+			break;
+	}
 
-    for (k = 0; k <= 7; k++) {
-	OUTREG(BRW_SF_CTL,
-	       BRW_SF_CTL_SNAPSHOT_COMPLETE |
-	       (k << 8));
-	rdata = INREG(BRW_SF_RDATA);
-	ErrorF("SF_CTL: 0x%08x SF_RDATA(%d): 0x%08x\n", ctl, k, rdata);
-    }
+	for (k = 0; k <= 7; k++) {
+		OUTREG(BRW_SF_CTL, BRW_SF_CTL_SNAPSHOT_COMPLETE | (k << 8));
+		rdata = INREG(BRW_SF_RDATA);
+		ErrorF("SF_CTL: 0x%08x SF_RDATA(%d): 0x%08x\n", ctl, k, rdata);
+	}
 
-    OUTREG(BRW_SF_CTL, 0);
+	OUTREG(BRW_SF_CTL, 0);
 #endif
 
 #if WATCH_WIZ
-    for (j = 0; j < 100000; j++) {
-	ctl = INREG(BRW_WIZ_CTL);
-	if (ctl & BRW_WIZ_CTL_SNAPSHOT_COMPLETE)
-	    break;
-    }
-
-    rdata = INREG(BRW_WIZ_RDATA);
-    OUTREG(BRW_WIZ_CTL, 0);
-    ErrorF("WIZ_CTL: 0x%08x WIZ_RDATA: 0x%08x\n", ctl, rdata);
+	for (j = 0; j < 100000; j++) {
+		ctl = INREG(BRW_WIZ_CTL);
+		if (ctl & BRW_WIZ_CTL_SNAPSHOT_COMPLETE)
+			break;
+	}
+
+	rdata = INREG(BRW_WIZ_RDATA);
+	OUTREG(BRW_WIZ_CTL, 0);
+	ErrorF("WIZ_CTL: 0x%08x WIZ_RDATA: 0x%08x\n", ctl, rdata);
 #endif
 
 #if 0
-    for (j = 0; j < 100000; j++) {
-	ctl = INREG(BRW_TS_CTL);
-	if (ctl & BRW_TS_CTL_SNAPSHOT_COMPLETE)
-	    break;
-    }
-
-    rdata = INREG(BRW_TS_RDATA);
-    OUTREG(BRW_TS_CTL, 0);
-    ErrorF("TS_CTL: 0x%08x TS_RDATA: 0x%08x\n", ctl, rdata);
-
-    ErrorF("after EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n",
-	   INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0),
-	   INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0));
+	for (j = 0; j < 100000; j++) {
+		ctl = INREG(BRW_TS_CTL);
+		if (ctl & BRW_TS_CTL_SNAPSHOT_COMPLETE)
+			break;
+	}
+
+	rdata = INREG(BRW_TS_RDATA);
+	OUTREG(BRW_TS_CTL, 0);
+	ErrorF("TS_CTL: 0x%08x TS_RDATA: 0x%08x\n", ctl, rdata);
+
+	ErrorF("after EU_ATT 0x%08x%08x EU_ATT_DATA 0x%08x%08x\n",
+	       INREG(BRW_EU_ATT_1), INREG(BRW_EU_ATT_0),
+	       INREG(BRW_EU_ATT_DATA_1), INREG(BRW_EU_ATT_DATA_0));
 #endif
 
 #if 0
-    for (j = 0; j < 256; j++) {
-	OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT);
-	rdata = INREG(BRW_TD_RDATA);
-	ErrorF ("TD_RDATA(%d): 0x%08x\n", j, rdata);
-    }
+	for (j = 0; j < 256; j++) {
+		OUTREG(BRW_TD_CTL, j << BRW_TD_CTL_MUX_SHIFT);
+		rdata = INREG(BRW_TD_RDATA);
+		ErrorF("TD_RDATA(%d): 0x%08x\n", j, rdata);
+	}
 #endif
 }
 
@@ -346,620 +341,639 @@ i965_post_draw_debug(ScrnInfoPtr scrn)
 
 static int
 intel_alloc_and_map(I830Ptr i830, char *name, int size,
-		    drm_intel_bo **bop, void *virtualp)
+		    drm_intel_bo ** bop, void *virtualp)
 {
-    drm_intel_bo    *bo;
-
-    bo = drm_intel_bo_alloc(i830->bufmgr, name, size, 4096);
-    if (!bo)
-	return -1;
-    if (drm_intel_bo_map(bo, TRUE) != 0) {
-	drm_intel_bo_unreference(bo);
-	return -1;
-    }
-    *bop = bo;
-    *(void **) virtualp = bo->virtual;
-    memset (bo->virtual, 0, size);
-    return 0;
+	drm_intel_bo *bo;
+
+	bo = drm_intel_bo_alloc(i830->bufmgr, name, size, 4096);
+	if (!bo)
+		return -1;
+	if (drm_intel_bo_map(bo, TRUE) != 0) {
+		drm_intel_bo_unreference(bo);
+		return -1;
+	}
+	*bop = bo;
+	*(void **)virtualp = bo->virtual;
+	memset(bo->virtual, 0, size);
+	return 0;
 }
 
-static drm_intel_bo *
-i965_create_dst_surface_state(ScrnInfoPtr scrn,
-			      PixmapPtr pixmap)
+static drm_intel_bo *i965_create_dst_surface_state(ScrnInfoPtr scrn,
+						   PixmapPtr pixmap)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    struct brw_surface_state *dest_surf_state;
-    drm_intel_bo *pixmap_bo = i830_get_pixmap_bo(pixmap);
-    drm_intel_bo *surf_bo;
-
-    if (intel_alloc_and_map(pI830, "textured video surface state", 4096,
-			    &surf_bo, &dest_surf_state) != 0)
-	return NULL;
-
-    dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
-    dest_surf_state->ss0.data_return_format = BRW_SURFACERETURNFORMAT_FLOAT32;
-    if (pI830->cpp == 2) {
-	dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
-    } else {
-	dest_surf_state->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
-    }
-    dest_surf_state->ss0.writedisable_alpha = 0;
-    dest_surf_state->ss0.writedisable_red = 0;
-    dest_surf_state->ss0.writedisable_green = 0;
-    dest_surf_state->ss0.writedisable_blue = 0;
-    dest_surf_state->ss0.color_blend = 1;
-    dest_surf_state->ss0.vert_line_stride = 0;
-    dest_surf_state->ss0.vert_line_stride_ofs = 0;
-    dest_surf_state->ss0.mipmap_layout_mode = 0;
-    dest_surf_state->ss0.render_cache_read_mode = 0;
-
-    dest_surf_state->ss1.base_addr =
-	intel_emit_reloc(surf_bo, offsetof(struct brw_surface_state, ss1),
-			 pixmap_bo, 0,
-			 I915_GEM_DOMAIN_SAMPLER, 0);
-
-    dest_surf_state->ss2.height = scrn->virtualY - 1;
-    dest_surf_state->ss2.width = scrn->virtualX - 1;
-    dest_surf_state->ss2.mip_count = 0;
-    dest_surf_state->ss2.render_target_rotation = 0;
-    dest_surf_state->ss3.pitch = intel_get_pixmap_pitch(pixmap) - 1;
-    dest_surf_state->ss3.tiled_surface = i830_pixmap_tiled(pixmap);
-    dest_surf_state->ss3.tile_walk = 0; /* TileX */
-
-    drm_intel_bo_unmap(surf_bo);
-    return surf_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	struct brw_surface_state *dest_surf_state;
+	drm_intel_bo *pixmap_bo = i830_get_pixmap_bo(pixmap);
+	drm_intel_bo *surf_bo;
+
+	if (intel_alloc_and_map(pI830, "textured video surface state", 4096,
+				&surf_bo, &dest_surf_state) != 0)
+		return NULL;
+
+	dest_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+	dest_surf_state->ss0.data_return_format =
+	    BRW_SURFACERETURNFORMAT_FLOAT32;
+	if (pI830->cpp == 2) {
+		dest_surf_state->ss0.surface_format =
+		    BRW_SURFACEFORMAT_B5G6R5_UNORM;
+	} else {
+		dest_surf_state->ss0.surface_format =
+		    BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+	}
+	dest_surf_state->ss0.writedisable_alpha = 0;
+	dest_surf_state->ss0.writedisable_red = 0;
+	dest_surf_state->ss0.writedisable_green = 0;
+	dest_surf_state->ss0.writedisable_blue = 0;
+	dest_surf_state->ss0.color_blend = 1;
+	dest_surf_state->ss0.vert_line_stride = 0;
+	dest_surf_state->ss0.vert_line_stride_ofs = 0;
+	dest_surf_state->ss0.mipmap_layout_mode = 0;
+	dest_surf_state->ss0.render_cache_read_mode = 0;
+
+	dest_surf_state->ss1.base_addr =
+	    intel_emit_reloc(surf_bo, offsetof(struct brw_surface_state, ss1),
+			     pixmap_bo, 0, I915_GEM_DOMAIN_SAMPLER, 0);
+
+	dest_surf_state->ss2.height = scrn->virtualY - 1;
+	dest_surf_state->ss2.width = scrn->virtualX - 1;
+	dest_surf_state->ss2.mip_count = 0;
+	dest_surf_state->ss2.render_target_rotation = 0;
+	dest_surf_state->ss3.pitch = intel_get_pixmap_pitch(pixmap) - 1;
+	dest_surf_state->ss3.tiled_surface = i830_pixmap_tiled(pixmap);
+	dest_surf_state->ss3.tile_walk = 0;	/* TileX */
+
+	drm_intel_bo_unmap(surf_bo);
+	return surf_bo;
 }
 
-static drm_intel_bo *
-i965_create_src_surface_state(ScrnInfoPtr scrn,
-			      drm_intel_bo *src_bo,
-			      uint32_t src_offset,
-			      int src_width,
-			      int src_height,
-			      int src_pitch,
-			      uint32_t src_surf_format)
+static drm_intel_bo *i965_create_src_surface_state(ScrnInfoPtr scrn,
+						   drm_intel_bo * src_bo,
+						   uint32_t src_offset,
+						   int src_width,
+						   int src_height,
+						   int src_pitch,
+						   uint32_t src_surf_format)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *surface_bo;
-    struct brw_surface_state *src_surf_state;
-
-    if (intel_alloc_and_map(pI830, "textured video surface state", 4096,
-			    &surface_bo, &src_surf_state) != 0)
-	return NULL;
-
-    /* Set up the source surface state buffer */
-    src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
-    src_surf_state->ss0.surface_format = src_surf_format;
-    src_surf_state->ss0.writedisable_alpha = 0;
-    src_surf_state->ss0.writedisable_red = 0;
-    src_surf_state->ss0.writedisable_green = 0;
-    src_surf_state->ss0.writedisable_blue = 0;
-    src_surf_state->ss0.color_blend = 1;
-    src_surf_state->ss0.vert_line_stride = 0;
-    src_surf_state->ss0.vert_line_stride_ofs = 0;
-    src_surf_state->ss0.mipmap_layout_mode = 0;
-    src_surf_state->ss0.render_cache_read_mode = 0;
-
-    src_surf_state->ss2.width = src_width - 1;
-    src_surf_state->ss2.height = src_height - 1;
-    src_surf_state->ss2.mip_count = 0;
-    src_surf_state->ss2.render_target_rotation = 0;
-    src_surf_state->ss3.pitch = src_pitch - 1;
-
-    if (src_bo) {
-        src_surf_state->ss1.base_addr =
-            intel_emit_reloc(surface_bo,
-                             offsetof(struct brw_surface_state, ss1),
-                             src_bo, src_offset,
-                             I915_GEM_DOMAIN_SAMPLER, 0);
-    } else {
-        src_surf_state->ss1.base_addr = src_offset;
-    }
-
-    drm_intel_bo_unmap(surface_bo);
-    return surface_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *surface_bo;
+	struct brw_surface_state *src_surf_state;
+
+	if (intel_alloc_and_map(pI830, "textured video surface state", 4096,
+				&surface_bo, &src_surf_state) != 0)
+		return NULL;
+
+	/* Set up the source surface state buffer */
+	src_surf_state->ss0.surface_type = BRW_SURFACE_2D;
+	src_surf_state->ss0.surface_format = src_surf_format;
+	src_surf_state->ss0.writedisable_alpha = 0;
+	src_surf_state->ss0.writedisable_red = 0;
+	src_surf_state->ss0.writedisable_green = 0;
+	src_surf_state->ss0.writedisable_blue = 0;
+	src_surf_state->ss0.color_blend = 1;
+	src_surf_state->ss0.vert_line_stride = 0;
+	src_surf_state->ss0.vert_line_stride_ofs = 0;
+	src_surf_state->ss0.mipmap_layout_mode = 0;
+	src_surf_state->ss0.render_cache_read_mode = 0;
+
+	src_surf_state->ss2.width = src_width - 1;
+	src_surf_state->ss2.height = src_height - 1;
+	src_surf_state->ss2.mip_count = 0;
+	src_surf_state->ss2.render_target_rotation = 0;
+	src_surf_state->ss3.pitch = src_pitch - 1;
+
+	if (src_bo) {
+		src_surf_state->ss1.base_addr =
+		    intel_emit_reloc(surface_bo,
+				     offsetof(struct brw_surface_state, ss1),
+				     src_bo, src_offset,
+				     I915_GEM_DOMAIN_SAMPLER, 0);
+	} else {
+		src_surf_state->ss1.base_addr = src_offset;
+	}
+
+	drm_intel_bo_unmap(surface_bo);
+	return surface_bo;
 }
 
-static drm_intel_bo *
-i965_create_binding_table(ScrnInfoPtr scrn, drm_intel_bo **surf_bos, int n_surf)
+static drm_intel_bo *i965_create_binding_table(ScrnInfoPtr scrn,
+					       drm_intel_bo ** surf_bos,
+					       int n_surf)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *bind_bo;
-    uint32_t *binding_table;
-    int i;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *bind_bo;
+	uint32_t *binding_table;
+	int i;
 
-    /* Set up a binding table for our surfaces.  Only the PS will use it */
+	/* Set up a binding table for our surfaces.  Only the PS will use it */
 
-    if (intel_alloc_and_map(pI830, "textured video binding table", 4096,
-			    &bind_bo, &binding_table) != 0)
-	return NULL;
+	if (intel_alloc_and_map(pI830, "textured video binding table", 4096,
+				&bind_bo, &binding_table) != 0)
+		return NULL;
 
-    for (i = 0; i < n_surf; i++)
-	binding_table[i] = intel_emit_reloc(bind_bo, i * sizeof(uint32_t),
-					    surf_bos[i], 0,
-					    I915_GEM_DOMAIN_INSTRUCTION, 0);
+	for (i = 0; i < n_surf; i++)
+		binding_table[i] =
+		    intel_emit_reloc(bind_bo, i * sizeof(uint32_t), surf_bos[i],
+				     0, I915_GEM_DOMAIN_INSTRUCTION, 0);
 
-    drm_intel_bo_unmap(bind_bo);
-    return bind_bo;
+	drm_intel_bo_unmap(bind_bo);
+	return bind_bo;
 }
 
-static drm_intel_bo *
-i965_create_sampler_state(ScrnInfoPtr scrn)
+static drm_intel_bo *i965_create_sampler_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *sampler_bo;
-    struct brw_sampler_state *sampler_state;
-
-    if (intel_alloc_and_map(pI830, "textured video sampler state", 4096,
-			    &sampler_bo, &sampler_state) != 0)
-	return NULL;
-
-    sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
-    sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
-    sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-    sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-    sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
-
-    drm_intel_bo_unmap(sampler_bo);
-    return sampler_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *sampler_bo;
+	struct brw_sampler_state *sampler_state;
+
+	if (intel_alloc_and_map(pI830, "textured video sampler state", 4096,
+				&sampler_bo, &sampler_state) != 0)
+		return NULL;
+
+	sampler_state->ss0.min_filter = BRW_MAPFILTER_LINEAR;
+	sampler_state->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
+	sampler_state->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+	sampler_state->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+	sampler_state->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
+
+	drm_intel_bo_unmap(sampler_bo);
+	return sampler_bo;
 }
 
-static drm_intel_bo *
-i965_create_vs_state(ScrnInfoPtr scrn)
+static drm_intel_bo *i965_create_vs_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *vs_bo;
-    struct brw_vs_unit_state *vs_state;
-
-    if (intel_alloc_and_map(pI830, "textured video vs state", 4096,
-			    &vs_bo, &vs_state) != 0)
-	return NULL;
-
-    /* Set up the vertex shader to be disabled (passthrough) */
-    if (IS_IGDNG(pI830))
-	vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
-    else
-	vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
-    vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
-    vs_state->vs6.vs_enable = 0;
-    vs_state->vs6.vert_cache_disable = 1;
-
-    drm_intel_bo_unmap(vs_bo);
-    return vs_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *vs_bo;
+	struct brw_vs_unit_state *vs_state;
+
+	if (intel_alloc_and_map(pI830, "textured video vs state", 4096,
+				&vs_bo, &vs_state) != 0)
+		return NULL;
+
+	/* Set up the vertex shader to be disabled (passthrough) */
+	if (IS_IGDNG(pI830))
+		vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES >> 2;
+	else
+		vs_state->thread4.nr_urb_entries = URB_VS_ENTRIES;
+	vs_state->thread4.urb_entry_allocation_size = URB_VS_ENTRY_SIZE - 1;
+	vs_state->vs6.vs_enable = 0;
+	vs_state->vs6.vert_cache_disable = 1;
+
+	drm_intel_bo_unmap(vs_bo);
+	return vs_bo;
 }
 
-static drm_intel_bo *
-i965_create_program(ScrnInfoPtr scrn, const uint32_t *program,
-		    unsigned int program_size)
+static drm_intel_bo *i965_create_program(ScrnInfoPtr scrn,
+					 const uint32_t * program,
+					 unsigned int program_size)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *prog_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *prog_bo;
 
-    prog_bo = drm_intel_bo_alloc(pI830->bufmgr, "textured video program",
-				 program_size, 4096);
-    if (!prog_bo)
-	return NULL;
+	prog_bo = drm_intel_bo_alloc(pI830->bufmgr, "textured video program",
+				     program_size, 4096);
+	if (!prog_bo)
+		return NULL;
 
-    drm_intel_bo_subdata(prog_bo, 0, program_size, program);
+	drm_intel_bo_subdata(prog_bo, 0, program_size, program);
 
-    return prog_bo;
+	return prog_bo;
 }
 
-static drm_intel_bo *
-i965_create_sf_state(ScrnInfoPtr scrn)
+static drm_intel_bo *i965_create_sf_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *sf_bo, *kernel_bo;
-    struct brw_sf_unit_state *sf_state;
-
-    if (IS_IGDNG(pI830))
-	kernel_bo = i965_create_program(scrn, &sf_kernel_static_gen5[0][0],
-				        sizeof(sf_kernel_static_gen5));
-    else
-	kernel_bo = i965_create_program(scrn, &sf_kernel_static[0][0],
-				        sizeof(sf_kernel_static));
-
-    if (!kernel_bo)
-	return NULL;
-
-    if (intel_alloc_and_map(pI830, "textured video sf state", 4096,
-			    &sf_bo, &sf_state) != 0)
-    {
-	drm_intel_bo_unreference(kernel_bo);
-	return NULL;
-    }
-
-    /* Set up the SF kernel to do coord interp: for each attribute,
-     * calculate dA/dx and dA/dy.  Hand these interpolation coefficients
-     * back to SF which then hands pixels off to WM.
-     */
-    sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
-    sf_state->thread0.kernel_start_pointer =
-	intel_emit_reloc(sf_bo, offsetof(struct brw_sf_unit_state, thread0),
-			 kernel_bo, sf_state->thread0.grf_reg_count << 1,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
-    sf_state->sf1.single_program_flow = 1; /* XXX */
-    sf_state->sf1.binding_table_entry_count = 0;
-    sf_state->sf1.thread_priority = 0;
-    sf_state->sf1.floating_point_mode = 0; /* Mesa does this */
-    sf_state->sf1.illegal_op_exception_enable = 1;
-    sf_state->sf1.mask_stack_exception_enable = 1;
-    sf_state->sf1.sw_exception_enable = 1;
-    sf_state->thread2.per_thread_scratch_space = 0;
-    /* scratch space is not used in our kernel */
-    sf_state->thread2.scratch_space_base_pointer = 0;
-    sf_state->thread3.const_urb_entry_read_length = 0; /* no const URBs */
-    sf_state->thread3.const_urb_entry_read_offset = 0; /* no const URBs */
-    sf_state->thread3.urb_entry_read_length = 1; /* 1 URB per vertex */
-    sf_state->thread3.urb_entry_read_offset = 0;
-    sf_state->thread3.dispatch_grf_start_reg = 3;
-    sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
-    sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
-    sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
-    sf_state->thread4.stats_enable = 1;
-    sf_state->sf5.viewport_transform = FALSE; /* skip viewport */
-    sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
-    sf_state->sf6.scissor = 0;
-    sf_state->sf7.trifan_pv = 2;
-    sf_state->sf6.dest_org_vbias = 0x8;
-    sf_state->sf6.dest_org_hbias = 0x8;
-
-    drm_intel_bo_unmap(sf_bo);
-    return sf_bo;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *sf_bo, *kernel_bo;
+	struct brw_sf_unit_state *sf_state;
+
+	if (IS_IGDNG(pI830))
+		kernel_bo =
+		    i965_create_program(scrn, &sf_kernel_static_gen5[0][0],
+					sizeof(sf_kernel_static_gen5));
+	else
+		kernel_bo = i965_create_program(scrn, &sf_kernel_static[0][0],
+						sizeof(sf_kernel_static));
+
+	if (!kernel_bo)
+		return NULL;
+
+	if (intel_alloc_and_map(pI830, "textured video sf state", 4096,
+				&sf_bo, &sf_state) != 0) {
+		drm_intel_bo_unreference(kernel_bo);
+		return NULL;
+	}
+
+	/* Set up the SF kernel to do coord interp: for each attribute,
+	 * calculate dA/dx and dA/dy.  Hand these interpolation coefficients
+	 * back to SF which then hands pixels off to WM.
+	 */
+	sf_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(SF_KERNEL_NUM_GRF);
+	sf_state->thread0.kernel_start_pointer =
+	    intel_emit_reloc(sf_bo, offsetof(struct brw_sf_unit_state, thread0),
+			     kernel_bo, sf_state->thread0.grf_reg_count << 1,
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
+	sf_state->sf1.single_program_flow = 1;	/* XXX */
+	sf_state->sf1.binding_table_entry_count = 0;
+	sf_state->sf1.thread_priority = 0;
+	sf_state->sf1.floating_point_mode = 0;	/* Mesa does this */
+	sf_state->sf1.illegal_op_exception_enable = 1;
+	sf_state->sf1.mask_stack_exception_enable = 1;
+	sf_state->sf1.sw_exception_enable = 1;
+	sf_state->thread2.per_thread_scratch_space = 0;
+	/* scratch space is not used in our kernel */
+	sf_state->thread2.scratch_space_base_pointer = 0;
+	sf_state->thread3.const_urb_entry_read_length = 0;	/* no const URBs */
+	sf_state->thread3.const_urb_entry_read_offset = 0;	/* no const URBs */
+	sf_state->thread3.urb_entry_read_length = 1;	/* 1 URB per vertex */
+	sf_state->thread3.urb_entry_read_offset = 0;
+	sf_state->thread3.dispatch_grf_start_reg = 3;
+	sf_state->thread4.max_threads = SF_MAX_THREADS - 1;
+	sf_state->thread4.urb_entry_allocation_size = URB_SF_ENTRY_SIZE - 1;
+	sf_state->thread4.nr_urb_entries = URB_SF_ENTRIES;
+	sf_state->thread4.stats_enable = 1;
+	sf_state->sf5.viewport_transform = FALSE;	/* skip viewport */
+	sf_state->sf6.cull_mode = BRW_CULLMODE_NONE;
+	sf_state->sf6.scissor = 0;
+	sf_state->sf7.trifan_pv = 2;
+	sf_state->sf6.dest_org_vbias = 0x8;
+	sf_state->sf6.dest_org_hbias = 0x8;
+
+	drm_intel_bo_unmap(sf_bo);
+	return sf_bo;
 }
 
-static drm_intel_bo *
-i965_create_wm_state(ScrnInfoPtr scrn, drm_intel_bo *sampler_bo, Bool is_packed)
+static drm_intel_bo *i965_create_wm_state(ScrnInfoPtr scrn,
+					  drm_intel_bo * sampler_bo,
+					  Bool is_packed)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *wm_bo, *kernel_bo;
-    struct brw_wm_unit_state *wm_state;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *wm_bo, *kernel_bo;
+	struct brw_wm_unit_state *wm_state;
+
+	if (is_packed) {
+		if (IS_IGDNG(pI830))
+			kernel_bo =
+			    i965_create_program(scrn,
+						&ps_kernel_packed_static_gen5[0]
+						[0],
+						sizeof
+						(ps_kernel_packed_static_gen5));
+		else
+			kernel_bo =
+			    i965_create_program(scrn,
+						&ps_kernel_packed_static[0][0],
+						sizeof
+						(ps_kernel_packed_static));
+	} else {
+		if (IS_IGDNG(pI830))
+			kernel_bo =
+			    i965_create_program(scrn,
+						&ps_kernel_planar_static_gen5[0]
+						[0],
+						sizeof
+						(ps_kernel_planar_static_gen5));
+		else
+			kernel_bo =
+			    i965_create_program(scrn,
+						&ps_kernel_planar_static[0][0],
+						sizeof
+						(ps_kernel_planar_static));
+	}
+	if (!kernel_bo)
+		return NULL;
+
+	if (intel_alloc_and_map
+	    (pI830, "textured video wm state", sizeof(*wm_state), &wm_bo,
+	     &wm_state)) {
+		drm_intel_bo_unreference(kernel_bo);
+		return NULL;
+	}
 
-    if (is_packed) {
-	if (IS_IGDNG(pI830))
-	    kernel_bo = i965_create_program(scrn, &ps_kernel_packed_static_gen5[0][0],
-					    sizeof(ps_kernel_packed_static_gen5));
+	wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
+	wm_state->thread0.kernel_start_pointer =
+	    intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, thread0),
+			     kernel_bo, wm_state->thread0.grf_reg_count << 1,
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
+	wm_state->thread1.single_program_flow = 1;	/* XXX */
+	if (is_packed)
+		wm_state->thread1.binding_table_entry_count = 2;
 	else
-	    kernel_bo = i965_create_program(scrn, &ps_kernel_packed_static[0][0],
-					    sizeof(ps_kernel_packed_static));
-    } else {
+		wm_state->thread1.binding_table_entry_count = 7;
+
+	/* binding table entry count is only used for prefetching, and it has to
+	 * be set 0 for IGDNG
+	 */
+	if (IS_IGDNG(pI830))
+		wm_state->thread1.binding_table_entry_count = 0;
+
+	/* Though we never use the scratch space in our WM kernel, it has to be
+	 * set, and the minimum allocation is 1024 bytes.
+	 */
+	wm_state->thread2.scratch_space_base_pointer = 0;
+	wm_state->thread2.per_thread_scratch_space = 0;	/* 1024 bytes */
+	wm_state->thread3.dispatch_grf_start_reg = 3;	/* XXX */
+	wm_state->thread3.const_urb_entry_read_length = 0;
+	wm_state->thread3.const_urb_entry_read_offset = 0;
+	wm_state->thread3.urb_entry_read_length = 1;	/* XXX */
+	wm_state->thread3.urb_entry_read_offset = 0;	/* XXX */
+	wm_state->wm4.stats_enable = 1;
+	wm_state->wm4.sampler_state_pointer =
+	    intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, wm4),
+			     sampler_bo, 0,
+			     I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
 	if (IS_IGDNG(pI830))
-	    kernel_bo = i965_create_program(scrn, &ps_kernel_planar_static_gen5[0][0],
-					    sizeof(ps_kernel_planar_static_gen5));
+		wm_state->wm4.sampler_count = 0;
 	else
-	    kernel_bo = i965_create_program(scrn, &ps_kernel_planar_static[0][0],
-					    sizeof(ps_kernel_planar_static));
-    }
-    if (!kernel_bo)
-	return NULL;
-
-    if (intel_alloc_and_map(pI830, "textured video wm state", sizeof (*wm_state),
-			    &wm_bo, &wm_state)) {
+		wm_state->wm4.sampler_count = 1;	/* 1-4 samplers used */
+	wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
+	wm_state->wm5.thread_dispatch_enable = 1;
+	wm_state->wm5.enable_16_pix = 1;
+	wm_state->wm5.enable_8_pix = 0;
+	wm_state->wm5.early_depth_test = 1;
+
 	drm_intel_bo_unreference(kernel_bo);
-	return NULL;
-    }
-
-    wm_state->thread0.grf_reg_count = BRW_GRF_BLOCKS(PS_KERNEL_NUM_GRF);
-    wm_state->thread0.kernel_start_pointer =
-	intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, thread0),
-			 kernel_bo, wm_state->thread0.grf_reg_count << 1,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 6;
-    wm_state->thread1.single_program_flow = 1; /* XXX */
-    if (is_packed)
-	wm_state->thread1.binding_table_entry_count = 2;
-    else
-	wm_state->thread1.binding_table_entry_count = 7;
-
-    /* binding table entry count is only used for prefetching, and it has to
-     * be set 0 for IGDNG
-     */
-    if (IS_IGDNG(pI830))
-	wm_state->thread1.binding_table_entry_count = 0;
-
-    /* Though we never use the scratch space in our WM kernel, it has to be
-     * set, and the minimum allocation is 1024 bytes.
-     */
-    wm_state->thread2.scratch_space_base_pointer = 0;
-    wm_state->thread2.per_thread_scratch_space = 0; /* 1024 bytes */
-    wm_state->thread3.dispatch_grf_start_reg = 3; /* XXX */
-    wm_state->thread3.const_urb_entry_read_length = 0;
-    wm_state->thread3.const_urb_entry_read_offset = 0;
-    wm_state->thread3.urb_entry_read_length = 1; /* XXX */
-    wm_state->thread3.urb_entry_read_offset = 0; /* XXX */
-    wm_state->wm4.stats_enable = 1;
-    wm_state->wm4.sampler_state_pointer =
-	intel_emit_reloc(wm_bo, offsetof(struct brw_wm_unit_state, wm4),
-			 sampler_bo, 0,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
-    if (IS_IGDNG(pI830))
-	wm_state->wm4.sampler_count = 0;
-    else
-	wm_state->wm4.sampler_count = 1; /* 1-4 samplers used */
-    wm_state->wm5.max_threads = PS_MAX_THREADS - 1;
-    wm_state->wm5.thread_dispatch_enable = 1;
-    wm_state->wm5.enable_16_pix = 1;
-    wm_state->wm5.enable_8_pix = 0;
-    wm_state->wm5.early_depth_test = 1;
-
-    drm_intel_bo_unreference(kernel_bo);
-
-    drm_intel_bo_unmap(wm_bo);
-    return wm_bo;
+
+	drm_intel_bo_unmap(wm_bo);
+	return wm_bo;
 }
 
-static drm_intel_bo *
-i965_create_cc_vp_state(ScrnInfoPtr scrn)
+static drm_intel_bo *i965_create_cc_vp_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *cc_vp_bo;
-    struct brw_cc_viewport *cc_viewport;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *cc_vp_bo;
+	struct brw_cc_viewport *cc_viewport;
 
-    if (intel_alloc_and_map(pI830, "textured video cc viewport", 4096,
-			    &cc_vp_bo, &cc_viewport) != 0)
-	return NULL;
+	if (intel_alloc_and_map(pI830, "textured video cc viewport", 4096,
+				&cc_vp_bo, &cc_viewport) != 0)
+		return NULL;
 
-    cc_viewport->min_depth = -1.e35;
-    cc_viewport->max_depth = 1.e35;
+	cc_viewport->min_depth = -1.e35;
+	cc_viewport->max_depth = 1.e35;
 
-    drm_intel_bo_unmap(cc_vp_bo);
-    return cc_vp_bo;
+	drm_intel_bo_unmap(cc_vp_bo);
+	return cc_vp_bo;
 }
 
-static drm_intel_bo *
-i965_create_cc_state(ScrnInfoPtr scrn)
+static drm_intel_bo *i965_create_cc_state(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-    drm_intel_bo *cc_bo, *cc_vp_bo;
-    struct brw_cc_unit_state *cc_state;
+	I830Ptr pI830 = I830PTR(scrn);
+	drm_intel_bo *cc_bo, *cc_vp_bo;
+	struct brw_cc_unit_state *cc_state;
+
+	cc_vp_bo = i965_create_cc_vp_state(scrn);
+	if (!cc_vp_bo)
+		return NULL;
+
+	if (intel_alloc_and_map
+	    (pI830, "textured video cc state", sizeof(*cc_state), &cc_bo,
+	     &cc_state) != 0) {
+		drm_intel_bo_unreference(cc_vp_bo);
+		return NULL;
+	}
 
-    cc_vp_bo = i965_create_cc_vp_state(scrn);
-    if (!cc_vp_bo)
-	return NULL;
+	/* Color calculator state */
+	memset(cc_state, 0, sizeof(*cc_state));
+	cc_state->cc0.stencil_enable = 0;	/* disable stencil */
+	cc_state->cc2.depth_test = 0;	/* disable depth test */
+	cc_state->cc2.logicop_enable = 1;	/* enable logic op */
+	cc_state->cc3.ia_blend_enable = 1;	/* blend alpha just like colors */
+	cc_state->cc3.blend_enable = 0;	/* disable color blend */
+	cc_state->cc3.alpha_test = 0;	/* disable alpha test */
+	cc_state->cc4.cc_viewport_state_offset =
+	    intel_emit_reloc(cc_bo, offsetof(struct brw_cc_unit_state, cc4),
+			     cc_vp_bo, 0, I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
+	cc_state->cc5.dither_enable = 0;	/* disable dither */
+	cc_state->cc5.logicop_func = 0xc;	/* WHITE */
+	cc_state->cc5.statistics_enable = 1;
+	cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
+	cc_state->cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
+	cc_state->cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE;
+
+	drm_intel_bo_unmap(cc_bo);
 
-    if (intel_alloc_and_map(pI830, "textured video cc state", sizeof(*cc_state),
-			    &cc_bo, &cc_state) != 0) {
 	drm_intel_bo_unreference(cc_vp_bo);
-	return NULL;
-    }
-
-    /* Color calculator state */
-    memset(cc_state, 0, sizeof(*cc_state));
-    cc_state->cc0.stencil_enable = 0;   /* disable stencil */
-    cc_state->cc2.depth_test = 0;       /* disable depth test */
-    cc_state->cc2.logicop_enable = 1;   /* enable logic op */
-    cc_state->cc3.ia_blend_enable = 1;  /* blend alpha just like colors */
-    cc_state->cc3.blend_enable = 0;     /* disable color blend */
-    cc_state->cc3.alpha_test = 0;       /* disable alpha test */
-    cc_state->cc4.cc_viewport_state_offset =
-	intel_emit_reloc(cc_bo, offsetof(struct brw_cc_unit_state, cc4),
-			 cc_vp_bo, 0,
-			 I915_GEM_DOMAIN_INSTRUCTION, 0) >> 5;
-    cc_state->cc5.dither_enable = 0;    /* disable dither */
-    cc_state->cc5.logicop_func = 0xc;   /* WHITE */
-    cc_state->cc5.statistics_enable = 1;
-    cc_state->cc5.ia_blend_function = BRW_BLENDFUNCTION_ADD;
-    cc_state->cc5.ia_src_blend_factor = BRW_BLENDFACTOR_ONE;
-    cc_state->cc5.ia_dest_blend_factor = BRW_BLENDFACTOR_ONE;
-
-    drm_intel_bo_unmap(cc_bo);
-
-    drm_intel_bo_unreference(cc_vp_bo);
-    return cc_bo;
+	return cc_bo;
 }
 
 static void
-i965_emit_video_setup(ScrnInfoPtr pScrn, drm_intel_bo *bind_bo, int n_src_surf)
+i965_emit_video_setup(ScrnInfoPtr pScrn, drm_intel_bo * bind_bo, int n_src_surf)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    int urb_vs_start, urb_vs_size;
-    int urb_gs_start, urb_gs_size;
-    int urb_clip_start, urb_clip_size;
-    int urb_sf_start, urb_sf_size;
-    int urb_cs_start, urb_cs_size;
-    int pipe_ctl;
-
-    IntelEmitInvarientState(pScrn);
-    pI830->last_3d = LAST_3D_VIDEO;
-
-    urb_vs_start = 0;
-    urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
-    urb_gs_start = urb_vs_start + urb_vs_size;
-    urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
-    urb_clip_start = urb_gs_start + urb_gs_size;
-    urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
-    urb_sf_start = urb_clip_start + urb_clip_size;
-    urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
-    urb_cs_start = urb_sf_start + urb_sf_size;
-    urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
-
-    BEGIN_BATCH(2);
-    OUT_BATCH(MI_FLUSH |
-	      MI_STATE_INSTRUCTION_CACHE_FLUSH |
-	      BRW_MI_GLOBAL_SNAPSHOT_RESET);
-    OUT_BATCH(MI_NOOP);
-    ADVANCE_BATCH();
-
-    /* brw_debug (pScrn, "before base address modify"); */
-    if (IS_IGDNG(pI830))
-	BEGIN_BATCH(14);
-    else
-	BEGIN_BATCH(12);
-    /* Match Mesa driver setup */
-    if (IS_G4X(pI830) || IS_IGDNG(pI830))
-	OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-    else
-	OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
-
-    /* Mesa does this. Who knows... */
-    OUT_BATCH(BRW_CS_URB_STATE | 0);
-    OUT_BATCH((0 << 4) |	/* URB Entry Allocation Size */
-	      (0 << 0));	/* Number of URB Entries */
-
-    /* Zero out the two base address registers so all offsets are
-     * absolute
-     */
-    if (IS_IGDNG(pI830)) {
-	OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6);
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Generate state base address */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Surface state base address */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* media base addr, don't care */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Instruction base address */
-	/* general state max addr, disabled */
-	OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-	/* media object state max addr, disabled */
-	OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-	/* Instruction max addr, disabled */
-	OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-    } else {
-	OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Generate state base address */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* Surface state base address */
-	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);  /* media base addr, don't care */
-	/* general state max addr, disabled */
-	OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-	/* media object state max addr, disabled */
-	OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
-    }
-
-    /* Set system instruction pointer */
-    OUT_BATCH(BRW_STATE_SIP | 0);
-    /* system instruction pointer */
-    OUT_RELOC(pI830->video.gen4_sip_kernel_bo,
-	      I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-
-    OUT_BATCH(MI_NOOP);
-    ADVANCE_BATCH();
-
-    /* brw_debug (pScrn, "after base address modify"); */
-
-    if (IS_IGDNG(pI830))
-	pipe_ctl = BRW_PIPE_CONTROL_NOWRITE;
-    else
-	pipe_ctl = BRW_PIPE_CONTROL_NOWRITE | BRW_PIPE_CONTROL_IS_FLUSH;
-
-    BEGIN_BATCH(38);
-
-    OUT_BATCH(MI_NOOP);
-
-    /* Pipe control */
-    OUT_BATCH(BRW_PIPE_CONTROL | pipe_ctl | 2);
-    OUT_BATCH(0);			/* Destination address */
-    OUT_BATCH(0);			/* Immediate data low DW */
-    OUT_BATCH(0);			/* Immediate data high DW */
-
-    /* Binding table pointers */
-    OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
-    OUT_BATCH(0); /* vs */
-    OUT_BATCH(0); /* gs */
-    OUT_BATCH(0); /* clip */
-    OUT_BATCH(0); /* sf */
-    /* Only the PS uses the binding table */
-    OUT_RELOC(bind_bo, I915_GEM_DOMAIN_SAMPLER, 0, 0);
-
-    /* Blend constant color (magenta is fun) */
-    OUT_BATCH(BRW_3DSTATE_CONSTANT_COLOR | 3);
-    OUT_BATCH(float_to_uint (1.0));
-    OUT_BATCH(float_to_uint (0.0));
-    OUT_BATCH(float_to_uint (1.0));
-    OUT_BATCH(float_to_uint (1.0));
-
-    /* The drawing rectangle clipping is always on.  Set it to values that
-     * shouldn't do any clipping.
-     */
-    OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2); /* XXX 3 for BLC or CTG */
-    OUT_BATCH(0x00000000);			/* ymin, xmin */
-    OUT_BATCH((pScrn->virtualX - 1) |
-	      (pScrn->virtualY - 1) << 16);	/* ymax, xmax */
-    OUT_BATCH(0x00000000);			/* yorigin, xorigin */
-
-    /* skip the depth buffer */
-    /* skip the polygon stipple */
-    /* skip the polygon stipple offset */
-    /* skip the line stipple */
-
-    /* Set the pointers to the 3d pipeline state */
-    OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5);
-    OUT_RELOC(pI830->video.gen4_vs_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    /* disable GS, resulting in passthrough */
-    OUT_BATCH(BRW_GS_DISABLE);
-    /* disable CLIP, resulting in passthrough */
-    OUT_BATCH(BRW_CLIP_DISABLE);
-    OUT_RELOC(pI830->video.gen4_sf_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    if (n_src_surf == 1)
-	OUT_RELOC(pI830->video.gen4_wm_packed_bo,
-		  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    else
-	OUT_RELOC(pI830->video.gen4_wm_planar_bo,
+	I830Ptr pI830 = I830PTR(pScrn);
+	int urb_vs_start, urb_vs_size;
+	int urb_gs_start, urb_gs_size;
+	int urb_clip_start, urb_clip_size;
+	int urb_sf_start, urb_sf_size;
+	int urb_cs_start, urb_cs_size;
+	int pipe_ctl;
+
+	IntelEmitInvarientState(pScrn);
+	pI830->last_3d = LAST_3D_VIDEO;
+
+	urb_vs_start = 0;
+	urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE;
+	urb_gs_start = urb_vs_start + urb_vs_size;
+	urb_gs_size = URB_GS_ENTRIES * URB_GS_ENTRY_SIZE;
+	urb_clip_start = urb_gs_start + urb_gs_size;
+	urb_clip_size = URB_CLIP_ENTRIES * URB_CLIP_ENTRY_SIZE;
+	urb_sf_start = urb_clip_start + urb_clip_size;
+	urb_sf_size = URB_SF_ENTRIES * URB_SF_ENTRY_SIZE;
+	urb_cs_start = urb_sf_start + urb_sf_size;
+	urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
+
+	BEGIN_BATCH(2);
+	OUT_BATCH(MI_FLUSH |
+		  MI_STATE_INSTRUCTION_CACHE_FLUSH |
+		  BRW_MI_GLOBAL_SNAPSHOT_RESET);
+	OUT_BATCH(MI_NOOP);
+	ADVANCE_BATCH();
+
+	/* brw_debug (pScrn, "before base address modify"); */
+	if (IS_IGDNG(pI830))
+		BEGIN_BATCH(14);
+	else
+		BEGIN_BATCH(12);
+	/* Match Mesa driver setup */
+	if (IS_G4X(pI830) || IS_IGDNG(pI830))
+		OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+	else
+		OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_3D);
+
+	/* Mesa does this. Who knows... */
+	OUT_BATCH(BRW_CS_URB_STATE | 0);
+	OUT_BATCH((0 << 4) |	/* URB Entry Allocation Size */
+		  (0 << 0));	/* Number of URB Entries */
+
+	/* Zero out the two base address registers so all offsets are
+	 * absolute
+	 */
+	if (IS_IGDNG(pI830)) {
+		OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Generate state base address */
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Surface state base address */
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* media base addr, don't care */
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Instruction base address */
+		/* general state max addr, disabled */
+		OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+		/* media object state max addr, disabled */
+		OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+		/* Instruction max addr, disabled */
+		OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+	} else {
+		OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Generate state base address */
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* Surface state base address */
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);	/* media base addr, don't care */
+		/* general state max addr, disabled */
+		OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+		/* media object state max addr, disabled */
+		OUT_BATCH(0x10000000 | BASE_ADDRESS_MODIFY);
+	}
+
+	/* Set system instruction pointer */
+	OUT_BATCH(BRW_STATE_SIP | 0);
+	/* system instruction pointer */
+	OUT_RELOC(pI830->video.gen4_sip_kernel_bo,
 		  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    OUT_RELOC(pI830->video.gen4_cc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-
-    /* URB fence */
-    OUT_BATCH(BRW_URB_FENCE |
-	      UF0_CS_REALLOC |
-	      UF0_SF_REALLOC |
-	      UF0_CLIP_REALLOC |
-	      UF0_GS_REALLOC |
-	      UF0_VS_REALLOC |
-	      1);
-    OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
-	      ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
-	      ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
-    OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
-	      ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
-
-    /* Constant buffer state */
-    OUT_BATCH(BRW_CS_URB_STATE | 0);
-    OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) |
-	      (URB_CS_ENTRIES << 0));
-
-    /* Set up our vertex elements, sourced from the single vertex buffer. */
-
-    if (IS_IGDNG(pI830)) {
-	OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
-	/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
-	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-	          VE0_VALID |
-	          (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-	          (0 << VE0_OFFSET_SHIFT));
-	OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT));
-	/* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
-	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-	          VE0_VALID |
-	          (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-	          (8 << VE0_OFFSET_SHIFT));
-	OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT));
-    } else {
-	OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
-	/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
-	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-	          VE0_VALID |
-	          (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-	          (0 << VE0_OFFSET_SHIFT));
-	OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
-	          (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-	/* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
-	OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-	          VE0_VALID |
-	          (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-	          (8 << VE0_OFFSET_SHIFT));
-	OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	          (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
-	          (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-    }
-
-    OUT_BATCH(MI_NOOP);			/* pad to quadword */
-    ADVANCE_BATCH();
+
+	OUT_BATCH(MI_NOOP);
+	ADVANCE_BATCH();
+
+	/* brw_debug (pScrn, "after base address modify"); */
+
+	if (IS_IGDNG(pI830))
+		pipe_ctl = BRW_PIPE_CONTROL_NOWRITE;
+	else
+		pipe_ctl = BRW_PIPE_CONTROL_NOWRITE | BRW_PIPE_CONTROL_IS_FLUSH;
+
+	BEGIN_BATCH(38);
+
+	OUT_BATCH(MI_NOOP);
+
+	/* Pipe control */
+	OUT_BATCH(BRW_PIPE_CONTROL | pipe_ctl | 2);
+	OUT_BATCH(0);		/* Destination address */
+	OUT_BATCH(0);		/* Immediate data low DW */
+	OUT_BATCH(0);		/* Immediate data high DW */
+
+	/* Binding table pointers */
+	OUT_BATCH(BRW_3DSTATE_BINDING_TABLE_POINTERS | 4);
+	OUT_BATCH(0);		/* vs */
+	OUT_BATCH(0);		/* gs */
+	OUT_BATCH(0);		/* clip */
+	OUT_BATCH(0);		/* sf */
+	/* Only the PS uses the binding table */
+	OUT_RELOC(bind_bo, I915_GEM_DOMAIN_SAMPLER, 0, 0);
+
+	/* Blend constant color (magenta is fun) */
+	OUT_BATCH(BRW_3DSTATE_CONSTANT_COLOR | 3);
+	OUT_BATCH(float_to_uint(1.0));
+	OUT_BATCH(float_to_uint(0.0));
+	OUT_BATCH(float_to_uint(1.0));
+	OUT_BATCH(float_to_uint(1.0));
+
+	/* The drawing rectangle clipping is always on.  Set it to values that
+	 * shouldn't do any clipping.
+	 */
+	OUT_BATCH(BRW_3DSTATE_DRAWING_RECTANGLE | 2);	/* XXX 3 for BLC or CTG */
+	OUT_BATCH(0x00000000);	/* ymin, xmin */
+	OUT_BATCH((pScrn->virtualX - 1) | (pScrn->virtualY - 1) << 16);	/* ymax, xmax */
+	OUT_BATCH(0x00000000);	/* yorigin, xorigin */
+
+	/* skip the depth buffer */
+	/* skip the polygon stipple */
+	/* skip the polygon stipple offset */
+	/* skip the line stipple */
+
+	/* Set the pointers to the 3d pipeline state */
+	OUT_BATCH(BRW_3DSTATE_PIPELINED_POINTERS | 5);
+	OUT_RELOC(pI830->video.gen4_vs_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	/* disable GS, resulting in passthrough */
+	OUT_BATCH(BRW_GS_DISABLE);
+	/* disable CLIP, resulting in passthrough */
+	OUT_BATCH(BRW_CLIP_DISABLE);
+	OUT_RELOC(pI830->video.gen4_sf_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	if (n_src_surf == 1)
+		OUT_RELOC(pI830->video.gen4_wm_packed_bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	else
+		OUT_RELOC(pI830->video.gen4_wm_planar_bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	OUT_RELOC(pI830->video.gen4_cc_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+
+	/* URB fence */
+	OUT_BATCH(BRW_URB_FENCE |
+		  UF0_CS_REALLOC |
+		  UF0_SF_REALLOC |
+		  UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1);
+	OUT_BATCH(((urb_clip_start + urb_clip_size) << UF1_CLIP_FENCE_SHIFT) |
+		  ((urb_gs_start + urb_gs_size) << UF1_GS_FENCE_SHIFT) |
+		  ((urb_vs_start + urb_vs_size) << UF1_VS_FENCE_SHIFT));
+	OUT_BATCH(((urb_cs_start + urb_cs_size) << UF2_CS_FENCE_SHIFT) |
+		  ((urb_sf_start + urb_sf_size) << UF2_SF_FENCE_SHIFT));
+
+	/* Constant buffer state */
+	OUT_BATCH(BRW_CS_URB_STATE | 0);
+	OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) | (URB_CS_ENTRIES << 0));
+
+	/* Set up our vertex elements, sourced from the single vertex buffer. */
+
+	if (IS_IGDNG(pI830)) {
+		OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
+		/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+			  VE0_VALID |
+			  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+			  (0 << VE0_OFFSET_SHIFT));
+		OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT)
+			  | (BRW_VFCOMPONENT_STORE_SRC <<
+			     VE1_VFCOMPONENT_1_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_2_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_3_SHIFT));
+		/* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+			  VE0_VALID |
+			  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+			  (8 << VE0_OFFSET_SHIFT));
+		OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT)
+			  | (BRW_VFCOMPONENT_STORE_SRC <<
+			     VE1_VFCOMPONENT_1_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_2_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_3_SHIFT));
+	} else {
+		OUT_BATCH(BRW_3DSTATE_VERTEX_ELEMENTS | 3);
+		/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+			  VE0_VALID |
+			  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+			  (0 << VE0_OFFSET_SHIFT));
+		OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT)
+			  | (BRW_VFCOMPONENT_STORE_SRC <<
+			     VE1_VFCOMPONENT_1_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_2_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_3_SHIFT) | (0 <<
+						       VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+		/* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
+		OUT_BATCH((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+			  VE0_VALID |
+			  (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+			  (8 << VE0_OFFSET_SHIFT));
+		OUT_BATCH((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT)
+			  | (BRW_VFCOMPONENT_STORE_SRC <<
+			     VE1_VFCOMPONENT_1_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_2_SHIFT) |
+			  (BRW_VFCOMPONENT_STORE_1_FLT <<
+			   VE1_VFCOMPONENT_3_SHIFT) | (4 <<
+						       VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+	}
+
+	OUT_BATCH(MI_NOOP);	/* pad to quadword */
+	ADVANCE_BATCH();
 }
 
 void
@@ -968,303 +982,306 @@ I965DisplayVideoTextured(ScrnInfoPtr pScrn, I830PortPrivPtr pPriv, int id,
 			 short width, short height, int video_pitch,
 			 int x1, int y1, int x2, int y2,
 			 short src_w, short src_h,
-			 short drw_w, short drw_h,
-			 PixmapPtr pPixmap)
+			 short drw_w, short drw_h, PixmapPtr pPixmap)
 {
-    I830Ptr pI830 = I830PTR(pScrn);
-    BoxPtr pbox;
-    int nbox, dxo, dyo, pix_xoff, pix_yoff;
-    float src_scale_x, src_scale_y;
-    int src_surf, i;
-    int n_src_surf;
-    uint32_t	src_surf_format;
-    uint32_t	src_surf_base[6];
-    int		src_width[6];
-    int		src_height[6];
-    int		src_pitch[6];
-    drm_intel_bo *bind_bo, *surf_bos[7];
+	I830Ptr pI830 = I830PTR(pScrn);
+	BoxPtr pbox;
+	int nbox, dxo, dyo, pix_xoff, pix_yoff;
+	float src_scale_x, src_scale_y;
+	int src_surf, i;
+	int n_src_surf;
+	uint32_t src_surf_format;
+	uint32_t src_surf_base[6];
+	int src_width[6];
+	int src_height[6];
+	int src_pitch[6];
+	drm_intel_bo *bind_bo, *surf_bos[7];
 
 #if 0
-    ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width, height,
-	   video_pitch);
+	ErrorF("BroadwaterDisplayVideoTextured: %dx%d (pitch %d)\n", width,
+	       height, video_pitch);
 #endif
 
 #if 0
-    /* enable debug */
-    OUTREG (INST_PM,
-	    (1 << (16 + 4)) |
-	    (1 << 4));
-    ErrorF ("INST_PM 0x%08x\n", INREG(INST_PM));
+	/* enable debug */
+	OUTREG(INST_PM, (1 << (16 + 4)) | (1 << 4));
+	ErrorF("INST_PM 0x%08x\n", INREG(INST_PM));
 #endif
 
-    src_surf_base[0] = pPriv->YBufOffset;
-    src_surf_base[1] = pPriv->YBufOffset;
-    src_surf_base[2] = pPriv->VBufOffset;
-    src_surf_base[3] = pPriv->VBufOffset;
-    src_surf_base[4] = pPriv->UBufOffset;
-    src_surf_base[5] = pPriv->UBufOffset;
+	src_surf_base[0] = pPriv->YBufOffset;
+	src_surf_base[1] = pPriv->YBufOffset;
+	src_surf_base[2] = pPriv->VBufOffset;
+	src_surf_base[3] = pPriv->VBufOffset;
+	src_surf_base[4] = pPriv->UBufOffset;
+	src_surf_base[5] = pPriv->UBufOffset;
 #if 0
-    ErrorF ("base 0 0x%x base 1 0x%x base 2 0x%x\n",
-	    src_surf_base[0], src_surf_base[1], src_surf_base[2]);
+	ErrorF("base 0 0x%x base 1 0x%x base 2 0x%x\n",
+	       src_surf_base[0], src_surf_base[1], src_surf_base[2]);
 #endif
-    
-    if (is_planar_fourcc(id)) {
-	src_surf_format = BRW_SURFACEFORMAT_R8_UNORM;
-	src_width[1] = src_width[0] = width;
-	src_height[1] = src_height[0] = height;
-	src_pitch[1] = src_pitch[0] = video_pitch * 2;
-	src_width[4] = src_width[5] = src_width[2] = src_width[3] = width / 2;
-	src_height[4] = src_height[5] = src_height[2] = src_height[3] = height / 2;
-	src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] = video_pitch;
-	n_src_surf = 6;
-    } else {
-	if (id == FOURCC_UYVY)
-	    src_surf_format = BRW_SURFACEFORMAT_YCRCB_SWAPY;
-	else
-	    src_surf_format = BRW_SURFACEFORMAT_YCRCB_NORMAL;
 
-	src_width[0] = width;
-	src_height[0] = height;
-	src_pitch[0] = video_pitch;
-	n_src_surf = 1;
-    }
+	if (is_planar_fourcc(id)) {
+		src_surf_format = BRW_SURFACEFORMAT_R8_UNORM;
+		src_width[1] = src_width[0] = width;
+		src_height[1] = src_height[0] = height;
+		src_pitch[1] = src_pitch[0] = video_pitch * 2;
+		src_width[4] = src_width[5] = src_width[2] = src_width[3] =
+		    width / 2;
+		src_height[4] = src_height[5] = src_height[2] = src_height[3] =
+		    height / 2;
+		src_pitch[4] = src_pitch[5] = src_pitch[2] = src_pitch[3] =
+		    video_pitch;
+		n_src_surf = 6;
+	} else {
+		if (id == FOURCC_UYVY)
+			src_surf_format = BRW_SURFACEFORMAT_YCRCB_SWAPY;
+		else
+			src_surf_format = BRW_SURFACEFORMAT_YCRCB_NORMAL;
+
+		src_width[0] = width;
+		src_height[0] = height;
+		src_pitch[0] = video_pitch;
+		n_src_surf = 1;
+	}
 
 #if 0
-    ErrorF("dst surf:      0x%08x\n", state_base_offset + dest_surf_offset);
-    ErrorF("src surf:      0x%08x\n", state_base_offset + src_surf_offset);
+	ErrorF("dst surf:      0x%08x\n", state_base_offset + dest_surf_offset);
+	ErrorF("src surf:      0x%08x\n", state_base_offset + src_surf_offset);
 #endif
 
-    /* We'll be poking the state buffers that could be in use by the 3d
-     * hardware here, but we should have synced the 3D engine already in
-     * I830PutImage.
-     */
-
-    /* Upload kernels */
-    surf_bos[0] = i965_create_dst_surface_state(pScrn, pPixmap);
-    if (!surf_bos[0])
-	return;
-
-    for (src_surf = 0; src_surf < n_src_surf; src_surf++) {
-	drm_intel_bo *surf_bo =
-	    i965_create_src_surface_state(pScrn,
-					  pPriv->buf,
-					  src_surf_base[src_surf],
-					  src_width[src_surf],
-					  src_height[src_surf],
-					  src_pitch[src_surf],
-					  src_surf_format);
-	if (!surf_bo) {
-	    int	q;
-	    for(q = 0; q < src_surf + 1; q++)
-		drm_intel_bo_unreference(surf_bos[q]);
-	    return;
+	/* We'll be poking the state buffers that could be in use by the 3d
+	 * hardware here, but we should have synced the 3D engine already in
+	 * I830PutImage.
+	 */
+
+	/* Upload kernels */
+	surf_bos[0] = i965_create_dst_surface_state(pScrn, pPixmap);
+	if (!surf_bos[0])
+		return;
+
+	for (src_surf = 0; src_surf < n_src_surf; src_surf++) {
+		drm_intel_bo *surf_bo = i965_create_src_surface_state(pScrn,
+								      pPriv->
+								      buf,
+								      src_surf_base
+								      [src_surf],
+								      src_width
+								      [src_surf],
+								      src_height
+								      [src_surf],
+								      src_pitch
+								      [src_surf],
+								      src_surf_format);
+		if (!surf_bo) {
+			int q;
+			for (q = 0; q < src_surf + 1; q++)
+				drm_intel_bo_unreference(surf_bos[q]);
+			return;
+		}
+		surf_bos[src_surf + 1] = surf_bo;
+	}
+	bind_bo = i965_create_binding_table(pScrn, surf_bos, n_src_surf + 1);
+	for (i = 0; i < n_src_surf + 1; i++) {
+		drm_intel_bo_unreference(surf_bos[i]);
+		surf_bos[i] = NULL;
 	}
-	surf_bos[src_surf + 1] = surf_bo;
-    }
-    bind_bo = i965_create_binding_table(pScrn, surf_bos, n_src_surf + 1);
-    for (i = 0; i < n_src_surf + 1; i++) {
-	drm_intel_bo_unreference(surf_bos[i]);
-	surf_bos[i] = NULL;
-    }
-    if (!bind_bo)
-	return;
-
-    if (pI830->video.gen4_sampler_bo == NULL)
-	pI830->video.gen4_sampler_bo = i965_create_sampler_state(pScrn);
-    if (pI830->video.gen4_sip_kernel_bo == NULL) {
-	pI830->video.gen4_sip_kernel_bo =
-	    i965_create_program(pScrn, &sip_kernel_static[0][0],
-				sizeof(sip_kernel_static));
-	if (!pI830->video.gen4_sip_kernel_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+	if (!bind_bo)
+		return;
+
+	if (pI830->video.gen4_sampler_bo == NULL)
+		pI830->video.gen4_sampler_bo = i965_create_sampler_state(pScrn);
+	if (pI830->video.gen4_sip_kernel_bo == NULL) {
+		pI830->video.gen4_sip_kernel_bo =
+		    i965_create_program(pScrn, &sip_kernel_static[0][0],
+					sizeof(sip_kernel_static));
+		if (!pI830->video.gen4_sip_kernel_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
 
-    if (pI830->video.gen4_vs_bo == NULL) {
-	pI830->video.gen4_vs_bo = i965_create_vs_state(pScrn);
-	if (!pI830->video.gen4_vs_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+	if (pI830->video.gen4_vs_bo == NULL) {
+		pI830->video.gen4_vs_bo = i965_create_vs_state(pScrn);
+		if (!pI830->video.gen4_vs_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
-    if (pI830->video.gen4_sf_bo == NULL) {
-	pI830->video.gen4_sf_bo = i965_create_sf_state(pScrn);
-	if (!pI830->video.gen4_sf_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+	if (pI830->video.gen4_sf_bo == NULL) {
+		pI830->video.gen4_sf_bo = i965_create_sf_state(pScrn);
+		if (!pI830->video.gen4_sf_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
-    if (pI830->video.gen4_wm_packed_bo == NULL) {
-	pI830->video.gen4_wm_packed_bo =
-	    i965_create_wm_state(pScrn, pI830->video.gen4_sampler_bo, TRUE);
-	if (!pI830->video.gen4_wm_packed_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+	if (pI830->video.gen4_wm_packed_bo == NULL) {
+		pI830->video.gen4_wm_packed_bo =
+		    i965_create_wm_state(pScrn, pI830->video.gen4_sampler_bo,
+					 TRUE);
+		if (!pI830->video.gen4_wm_packed_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
-
-    if (pI830->video.gen4_wm_planar_bo == NULL) {
-	pI830->video.gen4_wm_planar_bo =
-	    i965_create_wm_state(pScrn, pI830->video.gen4_sampler_bo, FALSE);
-	if (!pI830->video.gen4_wm_planar_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+
+	if (pI830->video.gen4_wm_planar_bo == NULL) {
+		pI830->video.gen4_wm_planar_bo =
+		    i965_create_wm_state(pScrn, pI830->video.gen4_sampler_bo,
+					 FALSE);
+		if (!pI830->video.gen4_wm_planar_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
 
-    if (pI830->video.gen4_cc_bo == NULL) {
-	pI830->video.gen4_cc_bo = i965_create_cc_state(pScrn);
-	if (!pI830->video.gen4_cc_bo) {
-	    drm_intel_bo_unreference(bind_bo);
-	    return;
+	if (pI830->video.gen4_cc_bo == NULL) {
+		pI830->video.gen4_cc_bo = i965_create_cc_state(pScrn);
+		if (!pI830->video.gen4_cc_bo) {
+			drm_intel_bo_unreference(bind_bo);
+			return;
+		}
 	}
-    }
 
-   /* Set up the offset for translating from the given region (in screen
-    * coordinates) to the backing pixmap.
-    */
+	/* Set up the offset for translating from the given region (in screen
+	 * coordinates) to the backing pixmap.
+	 */
 #ifdef COMPOSITE
-    pix_xoff = -pPixmap->screen_x + pPixmap->drawable.x;
-    pix_yoff = -pPixmap->screen_y + pPixmap->drawable.y;
+	pix_xoff = -pPixmap->screen_x + pPixmap->drawable.x;
+	pix_yoff = -pPixmap->screen_y + pPixmap->drawable.y;
 #else
-    pix_xoff = 0;
-    pix_yoff = 0;
+	pix_xoff = 0;
+	pix_yoff = 0;
 #endif
 
-    dxo = dstRegion->extents.x1;
-    dyo = dstRegion->extents.y1;
-
-    /* Use normalized texture coordinates */
-    src_scale_x = ((float)src_w / width) / (float)drw_w;
-    src_scale_y = ((float)src_h / height) / (float)drw_h;
+	dxo = dstRegion->extents.x1;
+	dyo = dstRegion->extents.y1;
+
+	/* Use normalized texture coordinates */
+	src_scale_x = ((float)src_w / width) / (float)drw_w;
+	src_scale_y = ((float)src_h / height) / (float)drw_h;
+
+	pbox = REGION_RECTS(dstRegion);
+	nbox = REGION_NUM_RECTS(dstRegion);
+	while (nbox--) {
+		int box_x1 = pbox->x1;
+		int box_y1 = pbox->y1;
+		int box_x2 = pbox->x2;
+		int box_y2 = pbox->y2;
+		int i;
+		drm_intel_bo *vb_bo;
+		float *vb;
+		drm_intel_bo *bo_table[] = {
+			NULL,	/* vb_bo */
+			pI830->batch_bo,
+			bind_bo,
+			pI830->video.gen4_sampler_bo,
+			pI830->video.gen4_sip_kernel_bo,
+			pI830->video.gen4_vs_bo,
+			pI830->video.gen4_sf_bo,
+			pI830->video.gen4_wm_packed_bo,
+			pI830->video.gen4_wm_planar_bo,
+			pI830->video.gen4_cc_bo,
+		};
+
+		pbox++;
+
+		if (intel_alloc_and_map(pI830, "textured video vb", 4096,
+					&vb_bo, &vb) != 0)
+			break;
+		bo_table[0] = vb_bo;
+
+		i = 0;
+		vb[i++] = (box_x2 - dxo) * src_scale_x;
+		vb[i++] = (box_y2 - dyo) * src_scale_y;
+		vb[i++] = (float)box_x2 + pix_xoff;
+		vb[i++] = (float)box_y2 + pix_yoff;
+
+		vb[i++] = (box_x1 - dxo) * src_scale_x;
+		vb[i++] = (box_y2 - dyo) * src_scale_y;
+		vb[i++] = (float)box_x1 + pix_xoff;
+		vb[i++] = (float)box_y2 + pix_yoff;
+
+		vb[i++] = (box_x1 - dxo) * src_scale_x;
+		vb[i++] = (box_y1 - dyo) * src_scale_y;
+		vb[i++] = (float)box_x1 + pix_xoff;
+		vb[i++] = (float)box_y1 + pix_yoff;
+
+		drm_intel_bo_unmap(vb_bo);
+
+		if (!IS_IGDNG(pI830))
+			i965_pre_draw_debug(pScrn);
+
+		/* If this command won't fit in the current batch, flush.
+		 * Assume that it does after being flushed.
+		 */
+		if (drm_intel_bufmgr_check_aperture_space(bo_table,
+							  ARRAY_SIZE(bo_table))
+		    < 0) {
+			intel_batch_flush(pScrn, FALSE);
+		}
+
+		intel_batch_start_atomic(pScrn, 100);
+
+		i965_emit_video_setup(pScrn, bind_bo, n_src_surf);
+
+		BEGIN_BATCH(12);
+		/* Set up the pointer to our vertex buffer */
+		OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3);
+		/* four 32-bit floats per vertex */
+		OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
+			  VB0_VERTEXDATA | ((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
+		OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
+		if (IS_IGDNG(pI830))
+			OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0,
+				  (vb_bo->offset + i) * 4);
+		else
+			OUT_BATCH(3);	/* four corners to our rectangle */
+		OUT_BATCH(0);	/* reserved */
+
+		OUT_BATCH(BRW_3DPRIMITIVE | BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL | (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) | (0 << 9) |	/* CTG - indirect vertex count */
+			  4);
+		OUT_BATCH(3);	/* vertex count per instance */
+		OUT_BATCH(0);	/* start vertex offset */
+		OUT_BATCH(1);	/* single instance */
+		OUT_BATCH(0);	/* start instance location */
+		OUT_BATCH(0);	/* index buffer offset, ignored */
+		OUT_BATCH(MI_NOOP);
+		ADVANCE_BATCH();
+
+		intel_batch_end_atomic(pScrn);
+
+		drm_intel_bo_unreference(vb_bo);
+
+		if (!IS_IGDNG(pI830))
+			i965_post_draw_debug(pScrn);
 
-    pbox = REGION_RECTS(dstRegion);
-    nbox = REGION_NUM_RECTS(dstRegion);
-    while (nbox--) {
-	int box_x1 = pbox->x1;
-	int box_y1 = pbox->y1;
-	int box_x2 = pbox->x2;
-	int box_y2 = pbox->y2;
-	int i;
-	drm_intel_bo *vb_bo;
-	float *vb;
-	drm_intel_bo *bo_table[] = {
-	    NULL, /* vb_bo */
-	    pI830->batch_bo,
-	    bind_bo,
-	    pI830->video.gen4_sampler_bo,
-	    pI830->video.gen4_sip_kernel_bo,
-	    pI830->video.gen4_vs_bo,
-	    pI830->video.gen4_sf_bo,
-	    pI830->video.gen4_wm_packed_bo,
-	    pI830->video.gen4_wm_planar_bo,
-	    pI830->video.gen4_cc_bo,
-	};
-
-	pbox++;
-
-	if (intel_alloc_and_map(pI830, "textured video vb", 4096,
-				&vb_bo, &vb) != 0)
-	    break;
-	bo_table[0] = vb_bo;
-
-	i = 0;
-	vb[i++] = (box_x2 - dxo) * src_scale_x;
-	vb[i++] = (box_y2 - dyo) * src_scale_y;
-	vb[i++] = (float) box_x2 + pix_xoff;
-	vb[i++] = (float) box_y2 + pix_yoff;
-
-	vb[i++] = (box_x1 - dxo) * src_scale_x;
-	vb[i++] = (box_y2 - dyo) * src_scale_y;
-	vb[i++] = (float) box_x1 + pix_xoff;
-	vb[i++] = (float) box_y2 + pix_yoff;
-
-	vb[i++] = (box_x1 - dxo) * src_scale_x;
-	vb[i++] = (box_y1 - dyo) * src_scale_y;
-	vb[i++] = (float) box_x1 + pix_xoff;
-	vb[i++] = (float) box_y1 + pix_yoff;
-
-	drm_intel_bo_unmap(vb_bo);
-
-	if (!IS_IGDNG(pI830))
-	    i965_pre_draw_debug(pScrn);
-
-	/* If this command won't fit in the current batch, flush.
-	 * Assume that it does after being flushed.
-	 */
-	if (drm_intel_bufmgr_check_aperture_space(bo_table,
-						  ARRAY_SIZE(bo_table)) < 0) {
-	    intel_batch_flush(pScrn, FALSE);
 	}
 
-	intel_batch_start_atomic(pScrn, 100);
-
-	i965_emit_video_setup(pScrn, bind_bo, n_src_surf);
-
-	BEGIN_BATCH(12);
-	/* Set up the pointer to our vertex buffer */
-	OUT_BATCH(BRW_3DSTATE_VERTEX_BUFFERS | 3);
-	/* four 32-bit floats per vertex */
-	OUT_BATCH((0 << VB0_BUFFER_INDEX_SHIFT) |
-		  VB0_VERTEXDATA |
-		  ((4 * 4) << VB0_BUFFER_PITCH_SHIFT));
-	OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, 0);
-	if (IS_IGDNG(pI830))
-	    OUT_RELOC(vb_bo, I915_GEM_DOMAIN_VERTEX, 0, (vb_bo->offset + i) * 4);
-	else
-	    OUT_BATCH(3); /* four corners to our rectangle */
-	OUT_BATCH(0); /* reserved */
-
-	OUT_BATCH(BRW_3DPRIMITIVE |
-		  BRW_3DPRIMITIVE_VERTEX_SEQUENTIAL |
-		  (_3DPRIM_RECTLIST << BRW_3DPRIMITIVE_TOPOLOGY_SHIFT) |
-		  (0 << 9) |  /* CTG - indirect vertex count */
-		  4);
-	OUT_BATCH(3); /* vertex count per instance */
-	OUT_BATCH(0); /* start vertex offset */
-	OUT_BATCH(1); /* single instance */
-	OUT_BATCH(0); /* start instance location */
-	OUT_BATCH(0); /* index buffer offset, ignored */
-	OUT_BATCH(MI_NOOP);
-	ADVANCE_BATCH();
-
-	intel_batch_end_atomic(pScrn);
-
-	drm_intel_bo_unreference(vb_bo);
-
-	if (!IS_IGDNG(pI830))
-	    i965_post_draw_debug(pScrn);
-
-    }
-
-    /* release reference once we're finished */
-    drm_intel_bo_unreference(bind_bo);
+	/* release reference once we're finished */
+	drm_intel_bo_unreference(bind_bo);
 
 #if WATCH_STATS
-    /* i830_dump_error_state(pScrn); */
+	/* i830_dump_error_state(pScrn); */
 #endif
 }
 
-void
-i965_free_video(ScrnInfoPtr scrn)
+void i965_free_video(ScrnInfoPtr scrn)
 {
-    I830Ptr pI830 = I830PTR(scrn);
-
-    drm_intel_bo_unreference(pI830->video.gen4_vs_bo);
-    pI830->video.gen4_vs_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_sf_bo);
-    pI830->video.gen4_sf_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_cc_bo);
-    pI830->video.gen4_cc_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_wm_packed_bo);
-    pI830->video.gen4_wm_packed_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_wm_planar_bo);
-    pI830->video.gen4_wm_planar_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_cc_vp_bo);
-    pI830->video.gen4_cc_vp_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_sampler_bo);
-    pI830->video.gen4_sampler_bo = NULL;
-    drm_intel_bo_unreference(pI830->video.gen4_sip_kernel_bo);
-    pI830->video.gen4_sip_kernel_bo = NULL;
+	I830Ptr pI830 = I830PTR(scrn);
+
+	drm_intel_bo_unreference(pI830->video.gen4_vs_bo);
+	pI830->video.gen4_vs_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_sf_bo);
+	pI830->video.gen4_sf_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_cc_bo);
+	pI830->video.gen4_cc_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_wm_packed_bo);
+	pI830->video.gen4_wm_packed_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_wm_planar_bo);
+	pI830->video.gen4_wm_planar_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_cc_vp_bo);
+	pI830->video.gen4_cc_vp_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_sampler_bo);
+	pI830->video.gen4_sampler_bo = NULL;
+	drm_intel_bo_unreference(pI830->video.gen4_sip_kernel_bo);
+	pI830->video.gen4_sip_kernel_bo = NULL;
 }
diff --git a/src/reg_dumper/audio.c b/src/reg_dumper/audio.c
index b6e5373c..91f7b141 100644
--- a/src/reg_dumper/audio.c
+++ b/src/reg_dumper/audio.c
@@ -38,7 +38,6 @@
 #include <fcntl.h>
 #include <getopt.h>
 
-
 #include "reg_dumper.h"
 #include "../i810_reg.h"
 
@@ -173,282 +172,289 @@ static char *video_dip_trans[] = {
 
 static void do_self_tests(void)
 {
-    if (BIT(1, 0) != 1)
-	    exit(1);
-    if (BIT(0x80000000, 31) != 1)
-	    exit(2);
-    if (BITS(0xc0000000, 31, 30) != 3)
-	    exit(3);
+	if (BIT(1, 0) != 1)
+		exit(1);
+	if (BIT(0x80000000, 31) != 1)
+		exit(2);
+	if (BITS(0xc0000000, 31, 30) != 3)
+		exit(3);
 }
 
 int main(int argc, char **argv)
 {
-    I830Rec i830;
-    I830Ptr pI830 = &i830;
-    uint32_t dword;
-    int i;
-
-    do_self_tests();
-    intel_i830rec_init(pI830);
-
-    /* printf("%-18s   %8s  %s\n\n", "register name", "raw value", "description"); */
-
-#if 0 /* enable HDMI audio bits */
-    dump_reg(SDVOB,		"Digital Display Port B Control Register");
-    dword |= SDVO_ENABLE;
-    dword |= SDVO_BORDER_ENABLE;
-    dword |= SDVO_AUDIO_ENABLE;
-    dword |= SDVO_NULL_PACKETS_DURING_VSYNC;
-    OUTREG(SDVOB, dword);
-
-    dump_reg(PORT_HOTPLUG_EN,	"Hot Plug Detect Enable");
-    OUTREG(PORT_HOTPLUG_EN, dword | AUDIO_HOTPLUG_EN);
-
-    dump_reg(VIDEO_DIP_CTL,	"Video DIP Control");
-    dword &= ~( VIDEO_DIP_ENABLE_AVI |
-		VIDEO_DIP_ENABLE_VENDOR |
-		VIDEO_DIP_ENABLE_SPD);
-    OUTREG(VIDEO_DIP_CTL, dword);
-    dword |= VIDEO_DIP_ENABLE;
-    OUTREG(VIDEO_DIP_CTL, dword);
+	I830Rec i830;
+	I830Ptr pI830 = &i830;
+	uint32_t dword;
+	int i;
+
+	do_self_tests();
+	intel_i830rec_init(pI830);
+
+	/* printf("%-18s   %8s  %s\n\n", "register name", "raw value", "description"); */
+
+#if 0				/* enable HDMI audio bits */
+	dump_reg(SDVOB, "Digital Display Port B Control Register");
+	dword |= SDVO_ENABLE;
+	dword |= SDVO_BORDER_ENABLE;
+	dword |= SDVO_AUDIO_ENABLE;
+	dword |= SDVO_NULL_PACKETS_DURING_VSYNC;
+	OUTREG(SDVOB, dword);
+
+	dump_reg(PORT_HOTPLUG_EN, "Hot Plug Detect Enable");
+	OUTREG(PORT_HOTPLUG_EN, dword | AUDIO_HOTPLUG_EN);
+
+	dump_reg(VIDEO_DIP_CTL, "Video DIP Control");
+	dword &= ~(VIDEO_DIP_ENABLE_AVI |
+		   VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_SPD);
+	OUTREG(VIDEO_DIP_CTL, dword);
+	dword |= VIDEO_DIP_ENABLE;
+	OUTREG(VIDEO_DIP_CTL, dword);
 #endif
 
-#if 0 /* disable HDMI audio bits */
-    dump_reg(SDVOB,		"Digital Display Port B Control Register");
-    dword &= ~SDVO_AUDIO_ENABLE;
-    dword &= ~SDVO_NULL_PACKETS_DURING_VSYNC;
-    OUTREG(SDVOB, dword);
+#if 0				/* disable HDMI audio bits */
+	dump_reg(SDVOB, "Digital Display Port B Control Register");
+	dword &= ~SDVO_AUDIO_ENABLE;
+	dword &= ~SDVO_NULL_PACKETS_DURING_VSYNC;
+	OUTREG(SDVOB, dword);
 #endif
 
-    dump_reg(VIDEO_DIP_CTL,	"Video DIP Control");
-    dump_reg(SDVOB,		"Digital Display Port B Control Register");
-    dump_reg(SDVOC,		"Digital Display Port C Control Register");
-    dump_reg(PORT_HOTPLUG_EN,	"Hot Plug Detect Enable");
-
-    dump_reg(AUD_CONFIG,	"Audio Configuration");
-    dump_reg(AUD_DEBUG,		"Audio Debug");
-    dump_reg(AUD_VID_DID,	"Audio Vendor ID / Device ID");
-    dump_reg(AUD_RID,		"Audio Revision ID");
-    dump_reg(AUD_SUBN_CNT,	"Audio Subordinate Node Count");
-    dump_reg(AUD_FUNC_GRP,	"Audio Function Group Type");
-    dump_reg(AUD_SUBN_CNT2,	"Audio Subordinate Node Count");
-    dump_reg(AUD_GRP_CAP,	"Audio Function Group Capabilities");
-    dump_reg(AUD_PWRST,		"Audio Power State");
-    dump_reg(AUD_SUPPWR,	"Audio Supported Power States");
-    dump_reg(AUD_SID,		"Audio Root Node Subsystem ID");
-    dump_reg(AUD_OUT_CWCAP,	"Audio Output Converter Widget Capabilities");
-    dump_reg(AUD_OUT_PCMSIZE,	"Audio PCM Size and Rates");
-    dump_reg(AUD_OUT_STR,	"Audio Stream Formats");
-    dump_reg(AUD_OUT_DIG_CNVT,	"Audio Digital Converter");
-    dump_reg(AUD_OUT_CH_STR,	"Audio Channel ID and Stream ID");
-    dump_reg(AUD_OUT_STR_DESC,	"Audio Stream Descriptor Format");
-    dump_reg(AUD_PINW_CAP,	"Audio Pin Complex Widget Capabilities");
-    dump_reg(AUD_PIN_CAP,	"Audio Pin Capabilities");
-    dump_reg(AUD_PINW_CONNLNG,	"Audio Connection List Length");
-    dump_reg(AUD_PINW_CONNLST,	"Audio Connection List Entry");
-    dump_reg(AUD_PINW_CNTR,	"Audio Pin Widget Control");
-    dump_reg(AUD_PINW_UNSOLRESP,"Audio Unsolicited Response Enable");
-    dump_reg(AUD_CNTL_ST,	"Audio Control State Register");
-    dump_reg(AUD_PINW_CONFIG,	"Audio Configuration Default");
-    dump_reg(AUD_HDMIW_STATUS,	"Audio HDMI Status");
-    dump_reg(AUD_HDMIW_HDMIEDID,"Audio HDMI Data EDID Block");
-    dump_reg(AUD_HDMIW_INFOFR,	"Audio HDMI Widget Data Island Packet");
-    dump_reg(AUD_CONV_CHCNT,	"Audio Converter Channel Count");
-    dump_reg(AUD_CTS_ENABLE,	"Audio CTS Programming Enable");
-
-    printf("\nDetails:\n\n");
-
-    dword = INREG(AUD_VID_DID);
-    printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
-    printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
-
-    dword = INREG(AUD_RID);
-    printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
-    printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
-    printf("AUD_RID revision id\t\t\t0x%lx\n",    BITS(dword, 15, 8));
-    printf("AUD_RID stepping id\t\t\t0x%lx\n",    BITS(dword, 7, 0));
-
-    dword = INREG(SDVOB);
-    printf("SDVOB enable\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
-    printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
-    printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
-    printf("SDVOB null packets\t\t\t%u\n",  !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
-    printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
-
-    dword = INREG(SDVOC);
-    printf("SDVOC enable\t\t\t\t%u\n",      !!(dword & SDVO_ENABLE));
-    printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
-    printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
-    printf("SDVOC null packets\t\t\t%u\n",  !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
-    printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
-
-    dword = INREG(PORT_HOTPLUG_EN);
-    printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n", BIT(dword, 29)),
-    printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n", BIT(dword, 28)),
-    printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n",      BIT(dword, 27)),
-    printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", BIT(dword, 26)),
-    printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", BIT(dword, 25)),
-    printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", BIT(dword, 24)),
-    printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n",    BIT(dword, 23)),
-    printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n",   BIT(dword, 9)),
-
-    dword = INREG(VIDEO_DIP_CTL);
-    printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n",     BIT(dword, 31)),
-    printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
-		    BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
-    printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", BIT(dword, 28));
-    printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n",       BIT(dword, 21));
-    printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n",      BIT(dword, 22));
-    printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n",       BIT(dword, 24));
-    printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n",
-		    BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]);
-    printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n",
-		    BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]);
-    printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
-    printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
-
-    dword = INREG(AUD_CONFIG);
-    printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
-		    OPNAME(pixel_clock, BITS(dword, 19, 16)));
-    printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
-    printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
-    printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
-
-    dword = INREG(AUD_DEBUG);
-    printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
-
-    dword = INREG(AUD_SUBN_CNT);
-    printf("AUD_SUBN_CNT starting node number\t0x%lx\n",  BITS(dword, 23, 16));
-    printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
-
-    dword = INREG(AUD_SUBN_CNT2);
-    printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n",  BITS(dword, 24, 16));
-    printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n", BITS(dword, 7, 0));
-
-    dword = INREG(AUD_FUNC_GRP);
-    printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
-    printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
-
-    dword = INREG(AUD_GRP_CAP);
-    printf("AUD_GRP_CAP beep 0\t\t\t%lu\n",       BIT(dword, 16));
-    printf("AUD_GRP_CAP input delay\t\t\t%lu\n",  BITS(dword, 11, 8));
-    printf("AUD_GRP_CAP output delay\t\t%lu\n",   BITS(dword, 3, 0));
-
-    dword = INREG(AUD_PWRST);
-    printf("AUD_PWRST device power state\t\t%s\n",
-				    power_state[BITS(dword, 5, 4)]);
-    printf("AUD_PWRST device power state setting\t%s\n",
-				    power_state[BITS(dword, 1, 0)]);
-
-    dword = INREG(AUD_SUPPWR);
-    printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
-    printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
-    printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
-    printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
-
-    dword = INREG(AUD_OUT_CWCAP);
-    printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n",  BITS(dword, 23, 20));
-    printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
-    printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
-		    BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1);
-    printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n",       BIT(dword, 11));
-    printf("AUD_OUT_CWCAP power control\t\t%lu\n",    BIT(dword, 10));
-    printf("AUD_OUT_CWCAP digital\t\t\t%lu\n",        BIT(dword, 9));
-    printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n",      BIT(dword, 8));
-    printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n",          BIT(dword, 7));
-    printf("AUD_OUT_CWCAP mute\t\t\t%lu\n",           BIT(dword, 5));
-    printf("AUD_OUT_CWCAP format override\t\t%lu\n",  BIT(dword, 4));
-    printf("AUD_OUT_CWCAP amp param override\t%lu\n", BIT(dword, 3));
-    printf("AUD_OUT_CWCAP out amp present\t\t%lu\n",  BIT(dword, 2));
-    printf("AUD_OUT_CWCAP in amp present\t\t%lu\n",   BIT(dword, 1));
-
-    dword = INREG(AUD_OUT_DIG_CNVT);
-    printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n", BITS(dword, 14, 8));
-    printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n",      BIT(dword, 7));
-    printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n",     BIT(dword, 6));
-    printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n",          BIT(dword, 5));
-    printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", BIT(dword, 4));
-    printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", BIT(dword, 3));
-    printf("AUD_OUT_DIG_CNVT validity config\t%lu\n",    BIT(dword, 2));
-    printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n",    BIT(dword, 1));
-    printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n",   BIT(dword, 0));
-
-    dword = INREG(AUD_OUT_CH_STR);
-    printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n",        BITS(dword, 7, 4));
-    printf("AUD_OUT_CH_STR lowest channel\t\t0x%lx\n",   BITS(dword, 3, 0));
-
-    dword = INREG(AUD_OUT_STR_DESC);
-    printf("AUD_OUT_STR_DESC stream channels\t0x%lx\n",  BITS(dword, 3, 0));
-
-    dword = INREG(AUD_PINW_CAP);
-    printf("AUD_PINW_CAP widget type\t\t0x%lx\n",        BITS(dword, 23, 20));
-    printf("AUD_PINW_CAP sample delay\t\t0x%lx\n",       BITS(dword, 19, 16));
-    printf("AUD_PINW_CAP channel count\t\t0x%lx\n",
-		    BITS(dword, 15, 13) * 2 + BIT(dword, 0));
-    printf("AUD_PINW_CAP HDCP\t\t\t%lu\n",               BIT(dword, 12));
-    printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n",           BIT(dword, 11));
-    printf("AUD_PINW_CAP power control\t\t%lu\n",        BIT(dword, 10));
-    printf("AUD_PINW_CAP digital\t\t\t%lu\n",            BIT(dword, 9));
-    printf("AUD_PINW_CAP conn list\t\t\t%lu\n",          BIT(dword, 8));
-    printf("AUD_PINW_CAP unsol\t\t\t%lu\n",              BIT(dword, 7));
-    printf("AUD_PINW_CAP mute\t\t\t%lu\n",               BIT(dword, 5));
-    printf("AUD_PINW_CAP format override\t\t%lu\n",      BIT(dword, 4));
-    printf("AUD_PINW_CAP amp param override\t\t%lu\n",   BIT(dword, 3));
-    printf("AUD_PINW_CAP out amp present\t\t%lu\n",      BIT(dword, 2));
-    printf("AUD_PINW_CAP in amp present\t\t%lu\n",       BIT(dword, 1));
-
-
-    dword = INREG(AUD_PIN_CAP);
-    printf("AUD_PIN_CAP EAPD\t\t\t%lu\n",          BIT(dword, 16));
-    printf("AUD_PIN_CAP HDMI\t\t\t%lu\n",          BIT(dword, 7));
-    printf("AUD_PIN_CAP output\t\t\t%lu\n",        BIT(dword, 4));
-    printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
-
-    dword = INREG(AUD_PINW_CNTR);
-    printf("AUD_PINW_CNTR mute status\t\t%lu\n",     BIT(dword, 8));
-    printf("AUD_PINW_CNTR out enable\t\t%lu\n",      BIT(dword, 6));
-    printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
-    printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
-    printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n",
-		    BITS(dword, 2, 0),
-		    OPNAME(stream_type, BITS(dword, 2, 0)));
-
-    dword = INREG(AUD_PINW_UNSOLRESP);
-    printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
-
-    dword = INREG(AUD_CNTL_ST);
-    printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
-    printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n",   BIT(dword, 22));
-    printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
-    printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n",
-		    BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
-    printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n",
-		    BITS(dword, 20, 18), OPNAME(dip_index, BITS(dword, 20, 18)));
-    printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n",
-		    BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]);
-    printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", BITS(dword, 3, 0));
-    printf("AUD_CNTL_ST CP ready\t\t\t%lu\n",    BIT(dword, 15));
-    printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n",   BIT(dword, 14));
-    printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n",     BIT(dword, 4));
-    printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
-    printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
-
-    dword = INREG(AUD_HDMIW_STATUS);
-    printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
-    printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n",  BIT(dword, 30));
-    printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n",   BIT(dword, 29));
-    printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n",    BIT(dword, 28));
-
-    dword = INREG(AUD_CONV_CHCNT);
-    printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
-    printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n", BITS(dword, 11, 8) + 1);
-
-    printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
-    for (i = 0; i < 8; i++) {
-	    OUTREG(AUD_CONV_CHCNT, i);
-	    dword = INREG(AUD_CONV_CHCNT);
-	    printf("\t\t\t\t\t[0x%x] %u => %lu \n", dword, i, BITS(dword, 7, 4));
-    }
-
-    return 0;
+	dump_reg(VIDEO_DIP_CTL, "Video DIP Control");
+	dump_reg(SDVOB, "Digital Display Port B Control Register");
+	dump_reg(SDVOC, "Digital Display Port C Control Register");
+	dump_reg(PORT_HOTPLUG_EN, "Hot Plug Detect Enable");
+
+	dump_reg(AUD_CONFIG, "Audio Configuration");
+	dump_reg(AUD_DEBUG, "Audio Debug");
+	dump_reg(AUD_VID_DID, "Audio Vendor ID / Device ID");
+	dump_reg(AUD_RID, "Audio Revision ID");
+	dump_reg(AUD_SUBN_CNT, "Audio Subordinate Node Count");
+	dump_reg(AUD_FUNC_GRP, "Audio Function Group Type");
+	dump_reg(AUD_SUBN_CNT2, "Audio Subordinate Node Count");
+	dump_reg(AUD_GRP_CAP, "Audio Function Group Capabilities");
+	dump_reg(AUD_PWRST, "Audio Power State");
+	dump_reg(AUD_SUPPWR, "Audio Supported Power States");
+	dump_reg(AUD_SID, "Audio Root Node Subsystem ID");
+	dump_reg(AUD_OUT_CWCAP, "Audio Output Converter Widget Capabilities");
+	dump_reg(AUD_OUT_PCMSIZE, "Audio PCM Size and Rates");
+	dump_reg(AUD_OUT_STR, "Audio Stream Formats");
+	dump_reg(AUD_OUT_DIG_CNVT, "Audio Digital Converter");
+	dump_reg(AUD_OUT_CH_STR, "Audio Channel ID and Stream ID");
+	dump_reg(AUD_OUT_STR_DESC, "Audio Stream Descriptor Format");
+	dump_reg(AUD_PINW_CAP, "Audio Pin Complex Widget Capabilities");
+	dump_reg(AUD_PIN_CAP, "Audio Pin Capabilities");
+	dump_reg(AUD_PINW_CONNLNG, "Audio Connection List Length");
+	dump_reg(AUD_PINW_CONNLST, "Audio Connection List Entry");
+	dump_reg(AUD_PINW_CNTR, "Audio Pin Widget Control");
+	dump_reg(AUD_PINW_UNSOLRESP, "Audio Unsolicited Response Enable");
+	dump_reg(AUD_CNTL_ST, "Audio Control State Register");
+	dump_reg(AUD_PINW_CONFIG, "Audio Configuration Default");
+	dump_reg(AUD_HDMIW_STATUS, "Audio HDMI Status");
+	dump_reg(AUD_HDMIW_HDMIEDID, "Audio HDMI Data EDID Block");
+	dump_reg(AUD_HDMIW_INFOFR, "Audio HDMI Widget Data Island Packet");
+	dump_reg(AUD_CONV_CHCNT, "Audio Converter Channel Count");
+	dump_reg(AUD_CTS_ENABLE, "Audio CTS Programming Enable");
+
+	printf("\nDetails:\n\n");
+
+	dword = INREG(AUD_VID_DID);
+	printf("AUD_VID_DID vendor id\t\t\t0x%x\n", dword >> 16);
+	printf("AUD_VID_DID device id\t\t\t0x%x\n", dword & 0xffff);
+
+	dword = INREG(AUD_RID);
+	printf("AUD_RID major revision\t\t\t0x%lx\n", BITS(dword, 23, 20));
+	printf("AUD_RID minor revision\t\t\t0x%lx\n", BITS(dword, 19, 16));
+	printf("AUD_RID revision id\t\t\t0x%lx\n", BITS(dword, 15, 8));
+	printf("AUD_RID stepping id\t\t\t0x%lx\n", BITS(dword, 7, 0));
+
+	dword = INREG(SDVOB);
+	printf("SDVOB enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
+	printf("SDVOB HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
+	printf("SDVOB SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
+	printf("SDVOB null packets\t\t\t%u\n",
+	       !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
+	printf("SDVOB audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
+
+	dword = INREG(SDVOC);
+	printf("SDVOC enable\t\t\t\t%u\n", !!(dword & SDVO_ENABLE));
+	printf("SDVOC HDMI encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_HDMI));
+	printf("SDVOC SDVO encoding\t\t\t%u\n", !!(dword & SDVO_ENCODING_SDVO));
+	printf("SDVOC null packets\t\t\t%u\n",
+	       !!(dword & SDVO_NULL_PACKETS_DURING_VSYNC));
+	printf("SDVOC audio enabled\t\t\t%u\n", !!(dword & SDVO_AUDIO_ENABLE));
+
+	dword = INREG(PORT_HOTPLUG_EN);
+	printf("PORT_HOTPLUG_EN DisplayPort/HDMI port B\t%ld\n",
+	       BIT(dword, 29)),
+	    printf("PORT_HOTPLUG_EN DisplayPort/HDMI port C\t%ld\n",
+		   BIT(dword, 28)),
+	    printf("PORT_HOTPLUG_EN DisplayPort port D\t%ld\n", BIT(dword, 27)),
+	    printf("PORT_HOTPLUG_EN SDVOB\t\t\t%ld\n", BIT(dword, 26)),
+	    printf("PORT_HOTPLUG_EN SDVOC\t\t\t%ld\n", BIT(dword, 25)),
+	    printf("PORT_HOTPLUG_EN audio\t\t\t%ld\n", BIT(dword, 24)),
+	    printf("PORT_HOTPLUG_EN TV\t\t\t%ld\n", BIT(dword, 23)),
+	    printf("PORT_HOTPLUG_EN CRT\t\t\t%ld\n", BIT(dword, 9)), dword =
+	    INREG(VIDEO_DIP_CTL);
+	printf("VIDEO_DIP_CTL enable graphics DIP\t%ld\n", BIT(dword, 31)),
+	    printf("VIDEO_DIP_CTL port select\t\t[0x%lx] %s\n",
+		   BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
+	printf("VIDEO_DIP_CTL DIP buffer trans active\t%lu\n", BIT(dword, 28));
+	printf("VIDEO_DIP_CTL AVI DIP enabled\t\t%lu\n", BIT(dword, 21));
+	printf("VIDEO_DIP_CTL vendor DIP enabled\t%lu\n", BIT(dword, 22));
+	printf("VIDEO_DIP_CTL SPD DIP enabled\t\t%lu\n", BIT(dword, 24));
+	printf("VIDEO_DIP_CTL DIP buffer index\t\t[0x%lx] %s\n",
+	       BITS(dword, 20, 19), video_dip_index[BITS(dword, 20, 19)]);
+	printf("VIDEO_DIP_CTL DIP trans freq\t\t[0x%lx] %s\n",
+	       BITS(dword, 17, 16), video_dip_trans[BITS(dword, 17, 16)]);
+	printf("VIDEO_DIP_CTL DIP buffer size\t\t%lu\n", BITS(dword, 11, 8));
+	printf("VIDEO_DIP_CTL DIP address\t\t%lu\n", BITS(dword, 3, 0));
+
+	dword = INREG(AUD_CONFIG);
+	printf("AUD_CONFIG pixel clock\t\t\t[0x%lx] %s\n", BITS(dword, 19, 16),
+	       OPNAME(pixel_clock, BITS(dword, 19, 16)));
+	printf("AUD_CONFIG fabrication enabled\t\t%lu\n", BITS(dword, 2, 2));
+	printf("AUD_CONFIG professional use allowed\t%lu\n", BIT(dword, 1));
+	printf("AUD_CONFIG fuse enabled\t\t\t%lu\n", BIT(dword, 0));
+
+	dword = INREG(AUD_DEBUG);
+	printf("AUD_DEBUG function reset\t\t%lu\n", BIT(dword, 0));
+
+	dword = INREG(AUD_SUBN_CNT);
+	printf("AUD_SUBN_CNT starting node number\t0x%lx\n",
+	       BITS(dword, 23, 16));
+	printf("AUD_SUBN_CNT total number of nodes\t0x%lx\n",
+	       BITS(dword, 7, 0));
+
+	dword = INREG(AUD_SUBN_CNT2);
+	printf("AUD_SUBN_CNT2 starting node number\t0x%lx\n",
+	       BITS(dword, 24, 16));
+	printf("AUD_SUBN_CNT2 total number of nodes\t0x%lx\n",
+	       BITS(dword, 7, 0));
+
+	dword = INREG(AUD_FUNC_GRP);
+	printf("AUD_FUNC_GRP unsol capable\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_FUNC_GRP node type\t\t\t0x%lx\n", BITS(dword, 7, 0));
+
+	dword = INREG(AUD_GRP_CAP);
+	printf("AUD_GRP_CAP beep 0\t\t\t%lu\n", BIT(dword, 16));
+	printf("AUD_GRP_CAP input delay\t\t\t%lu\n", BITS(dword, 11, 8));
+	printf("AUD_GRP_CAP output delay\t\t%lu\n", BITS(dword, 3, 0));
+
+	dword = INREG(AUD_PWRST);
+	printf("AUD_PWRST device power state\t\t%s\n",
+	       power_state[BITS(dword, 5, 4)]);
+	printf("AUD_PWRST device power state setting\t%s\n",
+	       power_state[BITS(dword, 1, 0)]);
+
+	dword = INREG(AUD_SUPPWR);
+	printf("AUD_SUPPWR support D0\t\t\t%lu\n", BIT(dword, 0));
+	printf("AUD_SUPPWR support D1\t\t\t%lu\n", BIT(dword, 1));
+	printf("AUD_SUPPWR support D2\t\t\t%lu\n", BIT(dword, 2));
+	printf("AUD_SUPPWR support D3\t\t\t%lu\n", BIT(dword, 3));
+
+	dword = INREG(AUD_OUT_CWCAP);
+	printf("AUD_OUT_CWCAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
+	printf("AUD_OUT_CWCAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
+	printf("AUD_OUT_CWCAP channel count\t\t%lu\n",
+	       BITS(dword, 15, 13) * 2 + BIT(dword, 0) + 1);
+	printf("AUD_OUT_CWCAP L-R swap\t\t\t%lu\n", BIT(dword, 11));
+	printf("AUD_OUT_CWCAP power control\t\t%lu\n", BIT(dword, 10));
+	printf("AUD_OUT_CWCAP digital\t\t\t%lu\n", BIT(dword, 9));
+	printf("AUD_OUT_CWCAP conn list\t\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_OUT_CWCAP unsol\t\t\t%lu\n", BIT(dword, 7));
+	printf("AUD_OUT_CWCAP mute\t\t\t%lu\n", BIT(dword, 5));
+	printf("AUD_OUT_CWCAP format override\t\t%lu\n", BIT(dword, 4));
+	printf("AUD_OUT_CWCAP amp param override\t%lu\n", BIT(dword, 3));
+	printf("AUD_OUT_CWCAP out amp present\t\t%lu\n", BIT(dword, 2));
+	printf("AUD_OUT_CWCAP in amp present\t\t%lu\n", BIT(dword, 1));
+
+	dword = INREG(AUD_OUT_DIG_CNVT);
+	printf("AUD_OUT_DIG_CNVT SPDIF category\t\t0x%lx\n",
+	       BITS(dword, 14, 8));
+	printf("AUD_OUT_DIG_CNVT SPDIF level\t\t%lu\n", BIT(dword, 7));
+	printf("AUD_OUT_DIG_CNVT professional\t\t%lu\n", BIT(dword, 6));
+	printf("AUD_OUT_DIG_CNVT non PCM\t\t%lu\n", BIT(dword, 5));
+	printf("AUD_OUT_DIG_CNVT copyright asserted\t%lu\n", BIT(dword, 4));
+	printf("AUD_OUT_DIG_CNVT filter preemphasis\t%lu\n", BIT(dword, 3));
+	printf("AUD_OUT_DIG_CNVT validity config\t%lu\n", BIT(dword, 2));
+	printf("AUD_OUT_DIG_CNVT validity flag\t\t%lu\n", BIT(dword, 1));
+	printf("AUD_OUT_DIG_CNVT digital enable\t\t%lu\n", BIT(dword, 0));
+
+	dword = INREG(AUD_OUT_CH_STR);
+	printf("AUD_OUT_CH_STR stream id\t\t0x%lx\n", BITS(dword, 7, 4));
+	printf("AUD_OUT_CH_STR lowest channel\t\t0x%lx\n", BITS(dword, 3, 0));
+
+	dword = INREG(AUD_OUT_STR_DESC);
+	printf("AUD_OUT_STR_DESC stream channels\t0x%lx\n", BITS(dword, 3, 0));
+
+	dword = INREG(AUD_PINW_CAP);
+	printf("AUD_PINW_CAP widget type\t\t0x%lx\n", BITS(dword, 23, 20));
+	printf("AUD_PINW_CAP sample delay\t\t0x%lx\n", BITS(dword, 19, 16));
+	printf("AUD_PINW_CAP channel count\t\t0x%lx\n",
+	       BITS(dword, 15, 13) * 2 + BIT(dword, 0));
+	printf("AUD_PINW_CAP HDCP\t\t\t%lu\n", BIT(dword, 12));
+	printf("AUD_PINW_CAP L-R swap\t\t\t%lu\n", BIT(dword, 11));
+	printf("AUD_PINW_CAP power control\t\t%lu\n", BIT(dword, 10));
+	printf("AUD_PINW_CAP digital\t\t\t%lu\n", BIT(dword, 9));
+	printf("AUD_PINW_CAP conn list\t\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_PINW_CAP unsol\t\t\t%lu\n", BIT(dword, 7));
+	printf("AUD_PINW_CAP mute\t\t\t%lu\n", BIT(dword, 5));
+	printf("AUD_PINW_CAP format override\t\t%lu\n", BIT(dword, 4));
+	printf("AUD_PINW_CAP amp param override\t\t%lu\n", BIT(dword, 3));
+	printf("AUD_PINW_CAP out amp present\t\t%lu\n", BIT(dword, 2));
+	printf("AUD_PINW_CAP in amp present\t\t%lu\n", BIT(dword, 1));
+
+	dword = INREG(AUD_PIN_CAP);
+	printf("AUD_PIN_CAP EAPD\t\t\t%lu\n", BIT(dword, 16));
+	printf("AUD_PIN_CAP HDMI\t\t\t%lu\n", BIT(dword, 7));
+	printf("AUD_PIN_CAP output\t\t\t%lu\n", BIT(dword, 4));
+	printf("AUD_PIN_CAP presence detect\t\t%lu\n", BIT(dword, 2));
+
+	dword = INREG(AUD_PINW_CNTR);
+	printf("AUD_PINW_CNTR mute status\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_PINW_CNTR out enable\t\t%lu\n", BIT(dword, 6));
+	printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_PINW_CNTR amp mute status\t\t%lu\n", BIT(dword, 8));
+	printf("AUD_PINW_CNTR stream type\t\t[0x%lx] %s\n",
+	       BITS(dword, 2, 0), OPNAME(stream_type, BITS(dword, 2, 0)));
+
+	dword = INREG(AUD_PINW_UNSOLRESP);
+	printf("AUD_PINW_UNSOLRESP enable unsol resp\t%lu\n", BIT(dword, 31));
+
+	dword = INREG(AUD_CNTL_ST);
+	printf("AUD_CNTL_ST DIP audio enabled\t\t%lu\n", BIT(dword, 21));
+	printf("AUD_CNTL_ST DIP ACP enabled\t\t%lu\n", BIT(dword, 22));
+	printf("AUD_CNTL_ST DIP ISRCx enabled\t\t%lu\n", BIT(dword, 23));
+	printf("AUD_CNTL_ST DIP port select\t\t[0x%lx] %s\n",
+	       BITS(dword, 30, 29), dip_port[BITS(dword, 30, 29)]);
+	printf("AUD_CNTL_ST DIP buffer index\t\t[0x%lx] %s\n",
+	       BITS(dword, 20, 18), OPNAME(dip_index, BITS(dword, 20, 18)));
+	printf("AUD_CNTL_ST DIP trans freq\t\t[0x%lx] %s\n",
+	       BITS(dword, 17, 16), dip_trans[BITS(dword, 17, 16)]);
+	printf("AUD_CNTL_ST DIP address\t\t\t%lu\n", BITS(dword, 3, 0));
+	printf("AUD_CNTL_ST CP ready\t\t\t%lu\n", BIT(dword, 15));
+	printf("AUD_CNTL_ST ELD valid\t\t\t%lu\n", BIT(dword, 14));
+	printf("AUD_CNTL_ST ELD ack\t\t\t%lu\n", BIT(dword, 4));
+	printf("AUD_CNTL_ST ELD bufsize\t\t\t%lu\n", BITS(dword, 13, 9));
+	printf("AUD_CNTL_ST ELD address\t\t\t%lu\n", BITS(dword, 8, 5));
+
+	dword = INREG(AUD_HDMIW_STATUS);
+	printf("AUD_HDMIW_STATUS CDCLK/DOTCLK underrun\t%lu\n", BIT(dword, 31));
+	printf("AUD_HDMIW_STATUS CDCLK/DOTCLK overrun\t%lu\n", BIT(dword, 30));
+	printf("AUD_HDMIW_STATUS BCLK/CDCLK underrun\t%lu\n", BIT(dword, 29));
+	printf("AUD_HDMIW_STATUS BCLK/CDCLK overrun\t%lu\n", BIT(dword, 28));
+
+	dword = INREG(AUD_CONV_CHCNT);
+	printf("AUD_CONV_CHCNT HDMI HBR enabled\t\t%lu\n", BITS(dword, 15, 14));
+	printf("AUD_CONV_CHCNT HDMI channel count\t%lu\n",
+	       BITS(dword, 11, 8) + 1);
+
+	printf("AUD_CONV_CHCNT HDMI channel mapping:\n");
+	for (i = 0; i < 8; i++) {
+		OUTREG(AUD_CONV_CHCNT, i);
+		dword = INREG(AUD_CONV_CHCNT);
+		printf("\t\t\t\t\t[0x%x] %u => %lu \n", dword, i,
+		       BITS(dword, 7, 4));
+	}
+
+	return 0;
 }
diff --git a/src/reg_dumper/gtt.c b/src/reg_dumper/gtt.c
index c3316017..241e5e4d 100644
--- a/src/reg_dumper/gtt.c
+++ b/src/reg_dumper/gtt.c
@@ -57,13 +57,13 @@ int main(int argc, char **argv)
 	else if (IS_I965G(pI830))
 		gtt = (unsigned char *)(pI830->mmio + KB(512));
 	else {
-		/* 915/945 chips has GTT range in bar 3*/
+		/* 915/945 chips has GTT range in bar 3 */
 		int err = 0;
-		err = pci_device_map_range (pI830->PciInfo,
-				pI830->PciInfo->regions[3].base_addr,
-				pI830->PciInfo->regions[3].size,
-				PCI_DEV_MAP_FLAG_WRITABLE,
-				(void **)&gtt);
+		err = pci_device_map_range(pI830->PciInfo,
+					   pI830->PciInfo->regions[3].base_addr,
+					   pI830->PciInfo->regions[3].size,
+					   PCI_DEV_MAP_FLAG_WRITABLE,
+					   (void **)&gtt);
 		if (err != 0) {
 			fprintf(stderr, "mapping GTT bar failed\n");
 			exit(1);
@@ -105,8 +105,7 @@ int main(int argc, char **argv)
 		}
 		if (constant_length > 0) {
 			printf("0x%08x - 0x%08x: constant 0x%08x\n",
-			       start, end - KB(4),
-			       start_pte);
+			       start, end - KB(4), start_pte);
 			start = end - KB(4);
 			continue;
 		}
diff --git a/src/reg_dumper/hotplug.c b/src/reg_dumper/hotplug.c
index de463844..9cfb59f6 100644
--- a/src/reg_dumper/hotplug.c
+++ b/src/reg_dumper/hotplug.c
@@ -37,112 +37,111 @@
 #include "../i810_reg.h"
 
 struct idle_flags {
-    uint32_t instdone_flag;
-    char *name;
-    unsigned int count;
+	uint32_t instdone_flag;
+	char *name;
+	unsigned int count;
 };
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev;
-    I830Rec i830;
-    I830Ptr pI830 = &i830;
-    ScrnInfoRec scrn;
-    int err, mmio_bar;
-    void *mmio;
-    int i;
-
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
-
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
-
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
-
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
-
-    i830.PciInfo = dev;
-
-    mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
-
-    err = pci_device_map_range (dev,
-				dev->regions[mmio_bar].base_addr,
-				dev->regions[mmio_bar].size, 
-				PCI_DEV_MAP_FLAG_WRITABLE,
-				&mmio);
-
-    if (err != 0) {
-	fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
-	exit(1);
-    }
-    i830.mmio = mmio;
-
-    scrn.scrnIndex = 0;
-    scrn.pI830 = &i830;
-
-    OUTREG(SDVOB, (0x0 << 10));
-    OUTREG(SDVOC, (0x0 << 10));
-
-    OUTREG(PORT_HOTPLUG_EN,
-	   (1 << 29) |
-	   (1 << 28) |
-	   (1 << 27) |
-	   SDVOB_HOTPLUG_INT_EN |
-	   SDVOC_HOTPLUG_INT_EN |
-	   (1 << 24) |
-	   CRT_HOTPLUG_INT_EN |
-	   TV_HOTPLUG_INT_EN |
-	   CRT_HOTPLUG_INT_EN);
-
-    for (i = 0;; i++) {
-	OUTREG(PORT_HOTPLUG_STAT,
-	       (1 << 20) |
-	       (1 << 19) |
-	       (1 << 18) |
-	       (1 << 17) |
-	       CRT_HOTPLUG_INT_STATUS |
-	       TV_HOTPLUG_INT_STATUS |
-	       SDVOC_HOTPLUG_INT_STATUS |
-	       SDVOB_HOTPLUG_INT_STATUS);
-	INREG(PORT_HOTPLUG_STAT);
-
-	usleep(500 * 1000);
-
-	printf("%5d: 0x%08x\n", i, INREG(PORT_HOTPLUG_STAT));
-	sleep(1);
-    }
-
-    return 0;
+	struct pci_device *dev;
+	I830Rec i830;
+	I830Ptr pI830 = &i830;
+	ScrnInfoRec scrn;
+	int err, mmio_bar;
+	void *mmio;
+	int i;
+
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
+
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
+
+	i830.PciInfo = dev;
+
+	mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
+
+	err = pci_device_map_range(dev,
+				   dev->regions[mmio_bar].base_addr,
+				   dev->regions[mmio_bar].size,
+				   PCI_DEV_MAP_FLAG_WRITABLE, &mmio);
+
+	if (err != 0) {
+		fprintf(stderr, "Couldn't map MMIO region: %s\n",
+			strerror(err));
+		exit(1);
+	}
+	i830.mmio = mmio;
+
+	scrn.scrnIndex = 0;
+	scrn.pI830 = &i830;
+
+	OUTREG(SDVOB, (0x0 << 10));
+	OUTREG(SDVOC, (0x0 << 10));
+
+	OUTREG(PORT_HOTPLUG_EN,
+	       (1 << 29) |
+	       (1 << 28) |
+	       (1 << 27) |
+	       SDVOB_HOTPLUG_INT_EN |
+	       SDVOC_HOTPLUG_INT_EN |
+	       (1 << 24) |
+	       CRT_HOTPLUG_INT_EN | TV_HOTPLUG_INT_EN | CRT_HOTPLUG_INT_EN);
+
+	for (i = 0;; i++) {
+		OUTREG(PORT_HOTPLUG_STAT,
+		       (1 << 20) |
+		       (1 << 19) |
+		       (1 << 18) |
+		       (1 << 17) |
+		       CRT_HOTPLUG_INT_STATUS |
+		       TV_HOTPLUG_INT_STATUS |
+		       SDVOC_HOTPLUG_INT_STATUS | SDVOB_HOTPLUG_INT_STATUS);
+		INREG(PORT_HOTPLUG_STAT);
+
+		usleep(500 * 1000);
+
+		printf("%5d: 0x%08x\n", i, INREG(PORT_HOTPLUG_STAT));
+		sleep(1);
+	}
+
+	return 0;
 }
 
 void xf86DrvMsg(int scrnIndex, int severity, const char *format, ...)
 {
-    va_list va;
-
-    switch (severity) {
-    case X_INFO:
-	printf("(II): ");
-	break;
-    case X_WARNING:
-	printf("(WW): ");
-	break;
-    case X_ERROR:
-	printf("(EE): ");
-	break;
-    }
-
-    va_start(va, format);
-    vprintf(format, va);
-    va_end(va);
+	va_list va;
+
+	switch (severity) {
+	case X_INFO:
+		printf("(II): ");
+		break;
+	case X_WARNING:
+		printf("(WW): ");
+		break;
+	case X_ERROR:
+		printf("(EE): ");
+		break;
+	}
+
+	va_start(va, format);
+	vprintf(format, va);
+	va_end(va);
 }
diff --git a/src/reg_dumper/idle.c b/src/reg_dumper/idle.c
index cbd68aa3..0ea636f3 100644
--- a/src/reg_dumper/idle.c
+++ b/src/reg_dumper/idle.c
@@ -37,56 +37,56 @@
 #include "../i810_reg.h"
 
 struct idle_flags {
-    uint32_t instdone_flag;
-    char *name;
-    int ignore;
-    unsigned int count;
+	uint32_t instdone_flag;
+	char *name;
+	int ignore;
+	unsigned int count;
 };
 
 struct idle_flags i915_idle_flags[] = {
-    {IDCT_DONE, "IDCT", 1},
-    {IQ_DONE, "IQ", 1},
-    {PR_DONE, "PR", 1},
-    {VLD_DONE, "VLD", 1},
-    {IP_DONE, "IP", 1},
-    {FBC_DONE, "FBC"},
-    {BINNER_DONE, "BINNER"},
-    {SF_DONE, "SF"},
-    {SE_DONE, "SE"},
-    {WM_DONE, "WM"},
-    {IZ_DONE, "IZ"},
-    {PERSPECTIVE_INTERP_DONE, "perspective interpolation"},
-    {DISPATCHER_DONE, "dispatcher"},
-    {PROJECTION_DONE, "projection and LOD"},
-    {DEPENDENT_ADDRESS_DONE, "dependent address calc"},
-    {TEXTURE_FETCH_DONE, "texture fetch"},
-    {TEXTURE_DECOMPRESS_DONE, "texture decompress"},
-    {SAMPLER_CACHE_DONE, "sampler cache"},
-    {FILTER_DONE, "filter"},
-    {BYPASS_FIFO_DONE, "bypass FIFO"},
-    {PS_DONE, "PS"},
-    {CC_DONE, "CC"},
-    {MAP_FILTER_DONE, "map filter"},
-    {MAP_L2_IDLE, "map L2", 1},
-    {0x80000038, "reserved bits", 1},
-    {0, "total"},
-    {0, "other"},
+	{IDCT_DONE, "IDCT", 1},
+	{IQ_DONE, "IQ", 1},
+	{PR_DONE, "PR", 1},
+	{VLD_DONE, "VLD", 1},
+	{IP_DONE, "IP", 1},
+	{FBC_DONE, "FBC"},
+	{BINNER_DONE, "BINNER"},
+	{SF_DONE, "SF"},
+	{SE_DONE, "SE"},
+	{WM_DONE, "WM"},
+	{IZ_DONE, "IZ"},
+	{PERSPECTIVE_INTERP_DONE, "perspective interpolation"},
+	{DISPATCHER_DONE, "dispatcher"},
+	{PROJECTION_DONE, "projection and LOD"},
+	{DEPENDENT_ADDRESS_DONE, "dependent address calc"},
+	{TEXTURE_FETCH_DONE, "texture fetch"},
+	{TEXTURE_DECOMPRESS_DONE, "texture decompress"},
+	{SAMPLER_CACHE_DONE, "sampler cache"},
+	{FILTER_DONE, "filter"},
+	{BYPASS_FIFO_DONE, "bypass FIFO"},
+	{PS_DONE, "PS"},
+	{CC_DONE, "CC"},
+	{MAP_FILTER_DONE, "map filter"},
+	{MAP_L2_IDLE, "map L2", 1},
+	{0x80000038, "reserved bits", 1},
+	{0, "total"},
+	{0, "other"},
 };
 
 struct idle_flags i965_idle_flags[] = {
-    {I965_SF_DONE, "SF"},
-    {I965_SE_DONE, "SE"},
-    {I965_WM_DONE, "WM"},
-    {I965_TEXTURE_FETCH_DONE, "texture fetch"},
-    {I965_SAMPLER_CACHE_DONE, "sampler cache"},
-    {I965_FILTER_DONE, "filter"},
-    {I965_PS_DONE, "PS"},
-    {I965_CC_DONE, "CC"},
-    {I965_MAP_FILTER_DONE, "map filter"},
-    {I965_MAP_L2_IDLE, "map L2"},
-    {I965_CP_DONE, "CP"},
-    {0, "total"},
-    {0, "other"},
+	{I965_SF_DONE, "SF"},
+	{I965_SE_DONE, "SE"},
+	{I965_WM_DONE, "WM"},
+	{I965_TEXTURE_FETCH_DONE, "texture fetch"},
+	{I965_SAMPLER_CACHE_DONE, "sampler cache"},
+	{I965_FILTER_DONE, "filter"},
+	{I965_PS_DONE, "PS"},
+	{I965_CC_DONE, "CC"},
+	{I965_MAP_FILTER_DONE, "map filter"},
+	{I965_MAP_L2_IDLE, "map L2"},
+	{I965_CP_DONE, "CP"},
+	{0, "total"},
+	{0, "other"},
 };
 
 /* Fills in the "other" and "total" fields' idle flags */
@@ -94,134 +94,138 @@ static void
 setup_other_flags(I830Ptr pI830,
 		  struct idle_flags *idle_flags, int idle_flag_count)
 {
-    uint32_t other_idle_flags, total_idle_flags = 0;
-    int i;
-
-    if (IS_I965G(pI830))
-	other_idle_flags = ~(I965_RING_0_ENABLE);
-    else
-	other_idle_flags = ~(RING_0_ENABLE | RING_1_ENABLE | RING_2_ENABLE);
-
-    for (i = 0; i < idle_flag_count - 2; i++) {
-	other_idle_flags &= ~idle_flags[i].instdone_flag;
-	if (!idle_flags[i].ignore)
-	    total_idle_flags |= idle_flags[i].instdone_flag;
-    }
-    idle_flags[idle_flag_count - 2].instdone_flag = total_idle_flags;
-    idle_flags[idle_flag_count - 1].instdone_flag = other_idle_flags;
+	uint32_t other_idle_flags, total_idle_flags = 0;
+	int i;
+
+	if (IS_I965G(pI830))
+		other_idle_flags = ~(I965_RING_0_ENABLE);
+	else
+		other_idle_flags =
+		    ~(RING_0_ENABLE | RING_1_ENABLE | RING_2_ENABLE);
+
+	for (i = 0; i < idle_flag_count - 2; i++) {
+		other_idle_flags &= ~idle_flags[i].instdone_flag;
+		if (!idle_flags[i].ignore)
+			total_idle_flags |= idle_flags[i].instdone_flag;
+	}
+	idle_flags[idle_flag_count - 2].instdone_flag = total_idle_flags;
+	idle_flags[idle_flag_count - 1].instdone_flag = other_idle_flags;
 }
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev;
-    I830Rec i830;
-    I830Ptr pI830 = &i830;
-    ScrnInfoRec scrn;
-    int err, mmio_bar;
-    void *mmio;
-    struct idle_flags *idle_flags;
-    int idle_flag_count;
-
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
-
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
-
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
-
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
-
-    i830.PciInfo = dev;
-
-    mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
-
-    err = pci_device_map_range (dev,
-				dev->regions[mmio_bar].base_addr,
-				dev->regions[mmio_bar].size, 
-				PCI_DEV_MAP_FLAG_WRITABLE,
-				&mmio);
-
-    if (err != 0) {
-	fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
-	exit(1);
-    }
-    i830.mmio = mmio;
-
-    scrn.scrnIndex = 0;
-    scrn.pI830 = &i830;
-
-    if (IS_I965G(pI830)) {
-	idle_flags = i965_idle_flags;
-	idle_flag_count = ARRAY_SIZE(i965_idle_flags);
-    } else {
-	idle_flags = i915_idle_flags;
-	idle_flag_count = ARRAY_SIZE(i915_idle_flags);
-    }
-
-    setup_other_flags(pI830, idle_flags, idle_flag_count);
-
-    for (;;) {
-	int i, j;
-
-	for (i = 0; i < 100; i++) {
-	    uint32_t instdone;
-
-	    if (IS_I965G(pI830))
-		instdone = INREG(INST_DONE_I965);
-	    else
-		instdone = INREG(INST_DONE);
-
-	    for (j = 0; j < idle_flag_count; j++) {
-		if ((instdone & idle_flags[j].instdone_flag) !=
-		    idle_flags[j].instdone_flag)
-		    idle_flags[j].count++;
-	    }
-
-	    usleep (10000);
+	struct pci_device *dev;
+	I830Rec i830;
+	I830Ptr pI830 = &i830;
+	ScrnInfoRec scrn;
+	int err, mmio_bar;
+	void *mmio;
+	struct idle_flags *idle_flags;
+	int idle_flag_count;
+
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
+
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
 	}
 
-	for (j = 0; j < idle_flag_count; j++) {
-	    if (!idle_flags[j].ignore)
-		printf("%25s: %3d\n", idle_flags[j].name, idle_flags[j].count);
-	    else
-		printf("%25s: %3d (unreliable)\n",
-		       idle_flags[j].name, idle_flags[j].count);
-	    idle_flags[j].count = 0;
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
+
+	i830.PciInfo = dev;
+
+	mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
+
+	err = pci_device_map_range(dev,
+				   dev->regions[mmio_bar].base_addr,
+				   dev->regions[mmio_bar].size,
+				   PCI_DEV_MAP_FLAG_WRITABLE, &mmio);
+
+	if (err != 0) {
+		fprintf(stderr, "Couldn't map MMIO region: %s\n",
+			strerror(err));
+		exit(1);
 	}
-	printf("\n");
-    }
+	i830.mmio = mmio;
 
-    return 0;
+	scrn.scrnIndex = 0;
+	scrn.pI830 = &i830;
+
+	if (IS_I965G(pI830)) {
+		idle_flags = i965_idle_flags;
+		idle_flag_count = ARRAY_SIZE(i965_idle_flags);
+	} else {
+		idle_flags = i915_idle_flags;
+		idle_flag_count = ARRAY_SIZE(i915_idle_flags);
+	}
+
+	setup_other_flags(pI830, idle_flags, idle_flag_count);
+
+	for (;;) {
+		int i, j;
+
+		for (i = 0; i < 100; i++) {
+			uint32_t instdone;
+
+			if (IS_I965G(pI830))
+				instdone = INREG(INST_DONE_I965);
+			else
+				instdone = INREG(INST_DONE);
+
+			for (j = 0; j < idle_flag_count; j++) {
+				if ((instdone & idle_flags[j].instdone_flag) !=
+				    idle_flags[j].instdone_flag)
+					idle_flags[j].count++;
+			}
+
+			usleep(10000);
+		}
+
+		for (j = 0; j < idle_flag_count; j++) {
+			if (!idle_flags[j].ignore)
+				printf("%25s: %3d\n", idle_flags[j].name,
+				       idle_flags[j].count);
+			else
+				printf("%25s: %3d (unreliable)\n",
+				       idle_flags[j].name, idle_flags[j].count);
+			idle_flags[j].count = 0;
+		}
+		printf("\n");
+	}
+
+	return 0;
 }
 
 void xf86DrvMsg(int scrnIndex, int severity, const char *format, ...)
 {
-    va_list va;
-
-    switch (severity) {
-    case X_INFO:
-	printf("(II): ");
-	break;
-    case X_WARNING:
-	printf("(WW): ");
-	break;
-    case X_ERROR:
-	printf("(EE): ");
-	break;
-    }
-
-    va_start(va, format);
-    vprintf(format, va);
-    va_end(va);
+	va_list va;
+
+	switch (severity) {
+	case X_INFO:
+		printf("(II): ");
+		break;
+	case X_WARNING:
+		printf("(WW): ");
+		break;
+	case X_ERROR:
+		printf("(EE): ");
+		break;
+	}
+
+	va_start(va, format);
+	vprintf(format, va);
+	va_end(va);
 }
diff --git a/src/reg_dumper/lid.c b/src/reg_dumper/lid.c
index 771d67d4..29e6cd56 100644
--- a/src/reg_dumper/lid.c
+++ b/src/reg_dumper/lid.c
@@ -42,105 +42,105 @@
 #include "../i830_bios.h"
 
 enum lid_status {
-    LID_UNKNOWN = -1,
-    LID_OPEN,
-    LID_CLOSE,
+	LID_UNKNOWN = -1,
+	LID_OPEN,
+	LID_CLOSE,
 };
 
 #define ACPI_BUTTON "/proc/acpi/button/"
 #define ACPI_LID "/proc/acpi/button/lid/"
 
-static int
-i830_lvds_acpi_lid_state(void)
+static int i830_lvds_acpi_lid_state(void)
 {
-    int fd;
-    DIR *button_dir;
-    DIR *lid_dir;
-    struct dirent *lid_dent;
-    char *state_name;
-    char state[64];
-    enum lid_status ret = LID_UNKNOWN;
-
-    button_dir = opendir(ACPI_BUTTON);
-    /* If acpi button driver is not loaded, bypass ACPI check method */
-    if (button_dir == NULL)
-	goto out;
-    closedir(button_dir);
-
-    lid_dir = opendir(ACPI_LID);
-
-    /* no acpi lid object found */
-    if (lid_dir == NULL)
-	goto out;
-
-    while (1) {
-	lid_dent = readdir(lid_dir);
-	if (lid_dent == NULL) {
-	    /* no LID object */
-	    closedir(lid_dir);
-	    goto out;
+	int fd;
+	DIR *button_dir;
+	DIR *lid_dir;
+	struct dirent *lid_dent;
+	char *state_name;
+	char state[64];
+	enum lid_status ret = LID_UNKNOWN;
+
+	button_dir = opendir(ACPI_BUTTON);
+	/* If acpi button driver is not loaded, bypass ACPI check method */
+	if (button_dir == NULL)
+		goto out;
+	closedir(button_dir);
+
+	lid_dir = opendir(ACPI_LID);
+
+	/* no acpi lid object found */
+	if (lid_dir == NULL)
+		goto out;
+
+	while (1) {
+		lid_dent = readdir(lid_dir);
+		if (lid_dent == NULL) {
+			/* no LID object */
+			closedir(lid_dir);
+			goto out;
+		}
+		if (strcmp(lid_dent->d_name, ".") &&
+		    strcmp(lid_dent->d_name, "..")) {
+			break;
+		}
 	}
-	if (strcmp(lid_dent->d_name, ".") &&
-		strcmp(lid_dent->d_name, "..")) {
-	    break;
-	}
-    }
-    state_name = malloc(strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7);
-    memset(state_name, 0, sizeof(state_name));
-    strcat(state_name, ACPI_LID);
-    strcat(state_name, lid_dent->d_name);
-    strcat(state_name, "/state");
+	state_name = malloc(strlen(ACPI_LID) + strlen(lid_dent->d_name) + 7);
+	memset(state_name, 0, sizeof(state_name));
+	strcat(state_name, ACPI_LID);
+	strcat(state_name, lid_dent->d_name);
+	strcat(state_name, "/state");
 
-    closedir(lid_dir);
+	closedir(lid_dir);
 
-    if ((fd = open(state_name, O_RDONLY)) == -1) {
+	if ((fd = open(state_name, O_RDONLY)) == -1) {
+		free(state_name);
+		goto out;
+	}
 	free(state_name);
-	goto out;
-    }
-    free(state_name);
-    if (read(fd, state, 64) == -1) {
+	if (read(fd, state, 64) == -1) {
+		close(fd);
+		goto out;
+	}
 	close(fd);
-	goto out;
-    }
-    close(fd);
-    if (strstr(state, "open"))
-	ret = LID_OPEN;
-    else if (strstr(state, "closed"))
-	ret = LID_CLOSE;
-    else /* "unsupported" */
-	ret = LID_UNKNOWN;
+	if (strstr(state, "open"))
+		ret = LID_OPEN;
+	else if (strstr(state, "closed"))
+		ret = LID_CLOSE;
+	else			/* "unsupported" */
+		ret = LID_UNKNOWN;
 
 out:
-    return ret;
+	return ret;
 }
 
 int main(int argc, char **argv)
 {
-    I830Rec i830;
-    I830Ptr pI830 = &i830;
-    int swf14, acpi_lid;
-
-    intel_i830rec_init(pI830);
-
-    while (1) {
-	swf14 = INREG(SWF14);
-
-	printf("Intel LVDS Lid status:\n");
-	printf("\tSWF14(0x%x) : %s\n", swf14, swf14 & SWF14_LID_SWITCH_EN ? "close" : "open");
-
-	acpi_lid = i830_lvds_acpi_lid_state();
-	switch (acpi_lid) {
-	    case LID_UNKNOWN:
-		printf("\tACPI Lid state : unknown\n");
-		break;
-	    case LID_OPEN:
-		printf("\tACPI Lid state : open\n");
-		break;
-	    case LID_CLOSE:
-		printf("\tACPI Lid state : close\n");
-		break;
+	I830Rec i830;
+	I830Ptr pI830 = &i830;
+	int swf14, acpi_lid;
+
+	intel_i830rec_init(pI830);
+
+	while (1) {
+		swf14 = INREG(SWF14);
+
+		printf("Intel LVDS Lid status:\n");
+		printf("\tSWF14(0x%x) : %s\n", swf14,
+		       swf14 & SWF14_LID_SWITCH_EN ? "close" : "open");
+
+		acpi_lid = i830_lvds_acpi_lid_state();
+		switch (acpi_lid) {
+		case LID_UNKNOWN:
+			printf("\tACPI Lid state : unknown\n");
+			break;
+		case LID_OPEN:
+			printf("\tACPI Lid state : open\n");
+			break;
+		case LID_CLOSE:
+			printf("\tACPI Lid state : close\n");
+			break;
+		}
+		sleep(2);
 	}
-	sleep(2);
-    }
-    return 0;
+	return 0;
 }
diff --git a/src/reg_dumper/main.c b/src/reg_dumper/main.c
index ce883ef8..be9554ac 100644
--- a/src/reg_dumper/main.c
+++ b/src/reg_dumper/main.c
@@ -35,73 +35,75 @@
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev;
-    I830Rec i830;
-    ScrnInfoRec scrn;
-    int err, mmio_bar;
-    void *mmio;
-
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
-
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
-
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
-
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
-
-    i830.PciInfo = dev;
-
-    mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
-
-    err = pci_device_map_range (dev,
-				dev->regions[mmio_bar].base_addr,
-				dev->regions[mmio_bar].size, 
-				PCI_DEV_MAP_FLAG_WRITABLE,
-				&mmio);
-    
-    if (err != 0) {
-	fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
-	exit(1);
-    }
-    i830.mmio = mmio;
-
-    scrn.scrnIndex = 0;
-    scrn.pI830 = &i830;
-
-    i830DumpRegs(&scrn);
-
-    return 0;
+	struct pci_device *dev;
+	I830Rec i830;
+	ScrnInfoRec scrn;
+	int err, mmio_bar;
+	void *mmio;
+
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
+
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
+
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
+
+	i830.PciInfo = dev;
+
+	mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
+
+	err = pci_device_map_range(dev,
+				   dev->regions[mmio_bar].base_addr,
+				   dev->regions[mmio_bar].size,
+				   PCI_DEV_MAP_FLAG_WRITABLE, &mmio);
+
+	if (err != 0) {
+		fprintf(stderr, "Couldn't map MMIO region: %s\n",
+			strerror(err));
+		exit(1);
+	}
+	i830.mmio = mmio;
+
+	scrn.scrnIndex = 0;
+	scrn.pI830 = &i830;
+
+	i830DumpRegs(&scrn);
+
+	return 0;
 }
 
 void xf86DrvMsg(int scrnIndex, int severity, const char *format, ...)
 {
-    va_list va;
-
-    switch (severity) {
-    case X_INFO:
-	printf("(II): ");
-	break;
-    case X_WARNING:
-	printf("(WW): ");
-	break;
-    case X_ERROR:
-	printf("(EE): ");
-	break;
-    }
-
-    va_start(va, format);
-    vprintf(format, va);
-    va_end(va);
+	va_list va;
+
+	switch (severity) {
+	case X_INFO:
+		printf("(II): ");
+		break;
+	case X_WARNING:
+		printf("(WW): ");
+		break;
+	case X_ERROR:
+		printf("(EE): ");
+		break;
+	}
+
+	va_start(va, format);
+	vprintf(format, va);
+	va_end(va);
 }
diff --git a/src/reg_dumper/reg_dumper.h b/src/reg_dumper/reg_dumper.h
index 8c2eb0bb..15079372 100644
--- a/src/reg_dumper/reg_dumper.h
+++ b/src/reg_dumper/reg_dumper.h
@@ -47,20 +47,20 @@ typedef char Bool;
 #define X_ERROR 2
 
 typedef struct _i830 {
-    /* Fields in common with the real pI830 */
-    struct pci_device *PciInfo;
-    Bool use_drm_mode;
+	/* Fields in common with the real pI830 */
+	struct pci_device *PciInfo;
+	Bool use_drm_mode;
 
-    /* Fields used for setting up reg_dumper */
-    volatile unsigned char *mmio;
+	/* Fields used for setting up reg_dumper */
+	volatile unsigned char *mmio;
 } I830Rec, *I830Ptr;
 
 typedef struct _scrn {
-    /* Fields in common with the real pScrn */
-    int scrnIndex;
+	/* Fields in common with the real pScrn */
+	int scrnIndex;
 
-    /* Fields used for setting up reg_dumper */
-    I830Ptr pI830;
+	/* Fields used for setting up reg_dumper */
+	I830Ptr pI830;
 } ScrnInfoRec, *ScrnInfoPtr;
 
 #define I830PTR(pScrn) (pScrn->pI830)
diff --git a/src/reg_dumper/statuspage.c b/src/reg_dumper/statuspage.c
index f439a960..84bffa13 100644
--- a/src/reg_dumper/statuspage.c
+++ b/src/reg_dumper/statuspage.c
@@ -44,41 +44,41 @@
 
 int main(int argc, char **argv)
 {
-    I830Rec i830;
-    I830Ptr pI830 = &i830;
-    int devmem;
-    uint32_t hws_offset;
-    volatile uint32_t *hws;
+	I830Rec i830;
+	I830Ptr pI830 = &i830;
+	int devmem;
+	uint32_t hws_offset;
+	volatile uint32_t *hws;
 
-    intel_i830rec_init(pI830);
+	intel_i830rec_init(pI830);
 
-    if (HWS_NEED_GFX(pI830))
-	errx(1, "status page in graphics virtual unsupported.\n");
+	if (HWS_NEED_GFX(pI830))
+		errx(1, "status page in graphics virtual unsupported.\n");
 
-    hws_offset = INREG(HWS_PGA);
+	hws_offset = INREG(HWS_PGA);
 
-    devmem = open("/dev/mem", O_RDWR, 0);
-    if (devmem == -1)
-	err(1, "Couldn't open /dev/mem");
+	devmem = open("/dev/mem", O_RDWR, 0);
+	if (devmem == -1)
+		err(1, "Couldn't open /dev/mem");
 
-    hws = mmap(NULL, 4096, PROT_READ, MAP_SHARED, devmem, hws_offset);
-    if (hws == MAP_FAILED)
-	err(1, "Couldn't map /dev/mem at 0x%08x", hws_offset);
+	hws = mmap(NULL, 4096, PROT_READ, MAP_SHARED, devmem, hws_offset);
+	if (hws == MAP_FAILED)
+		err(1, "Couldn't map /dev/mem at 0x%08x", hws_offset);
 
-    close(devmem);
+	close(devmem);
 
-    for (;;) {
-	int i;
+	for (;;) {
+		int i;
 
-	printf("\n");
+		printf("\n");
 
-	for (i = 0; i < 64; i += 4) {
-	    printf("0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4,
-		   hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
-	}
+		for (i = 0; i < 64; i += 4) {
+			printf("0x%04x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4,
+			       hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
+		}
 
-	sleep(1);
-    }
+		sleep(1);
+	}
 
-    return 0;
+	return 0;
 }
diff --git a/src/reg_dumper/stepping.c b/src/reg_dumper/stepping.c
index dd0cb427..ffc0fc20 100644
--- a/src/reg_dumper/stepping.c
+++ b/src/reg_dumper/stepping.c
@@ -35,103 +35,103 @@
 
 int main(int argc, char **argv)
 {
-    struct pci_device *dev, *bridge;
-    int err;
-    uint8_t stepping;
-    char *step_desc = "??";
+	struct pci_device *dev, *bridge;
+	int err;
+	uint8_t stepping;
+	char *step_desc = "??";
 
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
 
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
 
-    bridge = pci_device_find_by_slot(0, 0, 0, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't bridge");
+	bridge = pci_device_find_by_slot(0, 0, 0, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't bridge");
 
-    err = pci_device_cfg_read_u8(bridge, &stepping, 8);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't read revision ID: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_device_cfg_read_u8(bridge, &stepping, 8);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't read revision ID: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    switch (dev->device_id) {
-    case PCI_CHIP_I915_G:
-	if (stepping < 0x04)
-	    step_desc = "<B1";
-	else if (stepping == 0x04)
-	    step_desc = "B1";
-	else if (stepping == 0x0e)
-	    step_desc = "C2";
-	else if (stepping > 0x0e)
-	    step_desc = ">C2";
-	else
-	    step_desc = ">B1 <C2";
-	break;
-    case PCI_CHIP_I915_GM:
-	if (stepping < 0x03)
-	    step_desc = "<B1";
-	else if (stepping == 0x03)
-	    step_desc = "B1/C0";
-	else if (stepping == 0x04)
-	    step_desc = "C1/C2";
-	else
-	    step_desc = ">C2";
-	break;
-    case PCI_CHIP_I945_GM:
-	if (stepping < 0x03)
-	    step_desc = "<A3";
-	else if (stepping == 0x03)
-	    step_desc = "A3";
-	else
-	    step_desc = ">A3";
-	break;
-    case PCI_CHIP_I965_G:
-    case PCI_CHIP_I965_Q:
-	if (stepping < 0x02)
-	    step_desc = "<C1";
-	else if (stepping == 0x02)
-	    step_desc = "C1/C2";
-	else
-	    step_desc = ">C2";
-	break;
-    case PCI_CHIP_I965_GM:
-	if (stepping < 0x03)
-	    step_desc = "<C0";
-	else if (stepping == 0x03)
-	    step_desc = "C0";
-	else
-	    step_desc = ">C0";
-	break;
-    case PCI_CHIP_G35_G:
-	if (stepping < 0x03)
-	    step_desc = "<E0";
-	else if (stepping == 0x03)
-	    step_desc = "E0";
-	else
-	    step_desc = ">E0";
-	break;
-    }
+	switch (dev->device_id) {
+	case PCI_CHIP_I915_G:
+		if (stepping < 0x04)
+			step_desc = "<B1";
+		else if (stepping == 0x04)
+			step_desc = "B1";
+		else if (stepping == 0x0e)
+			step_desc = "C2";
+		else if (stepping > 0x0e)
+			step_desc = ">C2";
+		else
+			step_desc = ">B1 <C2";
+		break;
+	case PCI_CHIP_I915_GM:
+		if (stepping < 0x03)
+			step_desc = "<B1";
+		else if (stepping == 0x03)
+			step_desc = "B1/C0";
+		else if (stepping == 0x04)
+			step_desc = "C1/C2";
+		else
+			step_desc = ">C2";
+		break;
+	case PCI_CHIP_I945_GM:
+		if (stepping < 0x03)
+			step_desc = "<A3";
+		else if (stepping == 0x03)
+			step_desc = "A3";
+		else
+			step_desc = ">A3";
+		break;
+	case PCI_CHIP_I965_G:
+	case PCI_CHIP_I965_Q:
+		if (stepping < 0x02)
+			step_desc = "<C1";
+		else if (stepping == 0x02)
+			step_desc = "C1/C2";
+		else
+			step_desc = ">C2";
+		break;
+	case PCI_CHIP_I965_GM:
+		if (stepping < 0x03)
+			step_desc = "<C0";
+		else if (stepping == 0x03)
+			step_desc = "C0";
+		else
+			step_desc = ">C0";
+		break;
+	case PCI_CHIP_G35_G:
+		if (stepping < 0x03)
+			step_desc = "<E0";
+		else if (stepping == 0x03)
+			step_desc = "E0";
+		else
+			step_desc = ">E0";
+		break;
+	}
 
-    printf("Vendor: 0x%04x, Device: 0x%04x, Revision: 0x%02x (%s)\n",
-	   dev->vendor_id,
-	   dev->device_id,
-	   stepping,
-	   step_desc);
-    return 0;
+	printf("Vendor: 0x%04x, Device: 0x%04x, Revision: 0x%02x (%s)\n",
+	       dev->vendor_id, dev->device_id, stepping, step_desc);
+	return 0;
 }
diff --git a/src/reg_dumper/util.c b/src/reg_dumper/util.c
index 4d6380e9..61210f67 100644
--- a/src/reg_dumper/util.c
+++ b/src/reg_dumper/util.c
@@ -41,43 +41,45 @@
  */
 void intel_i830rec_init(I830Ptr pI830)
 {
-    struct pci_device *dev;
-    int err, mmio_bar;
-    void *mmio;
+	struct pci_device *dev;
+	int err, mmio_bar;
+	void *mmio;
 
-    err = pci_system_init();
-    if (err != 0) {
-	fprintf(stderr, "Couldn't initialize PCI system: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_system_init();
+	if (err != 0) {
+		fprintf(stderr, "Couldn't initialize PCI system: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    /* Grab the graphics card */
-    dev = pci_device_find_by_slot(0, 0, 2, 0);
-    if (dev == NULL)
-	errx(1, "Couldn't find graphics card");
+	/* Grab the graphics card */
+	dev = pci_device_find_by_slot(0, 0, 2, 0);
+	if (dev == NULL)
+		errx(1, "Couldn't find graphics card");
 
-    err = pci_device_probe(dev);
-    if (err != 0) {
-	fprintf(stderr, "Couldn't probe graphics card: %s\n", strerror(err));
-	exit(1);
-    }
+	err = pci_device_probe(dev);
+	if (err != 0) {
+		fprintf(stderr, "Couldn't probe graphics card: %s\n",
+			strerror(err));
+		exit(1);
+	}
 
-    if (dev->vendor_id != 0x8086)
-	errx(1, "Graphics card is non-intel");
+	if (dev->vendor_id != 0x8086)
+		errx(1, "Graphics card is non-intel");
 
-    pI830->PciInfo = dev;
+	pI830->PciInfo = dev;
 
-    mmio_bar = IS_I9XX(pI830) ? 0 : 1;
+	mmio_bar = IS_I9XX(pI830) ? 0 : 1;
 
-    err = pci_device_map_range (dev,
-				dev->regions[mmio_bar].base_addr,
-				dev->regions[mmio_bar].size,
-				PCI_DEV_MAP_FLAG_WRITABLE,
-				&mmio);
+	err = pci_device_map_range(dev,
+				   dev->regions[mmio_bar].base_addr,
+				   dev->regions[mmio_bar].size,
+				   PCI_DEV_MAP_FLAG_WRITABLE, &mmio);
 
-    if (err != 0) {
-	fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
-	exit(1);
-    }
-    pI830->mmio = mmio;
+	if (err != 0) {
+		fprintf(stderr, "Couldn't map MMIO region: %s\n",
+			strerror(err));
+		exit(1);
+	}
+	pI830->mmio = mmio;
 }
diff --git a/src/reg_dumper/xprintf.c b/src/reg_dumper/xprintf.c
index 125ae870..7b8ac997 100644
--- a/src/reg_dumper/xprintf.c
+++ b/src/reg_dumper/xprintf.c
@@ -28,33 +28,31 @@
 #include <stdarg.h>
 #include "reg_dumper.h"
 
-static char *
-XNFvprintf(const char *format, va_list va)
+static char *XNFvprintf(const char *format, va_list va)
 {
-    char *ret;
-    int size;
-    va_list va2;
+	char *ret;
+	int size;
+	va_list va2;
 
-    va_copy(va2, va);
-    size = vsnprintf(NULL, 0, format, va2);
-    va_end(va2);
+	va_copy(va2, va);
+	size = vsnprintf(NULL, 0, format, va2);
+	va_end(va2);
 
-    ret = (char *)malloc(size + 1);
-    if (ret == NULL)
-        return NULL;
+	ret = (char *)malloc(size + 1);
+	if (ret == NULL)
+		return NULL;
 
-    vsnprintf(ret, size + 1, format, va);
-    ret[size] = 0;
-    return ret;
+	vsnprintf(ret, size + 1, format, va);
+	ret[size] = 0;
+	return ret;
 }
 
-char *
-XNFprintf(const char *format, ...)
+char *XNFprintf(const char *format, ...)
 {
-    char *ret;
-    va_list va;
-    va_start(va, format);
-    ret = XNFvprintf(format, va);
-    va_end(va);
-    return ret;
+	char *ret;
+	va_list va;
+	va_start(va, format);
+	ret = XNFvprintf(format, va);
+	va_end(va);
+	return ret;
 }
diff --git a/src/xvmc/dri2.c b/src/xvmc/dri2.c
index f967432b..1ba94823 100644
--- a/src/xvmc/dri2.c
+++ b/src/xvmc/dri2.c
@@ -30,7 +30,6 @@
  *   Kristian Høgsberg (krh@redhat.com)
  */
 
-
 #define NEED_REPLIES
 #include <X11/Xlibint.h>
 #include <X11/extensions/Xext.h>
@@ -41,261 +40,259 @@
 
 static char dri2ExtensionName[] = DRI2_NAME;
 static XExtensionInfo *dri2Info;
-static XEXT_GENERATE_CLOSE_DISPLAY (DRI2CloseDisplay, dri2Info)
+static XEXT_GENERATE_CLOSE_DISPLAY(DRI2CloseDisplay, dri2Info)
 static /* const */ XExtensionHooks dri2ExtensionHooks = {
-    NULL,				/* create_gc */
-    NULL,				/* copy_gc */
-    NULL,				/* flush_gc */
-    NULL,				/* free_gc */
-    NULL,				/* create_font */
-    NULL,				/* free_font */
-    DRI2CloseDisplay,			/* close_display */
-    NULL,				/* wire_to_event */
-    NULL,				/* event_to_wire */
-    NULL,				/* error */
-    NULL,				/* error_string */
+	NULL,			/* create_gc */
+	NULL,			/* copy_gc */
+	NULL,			/* flush_gc */
+	NULL,			/* free_gc */
+	NULL,			/* create_font */
+	NULL,			/* free_font */
+	DRI2CloseDisplay,	/* close_display */
+	NULL,			/* wire_to_event */
+	NULL,			/* event_to_wire */
+	NULL,			/* error */
+	NULL,			/* error_string */
 };
 
-static XEXT_GENERATE_FIND_DISPLAY (DRI2FindDisplay, dri2Info, 
-				   dri2ExtensionName, 
-				   &dri2ExtensionHooks, 
-				   0, NULL)
+static XEXT_GENERATE_FIND_DISPLAY(DRI2FindDisplay, dri2Info,
+				  dri2ExtensionName,
+				  &dri2ExtensionHooks, 0, NULL)
 
-Bool DRI2QueryExtension(Display *dpy, int *eventBase, int *errorBase)
+Bool DRI2QueryExtension(Display * dpy, int *eventBase, int *errorBase)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
 
-    if (XextHasExtension(info)) {
-	*eventBase = info->codes->first_event;
-	*errorBase = info->codes->first_error;
-	return True;
-    }
+	if (XextHasExtension(info)) {
+		*eventBase = info->codes->first_event;
+		*errorBase = info->codes->first_error;
+		return True;
+	}
 
-    return False;
+	return False;
 }
 
-Bool DRI2QueryVersion(Display *dpy, int *major, int *minor)
+Bool DRI2QueryVersion(Display * dpy, int *major, int *minor)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay (dpy);
-    xDRI2QueryVersionReply rep;
-    xDRI2QueryVersionReq *req;
-
-    XextCheckExtension (dpy, info, dri2ExtensionName, False);
-
-    LockDisplay(dpy);
-    GetReq(DRI2QueryVersion, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2QueryVersion;
-    req->majorVersion = DRI2_MAJOR;
-    req->minorVersion = DRI2_MINOR;
-    if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) {
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2QueryVersionReply rep;
+	xDRI2QueryVersionReq *req;
+
+	XextCheckExtension(dpy, info, dri2ExtensionName, False);
+
+	LockDisplay(dpy);
+	GetReq(DRI2QueryVersion, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2QueryVersion;
+	req->majorVersion = DRI2_MAJOR;
+	req->minorVersion = DRI2_MINOR;
+	if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) {
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
+	*major = rep.majorVersion;
+	*minor = rep.minorVersion;
 	UnlockDisplay(dpy);
 	SyncHandle();
-	return False;
-    }
-    *major = rep.majorVersion;
-    *minor = rep.minorVersion;
-    UnlockDisplay(dpy);
-    SyncHandle();
 
-    return True;
+	return True;
 }
 
-Bool DRI2Connect(Display *dpy, XID window,
+Bool DRI2Connect(Display * dpy, XID window,
 		 char **driverName, char **deviceName)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2ConnectReply rep;
-    xDRI2ConnectReq *req;
-
-    XextCheckExtension (dpy, info, dri2ExtensionName, False);
-
-    LockDisplay(dpy);
-    GetReq(DRI2Connect, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2Connect;
-    req->window = window;
-    req->driverType = DRI2DriverDRI;
-    if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) {
-	UnlockDisplay(dpy);
-	SyncHandle();
-	return False;
-    }
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2ConnectReply rep;
+	xDRI2ConnectReq *req;
+
+	XextCheckExtension(dpy, info, dri2ExtensionName, False);
+
+	LockDisplay(dpy);
+	GetReq(DRI2Connect, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2Connect;
+	req->window = window;
+	req->driverType = DRI2DriverDRI;
+	if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) {
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
+
+	if (rep.driverNameLength == 0 && rep.deviceNameLength == 0) {
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
+
+	*driverName = Xmalloc(rep.driverNameLength + 1);
+	if (*driverName == NULL) {
+		_XEatData(dpy,
+			  ((rep.driverNameLength + 3) & ~3) +
+			  ((rep.deviceNameLength + 3) & ~3));
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
+	_XReadPad(dpy, *driverName, rep.driverNameLength);
+	(*driverName)[rep.driverNameLength] = '\0';
+
+	*deviceName = Xmalloc(rep.deviceNameLength + 1);
+	if (*deviceName == NULL) {
+		Xfree(*driverName);
+		_XEatData(dpy, ((rep.deviceNameLength + 3) & ~3));
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
+	_XReadPad(dpy, *deviceName, rep.deviceNameLength);
+	(*deviceName)[rep.deviceNameLength] = '\0';
 
-    if (rep.driverNameLength == 0 && rep.deviceNameLength == 0) {
 	UnlockDisplay(dpy);
 	SyncHandle();
-	return False;
-    }
-
-    *driverName = Xmalloc(rep.driverNameLength + 1);
-    if (*driverName == NULL) {
-	_XEatData(dpy, 
-		  ((rep.driverNameLength + 3) & ~3) +
-		  ((rep.deviceNameLength + 3) & ~3));
-	UnlockDisplay(dpy);
-	SyncHandle();
-	return False;
-    }
-    _XReadPad(dpy, *driverName, rep.driverNameLength);
-    (*driverName)[rep.driverNameLength] = '\0';
-
-    *deviceName = Xmalloc(rep.deviceNameLength + 1);
-    if (*deviceName == NULL) {
-	Xfree(*driverName);
-	_XEatData(dpy, ((rep.deviceNameLength + 3) & ~3));
-	UnlockDisplay(dpy);
-	SyncHandle();
-	return False;
-    }
-    _XReadPad(dpy, *deviceName, rep.deviceNameLength);
-    (*deviceName)[rep.deviceNameLength] = '\0';
-
-    UnlockDisplay(dpy);
-    SyncHandle();
 
-    return True;
+	return True;
 }
 
-Bool DRI2Authenticate(Display *dpy, XID window, drm_magic_t magic)
+Bool DRI2Authenticate(Display * dpy, XID window, drm_magic_t magic)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2AuthenticateReq *req;
-    xDRI2AuthenticateReply rep;
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2AuthenticateReq *req;
+	xDRI2AuthenticateReply rep;
+
+	XextCheckExtension(dpy, info, dri2ExtensionName, False);
 
-    XextCheckExtension (dpy, info, dri2ExtensionName, False);
+	LockDisplay(dpy);
+	GetReq(DRI2Authenticate, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2Authenticate;
+	req->window = window;
+	req->magic = magic;
 
-    LockDisplay(dpy);
-    GetReq(DRI2Authenticate, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2Authenticate;
-    req->window = window;
-    req->magic = magic;
+	if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) {
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return False;
+	}
 
-    if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) {
 	UnlockDisplay(dpy);
 	SyncHandle();
-	return False;
-    }
-
-    UnlockDisplay(dpy);
-    SyncHandle();
 
-    return rep.authenticated;
+	return rep.authenticated;
 }
 
-void DRI2CreateDrawable(Display *dpy, XID drawable)
+void DRI2CreateDrawable(Display * dpy, XID drawable)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2CreateDrawableReq *req;
-
-    XextSimpleCheckExtension (dpy, info, dri2ExtensionName);
-
-    LockDisplay(dpy);
-    GetReq(DRI2CreateDrawable, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2CreateDrawable;
-    req->drawable = drawable;
-    UnlockDisplay(dpy);
-    SyncHandle();
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2CreateDrawableReq *req;
+
+	XextSimpleCheckExtension(dpy, info, dri2ExtensionName);
+
+	LockDisplay(dpy);
+	GetReq(DRI2CreateDrawable, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2CreateDrawable;
+	req->drawable = drawable;
+	UnlockDisplay(dpy);
+	SyncHandle();
 }
 
-void DRI2DestroyDrawable(Display *dpy, XID drawable)
+void DRI2DestroyDrawable(Display * dpy, XID drawable)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2DestroyDrawableReq *req;
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2DestroyDrawableReq *req;
 
-    XextSimpleCheckExtension (dpy, info, dri2ExtensionName);
+	XextSimpleCheckExtension(dpy, info, dri2ExtensionName);
 
-    XSync(dpy, False);
+	XSync(dpy, False);
 
-    LockDisplay(dpy);
-    GetReq(DRI2DestroyDrawable, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2DestroyDrawable;
-    req->drawable = drawable;
-    UnlockDisplay(dpy);
-    SyncHandle();
+	LockDisplay(dpy);
+	GetReq(DRI2DestroyDrawable, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2DestroyDrawable;
+	req->drawable = drawable;
+	UnlockDisplay(dpy);
+	SyncHandle();
 }
 
-DRI2Buffer *DRI2GetBuffers(Display *dpy, XID drawable,
+DRI2Buffer *DRI2GetBuffers(Display * dpy, XID drawable,
 			   int *width, int *height,
-			   unsigned int *attachments, int count,
-			   int *outCount)
+			   unsigned int *attachments, int count, int *outCount)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2GetBuffersReply rep;
-    xDRI2GetBuffersReq *req;
-    DRI2Buffer *buffers;
-    xDRI2Buffer repBuffer;
-    CARD32 *p;
-    int i;
-
-    XextCheckExtension (dpy, info, dri2ExtensionName, False);
-
-    LockDisplay(dpy);
-    GetReqExtra(DRI2GetBuffers, count * 4, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2GetBuffers;
-    req->drawable = drawable;
-    req->count = count;
-    p = (CARD32 *) &req[1];
-    for (i = 0; i < count; i++)
-	p[i] = attachments[i];
-
-    if (!_XReply(dpy, (xReply *)&rep, 0, xFalse)) {
-	UnlockDisplay(dpy);
-	SyncHandle();
-	return NULL;
-    }
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2GetBuffersReply rep;
+	xDRI2GetBuffersReq *req;
+	DRI2Buffer *buffers;
+	xDRI2Buffer repBuffer;
+	CARD32 *p;
+	int i;
+
+	XextCheckExtension(dpy, info, dri2ExtensionName, False);
+
+	LockDisplay(dpy);
+	GetReqExtra(DRI2GetBuffers, count * 4, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2GetBuffers;
+	req->drawable = drawable;
+	req->count = count;
+	p = (CARD32 *) & req[1];
+	for (i = 0; i < count; i++)
+		p[i] = attachments[i];
+
+	if (!_XReply(dpy, (xReply *) & rep, 0, xFalse)) {
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return NULL;
+	}
+
+	*width = rep.width;
+	*height = rep.height;
+	*outCount = rep.count;
+
+	buffers = Xmalloc(rep.count * sizeof buffers[0]);
+	if (buffers == NULL) {
+		_XEatData(dpy, rep.count * sizeof repBuffer);
+		UnlockDisplay(dpy);
+		SyncHandle();
+		return NULL;
+	}
+
+	for (i = 0; i < rep.count; i++) {
+		_XReadPad(dpy, (char *)&repBuffer, sizeof repBuffer);
+		buffers[i].attachment = repBuffer.attachment;
+		buffers[i].name = repBuffer.name;
+		buffers[i].pitch = repBuffer.pitch;
+		buffers[i].cpp = repBuffer.cpp;
+		buffers[i].flags = repBuffer.flags;
+	}
 
-    *width = rep.width;
-    *height = rep.height;
-    *outCount = rep.count;
-
-    buffers = Xmalloc(rep.count * sizeof buffers[0]);
-    if (buffers == NULL) {
-	_XEatData(dpy, rep.count * sizeof repBuffer);
 	UnlockDisplay(dpy);
 	SyncHandle();
-	return NULL;
-    }
-
-    for (i = 0; i < rep.count; i++) {
-	_XReadPad(dpy, (char *) &repBuffer, sizeof repBuffer);
-	buffers[i].attachment = repBuffer.attachment;
-	buffers[i].name = repBuffer.name;
-	buffers[i].pitch = repBuffer.pitch;
-	buffers[i].cpp = repBuffer.cpp;
-	buffers[i].flags = repBuffer.flags;
-    }
-
-    UnlockDisplay(dpy);
-    SyncHandle();
-
-    return buffers;
+
+	return buffers;
 }
 
-void DRI2CopyRegion(Display *dpy, XID drawable, XserverRegion region,
+void DRI2CopyRegion(Display * dpy, XID drawable, XserverRegion region,
 		    CARD32 dest, CARD32 src)
 {
-    XExtDisplayInfo *info = DRI2FindDisplay(dpy);
-    xDRI2CopyRegionReq *req;
-    xDRI2CopyRegionReply rep;
+	XExtDisplayInfo *info = DRI2FindDisplay(dpy);
+	xDRI2CopyRegionReq *req;
+	xDRI2CopyRegionReply rep;
 
-    XextSimpleCheckExtension (dpy, info, dri2ExtensionName);
+	XextSimpleCheckExtension(dpy, info, dri2ExtensionName);
 
-    LockDisplay(dpy);
-    GetReq(DRI2CopyRegion, req);
-    req->reqType = info->codes->major_opcode;
-    req->dri2ReqType = X_DRI2CopyRegion;
-    req->drawable = drawable;
-    req->region = region;
-    req->dest = dest;
-    req->src = src;
+	LockDisplay(dpy);
+	GetReq(DRI2CopyRegion, req);
+	req->reqType = info->codes->major_opcode;
+	req->dri2ReqType = X_DRI2CopyRegion;
+	req->drawable = drawable;
+	req->region = region;
+	req->dest = dest;
+	req->src = src;
 
-    _XReply(dpy, (xReply *)&rep, 0, xFalse);
+	_XReply(dpy, (xReply *) & rep, 0, xFalse);
 
-    UnlockDisplay(dpy);
-    SyncHandle();
+	UnlockDisplay(dpy);
+	SyncHandle();
 }
diff --git a/src/xvmc/dri2.h b/src/xvmc/dri2.h
index 356c6bcb..ac6ce58d 100644
--- a/src/xvmc/dri2.h
+++ b/src/xvmc/dri2.h
@@ -37,34 +37,29 @@
 #include <X11/extensions/dri2tokens.h>
 
 typedef struct {
-    unsigned int attachment;
-    unsigned int name;
-    unsigned int pitch;
-    unsigned int cpp;
-    unsigned int flags;
+	unsigned int attachment;
+	unsigned int name;
+	unsigned int pitch;
+	unsigned int cpp;
+	unsigned int flags;
 } DRI2Buffer;
 
 extern Bool
-DRI2QueryExtension(Display *display, int *eventBase, int *errorBase);
+DRI2QueryExtension(Display * display, int *eventBase, int *errorBase);
+extern Bool DRI2QueryVersion(Display * display, int *major, int *minor);
 extern Bool
-DRI2QueryVersion(Display *display, int *major, int *minor);
-extern Bool
-DRI2Connect(Display *display, XID window,
+DRI2Connect(Display * display, XID window,
 	    char **driverName, char **deviceName);
-extern Bool
-DRI2Authenticate(Display *display, XID window, drm_magic_t magic);
-extern void
-DRI2CreateDrawable(Display *display, XID drawable);
-extern void
-DRI2DestroyDrawable(Display *display, XID handle);
-extern DRI2Buffer *
-DRI2GetBuffers(Display *dpy, XID drawable,
-	       int *width, int *height,
-	       unsigned int *attachments, int count,
-	       int *outCount);
+extern Bool DRI2Authenticate(Display * display, XID window, drm_magic_t magic);
+extern void DRI2CreateDrawable(Display * display, XID drawable);
+extern void DRI2DestroyDrawable(Display * display, XID handle);
+extern DRI2Buffer *DRI2GetBuffers(Display * dpy, XID drawable,
+				  int *width, int *height,
+				  unsigned int *attachments, int count,
+				  int *outCount);
 
 extern void
-DRI2CopyRegion(Display *dpy, XID drawable, XserverRegion region,
+DRI2CopyRegion(Display * dpy, XID drawable, XserverRegion region,
 	       CARD32 dest, CARD32 src);
 
 #endif
diff --git a/src/xvmc/i915_program.h b/src/xvmc/i915_program.h
index 82c920e0..da315437 100644
--- a/src/xvmc/i915_program.h
+++ b/src/xvmc/i915_program.h
@@ -1,33 +1,33 @@
 #ifndef _I915_PROGRAM_H
 #define _I915_PROGRAM_H
 
-#define REG_TYPE_R                 0    /* temporary regs, no need to
-                                         * dcl, must be written before
-                                         * read -- Preserved between
-                                         * phases.
-                                         */
-#define REG_TYPE_T                 1    /* Interpolated values, must be
-                                         * dcl'ed before use.
-                                         *
-                                         * 0..7: texture coord,
-                                         * 8: diffuse spec,
-                                         * 9: specular color,
-                                         * 10: fog parameter in w.
-                                         */
-#define REG_TYPE_CONST             2    /* Restriction: only one const
-                                         * can be referenced per
-                                         * instruction, though it may be
-                                         * selected for multiple inputs.
-                                         * Constants not initialized
-                                         * default to zero.
-                                         */
-#define REG_TYPE_S                 3    /* sampler */
-#define REG_TYPE_OC                4    /* output color (rgba) */
-#define REG_TYPE_OD                5    /* output depth (w), xyz are
-                                         * temporaries.  If not written,
-                                         * interpolated depth is used?
-                                         */
-#define REG_TYPE_U                 6    /* unpreserved temporaries */
+#define REG_TYPE_R                 0	/* temporary regs, no need to
+					 * dcl, must be written before
+					 * read -- Preserved between
+					 * phases.
+					 */
+#define REG_TYPE_T                 1	/* Interpolated values, must be
+					 * dcl'ed before use.
+					 *
+					 * 0..7: texture coord,
+					 * 8: diffuse spec,
+					 * 9: specular color,
+					 * 10: fog parameter in w.
+					 */
+#define REG_TYPE_CONST             2	/* Restriction: only one const
+					 * can be referenced per
+					 * instruction, though it may be
+					 * selected for multiple inputs.
+					 * Constants not initialized
+					 * default to zero.
+					 */
+#define REG_TYPE_S                 3	/* sampler */
+#define REG_TYPE_OC                4	/* output color (rgba) */
+#define REG_TYPE_OD                5	/* output depth (w), xyz are
+					 * temporaries.  If not written,
+					 * interpolated depth is used?
+					 */
+#define REG_TYPE_U                 6	/* unpreserved temporaries */
 #define REG_TYPE_MASK              0x7
 #define REG_NR_MASK                0xf
 
@@ -43,34 +43,34 @@
 #define T_TEX7     7
 #define T_DIFFUSE  8
 #define T_SPECULAR 9
-#define T_FOG_W    10           /* interpolated fog is in W coord */
+#define T_FOG_W    10		/* interpolated fog is in W coord */
 
 /* Arithmetic instructions */
 
 /* .replicate_swizzle == selection and replication of a particular
  * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww
  */
-#define A0_NOP    (0x0<<24)     /* no operation */
-#define A0_ADD    (0x1<<24)     /* dst = src0 + src1 */
-#define A0_MOV    (0x2<<24)     /* dst = src0 */
-#define A0_MUL    (0x3<<24)     /* dst = src0 * src1 */
-#define A0_MAD    (0x4<<24)     /* dst = src0 * src1 + src2 */
-#define A0_DP2ADD (0x5<<24)     /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
-#define A0_DP3    (0x6<<24)     /* dst.xyzw = src0.xyz dot src1.xyz */
-#define A0_DP4    (0x7<<24)     /* dst.xyzw = src0.xyzw dot src1.xyzw */
-#define A0_FRC    (0x8<<24)     /* dst = src0 - floor(src0) */
-#define A0_RCP    (0x9<<24)     /* dst.xyzw = 1/(src0.replicate_swizzle) */
-#define A0_RSQ    (0xa<<24)     /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
-#define A0_EXP    (0xb<<24)     /* dst.xyzw = exp2(src0.replicate_swizzle) */
-#define A0_LOG    (0xc<<24)     /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
-#define A0_CMP    (0xd<<24)     /* dst = (src0 >= 0.0) ? src1 : src2 */
-#define A0_MIN    (0xe<<24)     /* dst = (src0 < src1) ? src0 : src1 */
-#define A0_MAX    (0xf<<24)     /* dst = (src0 >= src1) ? src0 : src1 */
-#define A0_FLR    (0x10<<24)    /* dst = floor(src0) */
-#define A0_MOD    (0x11<<24)    /* dst = src0 fmod 1.0 */
-#define A0_TRC    (0x12<<24)    /* dst = int(src0) */
-#define A0_SGE    (0x13<<24)    /* dst = src0 >= src1 ? 1.0 : 0.0 */
-#define A0_SLT    (0x14<<24)    /* dst = src0 < src1 ? 1.0 : 0.0 */
+#define A0_NOP    (0x0<<24)	/* no operation */
+#define A0_ADD    (0x1<<24)	/* dst = src0 + src1 */
+#define A0_MOV    (0x2<<24)	/* dst = src0 */
+#define A0_MUL    (0x3<<24)	/* dst = src0 * src1 */
+#define A0_MAD    (0x4<<24)	/* dst = src0 * src1 + src2 */
+#define A0_DP2ADD (0x5<<24)	/* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */
+#define A0_DP3    (0x6<<24)	/* dst.xyzw = src0.xyz dot src1.xyz */
+#define A0_DP4    (0x7<<24)	/* dst.xyzw = src0.xyzw dot src1.xyzw */
+#define A0_FRC    (0x8<<24)	/* dst = src0 - floor(src0) */
+#define A0_RCP    (0x9<<24)	/* dst.xyzw = 1/(src0.replicate_swizzle) */
+#define A0_RSQ    (0xa<<24)	/* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */
+#define A0_EXP    (0xb<<24)	/* dst.xyzw = exp2(src0.replicate_swizzle) */
+#define A0_LOG    (0xc<<24)	/* dst.xyzw = log2(abs(src0.replicate_swizzle)) */
+#define A0_CMP    (0xd<<24)	/* dst = (src0 >= 0.0) ? src1 : src2 */
+#define A0_MIN    (0xe<<24)	/* dst = (src0 < src1) ? src0 : src1 */
+#define A0_MAX    (0xf<<24)	/* dst = (src0 >= src1) ? src0 : src1 */
+#define A0_FLR    (0x10<<24)	/* dst = floor(src0) */
+#define A0_MOD    (0x11<<24)	/* dst = src0 fmod 1.0 */
+#define A0_TRC    (0x12<<24)	/* dst = int(src0) */
+#define A0_SGE    (0x13<<24)	/* dst = src0 >= src1 ? 1.0 : 0.0 */
+#define A0_SLT    (0x14<<24)	/* dst = src0 < src1 ? 1.0 : 0.0 */
 #define A0_DEST_SATURATE                 (1<<22)
 #define A0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
@@ -126,9 +126,9 @@
 #define A2_SRC2_CHANNEL_W_SHIFT          0
 
 /* Declaration instructions */
-#define D0_DCL       (0x19<<24) /* Declare a t (interpolated attrib)
-                                 * register or an s (sampler)
-                                 * register. */
+#define D0_DCL       (0x19<<24)	/* Declare a t (interpolated attrib)
+				 * register or an s (sampler)
+				 * register. */
 #define D0_SAMPLE_TYPE_SHIFT              22
 #define D0_SAMPLE_TYPE_2D                 (0x0<<22)
 #define D0_SAMPLE_TYPE_CUBE               (0x1<<22)
@@ -160,23 +160,23 @@
 #define D2_MBZ                          0
 
 /* Texture instructions */
-#define T0_TEXLD     (0x15<<24) /* Sample texture using predeclared
-                                 * sampler and address, and output
-                                 * filtered texel data to destination
-                                 * register */
-#define T0_TEXLDP    (0x16<<24) /* Same as texld but performs a
-                                 * perspective divide of the texture
-                                 * coordinate .xyz values by .w before
-                                 * sampling. */
-#define T0_TEXLDB    (0x17<<24) /* Same as texld but biases the
-                                 * computed LOD by w.  Only S4.6 two's
-                                 * comp is used.  This implies that a
-                                 * float to fixed conversion is
-                                 * done. */
-#define T0_TEXKILL   (0x18<<24) /* Does not perform a sampling
-                                 * operation.  Simply kills the pixel
-                                 * if any channel of the address
-                                 * register is < 0.0. */
+#define T0_TEXLD     (0x15<<24)	/* Sample texture using predeclared
+				 * sampler and address, and output
+				 * filtered texel data to destination
+				 * register */
+#define T0_TEXLDP    (0x16<<24)	/* Same as texld but performs a
+				 * perspective divide of the texture
+				 * coordinate .xyz values by .w before
+				 * sampling. */
+#define T0_TEXLDB    (0x17<<24)	/* Same as texld but biases the
+				 * computed LOD by w.  Only S4.6 two's
+				 * comp is used.  This implies that a
+				 * float to fixed conversion is
+				 * done. */
+#define T0_TEXKILL   (0x18<<24)	/* Does not perform a sampling
+				 * operation.  Simply kills the pixel
+				 * if any channel of the address
+				 * register is < 0.0. */
 #define T0_DEST_TYPE_SHIFT                19
 /* Allow: R, OC, OD, U */
 /* Note: U (unpreserved) regs do not retain their values between
@@ -188,15 +188,14 @@
  */
 #define T0_DEST_NR_SHIFT                 14
 /* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */
-#define T0_SAMPLER_NR_SHIFT              0      /* This field ignored for TEXKILL */
+#define T0_SAMPLER_NR_SHIFT              0	/* This field ignored for TEXKILL */
 #define T0_SAMPLER_NR_MASK               (0xf<<0)
 
-#define T1_ADDRESS_REG_TYPE_SHIFT        24     /* Reg to use as texture coord */
+#define T1_ADDRESS_REG_TYPE_SHIFT        24	/* Reg to use as texture coord */
 /* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */
 #define T1_ADDRESS_REG_NR_SHIFT          17
 #define T2_MBZ                           0
 
-
 /* Having zero and one in here makes the definition of swizzle a lot
  * easier.
  */
@@ -215,7 +214,7 @@
 #define UREG_CHANNEL_ONE_NEGATE_MBZ   1
 #define UREG_CHANNEL_ONE_SHIFT        0
 
-#define UREG_BAD          0xffffffff    /* not a valid ureg */
+#define UREG_BAD          0xffffffff	/* not a valid ureg */
 
 #define X    SRC_X
 #define Y    SRC_Y
@@ -258,7 +257,6 @@
 #define T1_ADDRESS_REG( reg ) ((GET_UREG_NR(reg) << T1_ADDRESS_REG_NR_SHIFT) | \
                                (GET_UREG_TYPE(reg) << T1_ADDRESS_REG_TYPE_SHIFT))
 
-
 /* Macros for translating UREG's into the various register fields used
  * by the I915 programmable unit.
  */
diff --git a/src/xvmc/i915_structs.h b/src/xvmc/i915_structs.h
index b5185cb7..f9e67477 100644
--- a/src/xvmc/i915_structs.h
+++ b/src/xvmc/i915_structs.h
@@ -35,53 +35,51 @@
 
 #define OPC_MI_FLUSH                            (0x04)
 
-struct i915_mi_flush
-{
-    struct {
-        unsigned map_cache_invalidate : 1;
-        unsigned pad0 : 1;
-        unsigned render_cache_flush_inhibit : 1;
-        unsigned scene_count : 1;
-        unsigned end_scene : 1;
-        unsigned pad1 : 18;
-        unsigned opcode : 6;
-        unsigned type : 3;
-    } dw0;
+struct i915_mi_flush {
+	struct {
+		unsigned map_cache_invalidate:1;
+		unsigned pad0:1;
+		unsigned render_cache_flush_inhibit:1;
+		unsigned scene_count:1;
+		unsigned end_scene:1;
+		unsigned pad1:18;
+		unsigned opcode:6;
+		unsigned type:3;
+	} dw0;
 };
 
 /* BLT */
 #define CMD_2D          0x02
 #define OPC_COLOR_BLT                           (0x40)
 
-struct i915_color_blt
-{
-    struct {
-        unsigned length : 5;
-        unsigned pad0 : 15;
-        unsigned bpp_mask : 2;
-        unsigned opcode : 7;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned pitch : 16;
-        unsigned rop : 8;
-        unsigned color_depth : 2;
-        unsigned pad0 : 6;
-    } dw1;
-
-    struct {
-        unsigned width : 16;
-        unsigned height : 16;
-    } dw2;
-
-    struct {
-        unsigned address;
-    } dw3;
-
-    struct {
-        unsigned pattern;
-    } dw4;
+struct i915_color_blt {
+	struct {
+		unsigned length:5;
+		unsigned pad0:15;
+		unsigned bpp_mask:2;
+		unsigned opcode:7;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned pitch:16;
+		unsigned rop:8;
+		unsigned color_depth:2;
+		unsigned pad0:6;
+	} dw1;
+
+	struct {
+		unsigned width:16;
+		unsigned height:16;
+	} dw2;
+
+	struct {
+		unsigned address;
+	} dw3;
+
+	struct {
+		unsigned pattern;
+	} dw4;
 };
 
 /* 3D_INSTRUCTION */
@@ -89,7 +87,7 @@ struct i915_color_blt
 
 #define OPC_3DMPEG_MACROBLOCK_IPICTURE          (0x01 + (0x1e << 5))
 #define OPC_3DMPEG_SET_ORIGIN                   (0x10 + (0x1e << 5))
-#define OPC_3DMPEG_MACROBLOCK                   (0x11 + (0x1e << 5))        
+#define OPC_3DMPEG_MACROBLOCK                   (0x11 + (0x1e << 5))
 #define OPC_3DMPEG_SLICE                        (0x12 + (0x1e << 5))
 #define OPC_3DMPEG_QM_PALETTE_LOAD              (0x13 + (0x1e << 5))
 
@@ -115,129 +113,119 @@ struct i915_color_blt
 /*
  * 3DMPEG instructions
  */
-struct i915_3dmpeg_macroblock_header
-{
-    struct {
-        unsigned length : 19;
-        unsigned opcode : 10;
-        unsigned type : 3;
-    } dw0;
-    
-    struct {
-        unsigned mb_intra : 1;
-        unsigned forward : 1;
-        unsigned backward : 1;
-        unsigned h263_4mv : 1;
-        unsigned pad0 : 1;
-        unsigned dct_type : 1;
-        unsigned pad1 : 2;
-        unsigned motion_type : 2;
-        unsigned pad2 : 2;
-        unsigned vertical_field_select : 4;
-        unsigned coded_block_pattern : 6;
-        unsigned pad3 : 2;
-        unsigned skipped_macroblocks : 7;
-        unsigned pad4 : 1;
-    } dw1;
+struct i915_3dmpeg_macroblock_header {
+	struct {
+		unsigned length:19;
+		unsigned opcode:10;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned mb_intra:1;
+		unsigned forward:1;
+		unsigned backward:1;
+		unsigned h263_4mv:1;
+		unsigned pad0:1;
+		unsigned dct_type:1;
+		unsigned pad1:2;
+		unsigned motion_type:2;
+		unsigned pad2:2;
+		unsigned vertical_field_select:4;
+		unsigned coded_block_pattern:6;
+		unsigned pad3:2;
+		unsigned skipped_macroblocks:7;
+		unsigned pad4:1;
+	} dw1;
+};
+
+struct i915_3dmpeg_macroblock_0mv {
+	struct i915_3dmpeg_macroblock_header header;
+};
+
+struct i915_3dmpeg_macroblock_1fbmv {
+	struct i915_3dmpeg_macroblock_header header;
+	unsigned dw2;
+	unsigned dw3;
+};
+struct i915_3dmpeg_macroblock_2fbmv {
+	struct i915_3dmpeg_macroblock_header header;
+	unsigned dw2;
+	unsigned dw3;
+	unsigned dw4;
+	unsigned dw5;
+};
+
+struct i915_3dmpeg_macroblock_5fmv {
+	struct i915_3dmpeg_macroblock_header header;
+	unsigned dw2;
+	unsigned dw3;
+	unsigned dw4;
+	unsigned dw5;
+	unsigned dw6;
+};
+
+struct i915_3dmpeg_macroblock_ipicture {
+	struct {
+		unsigned pad0:5;
+		unsigned dct_type:1;
+		unsigned pad1:13;
+		unsigned opcode:10;
+		unsigned type:3;
+	} dw0;
+};
+
+struct i915_3dmpeg_set_origin {
+	struct {
+		unsigned length:19;
+		unsigned opcode:10;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned v_origin:7;
+		unsigned pad0:1;
+		unsigned h_origin:7;
+		unsigned pad1:17;
+	} dw1;
+};
+
+struct i915_3dmpeg_slice {
+	struct {
+		unsigned length:19;
+		unsigned opcode:10;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned fst_mb_bit_off:3;
+		unsigned pad0:5;
+		unsigned mb_count:7;
+		unsigned pad1:1;
+		unsigned v_position:7;
+		unsigned pad2:1;
+		unsigned h_position:7;
+		unsigned pad3:1;
+	} dw1;
+
+	struct {
+		unsigned length_minus_one:17;
+		unsigned pad0:7;
+		unsigned qt_scale_code:5;
+		unsigned pad1:3;
+	} dw2;
+};
+
+struct i915_3dmpeg_qm_palette_load {
+	struct {
+		unsigned length:4;
+		unsigned pad0:15;
+		unsigned opcode:10;
+		unsigned type:3;
+	} dw0;
+
+	unsigned quantmatrix[16];
 };
 
-struct i915_3dmpeg_macroblock_0mv
-{
-    struct i915_3dmpeg_macroblock_header header;
-};
-
-struct i915_3dmpeg_macroblock_1fbmv
-{
-    struct i915_3dmpeg_macroblock_header header;    
-    unsigned dw2;
-    unsigned dw3;
-};
-struct i915_3dmpeg_macroblock_2fbmv
-{
-    struct i915_3dmpeg_macroblock_header header;
-    unsigned dw2;
-    unsigned dw3;
-    unsigned dw4;
-    unsigned dw5;
-};
-
-struct i915_3dmpeg_macroblock_5fmv
-{
-    struct i915_3dmpeg_macroblock_header header;
-    unsigned dw2;
-    unsigned dw3;
-    unsigned dw4;
-    unsigned dw5;
-    unsigned dw6;
-};
-  
-struct i915_3dmpeg_macroblock_ipicture
-{
-    struct {
-        unsigned pad0 : 5;
-        unsigned dct_type : 1;
-        unsigned pad1 : 13;
-        unsigned opcode : 10;
-        unsigned type : 3;
-    } dw0;
-};
-
-struct i915_3dmpeg_set_origin
-{
-    struct {
-        unsigned length : 19;
-        unsigned opcode : 10;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned v_origin : 7;
-        unsigned pad0 : 1;
-        unsigned h_origin : 7;
-        unsigned pad1 : 17;
-    } dw1;
-};
-      
-struct i915_3dmpeg_slice
-{
-    struct {
-        unsigned length : 19;
-        unsigned opcode : 10;
-        unsigned type : 3;
-    } dw0;
-    
-    struct {
-        unsigned fst_mb_bit_off : 3;
-        unsigned pad0 : 5;
-        unsigned mb_count : 7;
-        unsigned pad1 : 1;
-        unsigned v_position : 7;
-        unsigned pad2 : 1;
-        unsigned h_position : 7;
-        unsigned pad3 : 1;
-    } dw1;
-
-    struct {
-        unsigned length_minus_one : 17;
-        unsigned pad0 : 7;
-        unsigned qt_scale_code : 5;
-        unsigned pad1 : 3;
-    } dw2;
-};
-
-struct i915_3dmpeg_qm_palette_load
-{
-    struct {
-        unsigned length : 4;
-        unsigned pad0 : 15;
-        unsigned opcode : 10;
-        unsigned type : 3;
-    } dw0;
-    
-    unsigned quantmatrix[16];    
-};        
-
-
 /*
  * 3DSTATE instruction
  */
@@ -249,31 +237,30 @@ struct i915_3dmpeg_qm_palette_load
 #define TILEWALK_XMAJOR         0
 #define TILEWALK_YMAJOR         1
 
-struct i915_3dstate_buffer_info
-{
-    struct {
-        unsigned length : 16;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned pad0 : 2;
-        unsigned pitch : 12;
-        unsigned pad1 : 7;
-        unsigned walk : 1;
-        unsigned tiled_surface : 1;
-        unsigned fence_regs : 1;
-        unsigned buffer_id : 4;
-        unsigned aux_id : 1;
-        unsigned pad2 : 3;
-    } dw1;
-
-    struct {
-        unsigned pad0 : 2;
-        unsigned base_address : 27;
-        unsigned pad1 : 3;
-    } dw2;
+struct i915_3dstate_buffer_info {
+	struct {
+		unsigned length:16;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned pad0:2;
+		unsigned pitch:12;
+		unsigned pad1:7;
+		unsigned walk:1;
+		unsigned tiled_surface:1;
+		unsigned fence_regs:1;
+		unsigned buffer_id:4;
+		unsigned aux_id:1;
+		unsigned pad2:3;
+	} dw1;
+
+	struct {
+		unsigned pad0:2;
+		unsigned base_address:27;
+		unsigned pad1:3;
+	} dw2;
 };
 
 #define COLORBUFFER_8BIT         0x00
@@ -288,33 +275,31 @@ struct i915_3dstate_buffer_info
 #define COLORBUFFER_A1R5G5B5     0x09
 #define COLORBUFFER_A2R10G10B10  0x0a
 
-
-struct i915_3dstate_dest_buffer_variables
-{
-    struct {
-        unsigned length : 16;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-    
-    struct {
-        unsigned v_ls_offset : 1;
-        unsigned v_ls : 1;
-        unsigned depth_fmt : 2;
-        unsigned pad0 : 4;
-        unsigned color_fmt : 4;
-        unsigned yuv422_select : 3;
-        unsigned pad1 : 1;
-        unsigned dest_v_bias : 4;
-        unsigned dest_h_bias : 4;
-        unsigned dither_enhancement : 1;
-        unsigned linear_gamma : 1;
-        unsigned dither_pattern : 2;
-        unsigned lod_preclamp : 1;
-        unsigned edt_zone : 1;          /* early depth test in zone rendering */
-        unsigned texture_default_color : 1;
-        unsigned edt_classic : 1;       /* early depth test in classic mode */
-    } dw1;
+struct i915_3dstate_dest_buffer_variables {
+	struct {
+		unsigned length:16;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned v_ls_offset:1;
+		unsigned v_ls:1;
+		unsigned depth_fmt:2;
+		unsigned pad0:4;
+		unsigned color_fmt:4;
+		unsigned yuv422_select:3;
+		unsigned pad1:1;
+		unsigned dest_v_bias:4;
+		unsigned dest_h_bias:4;
+		unsigned dither_enhancement:1;
+		unsigned linear_gamma:1;
+		unsigned dither_pattern:2;
+		unsigned lod_preclamp:1;
+		unsigned edt_zone:1;	/* early depth test in zone rendering */
+		unsigned texture_default_color:1;
+		unsigned edt_classic:1;	/* early depth test in classic mode */
+	} dw1;
 };
 
 #define MPEG_DECODE_MC          0
@@ -331,56 +316,55 @@ struct i915_3dstate_dest_buffer_variables
 #define MC_SUB_1V               0
 #define MC_SUB_2V               1
 
-struct i915_3dstate_dest_buffer_variables_mpeg
-{
-    struct {
-        unsigned length : 16;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned picture_width : 7;
-        unsigned pad0 : 1;
-        unsigned v_subsample_factor : 2;
-        unsigned h_subsample_factor : 2;
-        unsigned tff : 1;
-        unsigned mismatch : 1;
-        unsigned pad1 : 1;
-        unsigned intra8 : 1;
-        unsigned abort_on_error : 8;
-        unsigned pad2 : 4;
-        unsigned bidir_avrg_control : 1;
-        unsigned rcontrol : 1;
-        unsigned decode_mode : 2;
-    } dw1;
-
-    struct {
-        unsigned pad0 : 1;
-        unsigned picture_coding_type : 2;
-        unsigned pad1 : 2;
-        unsigned scan_order : 1;
-        unsigned pad2 : 2;
-        unsigned q_scale_type : 1;
-        unsigned concealment : 1;
-        unsigned fpf_dct : 1;
-        unsigned pad3 : 2;
-        unsigned intra_dc : 2;
-        unsigned intra_vlc : 1;
-        unsigned f_code00 : 4;
-        unsigned f_code01 : 4;
-        unsigned f_code10 : 4;
-        unsigned f_code11 : 4;
-    } dw2;
+struct i915_3dstate_dest_buffer_variables_mpeg {
+	struct {
+		unsigned length:16;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned picture_width:7;
+		unsigned pad0:1;
+		unsigned v_subsample_factor:2;
+		unsigned h_subsample_factor:2;
+		unsigned tff:1;
+		unsigned mismatch:1;
+		unsigned pad1:1;
+		unsigned intra8:1;
+		unsigned abort_on_error:8;
+		unsigned pad2:4;
+		unsigned bidir_avrg_control:1;
+		unsigned rcontrol:1;
+		unsigned decode_mode:2;
+	} dw1;
+
+	struct {
+		unsigned pad0:1;
+		unsigned picture_coding_type:2;
+		unsigned pad1:2;
+		unsigned scan_order:1;
+		unsigned pad2:2;
+		unsigned q_scale_type:1;
+		unsigned concealment:1;
+		unsigned fpf_dct:1;
+		unsigned pad3:2;
+		unsigned intra_dc:2;
+		unsigned intra_vlc:1;
+		unsigned f_code00:4;
+		unsigned f_code01:4;
+		unsigned f_code10:4;
+		unsigned f_code11:4;
+	} dw2;
 };
 
 struct i915_mc_static_indirect_state_buffer {
-    struct i915_3dstate_buffer_info dest_y;
-    struct i915_3dstate_buffer_info dest_u;
-    struct i915_3dstate_buffer_info dest_v;
-    struct i915_3dstate_dest_buffer_variables dest_buf;
-    struct i915_3dstate_dest_buffer_variables_mpeg dest_buf_mpeg;
-    struct i915_3dstate_buffer_info corr;
+	struct i915_3dstate_buffer_info dest_y;
+	struct i915_3dstate_buffer_info dest_u;
+	struct i915_3dstate_buffer_info dest_v;
+	struct i915_3dstate_dest_buffer_variables dest_buf;
+	struct i915_3dstate_dest_buffer_variables_mpeg dest_buf_mpeg;
+	struct i915_3dstate_buffer_info corr;
 };
 
 #define MAP_MAP0        0x0001
@@ -400,61 +384,59 @@ struct i915_mc_static_indirect_state_buffer {
 #define MAP_MAP14       0x4000
 #define MAP_MAP15       0x8000
 
-struct texture_map
-{
-    struct {
-        unsigned v_ls_offset : 1;
-        unsigned v_ls : 1;
-        unsigned base_address : 27;
-        unsigned pad0 : 2;
-        unsigned untrusted : 1;
-    } tm0;
-
-    struct {
-        unsigned tile_walk : 1;
-        unsigned tiled_surface : 1;
-        unsigned utilize_fence_regs : 1;
-        unsigned texel_fmt : 4;
-        unsigned surface_fmt : 3;
-        unsigned width : 11;
-        unsigned height : 11;
-    } tm1;
-    
-    struct {
-        unsigned depth : 8;
-        unsigned mipmap_layout : 1;
-        unsigned max_lod : 6;
-        unsigned cube_face : 6;
-        unsigned pitch : 11;
-    } tm2;
-};
-
-struct i915_3dstate_map_state
-{
-    struct {
-        unsigned length : 6;
-        unsigned pad0 : 9;
-        unsigned retain : 1;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned map_mask : 16;
-        unsigned pad0 : 16;
-    } dw1;
+struct texture_map {
+	struct {
+		unsigned v_ls_offset:1;
+		unsigned v_ls:1;
+		unsigned base_address:27;
+		unsigned pad0:2;
+		unsigned untrusted:1;
+	} tm0;
+
+	struct {
+		unsigned tile_walk:1;
+		unsigned tiled_surface:1;
+		unsigned utilize_fence_regs:1;
+		unsigned texel_fmt:4;
+		unsigned surface_fmt:3;
+		unsigned width:11;
+		unsigned height:11;
+	} tm1;
+
+	struct {
+		unsigned depth:8;
+		unsigned mipmap_layout:1;
+		unsigned max_lod:6;
+		unsigned cube_face:6;
+		unsigned pitch:11;
+	} tm2;
+};
+
+struct i915_3dstate_map_state {
+	struct {
+		unsigned length:6;
+		unsigned pad0:9;
+		unsigned retain:1;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned map_mask:16;
+		unsigned pad0:16;
+	} dw1;
 };
 
 struct i915_mc_map_state {
-    struct i915_3dstate_map_state y_map;
-    struct texture_map y_forward;
-    struct texture_map y_backward;
-    struct i915_3dstate_map_state u_map;
-    struct texture_map u_forward;
-    struct texture_map u_backward;
-    struct i915_3dstate_map_state v_map;
-    struct texture_map v_forward;
-    struct texture_map v_backward;
+	struct i915_3dstate_map_state y_map;
+	struct texture_map y_forward;
+	struct texture_map y_backward;
+	struct i915_3dstate_map_state u_map;
+	struct texture_map u_forward;
+	struct texture_map u_backward;
+	struct i915_3dstate_map_state v_map;
+	struct texture_map v_forward;
+	struct texture_map v_backward;
 };
 
 #define SAMPLER_SAMPLER0        0x0001
@@ -505,209 +487,202 @@ struct i915_mc_map_state {
 #define TEXCOORDMODE_CLAMP_BORDER       4
 #define TEXCOORDMODE_MIRROR_ONCE        5
 
-struct texture_sampler
-{
-    struct {
-        unsigned shadow_function : 3;
-        unsigned max_anisotropy : 1;
-        unsigned shadow_enable : 1;
-        unsigned lod_bias : 9;
-        unsigned min_filter : 3;
-        unsigned mag_filter : 3;
-        unsigned mip_filter : 2;
-        unsigned base_level : 5;
-        unsigned chromakey_index : 2;
-        unsigned color_conversion : 1;
-        unsigned planar2packet : 1;
-        unsigned reverse_gamma : 1;
-    } ts0;
-
-    struct {
-        unsigned east_deinterlacer : 1;
-        unsigned map_index : 4;
-        unsigned normalized_coor : 1;
-        unsigned tcz_control : 3;
-        unsigned tcy_control : 3;
-        unsigned tcx_control : 3;
-        unsigned chromakey_enable : 1;
-        unsigned keyed_texture_filter : 1;
-        unsigned kill_pixel : 1;
-        unsigned pad0 : 6;
-        unsigned min_lod : 8;
-    } ts1;
-
-    struct {
-        unsigned default_color;
-    } ts2;
-};
-
-struct i915_3dstate_sampler_state
-{
-    struct {
-        unsigned length : 6;
-        unsigned pad0 : 10;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned sampler_masker : 16;
-        unsigned pad0 : 16;
-    } dw1;
-    /* we always use two samplers for mc */
-    struct texture_sampler sampler0;
-    struct texture_sampler sampler1;
-};
-
-struct arithmetic_inst
-{
-    struct {
-        unsigned pad0 : 2;
-        unsigned src0_reg : 5;
-        unsigned src0_reg_t : 3;
-        unsigned dest_channel_mask : 4;
-        unsigned dest_reg : 4;
-        unsigned pad1 : 1;
-        unsigned dest_reg_t: 3;
-        unsigned dest_saturate : 1;
-        unsigned pad2 : 1;
-        unsigned opcode : 5;
-        unsigned pad3 : 3;
-    } dw0;
-
-    struct {
-        unsigned src1_y_select : 3;
-        unsigned src1_y_negate : 1;
-        unsigned src1_x_select : 3;
-        unsigned src1_x_negate : 1;
-        unsigned src1_reg : 5;
-        unsigned src1_reg_t : 3;
-        unsigned src0_w_select : 3;
-        unsigned src0_w_negate : 1;
-        unsigned src0_z_select : 3;
-        unsigned src0_z_negate : 1;
-        unsigned src0_y_select : 3;
-        unsigned src0_y_negate : 1;
-        unsigned src0_x_select : 3;
-        unsigned src0_x_negate : 1;
-    } dw1;
-
-    struct {
-        unsigned src2_w_select : 3;
-        unsigned src2_w_negate : 1;
-        unsigned src2_z_select : 3;
-        unsigned src2_z_negate : 1;
-        unsigned src2_y_select : 3;
-        unsigned src2_y_negate : 1;
-        unsigned src2_x_select : 3;
-        unsigned src2_x_negate : 1;
-        unsigned src2_reg : 5;
-        unsigned src2_reg_t : 3;
-        unsigned src1_w_select : 3;
-        unsigned src1_w_negate : 1;
-        unsigned src1_z_select : 3;
-        unsigned src1_z_negate : 1;
-    } dw2;
-};
-
-struct texture_inst
-{
-    struct {
-        unsigned sampler_reg : 4;
-        unsigned pad0 : 10;
-        unsigned dest_reg : 4;
-        unsigned pad1 : 1;
-        unsigned dest_reg_t : 3;
-        unsigned pad2 : 2;
-        unsigned opcode : 5;
-        unsigned pad3 : 3;
-    } dw0;
-
-    struct {
-        unsigned pad0 : 16;
-        unsigned address_reg : 5;
-        unsigned pad1 : 3;
-        unsigned address_reg_t : 3;
-        unsigned pad2 : 5;
-    } dw1;
-
-    struct {
-        unsigned pad0;
-    } dw2;
-};
-
-struct declaration_inst
-{
-    struct {
-        unsigned pad0 : 10;
-        unsigned decl_channel_mask : 4;
-        unsigned decl_reg : 4;
-        unsigned pad1 : 1;
-        unsigned decl_reg_t : 2;
-        unsigned pad2 : 1;
-        unsigned sampler_type : 2;
-        unsigned opcode : 5;
-        unsigned pad3 : 3;
-    } dw0;
-
-    struct {
-        unsigned pad0;
-    } dw1;
-
-    struct {
-        unsigned pad0;
-    } dw2;
-};
-
-union shader_inst 
-{
-    struct arithmetic_inst a;
-    struct texture_inst t;
-    struct declaration_inst d;
+struct texture_sampler {
+	struct {
+		unsigned shadow_function:3;
+		unsigned max_anisotropy:1;
+		unsigned shadow_enable:1;
+		unsigned lod_bias:9;
+		unsigned min_filter:3;
+		unsigned mag_filter:3;
+		unsigned mip_filter:2;
+		unsigned base_level:5;
+		unsigned chromakey_index:2;
+		unsigned color_conversion:1;
+		unsigned planar2packet:1;
+		unsigned reverse_gamma:1;
+	} ts0;
+
+	struct {
+		unsigned east_deinterlacer:1;
+		unsigned map_index:4;
+		unsigned normalized_coor:1;
+		unsigned tcz_control:3;
+		unsigned tcy_control:3;
+		unsigned tcx_control:3;
+		unsigned chromakey_enable:1;
+		unsigned keyed_texture_filter:1;
+		unsigned kill_pixel:1;
+		unsigned pad0:6;
+		unsigned min_lod:8;
+	} ts1;
+
+	struct {
+		unsigned default_color;
+	} ts2;
+};
+
+struct i915_3dstate_sampler_state {
+	struct {
+		unsigned length:6;
+		unsigned pad0:10;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned sampler_masker:16;
+		unsigned pad0:16;
+	} dw1;
+	/* we always use two samplers for mc */
+	struct texture_sampler sampler0;
+	struct texture_sampler sampler1;
+};
+
+struct arithmetic_inst {
+	struct {
+		unsigned pad0:2;
+		unsigned src0_reg:5;
+		unsigned src0_reg_t:3;
+		unsigned dest_channel_mask:4;
+		unsigned dest_reg:4;
+		unsigned pad1:1;
+		unsigned dest_reg_t:3;
+		unsigned dest_saturate:1;
+		unsigned pad2:1;
+		unsigned opcode:5;
+		unsigned pad3:3;
+	} dw0;
+
+	struct {
+		unsigned src1_y_select:3;
+		unsigned src1_y_negate:1;
+		unsigned src1_x_select:3;
+		unsigned src1_x_negate:1;
+		unsigned src1_reg:5;
+		unsigned src1_reg_t:3;
+		unsigned src0_w_select:3;
+		unsigned src0_w_negate:1;
+		unsigned src0_z_select:3;
+		unsigned src0_z_negate:1;
+		unsigned src0_y_select:3;
+		unsigned src0_y_negate:1;
+		unsigned src0_x_select:3;
+		unsigned src0_x_negate:1;
+	} dw1;
+
+	struct {
+		unsigned src2_w_select:3;
+		unsigned src2_w_negate:1;
+		unsigned src2_z_select:3;
+		unsigned src2_z_negate:1;
+		unsigned src2_y_select:3;
+		unsigned src2_y_negate:1;
+		unsigned src2_x_select:3;
+		unsigned src2_x_negate:1;
+		unsigned src2_reg:5;
+		unsigned src2_reg_t:3;
+		unsigned src1_w_select:3;
+		unsigned src1_w_negate:1;
+		unsigned src1_z_select:3;
+		unsigned src1_z_negate:1;
+	} dw2;
+};
+
+struct texture_inst {
+	struct {
+		unsigned sampler_reg:4;
+		unsigned pad0:10;
+		unsigned dest_reg:4;
+		unsigned pad1:1;
+		unsigned dest_reg_t:3;
+		unsigned pad2:2;
+		unsigned opcode:5;
+		unsigned pad3:3;
+	} dw0;
+
+	struct {
+		unsigned pad0:16;
+		unsigned address_reg:5;
+		unsigned pad1:3;
+		unsigned address_reg_t:3;
+		unsigned pad2:5;
+	} dw1;
+
+	struct {
+		unsigned pad0;
+	} dw2;
+};
+
+struct declaration_inst {
+	struct {
+		unsigned pad0:10;
+		unsigned decl_channel_mask:4;
+		unsigned decl_reg:4;
+		unsigned pad1:1;
+		unsigned decl_reg_t:2;
+		unsigned pad2:1;
+		unsigned sampler_type:2;
+		unsigned opcode:5;
+		unsigned pad3:3;
+	} dw0;
+
+	struct {
+		unsigned pad0;
+	} dw1;
+
+	struct {
+		unsigned pad0;
+	} dw2;
+};
+
+union shader_inst {
+	struct arithmetic_inst a;
+	struct texture_inst t;
+	struct declaration_inst d;
 };
 
 struct i915_3dstate_pixel_shader_header {
-    unsigned length : 9;
-    unsigned pad0 : 6;
-    unsigned retain : 1;
-    unsigned opcode : 13;
-    unsigned type : 3;
-};
-
-struct i915_3dstate_pixel_shader_program
-{
-    struct i915_3dstate_pixel_shader_header shader0;
-    /* mov oC, c0.0000 */
-    uint32_t inst0[3];
-
-    struct i915_3dstate_pixel_shader_header shader1;
-    /* dcl t0.xy */
-    /* dcl t1.xy */
-    /* dcl_2D s0 */
-    /* texld r0, t0, s0 */
-    /* mov oC, r0 */
-    uint32_t inst1[3*5];
-
-    struct i915_3dstate_pixel_shader_header shader2;
-    /* dcl t2.xy */
-    /* dcl t3.xy */
-    /* dcl_2D s1 */
-    /* texld r0, t2, s1 */
-    /* mov oC, r0 */
-    uint32_t inst2[3*5];
-
-    struct i915_3dstate_pixel_shader_header shader3;
-    /* dcl t0.xy */
-    /* dcl t1.xy */
-    /* dcl t2.xy */
-    /* dcl t3.xy */
-    /* dcl_2D s0 */
-    /* dcl_2D s1 */
-    /* texld r0, t0, s0 */
-    /* texld r0, t2, s1 */
-    /* add r0, r0, r1*/
-    /* mov oC, r0 */
-    uint32_t inst3[3*10];
+	unsigned length:9;
+	unsigned pad0:6;
+	unsigned retain:1;
+	unsigned opcode:13;
+	unsigned type:3;
+};
+
+struct i915_3dstate_pixel_shader_program {
+	struct i915_3dstate_pixel_shader_header shader0;
+	/* mov oC, c0.0000 */
+	uint32_t inst0[3];
+
+	struct i915_3dstate_pixel_shader_header shader1;
+	/* dcl t0.xy */
+	/* dcl t1.xy */
+	/* dcl_2D s0 */
+	/* texld r0, t0, s0 */
+	/* mov oC, r0 */
+	uint32_t inst1[3 * 5];
+
+	struct i915_3dstate_pixel_shader_header shader2;
+	/* dcl t2.xy */
+	/* dcl t3.xy */
+	/* dcl_2D s1 */
+	/* texld r0, t2, s1 */
+	/* mov oC, r0 */
+	uint32_t inst2[3 * 5];
+
+	struct i915_3dstate_pixel_shader_header shader3;
+	/* dcl t0.xy */
+	/* dcl t1.xy */
+	/* dcl t2.xy */
+	/* dcl t3.xy */
+	/* dcl_2D s0 */
+	/* dcl_2D s1 */
+	/* texld r0, t0, s0 */
+	/* texld r0, t2, s1 */
+	/* add r0, r0, r1 */
+	/* mov oC, r0 */
+	uint32_t inst3[3 * 10];
 };
 
 #define REG_CR0         0x00000001
@@ -743,28 +718,26 @@ struct i915_3dstate_pixel_shader_program
 #define REG_CR30        0x40000000
 #define REG_CR31        0x80000000
 
-struct shader_constant
-{
-    float x;
-    float y;
-    float z;
-    float w;
+struct shader_constant {
+	float x;
+	float y;
+	float z;
+	float w;
 };
 
-struct i915_3dstate_pixel_shader_constants
-{
-    struct {
-        unsigned length : 8;
-        unsigned pad0 : 8;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned reg_mask;
-    } dw1;
-    /* we only need one constant */
-    struct shader_constant value;
+struct i915_3dstate_pixel_shader_constants {
+	struct {
+		unsigned length:8;
+		unsigned pad0:8;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned reg_mask;
+	} dw1;
+	/* we only need one constant */
+	struct shader_constant value;
 };
 
 #define BLOCK_SIS       0x01
@@ -774,39 +747,36 @@ struct i915_3dstate_pixel_shader_constants
 #define BLOCK_PSP       0x10
 #define BLOCK_PSC       0x20
 
-typedef struct _state_ddword
-{
-    struct {
-        unsigned valid : 1;
-        unsigned force : 1;
-        unsigned buffer_address : 30;
-    } dw0;
-
-    struct {
-        unsigned length : 9;
-        unsigned pad0 : 23;
-    } dw1;
+typedef struct _state_ddword {
+	struct {
+		unsigned valid:1;
+		unsigned force:1;
+		unsigned buffer_address:30;
+	} dw0;
+
+	struct {
+		unsigned length:9;
+		unsigned pad0:23;
+	} dw1;
 } sis_state, ssb_state, msb_state, psp_state, psc_state;
 
-typedef struct _state_dword
-{
-    struct {
-        unsigned valid : 1;
-        unsigned reset : 1;
-        unsigned buffer_address : 30;
-    } dw0;
+typedef struct _state_dword {
+	struct {
+		unsigned valid:1;
+		unsigned reset:1;
+		unsigned buffer_address:30;
+	} dw0;
 } dis_state;
 
-struct i915_3dstate_load_indirect
-{
-    struct {
-        unsigned length : 8;
-        unsigned block_mask : 6;
-        unsigned mem_select : 1;
-        unsigned pad0 : 1;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
+struct i915_3dstate_load_indirect {
+	struct {
+		unsigned length:8;
+		unsigned block_mask:6;
+		unsigned mem_select:1;
+		unsigned pad0:1;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
 };
 
 #define TEXCOORDFMT_2FP       0x00
@@ -816,52 +786,50 @@ struct i915_3dstate_load_indirect
 #define TEXCOORDFMT_2FP_16    0x04
 #define TEXCOORDFMT_4FP_16    0x05
 #define TEXCOORDFMT_NOT_PRESENT  0x0f
-struct s2_dword
-{
-    unsigned set0_texcoord_fmt : 4;
-    unsigned set1_texcoord_fmt : 4;
-    unsigned set2_texcoord_fmt : 4;
-    unsigned set3_texcoord_fmt : 4;
-    unsigned set4_texcoord_fmt : 4;
-    unsigned set5_texcoord_fmt : 4;
-    unsigned set6_texcoord_fmt : 4;
-    unsigned set7_texcoord_fmt : 4;
-};
-
-struct s3_dword
-{
-    unsigned set0_pcd : 1;
-    unsigned set0_ws_tcz : 1;
-    unsigned set0_ws_tcy : 1;
-    unsigned set0_ws_tcx : 1;
-    unsigned set1_pcd : 1;
-    unsigned set1_ws_tcz : 1;
-    unsigned set1_ws_tcy : 1;
-    unsigned set1_ws_tcx : 1;
-    unsigned set2_pcd : 1;
-    unsigned set2_ws_tcz : 1;
-    unsigned set2_ws_tcy : 1;
-    unsigned set2_ws_tcx : 1;
-    unsigned set3_pcd : 1;
-    unsigned set3_ws_tcz : 1;
-    unsigned set3_ws_tcy : 1;
-    unsigned set3_ws_tcx : 1;
-    unsigned set4_pcd : 1;
-    unsigned set4_ws_tcz : 1;
-    unsigned set4_ws_tcy : 1;
-    unsigned set4_ws_tcx : 1;
-    unsigned set5_pcd : 1;
-    unsigned set5_ws_tcz : 1;
-    unsigned set5_ws_tcy : 1;
-    unsigned set5_ws_tcx : 1;
-    unsigned set6_pcd : 1;
-    unsigned set6_ws_tcz : 1;
-    unsigned set6_ws_tcy : 1;
-    unsigned set6_ws_tcx : 1;
-    unsigned set7_pcd : 1;
-    unsigned set7_ws_tcz : 1;
-    unsigned set7_ws_tcy : 1;
-    unsigned set7_ws_tcx : 1;
+struct s2_dword {
+	unsigned set0_texcoord_fmt:4;
+	unsigned set1_texcoord_fmt:4;
+	unsigned set2_texcoord_fmt:4;
+	unsigned set3_texcoord_fmt:4;
+	unsigned set4_texcoord_fmt:4;
+	unsigned set5_texcoord_fmt:4;
+	unsigned set6_texcoord_fmt:4;
+	unsigned set7_texcoord_fmt:4;
+};
+
+struct s3_dword {
+	unsigned set0_pcd:1;
+	unsigned set0_ws_tcz:1;
+	unsigned set0_ws_tcy:1;
+	unsigned set0_ws_tcx:1;
+	unsigned set1_pcd:1;
+	unsigned set1_ws_tcz:1;
+	unsigned set1_ws_tcy:1;
+	unsigned set1_ws_tcx:1;
+	unsigned set2_pcd:1;
+	unsigned set2_ws_tcz:1;
+	unsigned set2_ws_tcy:1;
+	unsigned set2_ws_tcx:1;
+	unsigned set3_pcd:1;
+	unsigned set3_ws_tcz:1;
+	unsigned set3_ws_tcy:1;
+	unsigned set3_ws_tcx:1;
+	unsigned set4_pcd:1;
+	unsigned set4_ws_tcz:1;
+	unsigned set4_ws_tcy:1;
+	unsigned set4_ws_tcx:1;
+	unsigned set5_pcd:1;
+	unsigned set5_ws_tcz:1;
+	unsigned set5_ws_tcy:1;
+	unsigned set5_ws_tcx:1;
+	unsigned set6_pcd:1;
+	unsigned set6_ws_tcz:1;
+	unsigned set6_ws_tcy:1;
+	unsigned set6_ws_tcx:1;
+	unsigned set7_pcd:1;
+	unsigned set7_ws_tcz:1;
+	unsigned set7_ws_tcy:1;
+	unsigned set7_ws_tcx:1;
 };
 
 #define VERTEXHAS_XYZ      1
@@ -876,103 +844,97 @@ struct s3_dword
 
 #define SHADEMODE_LINEAR   0
 #define SHADEMODE_FLAT     1
-struct s4_dword
-{
-    unsigned anti_aliasing_enable : 1;
-    unsigned sprite_point_enable : 1;
-    unsigned fog_parameter_present : 1;
-    unsigned local_depth_offset_enable : 1;
-    unsigned force_specular_diffuse_color : 1;
-    unsigned force_default_diffuse_color : 1;
-    unsigned position_mask : 3;
-    unsigned local_depth_offset_present : 1;
-    unsigned diffuse_color_presetn : 1;
-    unsigned specular_color_fog_factor_present : 1;
-    unsigned point_width_present : 1;
-    unsigned cull_mode : 2;
-    unsigned color_shade_mode : 1;
-    unsigned specular_shade_mode : 1;
-    unsigned fog_shade_mode : 1;
-    unsigned alpha_shade_mode : 1;
-    unsigned line_width : 4;
-    unsigned point_width : 9;
-};
-
-struct s5_dword 
-{
-    unsigned logic_op_enable : 1;
-    unsigned color_dither_enable  : 1;
-    unsigned stencil_test_enable : 1;
-    unsigned stencil_buffer_write_enable : 1;
-    unsigned stencil_pass_depth_pass_op : 3;
-    unsigned stencil_pass_depth_fail_op : 3;
-    unsigned stencil_fail_op : 3;
-    unsigned stencil_test_function : 3;
-    unsigned stencil_reference_value : 8;
-    unsigned fog_enable : 1;
-    unsigned global_depth_offset_enable : 1;
-    unsigned last_pixel_enable : 1;
-    unsigned force_default_point_width : 1;
-    unsigned color_buffer_component_write_disable : 4;
-};
-
-struct s6_dword
-{
-    unsigned triangle_pv : 2;
-    unsigned color_buffer_write : 1;
-    unsigned depth_buffer_write : 1;
-    unsigned dest_blend_factor : 4;
-    unsigned src_blend_factor : 4;
-    unsigned color_blend_function : 3;
-    unsigned color_buffer_blend : 1;
-    unsigned depth_test_function : 3;
-    unsigned depth_test_enable : 1;
-    unsigned alpha_reference_value : 8;
-    unsigned alpha_test_function : 3;
-    unsigned alpha_test_enable : 1;
-    
-};
-
-struct s7_dword
-{
-    unsigned global_depth_offset_const;
-};
-
-struct i915_3dstate_load_state_immediate_1
-{
-    struct {
-        unsigned length : 4;
-        unsigned load_s0 : 1;
-        unsigned load_s1 : 1;
-        unsigned load_s2 : 1;
-        unsigned load_s3 : 1;
-        unsigned load_s4 : 1;
-        unsigned load_s5 : 1;
-        unsigned load_s6 : 1;
-        unsigned load_s7 : 1;
-        unsigned pad0 : 4;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-};
-
-struct i915_3dstate_scissor_rectangle
-{
-    struct {
-        unsigned length : 16;
-        unsigned opcode : 13;
-        unsigned type : 3;
-    } dw0;
-
-    struct {
-        unsigned min_x : 16;
-        unsigned min_y : 16;
-    } dw1;
-
-    struct {
-        unsigned max_x : 16;
-        unsigned max_y : 16;
-    } dw2;
+struct s4_dword {
+	unsigned anti_aliasing_enable:1;
+	unsigned sprite_point_enable:1;
+	unsigned fog_parameter_present:1;
+	unsigned local_depth_offset_enable:1;
+	unsigned force_specular_diffuse_color:1;
+	unsigned force_default_diffuse_color:1;
+	unsigned position_mask:3;
+	unsigned local_depth_offset_present:1;
+	unsigned diffuse_color_presetn:1;
+	unsigned specular_color_fog_factor_present:1;
+	unsigned point_width_present:1;
+	unsigned cull_mode:2;
+	unsigned color_shade_mode:1;
+	unsigned specular_shade_mode:1;
+	unsigned fog_shade_mode:1;
+	unsigned alpha_shade_mode:1;
+	unsigned line_width:4;
+	unsigned point_width:9;
+};
+
+struct s5_dword {
+	unsigned logic_op_enable:1;
+	unsigned color_dither_enable:1;
+	unsigned stencil_test_enable:1;
+	unsigned stencil_buffer_write_enable:1;
+	unsigned stencil_pass_depth_pass_op:3;
+	unsigned stencil_pass_depth_fail_op:3;
+	unsigned stencil_fail_op:3;
+	unsigned stencil_test_function:3;
+	unsigned stencil_reference_value:8;
+	unsigned fog_enable:1;
+	unsigned global_depth_offset_enable:1;
+	unsigned last_pixel_enable:1;
+	unsigned force_default_point_width:1;
+	unsigned color_buffer_component_write_disable:4;
+};
+
+struct s6_dword {
+	unsigned triangle_pv:2;
+	unsigned color_buffer_write:1;
+	unsigned depth_buffer_write:1;
+	unsigned dest_blend_factor:4;
+	unsigned src_blend_factor:4;
+	unsigned color_blend_function:3;
+	unsigned color_buffer_blend:1;
+	unsigned depth_test_function:3;
+	unsigned depth_test_enable:1;
+	unsigned alpha_reference_value:8;
+	unsigned alpha_test_function:3;
+	unsigned alpha_test_enable:1;
+
+};
+
+struct s7_dword {
+	unsigned global_depth_offset_const;
+};
+
+struct i915_3dstate_load_state_immediate_1 {
+	struct {
+		unsigned length:4;
+		unsigned load_s0:1;
+		unsigned load_s1:1;
+		unsigned load_s2:1;
+		unsigned load_s3:1;
+		unsigned load_s4:1;
+		unsigned load_s5:1;
+		unsigned load_s6:1;
+		unsigned load_s7:1;
+		unsigned pad0:4;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+};
+
+struct i915_3dstate_scissor_rectangle {
+	struct {
+		unsigned length:16;
+		unsigned opcode:13;
+		unsigned type:3;
+	} dw0;
+
+	struct {
+		unsigned min_x:16;
+		unsigned min_y:16;
+	} dw1;
+
+	struct {
+		unsigned max_x:16;
+		unsigned max_y:16;
+	} dw2;
 };
 
 #define VERTEX_INLINE         0x00
@@ -991,40 +953,37 @@ struct i915_3dstate_scissor_rectangle
 #define PRIM_CLEAR_RECT       0x0a
 #define PRIM_ZONE_INIT        0x0d
 
-struct texture_coordinate_set
-{
-    unsigned tcx;
-    unsigned tcy;
-};
-
-struct vertex_data
-{
-    unsigned x;
-    unsigned y;
-    struct texture_coordinate_set tc0;
-    struct texture_coordinate_set tc1;
-};
-
-struct i915_3dprimitive
-{
-    union {
-        struct {
-            unsigned length : 18;
-            unsigned prim : 5;
-            unsigned vertex_location : 1;
-            unsigned opcode : 5;
-            unsigned type : 3;
-        } inline_prim;
-
-        struct {
-            unsigned vertex_count : 16;
-            unsigned pad0 : 1;
-            unsigned vertex_access_mode : 1;
-            unsigned prim : 5;
-            unsigned vertex_location : 1;
-            unsigned opcode : 5;
-            unsigned type : 3;
-        } indirect_prim;            
-    } dw0;
+struct texture_coordinate_set {
+	unsigned tcx;
+	unsigned tcy;
+};
+
+struct vertex_data {
+	unsigned x;
+	unsigned y;
+	struct texture_coordinate_set tc0;
+	struct texture_coordinate_set tc1;
+};
+
+struct i915_3dprimitive {
+	union {
+		struct {
+			unsigned length:18;
+			unsigned prim:5;
+			unsigned vertex_location:1;
+			unsigned opcode:5;
+			unsigned type:3;
+		} inline_prim;
+
+		struct {
+			unsigned vertex_count:16;
+			unsigned pad0:1;
+			unsigned vertex_access_mode:1;
+			unsigned prim:5;
+			unsigned vertex_location:1;
+			unsigned opcode:5;
+			unsigned type:3;
+		} indirect_prim;
+	} dw0;
 };
 #endif /*_I915_STRUCTS_H */
diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c
index d6f7f01d..84bdaf26 100644
--- a/src/xvmc/i915_xvmc.c
+++ b/src/xvmc/i915_xvmc.c
@@ -39,94 +39,93 @@
                                  SIZE_Y420(surface->width, surface->height))
 
 typedef union {
-    int16_t component[2];
-    int32_t v;
+	int16_t component[2];
+	int32_t v;
 } vector_t;
 
 #if 0
 static int findOverlap(unsigned int width, unsigned int height,
-                       short *dstX, short *dstY,
-                       short *srcX, short *srcY,
-                       unsigned short *areaW, unsigned short *areaH)
+		       short *dstX, short *dstY,
+		       short *srcX, short *srcY,
+		       unsigned short *areaW, unsigned short *areaH)
 {
-    int w, h;
-    unsigned int mWidth, mHeight;
-
-    w = *areaW;
-    h = *areaH;
-
-    if ((*dstX >= width) || (*dstY >= height))
-        return 1;
-
-    if (*dstX < 0) {
-        w += *dstX;
-        *srcX -= *dstX;
-        *dstX = 0;
-    }
-
-    if (*dstY < 0) {
-        h += *dstY;
-        *srcY -= *dstY;
-        *dstY = 0;
-    }
-
-    if ((w <= 0) || ((h <= 0)))
-        return 1;
-
-    mWidth = width - *dstX;
-    mHeight = height - *dstY;
-    *areaW = (w <= mWidth) ? w : mWidth;
-    *areaH = (h <= mHeight) ? h : mHeight;
-    return 0;
+	int w, h;
+	unsigned int mWidth, mHeight;
+
+	w = *areaW;
+	h = *areaH;
+
+	if ((*dstX >= width) || (*dstY >= height))
+		return 1;
+
+	if (*dstX < 0) {
+		w += *dstX;
+		*srcX -= *dstX;
+		*dstX = 0;
+	}
+
+	if (*dstY < 0) {
+		h += *dstY;
+		*srcY -= *dstY;
+		*dstY = 0;
+	}
+
+	if ((w <= 0) || ((h <= 0)))
+		return 1;
+
+	mWidth = width - *dstX;
+	mHeight = height - *dstY;
+	*areaW = (w <= mWidth) ? w : mWidth;
+	*areaH = (h <= mHeight) ? h : mHeight;
+	return 0;
 }
 #endif
 
 static void i915_inst_arith(unsigned int *inst,
-                            unsigned int op,
-                            unsigned int dest,
-                            unsigned int mask,
-                            unsigned int saturate,
-                            unsigned int src0, unsigned int src1, unsigned int src2)
+			    unsigned int op,
+			    unsigned int dest,
+			    unsigned int mask,
+			    unsigned int saturate,
+			    unsigned int src0, unsigned int src1,
+			    unsigned int src2)
 {
-    dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
-    *inst = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
-    inst++;
-    *inst = (A1_SRC0(src0) | A1_SRC1(src1));
-    inst++;
-    *inst = (A2_SRC1(src1) | A2_SRC2(src2));
+	dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
+	*inst = (op | A0_DEST(dest) | mask | saturate | A0_SRC0(src0));
+	inst++;
+	*inst = (A1_SRC0(src0) | A1_SRC1(src1));
+	inst++;
+	*inst = (A2_SRC1(src1) | A2_SRC2(src2));
 }
 
 static void i915_inst_decl(unsigned int *inst,
-                           unsigned int type,
-                           unsigned int nr,
-                           unsigned int d0_flags)
+			   unsigned int type,
+			   unsigned int nr, unsigned int d0_flags)
 {
-    unsigned int reg = UREG(type, nr);
+	unsigned int reg = UREG(type, nr);
 
-    *inst = (D0_DCL | D0_DEST(reg) | d0_flags);
-    inst++;
-    *inst = D1_MBZ;
-    inst++;
-    *inst = D2_MBZ;
+	*inst = (D0_DCL | D0_DEST(reg) | d0_flags);
+	inst++;
+	*inst = D1_MBZ;
+	inst++;
+	*inst = D2_MBZ;
 }
 
 static void i915_inst_texld(unsigned int *inst,
-                              unsigned int op,
-                              unsigned int dest,
-                              unsigned int coord,
-                              unsigned int sampler)
+			    unsigned int op,
+			    unsigned int dest,
+			    unsigned int coord, unsigned int sampler)
 {
-   dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
-   *inst = (op | T0_DEST(dest) | T0_SAMPLER(sampler));
-   inst++;
-   *inst = T1_ADDRESS_REG(coord);
-   inst++;
-   *inst = T2_MBZ;
+	dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest));
+	*inst = (op | T0_DEST(dest) | T0_SAMPLER(sampler));
+	inst++;
+	*inst = T1_ADDRESS_REG(coord);
+	inst++;
+	*inst = T2_MBZ;
 }
 
 static void i915_emit_batch(void *data, int size, int flag)
 {
-    intelBatchbufferData(data, size, flag);
+	intelBatchbufferData(data, size, flag);
 }
 
 /* one time context initialization buffer */
@@ -138,2331 +137,2418 @@ static int one_time_load_state_imm1_size, one_time_load_indirect_size;
 static uint32_t *mc_render_load_indirect;
 static int mc_render_load_indirect_size;
 
-static void i915_mc_one_time_context_init(XvMCContext *context)
+static void i915_mc_one_time_context_init(XvMCContext * context)
 {
-    unsigned int dest, src0, src1, src2;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    int i;
-    struct i915_3dstate_sampler_state *sampler_state;
-    struct i915_3dstate_pixel_shader_program *pixel_shader_program;
-    struct i915_3dstate_pixel_shader_constants *pixel_shader_constants;
-
-    /* sampler static state */
-    sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
-    /* pixel shader static state */
-    pixel_shader_program = (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
-    /* pixel shader contant static state */
-    pixel_shader_constants = (struct i915_3dstate_pixel_shader_constants *)pI915XvMC->psc.map;
-
-    memset(sampler_state, 0, sizeof(*sampler_state));
-    sampler_state->dw0.type = CMD_3D;
-    sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
-    sampler_state->dw0.length = 6;
-    sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1;
-
-    sampler_state->sampler0.ts0.reverse_gamma = 0;
-    sampler_state->sampler0.ts0.planar2packet = 0;
-    sampler_state->sampler0.ts0.color_conversion = 0;
-    sampler_state->sampler0.ts0.chromakey_index = 0;
-    sampler_state->sampler0.ts0.base_level = 0;
-    sampler_state->sampler0.ts0.mip_filter = MIPFILTER_NONE;        /* NONE */
-    sampler_state->sampler0.ts0.mag_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    sampler_state->sampler0.ts0.min_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    sampler_state->sampler0.ts0.lod_bias = 0;       /* 0.0 */
-    sampler_state->sampler0.ts0.shadow_enable = 0;
-    sampler_state->sampler0.ts0.max_anisotropy = ANISORATIO_2;
-    sampler_state->sampler0.ts0.shadow_function = PREFILTEROP_ALWAYS;
-    sampler_state->sampler0.ts1.min_lod = 0;        /* 0.0 Maximum Mip Level */
-    sampler_state->sampler0.ts1.kill_pixel = 0;
-    sampler_state->sampler0.ts1.keyed_texture_filter = 0;
-    sampler_state->sampler0.ts1.chromakey_enable = 0;
-    sampler_state->sampler0.ts1.tcx_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler0.ts1.tcy_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler0.ts1.tcz_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler0.ts1.normalized_coor = 0;
-    sampler_state->sampler0.ts1.map_index = 0;
-    sampler_state->sampler0.ts1.east_deinterlacer = 0;
-    sampler_state->sampler0.ts2.default_color = 0;
-
-    sampler_state->sampler1.ts0.reverse_gamma = 0;
-    sampler_state->sampler1.ts0.planar2packet = 0;
-    sampler_state->sampler1.ts0.color_conversion = 0;
-    sampler_state->sampler1.ts0.chromakey_index = 0;
-    sampler_state->sampler1.ts0.base_level = 0;
-    sampler_state->sampler1.ts0.mip_filter = MIPFILTER_NONE;        /* NONE */
-    sampler_state->sampler1.ts0.mag_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    sampler_state->sampler1.ts0.min_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    sampler_state->sampler1.ts0.lod_bias = 0;       /* 0.0 */
-    sampler_state->sampler1.ts0.shadow_enable = 0;
-    sampler_state->sampler1.ts0.max_anisotropy = ANISORATIO_2;
-    sampler_state->sampler1.ts0.shadow_function = PREFILTEROP_ALWAYS;
-    sampler_state->sampler1.ts1.min_lod = 0;        /* 0.0 Maximum Mip Level */
-    sampler_state->sampler1.ts1.kill_pixel = 0;
-    sampler_state->sampler1.ts1.keyed_texture_filter = 0;
-    sampler_state->sampler1.ts1.chromakey_enable = 0;
-    sampler_state->sampler1.ts1.tcx_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler1.ts1.tcy_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler1.ts1.tcz_control = TEXCOORDMODE_CLAMP;
-    sampler_state->sampler1.ts1.normalized_coor = 0;
-    sampler_state->sampler1.ts1.map_index = 1;
-    sampler_state->sampler1.ts1.east_deinterlacer = 0;
-    sampler_state->sampler1.ts2.default_color = 0;
-
-    memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
-    pixel_shader_program->shader0.type = CMD_3D;
-    pixel_shader_program->shader0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
-    pixel_shader_program->shader0.retain = 1;
-    pixel_shader_program->shader0.length = 2; /* 1 inst */
-    i = 0;
-
-    dest = UREG(REG_TYPE_OC, 0);
-    src0 = UREG(REG_TYPE_CONST, 0);
-    src1 = 0;
-    src2 = 0;
-    i915_inst_arith(&pixel_shader_program->inst0[i], A0_MOV,
-	    dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1, src2);
-
-    pixel_shader_program->shader1.type = CMD_3D;
-    pixel_shader_program->shader1.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
-    pixel_shader_program->shader1.retain = 1;
-    pixel_shader_program->shader1.length = 14; /* 5 inst */
-    i = 0;
-    /* dcl t0.xy */
-    i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
-    i+=3;
-    /* dcl t1.xy */
-    i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
-    /* dcl_2D s0 */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D);
-    /* texld r0, t0, s0 */
-    i += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_T, 0); /* COORD */
-    src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */
-    i915_inst_texld(&pixel_shader_program->inst1[i], T0_TEXLD, dest, src0, src1);
-    /* mov oC, r0 */
-    i += 3;
-    dest = UREG(REG_TYPE_OC, 0);
-    src0 = UREG(REG_TYPE_R, 0);
-    src1 = src2 = 0;
-    i915_inst_arith(&pixel_shader_program->inst1[i], A0_MOV, dest, A0_DEST_CHANNEL_ALL,
-                    A0_DEST_SATURATE, src0, src1, src2);
-
-
-    pixel_shader_program->shader2.type = CMD_3D;
-    pixel_shader_program->shader2.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
-    pixel_shader_program->shader2.retain = 1;
-    pixel_shader_program->shader2.length = 14; /* 5 inst */
-    i = 0;
-    /* dcl t2.xy */
-    i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY);
-    /* dcl t3.xy */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY);
-    /* dcl_2D s1 */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D);
-    /* texld r0, t2, s1 */
-    i += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_T, 2); /* COORD */
-    src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */
-    i915_inst_texld(&pixel_shader_program->inst2[i], T0_TEXLD, dest, src0, src1);
-    /* mov oC, r0 */
-    i += 3;
-    dest = UREG(REG_TYPE_OC, 0);
-    src0 = UREG(REG_TYPE_R, 0);
-    src1 = src2 = 0;
-    i915_inst_arith(&pixel_shader_program->inst2[i], A0_MOV, dest, A0_DEST_CHANNEL_ALL,
-                    A0_DEST_SATURATE, src0, src1, src2);
-
-    /* Shader 3 */
-    pixel_shader_program->shader3.type = CMD_3D;
-    pixel_shader_program->shader3.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
-    pixel_shader_program->shader3.retain = 1;
-    pixel_shader_program->shader3.length = 29; /* 10 inst */
-    i = 0;
-    /* dcl t0.xy */
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
-    /* dcl t1.xy */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
-    /* dcl t2.xy */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2, D0_CHANNEL_XY);
-    /* dcl t3.xy */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3, D0_CHANNEL_XY);
-    /* dcl_2D s0 */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D);
-    /* dcl_2D s1 */
-    i += 3;
-    i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D);
-    /* texld r0, t0, s0 */
-    i += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_T, 0); /* COORD */
-    src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */
-    i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1);
-    /* texld r1, t2, s1 */
-    i += 3;
-    dest = UREG(REG_TYPE_R, 1);
-    src0 = UREG(REG_TYPE_T, 2); /* COORD */
-    src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */
-    i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0, src1);
-    /* add r0, r0, r1 */
-    i += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_R, 0);
-    src1 = UREG(REG_TYPE_R, 1);
-    src2 = 0;
-    i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest, A0_DEST_CHANNEL_ALL,
-                    0 /* A0_DEST_SATURATE */, src0, src1, src2);
-    /* mul oC, r0, c0 */
-    i += 3;
-    dest = UREG(REG_TYPE_OC, 0);
-    src0 = UREG(REG_TYPE_R, 0);
-    src1 = UREG(REG_TYPE_CONST, 0);
-    src2 = 0;
-    i915_inst_arith(&pixel_shader_program->inst3[i], A0_MUL, dest, A0_DEST_CHANNEL_ALL,
-                    A0_DEST_SATURATE, src0, src1, src2);
-
-    memset(pixel_shader_constants, 0, sizeof(*pixel_shader_constants));
-    pixel_shader_constants->dw0.type = CMD_3D;
-    pixel_shader_constants->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_CONSTANTS;
-    pixel_shader_constants->dw0.length = 4;
-    pixel_shader_constants->dw1.reg_mask = REG_CR0;
-    pixel_shader_constants->value.x = 0.5;
-    pixel_shader_constants->value.y = 0.5;
-    pixel_shader_constants->value.z = 0.5;
-    pixel_shader_constants->value.w = 0.5;
+	unsigned int dest, src0, src1, src2;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	int i;
+	struct i915_3dstate_sampler_state *sampler_state;
+	struct i915_3dstate_pixel_shader_program *pixel_shader_program;
+	struct i915_3dstate_pixel_shader_constants *pixel_shader_constants;
+
+	/* sampler static state */
+	sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
+	/* pixel shader static state */
+	pixel_shader_program =
+	    (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
+	/* pixel shader contant static state */
+	pixel_shader_constants =
+	    (struct i915_3dstate_pixel_shader_constants *)pI915XvMC->psc.map;
+
+	memset(sampler_state, 0, sizeof(*sampler_state));
+	sampler_state->dw0.type = CMD_3D;
+	sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
+	sampler_state->dw0.length = 6;
+	sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1;
+
+	sampler_state->sampler0.ts0.reverse_gamma = 0;
+	sampler_state->sampler0.ts0.planar2packet = 0;
+	sampler_state->sampler0.ts0.color_conversion = 0;
+	sampler_state->sampler0.ts0.chromakey_index = 0;
+	sampler_state->sampler0.ts0.base_level = 0;
+	sampler_state->sampler0.ts0.mip_filter = MIPFILTER_NONE;	/* NONE */
+	sampler_state->sampler0.ts0.mag_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	sampler_state->sampler0.ts0.min_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	sampler_state->sampler0.ts0.lod_bias = 0;	/* 0.0 */
+	sampler_state->sampler0.ts0.shadow_enable = 0;
+	sampler_state->sampler0.ts0.max_anisotropy = ANISORATIO_2;
+	sampler_state->sampler0.ts0.shadow_function = PREFILTEROP_ALWAYS;
+	sampler_state->sampler0.ts1.min_lod = 0;	/* 0.0 Maximum Mip Level */
+	sampler_state->sampler0.ts1.kill_pixel = 0;
+	sampler_state->sampler0.ts1.keyed_texture_filter = 0;
+	sampler_state->sampler0.ts1.chromakey_enable = 0;
+	sampler_state->sampler0.ts1.tcx_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler0.ts1.tcy_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler0.ts1.tcz_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler0.ts1.normalized_coor = 0;
+	sampler_state->sampler0.ts1.map_index = 0;
+	sampler_state->sampler0.ts1.east_deinterlacer = 0;
+	sampler_state->sampler0.ts2.default_color = 0;
+
+	sampler_state->sampler1.ts0.reverse_gamma = 0;
+	sampler_state->sampler1.ts0.planar2packet = 0;
+	sampler_state->sampler1.ts0.color_conversion = 0;
+	sampler_state->sampler1.ts0.chromakey_index = 0;
+	sampler_state->sampler1.ts0.base_level = 0;
+	sampler_state->sampler1.ts0.mip_filter = MIPFILTER_NONE;	/* NONE */
+	sampler_state->sampler1.ts0.mag_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	sampler_state->sampler1.ts0.min_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	sampler_state->sampler1.ts0.lod_bias = 0;	/* 0.0 */
+	sampler_state->sampler1.ts0.shadow_enable = 0;
+	sampler_state->sampler1.ts0.max_anisotropy = ANISORATIO_2;
+	sampler_state->sampler1.ts0.shadow_function = PREFILTEROP_ALWAYS;
+	sampler_state->sampler1.ts1.min_lod = 0;	/* 0.0 Maximum Mip Level */
+	sampler_state->sampler1.ts1.kill_pixel = 0;
+	sampler_state->sampler1.ts1.keyed_texture_filter = 0;
+	sampler_state->sampler1.ts1.chromakey_enable = 0;
+	sampler_state->sampler1.ts1.tcx_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler1.ts1.tcy_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler1.ts1.tcz_control = TEXCOORDMODE_CLAMP;
+	sampler_state->sampler1.ts1.normalized_coor = 0;
+	sampler_state->sampler1.ts1.map_index = 1;
+	sampler_state->sampler1.ts1.east_deinterlacer = 0;
+	sampler_state->sampler1.ts2.default_color = 0;
+
+	memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
+	pixel_shader_program->shader0.type = CMD_3D;
+	pixel_shader_program->shader0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
+	pixel_shader_program->shader0.retain = 1;
+	pixel_shader_program->shader0.length = 2;	/* 1 inst */
+	i = 0;
+
+	dest = UREG(REG_TYPE_OC, 0);
+	src0 = UREG(REG_TYPE_CONST, 0);
+	src1 = 0;
+	src2 = 0;
+	i915_inst_arith(&pixel_shader_program->inst0[i], A0_MOV,
+			dest, A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1,
+			src2);
+
+	pixel_shader_program->shader1.type = CMD_3D;
+	pixel_shader_program->shader1.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
+	pixel_shader_program->shader1.retain = 1;
+	pixel_shader_program->shader1.length = 14;	/* 5 inst */
+	i = 0;
+	/* dcl t0.xy */
+	i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX0,
+		       D0_CHANNEL_XY);
+	i += 3;
+	/* dcl t1.xy */
+	i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_T, T_TEX1,
+		       D0_CHANNEL_XY);
+	/* dcl_2D s0 */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst1[i], REG_TYPE_S, 0,
+		       D0_SAMPLE_TYPE_2D);
+	/* texld r0, t0, s0 */
+	i += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_T, 0);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 0);	/* SAMPLER */
+	i915_inst_texld(&pixel_shader_program->inst1[i], T0_TEXLD, dest, src0,
+			src1);
+	/* mov oC, r0 */
+	i += 3;
+	dest = UREG(REG_TYPE_OC, 0);
+	src0 = UREG(REG_TYPE_R, 0);
+	src1 = src2 = 0;
+	i915_inst_arith(&pixel_shader_program->inst1[i], A0_MOV, dest,
+			A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1,
+			src2);
+
+	pixel_shader_program->shader2.type = CMD_3D;
+	pixel_shader_program->shader2.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
+	pixel_shader_program->shader2.retain = 1;
+	pixel_shader_program->shader2.length = 14;	/* 5 inst */
+	i = 0;
+	/* dcl t2.xy */
+	i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX2,
+		       D0_CHANNEL_XY);
+	/* dcl t3.xy */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_T, T_TEX3,
+		       D0_CHANNEL_XY);
+	/* dcl_2D s1 */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst2[i], REG_TYPE_S, 1,
+		       D0_SAMPLE_TYPE_2D);
+	/* texld r0, t2, s1 */
+	i += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_T, 2);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 1);	/* SAMPLER */
+	i915_inst_texld(&pixel_shader_program->inst2[i], T0_TEXLD, dest, src0,
+			src1);
+	/* mov oC, r0 */
+	i += 3;
+	dest = UREG(REG_TYPE_OC, 0);
+	src0 = UREG(REG_TYPE_R, 0);
+	src1 = src2 = 0;
+	i915_inst_arith(&pixel_shader_program->inst2[i], A0_MOV, dest,
+			A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1,
+			src2);
+
+	/* Shader 3 */
+	pixel_shader_program->shader3.type = CMD_3D;
+	pixel_shader_program->shader3.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
+	pixel_shader_program->shader3.retain = 1;
+	pixel_shader_program->shader3.length = 29;	/* 10 inst */
+	i = 0;
+	/* dcl t0.xy */
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX0,
+		       D0_CHANNEL_XY);
+	/* dcl t1.xy */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX1,
+		       D0_CHANNEL_XY);
+	/* dcl t2.xy */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX2,
+		       D0_CHANNEL_XY);
+	/* dcl t3.xy */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_T, T_TEX3,
+		       D0_CHANNEL_XY);
+	/* dcl_2D s0 */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 0,
+		       D0_SAMPLE_TYPE_2D);
+	/* dcl_2D s1 */
+	i += 3;
+	i915_inst_decl(&pixel_shader_program->inst3[i], REG_TYPE_S, 1,
+		       D0_SAMPLE_TYPE_2D);
+	/* texld r0, t0, s0 */
+	i += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_T, 0);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 0);	/* SAMPLER */
+	i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0,
+			src1);
+	/* texld r1, t2, s1 */
+	i += 3;
+	dest = UREG(REG_TYPE_R, 1);
+	src0 = UREG(REG_TYPE_T, 2);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 1);	/* SAMPLER */
+	i915_inst_texld(&pixel_shader_program->inst3[i], T0_TEXLD, dest, src0,
+			src1);
+	/* add r0, r0, r1 */
+	i += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_R, 0);
+	src1 = UREG(REG_TYPE_R, 1);
+	src2 = 0;
+	i915_inst_arith(&pixel_shader_program->inst3[i], A0_ADD, dest,
+			A0_DEST_CHANNEL_ALL, 0 /* A0_DEST_SATURATE */ , src0,
+			src1, src2);
+	/* mul oC, r0, c0 */
+	i += 3;
+	dest = UREG(REG_TYPE_OC, 0);
+	src0 = UREG(REG_TYPE_R, 0);
+	src1 = UREG(REG_TYPE_CONST, 0);
+	src2 = 0;
+	i915_inst_arith(&pixel_shader_program->inst3[i], A0_MUL, dest,
+			A0_DEST_CHANNEL_ALL, A0_DEST_SATURATE, src0, src1,
+			src2);
+
+	memset(pixel_shader_constants, 0, sizeof(*pixel_shader_constants));
+	pixel_shader_constants->dw0.type = CMD_3D;
+	pixel_shader_constants->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_CONSTANTS;
+	pixel_shader_constants->dw0.length = 4;
+	pixel_shader_constants->dw1.reg_mask = REG_CR0;
+	pixel_shader_constants->value.x = 0.5;
+	pixel_shader_constants->value.y = 0.5;
+	pixel_shader_constants->value.z = 0.5;
+	pixel_shader_constants->value.w = 0.5;
 
 }
 
-static void i915_mc_one_time_state_init(XvMCContext *context)
+static void i915_mc_one_time_state_init(XvMCContext * context)
 {
-    struct s3_dword *s3 = NULL;
-    struct s6_dword *s6 = NULL;
-    dis_state *dis = NULL;
-    ssb_state *ssb = NULL;
-    psp_state *psp = NULL;
-    psc_state *psc = NULL;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1;
-    struct i915_3dstate_load_indirect *load_indirect;
-    int mem_select;
-
-    /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
-    one_time_load_state_imm1_size = sizeof(*load_state_immediate_1) + sizeof(*s3) + sizeof(*s6);
-    one_time_load_state_imm1 = calloc(1, one_time_load_state_imm1_size);
-    load_state_immediate_1 = (struct i915_3dstate_load_state_immediate_1 *)one_time_load_state_imm1;
-    load_state_immediate_1->dw0.type = CMD_3D;
-    load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
-    load_state_immediate_1->dw0.load_s3 = 1;
-    load_state_immediate_1->dw0.load_s6 = 1;
-    load_state_immediate_1->dw0.length = (one_time_load_state_imm1_size >> 2) - 2;
-
-    s3 = (struct s3_dword *)(++load_state_immediate_1);
-    s3->set0_pcd = 1;
-    s3->set1_pcd = 1;
-    s3->set2_pcd = 1;
-    s3->set3_pcd = 1;
-    s3->set4_pcd = 1;
-    s3->set5_pcd = 1;
-    s3->set6_pcd = 1;
-    s3->set7_pcd = 1;
-
-    s6 = (struct s6_dword *)(++s3);
-    s6->alpha_test_enable = 0;
-    s6->alpha_test_function = 0;
-    s6->alpha_reference_value = 0;
-    s6->depth_test_enable = 1;
-    s6->depth_test_function = 0;
-    s6->color_buffer_blend = 0;
-    s6->color_blend_function = 0;
-    s6->src_blend_factor = 1;
-    s6->dest_blend_factor = 1;
-    s6->depth_buffer_write = 0;
-    s6->color_buffer_write = 1;
-    s6->triangle_pv = 0;
-
-    /* 3DSTATE_LOAD_INDIRECT */
-    one_time_load_indirect_size = sizeof(*load_indirect) + sizeof(*dis) + sizeof(*ssb) + sizeof(*psp) + sizeof(*psc);
-    one_time_load_indirect = calloc(1, one_time_load_indirect_size);
-    load_indirect = (struct i915_3dstate_load_indirect *)one_time_load_indirect;
-    load_indirect->dw0.type = CMD_3D;
-    load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
-    load_indirect->dw0.block_mask = BLOCK_DIS | BLOCK_SSB | BLOCK_PSP | BLOCK_PSC;
-    load_indirect->dw0.length = (one_time_load_indirect_size >> 2) - 2;
-
-    if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM)
-	mem_select = 0; /* use physical address */
-    else
-	mem_select = 1; /* use gfx address */
-
-    load_indirect->dw0.mem_select = mem_select;
-
-
-    /* Dynamic indirect state buffer */
-    dis = (dis_state *)(++load_indirect);
-    dis->dw0.valid = 0;
-    dis->dw0.reset = 0;
-    dis->dw0.buffer_address = 0;
-
-    /* Sample state buffer */
-    ssb = (ssb_state *)(++dis);
-    ssb->dw0.valid = 1;
-    ssb->dw0.force = 1;
-    ssb->dw1.length = 7; /* 8 - 1 */
-
-    if (mem_select)
-        ssb->dw0.buffer_address = (pI915XvMC->ssb.offset >> 2);
-    else
-	ssb->dw0.buffer_address = (pI915XvMC->ssb.bus_addr >> 2);
-
-    /* Pixel shader program buffer */
-    psp = (psp_state *)(++ssb);
-    psp->dw0.valid = 1;
-    psp->dw0.force = 1;
-    psp->dw1.length = 66; /* 4 + 16 + 16 + 31 - 1 */
-
-    if (mem_select)
-	psp->dw0.buffer_address = (pI915XvMC->psp.offset >> 2);
-    else
-	psp->dw0.buffer_address = (pI915XvMC->psp.bus_addr >> 2);
-
-    /* Pixel shader constant buffer */
-    psc = (psc_state *)(++psp);
-    psc->dw0.valid = 1;
-    psc->dw0.force = 1;
-    psc->dw1.length = 5; /* 6 - 1 */
-
-    if (mem_select)
-        psc->dw0.buffer_address = (pI915XvMC->psc.offset >> 2);
-    else
-        psc->dw0.buffer_address = (pI915XvMC->psc.bus_addr >> 2);
+	struct s3_dword *s3 = NULL;
+	struct s6_dword *s6 = NULL;
+	dis_state *dis = NULL;
+	ssb_state *ssb = NULL;
+	psp_state *psp = NULL;
+	psc_state *psc = NULL;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1;
+	struct i915_3dstate_load_indirect *load_indirect;
+	int mem_select;
+
+	/* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
+	one_time_load_state_imm1_size =
+	    sizeof(*load_state_immediate_1) + sizeof(*s3) + sizeof(*s6);
+	one_time_load_state_imm1 = calloc(1, one_time_load_state_imm1_size);
+	load_state_immediate_1 = (struct i915_3dstate_load_state_immediate_1 *)
+	    one_time_load_state_imm1;
+	load_state_immediate_1->dw0.type = CMD_3D;
+	load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
+	load_state_immediate_1->dw0.load_s3 = 1;
+	load_state_immediate_1->dw0.load_s6 = 1;
+	load_state_immediate_1->dw0.length =
+	    (one_time_load_state_imm1_size >> 2) - 2;
+
+	s3 = (struct s3_dword *)(++load_state_immediate_1);
+	s3->set0_pcd = 1;
+	s3->set1_pcd = 1;
+	s3->set2_pcd = 1;
+	s3->set3_pcd = 1;
+	s3->set4_pcd = 1;
+	s3->set5_pcd = 1;
+	s3->set6_pcd = 1;
+	s3->set7_pcd = 1;
+
+	s6 = (struct s6_dword *)(++s3);
+	s6->alpha_test_enable = 0;
+	s6->alpha_test_function = 0;
+	s6->alpha_reference_value = 0;
+	s6->depth_test_enable = 1;
+	s6->depth_test_function = 0;
+	s6->color_buffer_blend = 0;
+	s6->color_blend_function = 0;
+	s6->src_blend_factor = 1;
+	s6->dest_blend_factor = 1;
+	s6->depth_buffer_write = 0;
+	s6->color_buffer_write = 1;
+	s6->triangle_pv = 0;
+
+	/* 3DSTATE_LOAD_INDIRECT */
+	one_time_load_indirect_size =
+	    sizeof(*load_indirect) + sizeof(*dis) + sizeof(*ssb) +
+	    sizeof(*psp) + sizeof(*psc);
+	one_time_load_indirect = calloc(1, one_time_load_indirect_size);
+	load_indirect =
+	    (struct i915_3dstate_load_indirect *)one_time_load_indirect;
+	load_indirect->dw0.type = CMD_3D;
+	load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
+	load_indirect->dw0.block_mask =
+	    BLOCK_DIS | BLOCK_SSB | BLOCK_PSP | BLOCK_PSC;
+	load_indirect->dw0.length = (one_time_load_indirect_size >> 2) - 2;
+
+	if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
+	    pI915XvMC->deviceID == PCI_CHIP_I915_GM)
+		mem_select = 0;	/* use physical address */
+	else
+		mem_select = 1;	/* use gfx address */
+
+	load_indirect->dw0.mem_select = mem_select;
+
+	/* Dynamic indirect state buffer */
+	dis = (dis_state *) (++load_indirect);
+	dis->dw0.valid = 0;
+	dis->dw0.reset = 0;
+	dis->dw0.buffer_address = 0;
+
+	/* Sample state buffer */
+	ssb = (ssb_state *) (++dis);
+	ssb->dw0.valid = 1;
+	ssb->dw0.force = 1;
+	ssb->dw1.length = 7;	/* 8 - 1 */
+
+	if (mem_select)
+		ssb->dw0.buffer_address = (pI915XvMC->ssb.offset >> 2);
+	else
+		ssb->dw0.buffer_address = (pI915XvMC->ssb.bus_addr >> 2);
+
+	/* Pixel shader program buffer */
+	psp = (psp_state *) (++ssb);
+	psp->dw0.valid = 1;
+	psp->dw0.force = 1;
+	psp->dw1.length = 66;	/* 4 + 16 + 16 + 31 - 1 */
+
+	if (mem_select)
+		psp->dw0.buffer_address = (pI915XvMC->psp.offset >> 2);
+	else
+		psp->dw0.buffer_address = (pI915XvMC->psp.bus_addr >> 2);
+
+	/* Pixel shader constant buffer */
+	psc = (psc_state *) (++psp);
+	psc->dw0.valid = 1;
+	psc->dw0.force = 1;
+	psc->dw1.length = 5;	/* 6 - 1 */
+
+	if (mem_select)
+		psc->dw0.buffer_address = (pI915XvMC->psc.offset >> 2);
+	else
+		psc->dw0.buffer_address = (pI915XvMC->psc.bus_addr >> 2);
 }
 
 static void i915_mc_one_time_state_emit(void)
 {
-    i915_emit_batch(one_time_load_state_imm1, one_time_load_state_imm1_size, 0);
-    i915_emit_batch(one_time_load_indirect, one_time_load_indirect_size, 0);
+	i915_emit_batch(one_time_load_state_imm1, one_time_load_state_imm1_size,
+			0);
+	i915_emit_batch(one_time_load_indirect, one_time_load_indirect_size, 0);
 }
 
-static void i915_mc_static_indirect_state_init(XvMCContext *context)
+static void i915_mc_static_indirect_state_init(XvMCContext * context)
 {
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    struct i915_mc_static_indirect_state_buffer *buffer_info =
-	(struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
-
-    memset(buffer_info, 0, sizeof(*buffer_info));
-    /* dest Y */
-    buffer_info->dest_y.dw0.type = CMD_3D;
-    buffer_info->dest_y.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
-    buffer_info->dest_y.dw0.length = 1;
-    buffer_info->dest_y.dw1.aux_id = 0;
-    buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK;
-    buffer_info->dest_y.dw1.fence_regs = 0;    /* disabled */ /* FIXME: tiled y for performance */
-    buffer_info->dest_y.dw1.tiled_surface = 0; /* linear */
-    buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR;
-
-    /* dest U */
-    buffer_info->dest_u.dw0.type = CMD_3D;
-    buffer_info->dest_u.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
-    buffer_info->dest_u.dw0.length = 1;
-    buffer_info->dest_u.dw1.aux_id = 0;
-    buffer_info->dest_u.dw1.buffer_id = BUFFERID_COLOR_AUX;
-    buffer_info->dest_u.dw1.fence_regs = 0;
-    buffer_info->dest_u.dw1.tiled_surface = 0;
-    buffer_info->dest_u.dw1.walk = TILEWALK_XMAJOR;
-
-    /* dest V */
-    buffer_info->dest_v.dw0.type = CMD_3D;
-    buffer_info->dest_v.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
-    buffer_info->dest_v.dw0.length = 1;
-    buffer_info->dest_v.dw1.aux_id = 1;
-    buffer_info->dest_v.dw1.buffer_id = BUFFERID_COLOR_AUX;
-    buffer_info->dest_v.dw1.fence_regs = 0;
-    buffer_info->dest_v.dw1.tiled_surface = 0;
-    buffer_info->dest_v.dw1.walk = TILEWALK_XMAJOR;
-
-    buffer_info->dest_buf.dw0.type = CMD_3D;
-    buffer_info->dest_buf.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
-    buffer_info->dest_buf.dw0.length = 0;
-    buffer_info->dest_buf.dw1.dest_v_bias = 8; /* 0.5 */
-    buffer_info->dest_buf.dw1.dest_h_bias = 8; /* 0.5 */
-    buffer_info->dest_buf.dw1.color_fmt = COLORBUFFER_8BIT;
-    buffer_info->dest_buf.dw1.v_ls = 0; /* fill later */
-    buffer_info->dest_buf.dw1.v_ls_offset = 0; /* fill later */
-
-    buffer_info->dest_buf_mpeg.dw0.type = CMD_3D;
-    buffer_info->dest_buf_mpeg.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG;
-    buffer_info->dest_buf_mpeg.dw0.length = 1;
-    buffer_info->dest_buf_mpeg.dw1.decode_mode = MPEG_DECODE_MC;
-    buffer_info->dest_buf_mpeg.dw1.rcontrol = 0;               /* for MPEG-1/MPEG-2 */
-    buffer_info->dest_buf_mpeg.dw1.bidir_avrg_control = 0;     /* for MPEG-1/MPEG-2/MPEG-4 */
-    buffer_info->dest_buf_mpeg.dw1.abort_on_error = 1;
-    buffer_info->dest_buf_mpeg.dw1.intra8 = 0;         /* 16-bit formatted correction data */
-    buffer_info->dest_buf_mpeg.dw1.tff = 1; /* fill later */
-
-    buffer_info->dest_buf_mpeg.dw1.v_subsample_factor = MC_SUB_1V;
-    buffer_info->dest_buf_mpeg.dw1.h_subsample_factor = MC_SUB_1H;
-
-    buffer_info->corr.dw0.type = CMD_3D;
-    buffer_info->corr.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
-    buffer_info->corr.dw0.length = 1;
-    buffer_info->corr.dw1.aux_id = 0;
-    buffer_info->corr.dw1.buffer_id = BUFFERID_MC_INTRA_CORR;
-    buffer_info->corr.dw1.aux_id = 0;
-    buffer_info->corr.dw1.fence_regs = 0;
-    buffer_info->corr.dw1.tiled_surface = 0;
-    buffer_info->corr.dw1.walk = 0;
-    buffer_info->corr.dw1.pitch = 0;
-    buffer_info->corr.dw2.base_address = (pI915XvMC->corrdata.offset >> 2);  /* starting DWORD address */
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	struct i915_mc_static_indirect_state_buffer *buffer_info =
+	    (struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
+
+	memset(buffer_info, 0, sizeof(*buffer_info));
+	/* dest Y */
+	buffer_info->dest_y.dw0.type = CMD_3D;
+	buffer_info->dest_y.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+	buffer_info->dest_y.dw0.length = 1;
+	buffer_info->dest_y.dw1.aux_id = 0;
+	buffer_info->dest_y.dw1.buffer_id = BUFFERID_COLOR_BACK;
+	buffer_info->dest_y.dw1.fence_regs = 0;	/* disabled *//* FIXME: tiled y for performance */
+	buffer_info->dest_y.dw1.tiled_surface = 0;	/* linear */
+	buffer_info->dest_y.dw1.walk = TILEWALK_XMAJOR;
+
+	/* dest U */
+	buffer_info->dest_u.dw0.type = CMD_3D;
+	buffer_info->dest_u.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+	buffer_info->dest_u.dw0.length = 1;
+	buffer_info->dest_u.dw1.aux_id = 0;
+	buffer_info->dest_u.dw1.buffer_id = BUFFERID_COLOR_AUX;
+	buffer_info->dest_u.dw1.fence_regs = 0;
+	buffer_info->dest_u.dw1.tiled_surface = 0;
+	buffer_info->dest_u.dw1.walk = TILEWALK_XMAJOR;
+
+	/* dest V */
+	buffer_info->dest_v.dw0.type = CMD_3D;
+	buffer_info->dest_v.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+	buffer_info->dest_v.dw0.length = 1;
+	buffer_info->dest_v.dw1.aux_id = 1;
+	buffer_info->dest_v.dw1.buffer_id = BUFFERID_COLOR_AUX;
+	buffer_info->dest_v.dw1.fence_regs = 0;
+	buffer_info->dest_v.dw1.tiled_surface = 0;
+	buffer_info->dest_v.dw1.walk = TILEWALK_XMAJOR;
+
+	buffer_info->dest_buf.dw0.type = CMD_3D;
+	buffer_info->dest_buf.dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
+	buffer_info->dest_buf.dw0.length = 0;
+	buffer_info->dest_buf.dw1.dest_v_bias = 8;	/* 0.5 */
+	buffer_info->dest_buf.dw1.dest_h_bias = 8;	/* 0.5 */
+	buffer_info->dest_buf.dw1.color_fmt = COLORBUFFER_8BIT;
+	buffer_info->dest_buf.dw1.v_ls = 0;	/* fill later */
+	buffer_info->dest_buf.dw1.v_ls_offset = 0;	/* fill later */
+
+	buffer_info->dest_buf_mpeg.dw0.type = CMD_3D;
+	buffer_info->dest_buf_mpeg.dw0.opcode =
+	    OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG;
+	buffer_info->dest_buf_mpeg.dw0.length = 1;
+	buffer_info->dest_buf_mpeg.dw1.decode_mode = MPEG_DECODE_MC;
+	buffer_info->dest_buf_mpeg.dw1.rcontrol = 0;	/* for MPEG-1/MPEG-2 */
+	buffer_info->dest_buf_mpeg.dw1.bidir_avrg_control = 0;	/* for MPEG-1/MPEG-2/MPEG-4 */
+	buffer_info->dest_buf_mpeg.dw1.abort_on_error = 1;
+	buffer_info->dest_buf_mpeg.dw1.intra8 = 0;	/* 16-bit formatted correction data */
+	buffer_info->dest_buf_mpeg.dw1.tff = 1;	/* fill later */
+
+	buffer_info->dest_buf_mpeg.dw1.v_subsample_factor = MC_SUB_1V;
+	buffer_info->dest_buf_mpeg.dw1.h_subsample_factor = MC_SUB_1H;
+
+	buffer_info->corr.dw0.type = CMD_3D;
+	buffer_info->corr.dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+	buffer_info->corr.dw0.length = 1;
+	buffer_info->corr.dw1.aux_id = 0;
+	buffer_info->corr.dw1.buffer_id = BUFFERID_MC_INTRA_CORR;
+	buffer_info->corr.dw1.aux_id = 0;
+	buffer_info->corr.dw1.fence_regs = 0;
+	buffer_info->corr.dw1.tiled_surface = 0;
+	buffer_info->corr.dw1.walk = 0;
+	buffer_info->corr.dw1.pitch = 0;
+	buffer_info->corr.dw2.base_address = (pI915XvMC->corrdata.offset >> 2);	/* starting DWORD address */
 }
 
-static void i915_mc_static_indirect_state_set(XvMCContext *context, XvMCSurface *dest,
-	unsigned int picture_structure, unsigned int flags, unsigned int picture_coding_type)
+static void i915_mc_static_indirect_state_set(XvMCContext * context,
+					      XvMCSurface * dest,
+					      unsigned int picture_structure,
+					      unsigned int flags,
+					      unsigned int picture_coding_type)
 {
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    i915XvMCSurface *pI915Surface = (i915XvMCSurface *)dest->privData;
-    struct i915_mc_static_indirect_state_buffer *buffer_info =
-	(struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
-    unsigned int w = dest->width;
-
-    buffer_info->dest_y.dw1.pitch = (pI915Surface->yStride >> 2);      /* in DWords */
-    buffer_info->dest_y.dw2.base_address = (YOFFSET(pI915Surface) >> 2);    /* starting DWORD address */
-    buffer_info->dest_u.dw1.pitch = (pI915Surface->uvStride >> 2);      /* in DWords */
-    buffer_info->dest_u.dw2.base_address = (UOFFSET(pI915Surface) >> 2);      /* starting DWORD address */
-    buffer_info->dest_v.dw1.pitch = (pI915Surface->uvStride >> 2);      /* in Dwords */
-    buffer_info->dest_v.dw2.base_address = (VOFFSET(pI915Surface) >> 2);      /* starting DWORD address */
-
-    if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
-        ;
-    } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_TOP_FIELD) {
-        buffer_info->dest_buf.dw1.v_ls = 1;
-    } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_BOTTOM_FIELD) {
-        buffer_info->dest_buf.dw1.v_ls = 1;
-        buffer_info->dest_buf.dw1.v_ls_offset = 1;
-    }
-
-    if (picture_structure & XVMC_FRAME_PICTURE) {
-        ;
-    } else if (picture_structure & XVMC_TOP_FIELD) {
-        if (flags & XVMC_SECOND_FIELD)
-            buffer_info->dest_buf_mpeg.dw1.tff = 0;
-        else
-            buffer_info->dest_buf_mpeg.dw1.tff = 1;
-    } else if (picture_structure & XVMC_BOTTOM_FIELD) {
-        if (flags & XVMC_SECOND_FIELD)
-            buffer_info->dest_buf_mpeg.dw1.tff = 1;
-        else
-            buffer_info->dest_buf_mpeg.dw1.tff = 0;
-    }
-
-    buffer_info->dest_buf_mpeg.dw1.picture_width = (dest->width >> 4);     /* in macroblocks */
-    buffer_info->dest_buf_mpeg.dw2.picture_coding_type = picture_coding_type;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	i915XvMCSurface *pI915Surface = (i915XvMCSurface *) dest->privData;
+	struct i915_mc_static_indirect_state_buffer *buffer_info =
+	    (struct i915_mc_static_indirect_state_buffer *)pI915XvMC->sis.map;
+	unsigned int w = dest->width;
+
+	buffer_info->dest_y.dw1.pitch = (pI915Surface->yStride >> 2);	/* in DWords */
+	buffer_info->dest_y.dw2.base_address = (YOFFSET(pI915Surface) >> 2);	/* starting DWORD address */
+	buffer_info->dest_u.dw1.pitch = (pI915Surface->uvStride >> 2);	/* in DWords */
+	buffer_info->dest_u.dw2.base_address = (UOFFSET(pI915Surface) >> 2);	/* starting DWORD address */
+	buffer_info->dest_v.dw1.pitch = (pI915Surface->uvStride >> 2);	/* in Dwords */
+	buffer_info->dest_v.dw2.base_address = (VOFFSET(pI915Surface) >> 2);	/* starting DWORD address */
+
+	if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
+		;
+	} else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_TOP_FIELD) {
+		buffer_info->dest_buf.dw1.v_ls = 1;
+	} else if ((picture_structure & XVMC_FRAME_PICTURE) ==
+		   XVMC_BOTTOM_FIELD) {
+		buffer_info->dest_buf.dw1.v_ls = 1;
+		buffer_info->dest_buf.dw1.v_ls_offset = 1;
+	}
+
+	if (picture_structure & XVMC_FRAME_PICTURE) {
+		;
+	} else if (picture_structure & XVMC_TOP_FIELD) {
+		if (flags & XVMC_SECOND_FIELD)
+			buffer_info->dest_buf_mpeg.dw1.tff = 0;
+		else
+			buffer_info->dest_buf_mpeg.dw1.tff = 1;
+	} else if (picture_structure & XVMC_BOTTOM_FIELD) {
+		if (flags & XVMC_SECOND_FIELD)
+			buffer_info->dest_buf_mpeg.dw1.tff = 1;
+		else
+			buffer_info->dest_buf_mpeg.dw1.tff = 0;
+	}
+
+	buffer_info->dest_buf_mpeg.dw1.picture_width = (dest->width >> 4);	/* in macroblocks */
+	buffer_info->dest_buf_mpeg.dw2.picture_coding_type =
+	    picture_coding_type;
 }
 
-static void i915_mc_map_state_init(XvMCContext *context)
+static void i915_mc_map_state_init(XvMCContext * context)
 {
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    unsigned int w = context->width;
-    unsigned int h = context->height;
-    struct i915_mc_map_state *map_state;
-
-    map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
-
-    memset(map_state, 0, sizeof(*map_state));
-
-    /* 3DSATE_MAP_STATE: Y */
-    map_state->y_map.dw0.type = CMD_3D;
-    map_state->y_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
-    map_state->y_map.dw0.retain = 1;
-    map_state->y_map.dw0.length = 6;
-    map_state->y_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
-
-    /* Y Forward (Past) */
-    map_state->y_forward.tm0.v_ls_offset = 0;
-    map_state->y_forward.tm0.v_ls = 0;
-    map_state->y_forward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->y_forward.tm1.tiled_surface = 0;
-    map_state->y_forward.tm1.utilize_fence_regs = 0;
-    map_state->y_forward.tm1.texel_fmt = 0;      /* 8bit */
-    map_state->y_forward.tm1.surface_fmt = 1;    /* 8bit */
-    map_state->y_forward.tm1.width = w - 1;
-    map_state->y_forward.tm1.height = h - 1;
-    map_state->y_forward.tm2.depth = 0;
-    map_state->y_forward.tm2.max_lod = 0;
-    map_state->y_forward.tm2.cube_face = 0;
-
-    /* Y Backward (Future) */
-    map_state->y_backward.tm0.v_ls_offset = 0;
-    map_state->y_backward.tm0.v_ls = 0;
-    map_state->y_backward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->y_backward.tm1.tiled_surface = 0;
-    map_state->y_backward.tm1.utilize_fence_regs = 0;
-    map_state->y_backward.tm1.texel_fmt = 0;      /* 8bit */
-    map_state->y_backward.tm1.surface_fmt = 1;    /* 8bit */
-    map_state->y_backward.tm1.width = w - 1;
-    map_state->y_backward.tm1.height = h - 1;
-    map_state->y_backward.tm2.depth = 0;
-    map_state->y_backward.tm2.max_lod = 0;
-    map_state->y_backward.tm2.cube_face = 0;
-
-    /* 3DSATE_MAP_STATE: U */
-    map_state->u_map.dw0.type = CMD_3D;
-    map_state->u_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
-    map_state->u_map.dw0.retain = 1;
-    map_state->u_map.dw0.length = 6;
-    map_state->u_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
-
-    /* U Forward */
-    map_state->u_forward.tm0.v_ls_offset = 0;
-    map_state->u_forward.tm0.v_ls = 0;
-    map_state->u_forward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->u_forward.tm1.tiled_surface = 0;
-    map_state->u_forward.tm1.utilize_fence_regs = 0;
-    map_state->u_forward.tm1.texel_fmt = 0;      /* 8bit */
-    map_state->u_forward.tm1.surface_fmt = 1;    /* 8bit */
-    map_state->u_forward.tm1.width = (w >> 1) - 1;
-    map_state->u_forward.tm1.height = (h >> 1) - 1;
-    map_state->u_forward.tm2.depth = 0;
-    map_state->u_forward.tm2.max_lod = 0;
-    map_state->u_forward.tm2.cube_face = 0;
-
-    /* U Backward */
-    map_state->u_backward.tm0.v_ls_offset = 0;
-    map_state->u_backward.tm0.v_ls = 0;
-    map_state->u_backward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->u_backward.tm1.tiled_surface = 0;
-    map_state->u_backward.tm1.utilize_fence_regs = 0;
-    map_state->u_backward.tm1.texel_fmt = 0;
-    map_state->u_backward.tm1.surface_fmt = 1;
-    map_state->u_backward.tm1.width = (w >> 1) - 1;
-    map_state->u_backward.tm1.height = (h >> 1) - 1;
-    map_state->u_backward.tm2.depth = 0;
-    map_state->u_backward.tm2.max_lod = 0;
-    map_state->u_backward.tm2.cube_face = 0;
-
-    /* 3DSATE_MAP_STATE: V */
-    map_state->v_map.dw0.type = CMD_3D;
-    map_state->v_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
-    map_state->v_map.dw0.retain = 1;
-    map_state->v_map.dw0.length = 6;
-    map_state->v_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
-
-    /* V Forward */
-    map_state->v_forward.tm0.v_ls_offset = 0;
-    map_state->v_forward.tm0.v_ls = 0;
-    map_state->v_forward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->v_forward.tm1.tiled_surface = 0;
-    map_state->v_forward.tm1.utilize_fence_regs = 0;
-    map_state->v_forward.tm1.texel_fmt = 0;
-    map_state->v_forward.tm1.surface_fmt = 1;
-    map_state->v_forward.tm1.width = (w >> 1) - 1;
-    map_state->v_forward.tm1.height = (h >> 1) - 1;
-    map_state->v_forward.tm2.depth = 0;
-    map_state->v_forward.tm2.max_lod = 0;
-    map_state->v_forward.tm2.cube_face = 0;
-
-    /* V Backward */
-    map_state->v_backward.tm0.v_ls_offset = 0;
-    map_state->v_backward.tm0.v_ls = 0;
-    map_state->v_backward.tm1.tile_walk = TILEWALK_XMAJOR;
-    map_state->v_backward.tm1.tiled_surface = 0;
-    map_state->v_backward.tm1.utilize_fence_regs = 0;
-    map_state->v_backward.tm1.texel_fmt = 0;
-    map_state->v_backward.tm1.surface_fmt = 1;
-    map_state->v_backward.tm1.width = (w >> 1) - 1;
-    map_state->v_backward.tm1.height = (h >> 1) - 1;
-    map_state->v_backward.tm2.depth = 0;
-    map_state->v_backward.tm2.max_lod = 0;
-    map_state->v_backward.tm2.cube_face = 0;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	unsigned int w = context->width;
+	unsigned int h = context->height;
+	struct i915_mc_map_state *map_state;
+
+	map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
+
+	memset(map_state, 0, sizeof(*map_state));
+
+	/* 3DSATE_MAP_STATE: Y */
+	map_state->y_map.dw0.type = CMD_3D;
+	map_state->y_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
+	map_state->y_map.dw0.retain = 1;
+	map_state->y_map.dw0.length = 6;
+	map_state->y_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
+
+	/* Y Forward (Past) */
+	map_state->y_forward.tm0.v_ls_offset = 0;
+	map_state->y_forward.tm0.v_ls = 0;
+	map_state->y_forward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->y_forward.tm1.tiled_surface = 0;
+	map_state->y_forward.tm1.utilize_fence_regs = 0;
+	map_state->y_forward.tm1.texel_fmt = 0;	/* 8bit */
+	map_state->y_forward.tm1.surface_fmt = 1;	/* 8bit */
+	map_state->y_forward.tm1.width = w - 1;
+	map_state->y_forward.tm1.height = h - 1;
+	map_state->y_forward.tm2.depth = 0;
+	map_state->y_forward.tm2.max_lod = 0;
+	map_state->y_forward.tm2.cube_face = 0;
+
+	/* Y Backward (Future) */
+	map_state->y_backward.tm0.v_ls_offset = 0;
+	map_state->y_backward.tm0.v_ls = 0;
+	map_state->y_backward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->y_backward.tm1.tiled_surface = 0;
+	map_state->y_backward.tm1.utilize_fence_regs = 0;
+	map_state->y_backward.tm1.texel_fmt = 0;	/* 8bit */
+	map_state->y_backward.tm1.surface_fmt = 1;	/* 8bit */
+	map_state->y_backward.tm1.width = w - 1;
+	map_state->y_backward.tm1.height = h - 1;
+	map_state->y_backward.tm2.depth = 0;
+	map_state->y_backward.tm2.max_lod = 0;
+	map_state->y_backward.tm2.cube_face = 0;
+
+	/* 3DSATE_MAP_STATE: U */
+	map_state->u_map.dw0.type = CMD_3D;
+	map_state->u_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
+	map_state->u_map.dw0.retain = 1;
+	map_state->u_map.dw0.length = 6;
+	map_state->u_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
+
+	/* U Forward */
+	map_state->u_forward.tm0.v_ls_offset = 0;
+	map_state->u_forward.tm0.v_ls = 0;
+	map_state->u_forward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->u_forward.tm1.tiled_surface = 0;
+	map_state->u_forward.tm1.utilize_fence_regs = 0;
+	map_state->u_forward.tm1.texel_fmt = 0;	/* 8bit */
+	map_state->u_forward.tm1.surface_fmt = 1;	/* 8bit */
+	map_state->u_forward.tm1.width = (w >> 1) - 1;
+	map_state->u_forward.tm1.height = (h >> 1) - 1;
+	map_state->u_forward.tm2.depth = 0;
+	map_state->u_forward.tm2.max_lod = 0;
+	map_state->u_forward.tm2.cube_face = 0;
+
+	/* U Backward */
+	map_state->u_backward.tm0.v_ls_offset = 0;
+	map_state->u_backward.tm0.v_ls = 0;
+	map_state->u_backward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->u_backward.tm1.tiled_surface = 0;
+	map_state->u_backward.tm1.utilize_fence_regs = 0;
+	map_state->u_backward.tm1.texel_fmt = 0;
+	map_state->u_backward.tm1.surface_fmt = 1;
+	map_state->u_backward.tm1.width = (w >> 1) - 1;
+	map_state->u_backward.tm1.height = (h >> 1) - 1;
+	map_state->u_backward.tm2.depth = 0;
+	map_state->u_backward.tm2.max_lod = 0;
+	map_state->u_backward.tm2.cube_face = 0;
+
+	/* 3DSATE_MAP_STATE: V */
+	map_state->v_map.dw0.type = CMD_3D;
+	map_state->v_map.dw0.opcode = OPC_3DSTATE_MAP_STATE;
+	map_state->v_map.dw0.retain = 1;
+	map_state->v_map.dw0.length = 6;
+	map_state->v_map.dw1.map_mask = MAP_MAP0 | MAP_MAP1;
+
+	/* V Forward */
+	map_state->v_forward.tm0.v_ls_offset = 0;
+	map_state->v_forward.tm0.v_ls = 0;
+	map_state->v_forward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->v_forward.tm1.tiled_surface = 0;
+	map_state->v_forward.tm1.utilize_fence_regs = 0;
+	map_state->v_forward.tm1.texel_fmt = 0;
+	map_state->v_forward.tm1.surface_fmt = 1;
+	map_state->v_forward.tm1.width = (w >> 1) - 1;
+	map_state->v_forward.tm1.height = (h >> 1) - 1;
+	map_state->v_forward.tm2.depth = 0;
+	map_state->v_forward.tm2.max_lod = 0;
+	map_state->v_forward.tm2.cube_face = 0;
+
+	/* V Backward */
+	map_state->v_backward.tm0.v_ls_offset = 0;
+	map_state->v_backward.tm0.v_ls = 0;
+	map_state->v_backward.tm1.tile_walk = TILEWALK_XMAJOR;
+	map_state->v_backward.tm1.tiled_surface = 0;
+	map_state->v_backward.tm1.utilize_fence_regs = 0;
+	map_state->v_backward.tm1.texel_fmt = 0;
+	map_state->v_backward.tm1.surface_fmt = 1;
+	map_state->v_backward.tm1.width = (w >> 1) - 1;
+	map_state->v_backward.tm1.height = (h >> 1) - 1;
+	map_state->v_backward.tm2.depth = 0;
+	map_state->v_backward.tm2.max_lod = 0;
+	map_state->v_backward.tm2.cube_face = 0;
 }
 
-static void i915_mc_map_state_set(XvMCContext *context,
-	i915XvMCSurface *privPast,
-	i915XvMCSurface *privFuture)
+static void i915_mc_map_state_set(XvMCContext * context,
+				  i915XvMCSurface * privPast,
+				  i915XvMCSurface * privFuture)
 {
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    struct i915_mc_map_state *map_state;
-
-    map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
-
-    map_state->y_forward.tm0.base_address = (YOFFSET(privPast) >> 2);
-    map_state->y_forward.tm2.pitch = (privPast->yStride >> 2) - 1;       /* in DWords - 1 */
-    map_state->y_backward.tm0.base_address = (YOFFSET(privFuture) >> 2);
-    map_state->y_backward.tm2.pitch = (privFuture->yStride >> 2) - 1;
-    map_state->u_forward.tm0.base_address = (UOFFSET(privPast) >> 2);
-    map_state->u_forward.tm2.pitch = (privPast->uvStride >> 2) - 1;       /* in DWords - 1 */
-    map_state->u_backward.tm0.base_address = (UOFFSET(privFuture) >> 2);
-    map_state->u_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
-    map_state->v_forward.tm0.base_address = (VOFFSET(privPast) >> 2);
-    map_state->v_forward.tm2.pitch = (privPast->uvStride >> 2) - 1;       /* in DWords - 1 */
-    map_state->v_backward.tm0.base_address = (VOFFSET(privFuture) >> 2);
-    map_state->v_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	struct i915_mc_map_state *map_state;
+
+	map_state = (struct i915_mc_map_state *)pI915XvMC->msb.map;
+
+	map_state->y_forward.tm0.base_address = (YOFFSET(privPast) >> 2);
+	map_state->y_forward.tm2.pitch = (privPast->yStride >> 2) - 1;	/* in DWords - 1 */
+	map_state->y_backward.tm0.base_address = (YOFFSET(privFuture) >> 2);
+	map_state->y_backward.tm2.pitch = (privFuture->yStride >> 2) - 1;
+	map_state->u_forward.tm0.base_address = (UOFFSET(privPast) >> 2);
+	map_state->u_forward.tm2.pitch = (privPast->uvStride >> 2) - 1;	/* in DWords - 1 */
+	map_state->u_backward.tm0.base_address = (UOFFSET(privFuture) >> 2);
+	map_state->u_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
+	map_state->v_forward.tm0.base_address = (VOFFSET(privPast) >> 2);
+	map_state->v_forward.tm2.pitch = (privPast->uvStride >> 2) - 1;	/* in DWords - 1 */
+	map_state->v_backward.tm0.base_address = (VOFFSET(privFuture) >> 2);
+	map_state->v_backward.tm2.pitch = (privFuture->uvStride >> 2) - 1;
 }
 
 static void i915_flush(int map, int render)
 {
-    struct i915_mi_flush mi_flush;
+	struct i915_mi_flush mi_flush;
 
-    memset(&mi_flush, 0, sizeof(mi_flush));
-    mi_flush.dw0.type = CMD_MI;
-    mi_flush.dw0.opcode = OPC_MI_FLUSH;
-    mi_flush.dw0.map_cache_invalidate = map;
-    mi_flush.dw0.render_cache_flush_inhibit = render;
+	memset(&mi_flush, 0, sizeof(mi_flush));
+	mi_flush.dw0.type = CMD_MI;
+	mi_flush.dw0.opcode = OPC_MI_FLUSH;
+	mi_flush.dw0.map_cache_invalidate = map;
+	mi_flush.dw0.render_cache_flush_inhibit = render;
 
-    intelBatchbufferData(&mi_flush, sizeof(mi_flush), 0);
+	intelBatchbufferData(&mi_flush, sizeof(mi_flush), 0);
 }
 
-static void i915_mc_load_indirect_render_init(XvMCContext *context)
+static void i915_mc_load_indirect_render_init(XvMCContext * context)
 {
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    sis_state *sis;
-    msb_state *msb;
-    struct i915_3dstate_load_indirect *load_indirect;
-    int mem_select;
-
-    mc_render_load_indirect_size = sizeof(*load_indirect) + sizeof(*sis)
-					+ sizeof(*msb);
-    mc_render_load_indirect = calloc(1, mc_render_load_indirect_size);
-
-    load_indirect = (struct i915_3dstate_load_indirect *)mc_render_load_indirect;
-    load_indirect->dw0.type = CMD_3D;
-    load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
-    load_indirect->dw0.block_mask = BLOCK_SIS | BLOCK_MSB;
-    load_indirect->dw0.length = (mc_render_load_indirect_size >> 2) - 2;
-
-    if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM)
-        mem_select = 0;
-    else
-	mem_select = 1;
-
-    load_indirect->dw0.mem_select = mem_select;
-
-    /* Static Indirect state buffer (dest buffer info) */
-    sis = (sis_state *)(++load_indirect);
-    sis->dw0.valid = 1;
-    sis->dw0.force = 1;
-    sis->dw1.length = 16; /* 4 * 3 + 2 + 3 - 1 */
-
-    if (mem_select)
-	sis->dw0.buffer_address = (pI915XvMC->sis.offset >> 2);
-    else
-	sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2);
-
-    /* Map state buffer (reference buffer info) */
-    msb = (msb_state *)(++sis);
-    msb->dw0.valid = 1;
-    msb->dw0.force = 1;
-    msb->dw1.length = 23; /* 3 * 8 - 1 */
-
-    if (mem_select)
-	msb->dw0.buffer_address = (pI915XvMC->msb.offset >> 2);
-    else
-	msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2);
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	sis_state *sis;
+	msb_state *msb;
+	struct i915_3dstate_load_indirect *load_indirect;
+	int mem_select;
+
+	mc_render_load_indirect_size = sizeof(*load_indirect) + sizeof(*sis)
+	    + sizeof(*msb);
+	mc_render_load_indirect = calloc(1, mc_render_load_indirect_size);
+
+	load_indirect =
+	    (struct i915_3dstate_load_indirect *)mc_render_load_indirect;
+	load_indirect->dw0.type = CMD_3D;
+	load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
+	load_indirect->dw0.block_mask = BLOCK_SIS | BLOCK_MSB;
+	load_indirect->dw0.length = (mc_render_load_indirect_size >> 2) - 2;
+
+	if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
+	    pI915XvMC->deviceID == PCI_CHIP_I915_GM)
+		mem_select = 0;
+	else
+		mem_select = 1;
+
+	load_indirect->dw0.mem_select = mem_select;
+
+	/* Static Indirect state buffer (dest buffer info) */
+	sis = (sis_state *) (++load_indirect);
+	sis->dw0.valid = 1;
+	sis->dw0.force = 1;
+	sis->dw1.length = 16;	/* 4 * 3 + 2 + 3 - 1 */
+
+	if (mem_select)
+		sis->dw0.buffer_address = (pI915XvMC->sis.offset >> 2);
+	else
+		sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2);
+
+	/* Map state buffer (reference buffer info) */
+	msb = (msb_state *) (++sis);
+	msb->dw0.valid = 1;
+	msb->dw0.force = 1;
+	msb->dw1.length = 23;	/* 3 * 8 - 1 */
+
+	if (mem_select)
+		msb->dw0.buffer_address = (pI915XvMC->msb.offset >> 2);
+	else
+		msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2);
 }
 
 static void i915_mc_load_indirect_render_emit(void)
 {
-    i915_emit_batch(mc_render_load_indirect, mc_render_load_indirect_size, 0);
+	i915_emit_batch(mc_render_load_indirect, mc_render_load_indirect_size,
+			0);
 }
 
-static void i915_mc_mpeg_set_origin(XvMCContext *context, XvMCMacroBlock *mb)
+static void i915_mc_mpeg_set_origin(XvMCContext * context, XvMCMacroBlock * mb)
 {
-    struct i915_3dmpeg_set_origin set_origin;
+	struct i915_3dmpeg_set_origin set_origin;
 
-    /* 3DMPEG_SET_ORIGIN */
-    memset(&set_origin, 0, sizeof(set_origin));
-    set_origin.dw0.type = CMD_3D;
-    set_origin.dw0.opcode = OPC_3DMPEG_SET_ORIGIN;
-    set_origin.dw0.length = 0;
-    set_origin.dw1.h_origin = mb->x;
-    set_origin.dw1.v_origin = mb->y;
+	/* 3DMPEG_SET_ORIGIN */
+	memset(&set_origin, 0, sizeof(set_origin));
+	set_origin.dw0.type = CMD_3D;
+	set_origin.dw0.opcode = OPC_3DMPEG_SET_ORIGIN;
+	set_origin.dw0.length = 0;
+	set_origin.dw1.h_origin = mb->x;
+	set_origin.dw1.v_origin = mb->y;
 
-    intelBatchbufferData(&set_origin, sizeof(set_origin), 0);
+	intelBatchbufferData(&set_origin, sizeof(set_origin), 0);
 }
 
-static void i915_mc_mpeg_macroblock_ipicture(XvMCContext *context, XvMCMacroBlock *mb)
+static void i915_mc_mpeg_macroblock_ipicture(XvMCContext * context,
+					     XvMCMacroBlock * mb)
 {
-    struct i915_3dmpeg_macroblock_ipicture macroblock_ipicture;
+	struct i915_3dmpeg_macroblock_ipicture macroblock_ipicture;
 
-    /* 3DMPEG_MACROBLOCK_IPICTURE */
-    memset(&macroblock_ipicture, 0, sizeof(macroblock_ipicture));
-    macroblock_ipicture.dw0.type = CMD_3D;
-    macroblock_ipicture.dw0.opcode = OPC_3DMPEG_MACROBLOCK_IPICTURE;
-    macroblock_ipicture.dw0.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD);
+	/* 3DMPEG_MACROBLOCK_IPICTURE */
+	memset(&macroblock_ipicture, 0, sizeof(macroblock_ipicture));
+	macroblock_ipicture.dw0.type = CMD_3D;
+	macroblock_ipicture.dw0.opcode = OPC_3DMPEG_MACROBLOCK_IPICTURE;
+	macroblock_ipicture.dw0.dct_type =
+	    (mb->dct_type == XVMC_DCT_TYPE_FIELD);
 
-    intelBatchbufferData(&macroblock_ipicture, sizeof(macroblock_ipicture), 0);
+	intelBatchbufferData(&macroblock_ipicture, sizeof(macroblock_ipicture),
+			     0);
 }
 
 #if 0
-static void i915_mc_mpeg_macroblock_0mv(XvMCContext *context, XvMCMacroBlock *mb)
+static void i915_mc_mpeg_macroblock_0mv(XvMCContext * context,
+					XvMCMacroBlock * mb)
 {
-    struct i915_3dmpeg_macroblock_0mv macroblock_0mv;
-
-    /* 3DMPEG_MACROBLOCK(0mv) */
-    memset(&macroblock_0mv, 0, sizeof(macroblock_0mv));
-    macroblock_0mv.header.dw0.type = CMD_3D;
-    macroblock_0mv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
-    macroblock_0mv.header.dw0.length = 0;
-    macroblock_0mv.header.dw1.mb_intra = 1;     /* should be 1 */
-    macroblock_0mv.header.dw1.forward = 0;      /* should be 0 */
-    macroblock_0mv.header.dw1.backward = 0;     /* should be 0 */
-    macroblock_0mv.header.dw1.h263_4mv = 0;     /* should be 0 */
-    macroblock_0mv.header.dw1.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD);
+	struct i915_3dmpeg_macroblock_0mv macroblock_0mv;
+
+	/* 3DMPEG_MACROBLOCK(0mv) */
+	memset(&macroblock_0mv, 0, sizeof(macroblock_0mv));
+	macroblock_0mv.header.dw0.type = CMD_3D;
+	macroblock_0mv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
+	macroblock_0mv.header.dw0.length = 0;
+	macroblock_0mv.header.dw1.mb_intra = 1;	/* should be 1 */
+	macroblock_0mv.header.dw1.forward = 0;	/* should be 0 */
+	macroblock_0mv.header.dw1.backward = 0;	/* should be 0 */
+	macroblock_0mv.header.dw1.h263_4mv = 0;	/* should be 0 */
+	macroblock_0mv.header.dw1.dct_type =
+	    (mb->dct_type == XVMC_DCT_TYPE_FIELD);
 
 /*
     if (!mb->coded_block_pattern)
         macroblock_0mv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
 */
 
-    macroblock_0mv.header.dw1.motion_type = 0; // (mb->motion_type & 0x3);
-    macroblock_0mv.header.dw1.vertical_field_select = 0; // mb->motion_vertical_field_select & 0xf;
-    macroblock_0mv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
-    macroblock_0mv.header.dw1.skipped_macroblocks = 0;
+	macroblock_0mv.header.dw1.motion_type = 0;	// (mb->motion_type & 0x3);
+	macroblock_0mv.header.dw1.vertical_field_select = 0;	// mb->motion_vertical_field_select & 0xf;
+	macroblock_0mv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
+	macroblock_0mv.header.dw1.skipped_macroblocks = 0;
 
-    intelBatchbufferData(&macroblock_0mv, sizeof(macroblock_0mv), 0);
+	intelBatchbufferData(&macroblock_0mv, sizeof(macroblock_0mv), 0);
 }
 #endif
 
-static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext *context, XvMCMacroBlock *mb)
+static void i915_mc_mpeg_macroblock_1fbmv(XvMCContext * context,
+					  XvMCMacroBlock * mb)
 {
-    struct i915_3dmpeg_macroblock_1fbmv macroblock_1fbmv;
-    vector_t mv0[2];
-
-    /* 3DMPEG_MACROBLOCK(1fbmv) */
-    memset(&macroblock_1fbmv, 0, sizeof(macroblock_1fbmv));
-    macroblock_1fbmv.header.dw0.type = CMD_3D;
-    macroblock_1fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
-    macroblock_1fbmv.header.dw0.length = 2;
-    macroblock_1fbmv.header.dw1.mb_intra = 0;   /* should be 0 */
-    macroblock_1fbmv.header.dw1.forward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0);
-    macroblock_1fbmv.header.dw1.backward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0);
-    macroblock_1fbmv.header.dw1.h263_4mv = 0;   /* should be 0 */
-    macroblock_1fbmv.header.dw1.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD);
-
-    if (!(mb->coded_block_pattern & 0x3f))
-        macroblock_1fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
-
-    macroblock_1fbmv.header.dw1.motion_type = (mb->motion_type & 0x03);
-    macroblock_1fbmv.header.dw1.vertical_field_select = (mb->motion_vertical_field_select & 0x0f);
-    macroblock_1fbmv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
-    macroblock_1fbmv.header.dw1.skipped_macroblocks = 0;
-
-    mv0[0].component[0] = mb->PMV[0][0][0];
-    mv0[0].component[1] = mb->PMV[0][0][1];
-    mv0[1].component[0] = mb->PMV[0][1][0];
-    mv0[1].component[1] = mb->PMV[0][1][1];
-
-    macroblock_1fbmv.dw2 = mv0[0].v;
-    macroblock_1fbmv.dw3 = mv0[1].v;
-
-    intelBatchbufferData(&macroblock_1fbmv, sizeof(macroblock_1fbmv), 0);
+	struct i915_3dmpeg_macroblock_1fbmv macroblock_1fbmv;
+	vector_t mv0[2];
+
+	/* 3DMPEG_MACROBLOCK(1fbmv) */
+	memset(&macroblock_1fbmv, 0, sizeof(macroblock_1fbmv));
+	macroblock_1fbmv.header.dw0.type = CMD_3D;
+	macroblock_1fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
+	macroblock_1fbmv.header.dw0.length = 2;
+	macroblock_1fbmv.header.dw1.mb_intra = 0;	/* should be 0 */
+	macroblock_1fbmv.header.dw1.forward =
+	    ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0);
+	macroblock_1fbmv.header.dw1.backward =
+	    ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0);
+	macroblock_1fbmv.header.dw1.h263_4mv = 0;	/* should be 0 */
+	macroblock_1fbmv.header.dw1.dct_type =
+	    (mb->dct_type == XVMC_DCT_TYPE_FIELD);
+
+	if (!(mb->coded_block_pattern & 0x3f))
+		macroblock_1fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
+
+	macroblock_1fbmv.header.dw1.motion_type = (mb->motion_type & 0x03);
+	macroblock_1fbmv.header.dw1.vertical_field_select =
+	    (mb->motion_vertical_field_select & 0x0f);
+	macroblock_1fbmv.header.dw1.coded_block_pattern =
+	    mb->coded_block_pattern;
+	macroblock_1fbmv.header.dw1.skipped_macroblocks = 0;
+
+	mv0[0].component[0] = mb->PMV[0][0][0];
+	mv0[0].component[1] = mb->PMV[0][0][1];
+	mv0[1].component[0] = mb->PMV[0][1][0];
+	mv0[1].component[1] = mb->PMV[0][1][1];
+
+	macroblock_1fbmv.dw2 = mv0[0].v;
+	macroblock_1fbmv.dw3 = mv0[1].v;
+
+	intelBatchbufferData(&macroblock_1fbmv, sizeof(macroblock_1fbmv), 0);
 }
 
-static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext *context, XvMCMacroBlock *mb, unsigned int ps)
+static void i915_mc_mpeg_macroblock_2fbmv(XvMCContext * context,
+					  XvMCMacroBlock * mb, unsigned int ps)
 {
-    struct i915_3dmpeg_macroblock_2fbmv macroblock_2fbmv;
-    vector_t mv0[2];
-    vector_t mv1[2];
-
-    /* 3DMPEG_MACROBLOCK(2fbmv) */
-    memset(&macroblock_2fbmv, 0, sizeof(macroblock_2fbmv));
-    macroblock_2fbmv.header.dw0.type = CMD_3D;
-    macroblock_2fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
-    macroblock_2fbmv.header.dw0.length = 4;
-    macroblock_2fbmv.header.dw1.mb_intra = 0;   /* should be 0 */
-    macroblock_2fbmv.header.dw1.forward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0);
-    macroblock_2fbmv.header.dw1.backward = ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0);
-    macroblock_2fbmv.header.dw1.h263_4mv = 0;   /* should be 0 */
-    macroblock_2fbmv.header.dw1.dct_type = (mb->dct_type == XVMC_DCT_TYPE_FIELD);
-
-    if (!(mb->coded_block_pattern & 0x3f))
-        macroblock_2fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
-
-    macroblock_2fbmv.header.dw1.motion_type = (mb->motion_type & 0x03);
-    macroblock_2fbmv.header.dw1.vertical_field_select = (mb->motion_vertical_field_select & 0x0f);
-    macroblock_2fbmv.header.dw1.coded_block_pattern = mb->coded_block_pattern;
-    macroblock_2fbmv.header.dw1.skipped_macroblocks = 0;
-
-    mv0[0].component[0] = mb->PMV[0][0][0];
-    mv0[0].component[1] = mb->PMV[0][0][1];
-    mv0[1].component[0] = mb->PMV[0][1][0];
-    mv0[1].component[1] = mb->PMV[0][1][1];
-    mv1[0].component[0] = mb->PMV[1][0][0];
-    mv1[0].component[1] = mb->PMV[1][0][1];
-    mv1[1].component[0] = mb->PMV[1][1][0];
-    mv1[1].component[1] = mb->PMV[1][1][1];
-
-    if ((ps & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
-        if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) {
-            mv0[0].component[1] = mb->PMV[0][0][1] >> 1;
-            mv0[1].component[1] = mb->PMV[0][1][1] >> 1;
-            mv1[0].component[1] = mb->PMV[1][0][1] >> 1;
-            mv1[1].component[1] = mb->PMV[1][1][1] >> 1;
-        } else if ((mb->motion_type & 3) == XVMC_PREDICTION_DUAL_PRIME) {
-            mv0[0].component[1] = mb->PMV[0][0][1] >> 1;
-            mv0[1].component[1] = mb->PMV[0][1][1] >> 1;  // MPEG2 MV[0][1] isn't used
-            mv1[0].component[1] = mb->PMV[1][0][1] >> 1;
-            mv1[1].component[1] = mb->PMV[1][1][1] >> 1;
-        }
-    }
-
-    macroblock_2fbmv.dw2 = mv0[0].v;
-    macroblock_2fbmv.dw3 = mv0[1].v;
-    macroblock_2fbmv.dw4 = mv1[0].v;
-    macroblock_2fbmv.dw5 = mv1[1].v;
-
-    intelBatchbufferData(&macroblock_2fbmv, sizeof(macroblock_2fbmv), 0);
+	struct i915_3dmpeg_macroblock_2fbmv macroblock_2fbmv;
+	vector_t mv0[2];
+	vector_t mv1[2];
+
+	/* 3DMPEG_MACROBLOCK(2fbmv) */
+	memset(&macroblock_2fbmv, 0, sizeof(macroblock_2fbmv));
+	macroblock_2fbmv.header.dw0.type = CMD_3D;
+	macroblock_2fbmv.header.dw0.opcode = OPC_3DMPEG_MACROBLOCK;
+	macroblock_2fbmv.header.dw0.length = 4;
+	macroblock_2fbmv.header.dw1.mb_intra = 0;	/* should be 0 */
+	macroblock_2fbmv.header.dw1.forward =
+	    ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD) ? 1 : 0);
+	macroblock_2fbmv.header.dw1.backward =
+	    ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD) ? 1 : 0);
+	macroblock_2fbmv.header.dw1.h263_4mv = 0;	/* should be 0 */
+	macroblock_2fbmv.header.dw1.dct_type =
+	    (mb->dct_type == XVMC_DCT_TYPE_FIELD);
+
+	if (!(mb->coded_block_pattern & 0x3f))
+		macroblock_2fbmv.header.dw1.dct_type = XVMC_DCT_TYPE_FRAME;
+
+	macroblock_2fbmv.header.dw1.motion_type = (mb->motion_type & 0x03);
+	macroblock_2fbmv.header.dw1.vertical_field_select =
+	    (mb->motion_vertical_field_select & 0x0f);
+	macroblock_2fbmv.header.dw1.coded_block_pattern =
+	    mb->coded_block_pattern;
+	macroblock_2fbmv.header.dw1.skipped_macroblocks = 0;
+
+	mv0[0].component[0] = mb->PMV[0][0][0];
+	mv0[0].component[1] = mb->PMV[0][0][1];
+	mv0[1].component[0] = mb->PMV[0][1][0];
+	mv0[1].component[1] = mb->PMV[0][1][1];
+	mv1[0].component[0] = mb->PMV[1][0][0];
+	mv1[0].component[1] = mb->PMV[1][0][1];
+	mv1[1].component[0] = mb->PMV[1][1][0];
+	mv1[1].component[1] = mb->PMV[1][1][1];
+
+	if ((ps & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
+		if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) {
+			mv0[0].component[1] = mb->PMV[0][0][1] >> 1;
+			mv0[1].component[1] = mb->PMV[0][1][1] >> 1;
+			mv1[0].component[1] = mb->PMV[1][0][1] >> 1;
+			mv1[1].component[1] = mb->PMV[1][1][1] >> 1;
+		} else if ((mb->motion_type & 3) == XVMC_PREDICTION_DUAL_PRIME) {
+			mv0[0].component[1] = mb->PMV[0][0][1] >> 1;
+			mv0[1].component[1] = mb->PMV[0][1][1] >> 1;	// MPEG2 MV[0][1] isn't used
+			mv1[0].component[1] = mb->PMV[1][0][1] >> 1;
+			mv1[1].component[1] = mb->PMV[1][1][1] >> 1;
+		}
+	}
+
+	macroblock_2fbmv.dw2 = mv0[0].v;
+	macroblock_2fbmv.dw3 = mv0[1].v;
+	macroblock_2fbmv.dw4 = mv1[0].v;
+	macroblock_2fbmv.dw5 = mv1[1].v;
+
+	intelBatchbufferData(&macroblock_2fbmv, sizeof(macroblock_2fbmv), 0);
 }
 
 #if 0
-static void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsigned int mask)
+static void i915_mc_invalidate_subcontext_buffers(XvMCContext * context,
+						  unsigned int mask)
 {
-    struct i915_3dstate_load_indirect *load_indirect = NULL;
-    sis_state *sis = NULL;
-    dis_state *dis = NULL;
-    ssb_state *ssb = NULL;
-    msb_state *msb = NULL;
-    psp_state *psp = NULL;
-    psc_state *psc = NULL;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
-    unsigned int size;
-    void *base = NULL, *ptr = NULL;
-
-    size = sizeof(*load_indirect);
-    if (mask & BLOCK_SIS)
-        size += sizeof(*sis);
-    if (mask & BLOCK_DIS)
-        size += sizeof(*dis);
-    if (mask & BLOCK_SSB)
-        size += sizeof(*ssb);
-    if (mask & BLOCK_MSB)
-        size += sizeof(*msb);
-    if (mask & BLOCK_PSP)
-        size += sizeof(*psp);
-    if (mask & BLOCK_PSC)
-        size += sizeof(*psc);
-
-    if (size == sizeof(*load_indirect)) {
-        XVMC_ERR("There must be at least one bit set\n");
-        return;
-    }
-
-    /* 3DSTATE_LOAD_INDIRECT */
-    base = calloc(1, size);
-    load_indirect = (struct i915_3dstate_load_indirect *)base;
-    load_indirect->dw0.type = CMD_3D;
-    load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
-
-    if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
-        pI915XvMC->deviceID == PCI_CHIP_I945_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I945_GM)
-        load_indirect->dw0.mem_select = 0;
-    else
-        load_indirect->dw0.mem_select = 1;
-
-    load_indirect->dw0.block_mask = mask;
-    load_indirect->dw0.length = (size >> 2) - 2;
-    ptr = ++load_indirect;
-
-    /* SIS */
-    if (mask & BLOCK_SIS) {
-        sis = (sis_state *)ptr;
-        sis->dw0.valid = 0;
-        sis->dw0.buffer_address = 0;
-        sis->dw1.length = 0;
-        ptr = ++sis;
-    }
-
-    /* DIS */
-    if (mask & BLOCK_DIS) {
-        dis = (dis_state *)ptr;
-        dis->dw0.valid = 0;
-        dis->dw0.reset = 0;
-        dis->dw0.buffer_address = 0;
-        ptr = ++dis;
-    }
-
-    /* SSB */
-    if (mask & BLOCK_SSB) {
-        ssb = (ssb_state *)ptr;
-        ssb->dw0.valid = 0;
-        ssb->dw0.buffer_address = 0;
-        ssb->dw1.length = 0;
-        ptr = ++ssb;
-    }
-
-    /* MSB */
-    if (mask & BLOCK_MSB) {
-        msb = (msb_state *)ptr;
-        msb->dw0.valid = 0;
-        msb->dw0.buffer_address = 0;
-        msb->dw1.length = 0;
-        ptr = ++msb;
-    }
-
-    /* PSP */
-    if (mask & BLOCK_PSP) {
-        psp = (psp_state *)ptr;
-        psp->dw0.valid = 0;
-        psp->dw0.buffer_address = 0;
-        psp->dw1.length = 0;
-        ptr = ++psp;
-    }
-
-    /* PSC */
-    if (mask & BLOCK_PSC) {
-        psc = (psc_state *)ptr;
-        psc->dw0.valid = 0;
-        psc->dw0.buffer_address = 0;
-        psc->dw1.length = 0;
-        ptr = ++psc;
-    }
-
-    intelBatchbufferData(base, size, 0);
-    free(base);
+	struct i915_3dstate_load_indirect *load_indirect = NULL;
+	sis_state *sis = NULL;
+	dis_state *dis = NULL;
+	ssb_state *ssb = NULL;
+	msb_state *msb = NULL;
+	psp_state *psp = NULL;
+	psc_state *psc = NULL;
+	i915XvMCContext *pI915XvMC = (i915XvMCContext *) context->privData;
+	unsigned int size;
+	void *base = NULL, *ptr = NULL;
+
+	size = sizeof(*load_indirect);
+	if (mask & BLOCK_SIS)
+		size += sizeof(*sis);
+	if (mask & BLOCK_DIS)
+		size += sizeof(*dis);
+	if (mask & BLOCK_SSB)
+		size += sizeof(*ssb);
+	if (mask & BLOCK_MSB)
+		size += sizeof(*msb);
+	if (mask & BLOCK_PSP)
+		size += sizeof(*psp);
+	if (mask & BLOCK_PSC)
+		size += sizeof(*psc);
+
+	if (size == sizeof(*load_indirect)) {
+		XVMC_ERR("There must be at least one bit set\n");
+		return;
+	}
+
+	/* 3DSTATE_LOAD_INDIRECT */
+	base = calloc(1, size);
+	load_indirect = (struct i915_3dstate_load_indirect *)base;
+	load_indirect->dw0.type = CMD_3D;
+	load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
+
+	if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
+	    pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
+	    pI915XvMC->deviceID == PCI_CHIP_I945_G ||
+	    pI915XvMC->deviceID == PCI_CHIP_I945_GM)
+		load_indirect->dw0.mem_select = 0;
+	else
+		load_indirect->dw0.mem_select = 1;
+
+	load_indirect->dw0.block_mask = mask;
+	load_indirect->dw0.length = (size >> 2) - 2;
+	ptr = ++load_indirect;
+
+	/* SIS */
+	if (mask & BLOCK_SIS) {
+		sis = (sis_state *) ptr;
+		sis->dw0.valid = 0;
+		sis->dw0.buffer_address = 0;
+		sis->dw1.length = 0;
+		ptr = ++sis;
+	}
+
+	/* DIS */
+	if (mask & BLOCK_DIS) {
+		dis = (dis_state *) ptr;
+		dis->dw0.valid = 0;
+		dis->dw0.reset = 0;
+		dis->dw0.buffer_address = 0;
+		ptr = ++dis;
+	}
+
+	/* SSB */
+	if (mask & BLOCK_SSB) {
+		ssb = (ssb_state *) ptr;
+		ssb->dw0.valid = 0;
+		ssb->dw0.buffer_address = 0;
+		ssb->dw1.length = 0;
+		ptr = ++ssb;
+	}
+
+	/* MSB */
+	if (mask & BLOCK_MSB) {
+		msb = (msb_state *) ptr;
+		msb->dw0.valid = 0;
+		msb->dw0.buffer_address = 0;
+		msb->dw1.length = 0;
+		ptr = ++msb;
+	}
+
+	/* PSP */
+	if (mask & BLOCK_PSP) {
+		psp = (psp_state *) ptr;
+		psp->dw0.valid = 0;
+		psp->dw0.buffer_address = 0;
+		psp->dw1.length = 0;
+		ptr = ++psp;
+	}
+
+	/* PSC */
+	if (mask & BLOCK_PSC) {
+		psc = (psc_state *) ptr;
+		psc->dw0.valid = 0;
+		psc->dw0.buffer_address = 0;
+		psc->dw1.length = 0;
+		ptr = ++psc;
+	}
+
+	intelBatchbufferData(base, size, 0);
+	free(base);
 }
 #endif
 
-static int i915_xvmc_map_buffers(i915XvMCContext *pI915XvMC)
+static int i915_xvmc_map_buffers(i915XvMCContext * pI915XvMC)
 {
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->sis.handle,
-               pI915XvMC->sis.size,
-               (drmAddress *)&pI915XvMC->sis.map) != 0) {
-        return -1;
-    }
-
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->ssb.handle,
-               pI915XvMC->ssb.size,
-               (drmAddress *)&pI915XvMC->ssb.map) != 0) {
-        return -1;
-    }
-
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->msb.handle,
-               pI915XvMC->msb.size,
-               (drmAddress *)&pI915XvMC->msb.map) != 0) {
-        return -1;
-    }
-
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->psp.handle,
-               pI915XvMC->psp.size,
-               (drmAddress *)&pI915XvMC->psp.map) != 0) {
-        return -1;
-    }
-
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->psc.handle,
-               pI915XvMC->psc.size,
-               (drmAddress *)&pI915XvMC->psc.map) != 0) {
-        return -1;
-    }
-
-    if (drmMap(xvmc_driver->fd,
-               pI915XvMC->corrdata.handle,
-               pI915XvMC->corrdata.size,
-               (drmAddress *)&pI915XvMC->corrdata.map) != 0) {
-        return -1;
-    }
-
-    return 0;
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->sis.handle,
+		   pI915XvMC->sis.size,
+		   (drmAddress *) & pI915XvMC->sis.map) != 0) {
+		return -1;
+	}
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->ssb.handle,
+		   pI915XvMC->ssb.size,
+		   (drmAddress *) & pI915XvMC->ssb.map) != 0) {
+		return -1;
+	}
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->msb.handle,
+		   pI915XvMC->msb.size,
+		   (drmAddress *) & pI915XvMC->msb.map) != 0) {
+		return -1;
+	}
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->psp.handle,
+		   pI915XvMC->psp.size,
+		   (drmAddress *) & pI915XvMC->psp.map) != 0) {
+		return -1;
+	}
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->psc.handle,
+		   pI915XvMC->psc.size,
+		   (drmAddress *) & pI915XvMC->psc.map) != 0) {
+		return -1;
+	}
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915XvMC->corrdata.handle,
+		   pI915XvMC->corrdata.size,
+		   (drmAddress *) & pI915XvMC->corrdata.map) != 0) {
+		return -1;
+	}
+
+	return 0;
 }
 
-static void i915_xvmc_unmap_buffers(i915XvMCContext *pI915XvMC)
+static void i915_xvmc_unmap_buffers(i915XvMCContext * pI915XvMC)
 {
-    if (pI915XvMC->sis.map) {
-        drmUnmap(pI915XvMC->sis.map, pI915XvMC->sis.size);
-        pI915XvMC->sis.map = NULL;
-    }
-
-    if (pI915XvMC->ssb.map) {
-        drmUnmap(pI915XvMC->ssb.map, pI915XvMC->ssb.size);
-        pI915XvMC->ssb.map = NULL;
-    }
-
-    if (pI915XvMC->msb.map) {
-        drmUnmap(pI915XvMC->msb.map, pI915XvMC->msb.size);
-        pI915XvMC->msb.map = NULL;
-    }
-
-    if (pI915XvMC->psp.map) {
-        drmUnmap(pI915XvMC->psp.map, pI915XvMC->psp.size);
-        pI915XvMC->psp.map = NULL;
-    }
-
-    if (pI915XvMC->psc.map) {
-        drmUnmap(pI915XvMC->psc.map, pI915XvMC->psc.size);
-        pI915XvMC->psc.map = NULL;
-    }
-
-    if (pI915XvMC->corrdata.map) {
-        drmUnmap(pI915XvMC->corrdata.map, pI915XvMC->corrdata.size);
-        pI915XvMC->corrdata.map = NULL;
-    }
+	if (pI915XvMC->sis.map) {
+		drmUnmap(pI915XvMC->sis.map, pI915XvMC->sis.size);
+		pI915XvMC->sis.map = NULL;
+	}
+
+	if (pI915XvMC->ssb.map) {
+		drmUnmap(pI915XvMC->ssb.map, pI915XvMC->ssb.size);
+		pI915XvMC->ssb.map = NULL;
+	}
+
+	if (pI915XvMC->msb.map) {
+		drmUnmap(pI915XvMC->msb.map, pI915XvMC->msb.size);
+		pI915XvMC->msb.map = NULL;
+	}
+
+	if (pI915XvMC->psp.map) {
+		drmUnmap(pI915XvMC->psp.map, pI915XvMC->psp.size);
+		pI915XvMC->psp.map = NULL;
+	}
+
+	if (pI915XvMC->psc.map) {
+		drmUnmap(pI915XvMC->psc.map, pI915XvMC->psc.size);
+		pI915XvMC->psc.map = NULL;
+	}
+
+	if (pI915XvMC->corrdata.map) {
+		drmUnmap(pI915XvMC->corrdata.map, pI915XvMC->corrdata.size);
+		pI915XvMC->corrdata.map = NULL;
+	}
 }
 
 #if 0
 /*
  * Video post processing
  */
-static void i915_yuv2rgb_map_state_buffer(XvMCSurface *target_surface)
+static void i915_yuv2rgb_map_state_buffer(XvMCSurface * target_surface)
 {
-    struct i915_3dstate_map_state *map_state;
-    struct texture_map *tm;
-    i915XvMCSurface *privTarget = NULL;
-    i915XvMCContext *pI915XvMC = NULL;
-    unsigned int w = target_surface->width, h = target_surface->height;
-
-    privTarget = (i915XvMCSurface *)target_surface->privData;
-    pI915XvMC = (i915XvMCContext *)privTarget->privContext;
-    /* 3DSATE_MAP_STATE */
-    map_state = (struct i915_3dstate_map_state *)pI915XvMC->msb.map;
-    memset(map_state, 0, sizeof(*map_state));
-    map_state->dw0.type = CMD_3D;
-    map_state->dw0.opcode = OPC_3DSTATE_MAP_STATE;
-    map_state->dw0.retain = 0;
-    map_state->dw0.length = 9;
-    map_state->dw1.map_mask = MAP_MAP0 | MAP_MAP1 | MAP_MAP2;
-
-    /* texture map 0: V Plane */
-    tm = (struct texture_map *)(++map_state);
-    memset(tm, 0, sizeof(*tm));
-    tm->tm0.v_ls_offset = 0;
-    tm->tm0.v_ls = 0;
-    tm->tm0.base_address = VOFFSET(privTarget);
-    tm->tm1.tile_walk = TILEWALK_XMAJOR;
-    tm->tm1.tiled_surface = 0;
-    tm->tm1.utilize_fence_regs = 1;
-    tm->tm1.texel_fmt = 0;
-    tm->tm1.surface_fmt = 1;
-    tm->tm1.width = (w >> 1) - 1;
-    tm->tm1.height = (h >> 1) - 1;
-    tm->tm2.depth = 0;
-    tm->tm2.max_lod = 0;
-    tm->tm2.cube_face = 0;
-    tm->tm2.pitch = (privTarget->uvStride >> 2) - 1;    /* in DWords - 1 */
-
-    /* texture map 1: Y Plane */
-    ++tm;
-    memset(tm, 0, sizeof(*tm));
-    tm->tm0.v_ls_offset = 0;
-    tm->tm0.v_ls = 0;
-    tm->tm0.base_address = YOFFSET(privTarget);
-    tm->tm1.tile_walk = TILEWALK_XMAJOR;
-    tm->tm1.tiled_surface = 0;
-    tm->tm1.utilize_fence_regs = 1;
-    tm->tm1.texel_fmt = 0;
-    tm->tm1.surface_fmt = 1;
-    tm->tm1.width = w - 1;
-    tm->tm1.height = h - 1;
-    tm->tm2.depth = 0;
-    tm->tm2.max_lod = 0;
-    tm->tm2.cube_face = 0;
-    tm->tm2.pitch = (privTarget->yStride >> 2) - 1;     /* in DWords - 1 */
-
-    /* texture map 2: U Plane */
-    ++tm;
-    memset(tm, 0, sizeof(*tm));
-    tm->tm0.v_ls_offset = 0;
-    tm->tm0.v_ls = 0;
-    tm->tm0.base_address = UOFFSET(privTarget);
-    tm->tm1.tile_walk = TILEWALK_XMAJOR;
-    tm->tm1.tiled_surface = 0;
-    tm->tm1.utilize_fence_regs = 1;
-    tm->tm1.texel_fmt = 0;
-    tm->tm1.surface_fmt = 1;
-    tm->tm1.width = (w >> 1) - 1;
-    tm->tm1.height = (h >> 1) - 1;
-    tm->tm2.depth = 0;
-    tm->tm2.max_lod = 0;
-    tm->tm2.cube_face = 0;
-    tm->tm2.pitch = (privTarget->uvStride >> 2) - 1;    /* in DWords - 1 */
+	struct i915_3dstate_map_state *map_state;
+	struct texture_map *tm;
+	i915XvMCSurface *privTarget = NULL;
+	i915XvMCContext *pI915XvMC = NULL;
+	unsigned int w = target_surface->width, h = target_surface->height;
+
+	privTarget = (i915XvMCSurface *) target_surface->privData;
+	pI915XvMC = (i915XvMCContext *) privTarget->privContext;
+	/* 3DSATE_MAP_STATE */
+	map_state = (struct i915_3dstate_map_state *)pI915XvMC->msb.map;
+	memset(map_state, 0, sizeof(*map_state));
+	map_state->dw0.type = CMD_3D;
+	map_state->dw0.opcode = OPC_3DSTATE_MAP_STATE;
+	map_state->dw0.retain = 0;
+	map_state->dw0.length = 9;
+	map_state->dw1.map_mask = MAP_MAP0 | MAP_MAP1 | MAP_MAP2;
+
+	/* texture map 0: V Plane */
+	tm = (struct texture_map *)(++map_state);
+	memset(tm, 0, sizeof(*tm));
+	tm->tm0.v_ls_offset = 0;
+	tm->tm0.v_ls = 0;
+	tm->tm0.base_address = VOFFSET(privTarget);
+	tm->tm1.tile_walk = TILEWALK_XMAJOR;
+	tm->tm1.tiled_surface = 0;
+	tm->tm1.utilize_fence_regs = 1;
+	tm->tm1.texel_fmt = 0;
+	tm->tm1.surface_fmt = 1;
+	tm->tm1.width = (w >> 1) - 1;
+	tm->tm1.height = (h >> 1) - 1;
+	tm->tm2.depth = 0;
+	tm->tm2.max_lod = 0;
+	tm->tm2.cube_face = 0;
+	tm->tm2.pitch = (privTarget->uvStride >> 2) - 1;	/* in DWords - 1 */
+
+	/* texture map 1: Y Plane */
+	++tm;
+	memset(tm, 0, sizeof(*tm));
+	tm->tm0.v_ls_offset = 0;
+	tm->tm0.v_ls = 0;
+	tm->tm0.base_address = YOFFSET(privTarget);
+	tm->tm1.tile_walk = TILEWALK_XMAJOR;
+	tm->tm1.tiled_surface = 0;
+	tm->tm1.utilize_fence_regs = 1;
+	tm->tm1.texel_fmt = 0;
+	tm->tm1.surface_fmt = 1;
+	tm->tm1.width = w - 1;
+	tm->tm1.height = h - 1;
+	tm->tm2.depth = 0;
+	tm->tm2.max_lod = 0;
+	tm->tm2.cube_face = 0;
+	tm->tm2.pitch = (privTarget->yStride >> 2) - 1;	/* in DWords - 1 */
+
+	/* texture map 2: U Plane */
+	++tm;
+	memset(tm, 0, sizeof(*tm));
+	tm->tm0.v_ls_offset = 0;
+	tm->tm0.v_ls = 0;
+	tm->tm0.base_address = UOFFSET(privTarget);
+	tm->tm1.tile_walk = TILEWALK_XMAJOR;
+	tm->tm1.tiled_surface = 0;
+	tm->tm1.utilize_fence_regs = 1;
+	tm->tm1.texel_fmt = 0;
+	tm->tm1.surface_fmt = 1;
+	tm->tm1.width = (w >> 1) - 1;
+	tm->tm1.height = (h >> 1) - 1;
+	tm->tm2.depth = 0;
+	tm->tm2.max_lod = 0;
+	tm->tm2.cube_face = 0;
+	tm->tm2.pitch = (privTarget->uvStride >> 2) - 1;	/* in DWords - 1 */
 }
 #endif
 
 #if 0
-static void i915_yuv2rgb_sampler_state_buffer(XvMCSurface *surface)
+static void i915_yuv2rgb_sampler_state_buffer(XvMCSurface * surface)
 {
-    struct i915_3dstate_sampler_state *sampler_state;
-    struct texture_sampler *ts;
-    i915XvMCSurface *privSurface = (i915XvMCSurface *)surface->privData;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)privSurface->privContext;
-
-    /* 3DSATE_SAMPLER_STATE */
-    sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
-    memset(sampler_state, 0, sizeof(*sampler_state));
-    sampler_state->dw0.type = CMD_3D;
-    sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
-    sampler_state->dw0.length = 9;
-    sampler_state->dw1.sampler_masker = SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1 | SAMPLER_SAMPLER2;
-
-    /* Sampler 0 */
-    ts = (struct texture_sampler *)(++sampler_state);
-    memset(ts, 0, sizeof(*ts));
-    ts->ts0.reverse_gamma = 0;
-    ts->ts0.planar2packet = 1;
-    ts->ts0.color_conversion = 1;
-    ts->ts0.chromakey_index = 0;
-    ts->ts0.base_level = 0;
-    ts->ts0.mip_filter = MIPFILTER_NONE;        /* NONE */
-    ts->ts0.mag_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.min_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.lod_bias = 0;
-    ts->ts0.shadow_enable = 0;
-    ts->ts0.max_anisotropy = ANISORATIO_2;
-    ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
-    ts->ts1.min_lod = 0;        /* Maximum Mip Level */
-    ts->ts1.kill_pixel = 0;
-    ts->ts1.keyed_texture_filter = 0;
-    ts->ts1.chromakey_enable = 0;
-    ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.normalized_coor = 0;
-    ts->ts1.map_index = 0;
-    ts->ts1.east_deinterlacer = 0;
-    ts->ts2.default_color = 0;
-
-    /* Sampler 1 */
-    ++ts;
-    memset(ts, 0, sizeof(*ts));
-    ts->ts0.reverse_gamma = 0;
-    ts->ts0.planar2packet = 1;
-    ts->ts0.color_conversion = 1;
-    ts->ts0.chromakey_index = 0;
-    ts->ts0.base_level = 0;
-    ts->ts0.mip_filter = MIPFILTER_NONE;        /* NONE */
-    ts->ts0.mag_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.min_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.lod_bias = 0;
-    ts->ts0.shadow_enable = 0;
-    ts->ts0.max_anisotropy = ANISORATIO_2;
-    ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
-    ts->ts1.min_lod = 0;        /* Maximum Mip Level */
-    ts->ts1.kill_pixel = 0;
-    ts->ts1.keyed_texture_filter = 0;
-    ts->ts1.chromakey_enable = 0;
-    ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.normalized_coor = 0;
-    ts->ts1.map_index = 1;
-    ts->ts1.east_deinterlacer = 0;
-    ts->ts2.default_color = 0;
-
-    /* Sampler 2 */
-    ++ts;
-    memset(ts, 0, sizeof(*ts));
-    ts->ts0.reverse_gamma = 0;
-    ts->ts0.planar2packet = 1;
-    ts->ts0.color_conversion = 1;
-    ts->ts0.chromakey_index = 0;
-    ts->ts0.base_level = 0;
-    ts->ts0.mip_filter = MIPFILTER_NONE;        /* NONE */
-    ts->ts0.mag_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.min_filter = MAPFILTER_LINEAR;      /* LINEAR */
-    ts->ts0.lod_bias = 0;
-    ts->ts0.shadow_enable = 0;
-    ts->ts0.max_anisotropy = ANISORATIO_2;
-    ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
-    ts->ts1.min_lod = 0;        /* Maximum Mip Level */
-    ts->ts1.kill_pixel = 0;
-    ts->ts1.keyed_texture_filter = 0;
-    ts->ts1.chromakey_enable = 0;
-    ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
-    ts->ts1.normalized_coor = 0;
-    ts->ts1.map_index = 2;
-    ts->ts1.east_deinterlacer = 0;
-    ts->ts2.default_color = 0;
+	struct i915_3dstate_sampler_state *sampler_state;
+	struct texture_sampler *ts;
+	i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
+	i915XvMCContext *pI915XvMC =
+	    (i915XvMCContext *) privSurface->privContext;
+
+	/* 3DSATE_SAMPLER_STATE */
+	sampler_state = (struct i915_3dstate_sampler_state *)pI915XvMC->ssb.map;
+	memset(sampler_state, 0, sizeof(*sampler_state));
+	sampler_state->dw0.type = CMD_3D;
+	sampler_state->dw0.opcode = OPC_3DSTATE_SAMPLER_STATE;
+	sampler_state->dw0.length = 9;
+	sampler_state->dw1.sampler_masker =
+	    SAMPLER_SAMPLER0 | SAMPLER_SAMPLER1 | SAMPLER_SAMPLER2;
+
+	/* Sampler 0 */
+	ts = (struct texture_sampler *)(++sampler_state);
+	memset(ts, 0, sizeof(*ts));
+	ts->ts0.reverse_gamma = 0;
+	ts->ts0.planar2packet = 1;
+	ts->ts0.color_conversion = 1;
+	ts->ts0.chromakey_index = 0;
+	ts->ts0.base_level = 0;
+	ts->ts0.mip_filter = MIPFILTER_NONE;	/* NONE */
+	ts->ts0.mag_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.min_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.lod_bias = 0;
+	ts->ts0.shadow_enable = 0;
+	ts->ts0.max_anisotropy = ANISORATIO_2;
+	ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
+	ts->ts1.min_lod = 0;	/* Maximum Mip Level */
+	ts->ts1.kill_pixel = 0;
+	ts->ts1.keyed_texture_filter = 0;
+	ts->ts1.chromakey_enable = 0;
+	ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.normalized_coor = 0;
+	ts->ts1.map_index = 0;
+	ts->ts1.east_deinterlacer = 0;
+	ts->ts2.default_color = 0;
+
+	/* Sampler 1 */
+	++ts;
+	memset(ts, 0, sizeof(*ts));
+	ts->ts0.reverse_gamma = 0;
+	ts->ts0.planar2packet = 1;
+	ts->ts0.color_conversion = 1;
+	ts->ts0.chromakey_index = 0;
+	ts->ts0.base_level = 0;
+	ts->ts0.mip_filter = MIPFILTER_NONE;	/* NONE */
+	ts->ts0.mag_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.min_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.lod_bias = 0;
+	ts->ts0.shadow_enable = 0;
+	ts->ts0.max_anisotropy = ANISORATIO_2;
+	ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
+	ts->ts1.min_lod = 0;	/* Maximum Mip Level */
+	ts->ts1.kill_pixel = 0;
+	ts->ts1.keyed_texture_filter = 0;
+	ts->ts1.chromakey_enable = 0;
+	ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.normalized_coor = 0;
+	ts->ts1.map_index = 1;
+	ts->ts1.east_deinterlacer = 0;
+	ts->ts2.default_color = 0;
+
+	/* Sampler 2 */
+	++ts;
+	memset(ts, 0, sizeof(*ts));
+	ts->ts0.reverse_gamma = 0;
+	ts->ts0.planar2packet = 1;
+	ts->ts0.color_conversion = 1;
+	ts->ts0.chromakey_index = 0;
+	ts->ts0.base_level = 0;
+	ts->ts0.mip_filter = MIPFILTER_NONE;	/* NONE */
+	ts->ts0.mag_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.min_filter = MAPFILTER_LINEAR;	/* LINEAR */
+	ts->ts0.lod_bias = 0;
+	ts->ts0.shadow_enable = 0;
+	ts->ts0.max_anisotropy = ANISORATIO_2;
+	ts->ts0.shadow_function = PREFILTEROP_ALWAYS;
+	ts->ts1.min_lod = 0;	/* Maximum Mip Level */
+	ts->ts1.kill_pixel = 0;
+	ts->ts1.keyed_texture_filter = 0;
+	ts->ts1.chromakey_enable = 0;
+	ts->ts1.tcx_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcy_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.tcz_control = TEXCOORDMODE_CLAMP;
+	ts->ts1.normalized_coor = 0;
+	ts->ts1.map_index = 2;
+	ts->ts1.east_deinterlacer = 0;
+	ts->ts2.default_color = 0;
 }
 #endif
 
 #if 0
-static void i915_yuv2rgb_static_indirect_state_buffer(XvMCSurface *surface,
-                                                      unsigned int dstaddr,
-                                                      int dstpitch)
+static void i915_yuv2rgb_static_indirect_state_buffer(XvMCSurface * surface,
+						      unsigned int dstaddr,
+						      int dstpitch)
 {
-    struct i915_3dstate_buffer_info *buffer_info;
-    struct i915_3dstate_dest_buffer_variables *dest_buffer_variables;
-    i915XvMCSurface *privSurface = (i915XvMCSurface *)surface->privData;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)privSurface->privContext;
-
-    /* 3DSTATE_BUFFER_INFO */
-    buffer_info = (struct i915_3dstate_buffer_info *)pI915XvMC->sis.map;
-    memset(buffer_info, 0, sizeof(*buffer_info));
-    buffer_info->dw0.type = CMD_3D;
-    buffer_info->dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
-    buffer_info->dw0.length = 1;
-    buffer_info->dw1.aux_id = 0;
-    buffer_info->dw1.buffer_id = BUFFERID_COLOR_BACK;
-    buffer_info->dw1.fence_regs = 1;
-    buffer_info->dw1.tiled_surface = 0;   /* linear */
-    buffer_info->dw1.walk = TILEWALK_XMAJOR;
-    buffer_info->dw1.pitch = dstpitch;
-    buffer_info->dw2.base_address = dstaddr;
-
-    /* 3DSTATE_DEST_BUFFER_VARIABLES */
-    dest_buffer_variables = (struct i915_3dstate_dest_buffer_variables *)(++buffer_info);
-    memset(dest_buffer_variables, 0, sizeof(*dest_buffer_variables));
-    dest_buffer_variables->dw0.type = CMD_3D;
-    dest_buffer_variables->dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
-    dest_buffer_variables->dw0.length = 0;
-    dest_buffer_variables->dw1.dest_v_bias = 8; /* FIXME 0x1000 .5 ??? */
-    dest_buffer_variables->dw1.dest_h_bias = 8;
-    dest_buffer_variables->dw1.color_fmt = COLORBUFFER_A8R8G8B8;  /* FIXME */
+	struct i915_3dstate_buffer_info *buffer_info;
+	struct i915_3dstate_dest_buffer_variables *dest_buffer_variables;
+	i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
+	i915XvMCContext *pI915XvMC =
+	    (i915XvMCContext *) privSurface->privContext;
+
+	/* 3DSTATE_BUFFER_INFO */
+	buffer_info = (struct i915_3dstate_buffer_info *)pI915XvMC->sis.map;
+	memset(buffer_info, 0, sizeof(*buffer_info));
+	buffer_info->dw0.type = CMD_3D;
+	buffer_info->dw0.opcode = OPC_3DSTATE_BUFFER_INFO;
+	buffer_info->dw0.length = 1;
+	buffer_info->dw1.aux_id = 0;
+	buffer_info->dw1.buffer_id = BUFFERID_COLOR_BACK;
+	buffer_info->dw1.fence_regs = 1;
+	buffer_info->dw1.tiled_surface = 0;	/* linear */
+	buffer_info->dw1.walk = TILEWALK_XMAJOR;
+	buffer_info->dw1.pitch = dstpitch;
+	buffer_info->dw2.base_address = dstaddr;
+
+	/* 3DSTATE_DEST_BUFFER_VARIABLES */
+	dest_buffer_variables =
+	    (struct i915_3dstate_dest_buffer_variables *)(++buffer_info);
+	memset(dest_buffer_variables, 0, sizeof(*dest_buffer_variables));
+	dest_buffer_variables->dw0.type = CMD_3D;
+	dest_buffer_variables->dw0.opcode = OPC_3DSTATE_DEST_BUFFER_VARIABLES;
+	dest_buffer_variables->dw0.length = 0;
+	dest_buffer_variables->dw1.dest_v_bias = 8;	/* FIXME 0x1000 .5 ??? */
+	dest_buffer_variables->dw1.dest_h_bias = 8;
+	dest_buffer_variables->dw1.color_fmt = COLORBUFFER_A8R8G8B8;	/* FIXME */
 }
 #endif
 
 #if 0
-static void i915_yuv2rgb_pixel_shader_program_buffer(XvMCSurface *surface)
+static void i915_yuv2rgb_pixel_shader_program_buffer(XvMCSurface * surface)
 {
-    struct i915_3dstate_pixel_shader_program *pixel_shader_program;
-    i915XvMCSurface *privSurface = (i915XvMCSurface *)surface->privData;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)privSurface->privContext;
-    unsigned int *inst;
-    unsigned int dest, src0, src1;
-
-    /* Shader 0 */
-    pixel_shader_program = (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
-    memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
-    pixel_shader_program->dw0.type = CMD_3D;
-    pixel_shader_program->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
-    pixel_shader_program->dw0.retain = 0;
-    pixel_shader_program->dw0.length = 23;
-    /* dcl      t0.xy */
-    inst = (unsigned int*)(++pixel_shader_program);
-    i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
-    /* dcl         t1.xy */
-    inst += 3;
-    i915_inst_decl(inst, REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
-    /* dcl_2D   s0 */
-    inst += 3;
-    i915_inst_decl(inst, REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D);
-    /* dcl_2D   s1 */
-    inst += 3;
-    i915_inst_decl(inst, REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D);
-    /* dcl_2D   s2 */
-    inst += 3;
-    i915_inst_decl(inst, REG_TYPE_S, 2, D0_SAMPLE_TYPE_2D);
-    /* texld    r0 t1 s0 */
-    inst += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_T, 1); /* COORD */
-    src1 = UREG(REG_TYPE_S, 0); /* SAMPLER */
-    i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
-    /* texld    r0 t0 s1 */
-    inst += 3;
-    dest = UREG(REG_TYPE_R, 0);
-    src0 = UREG(REG_TYPE_T, 0); /* COORD */
-    src1 = UREG(REG_TYPE_S, 1); /* SAMPLER */
-    i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
-    /* texld    oC t1 s2 */
-    inst += 3;
-    dest = UREG(REG_TYPE_OC, 0);
-    src0 = UREG(REG_TYPE_T, 1); /* COORD */
-    src1 = UREG(REG_TYPE_S, 2); /* SAMPLER */
-    i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
+	struct i915_3dstate_pixel_shader_program *pixel_shader_program;
+	i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
+	i915XvMCContext *pI915XvMC =
+	    (i915XvMCContext *) privSurface->privContext;
+	unsigned int *inst;
+	unsigned int dest, src0, src1;
+
+	/* Shader 0 */
+	pixel_shader_program =
+	    (struct i915_3dstate_pixel_shader_program *)pI915XvMC->psp.map;
+	memset(pixel_shader_program, 0, sizeof(*pixel_shader_program));
+	pixel_shader_program->dw0.type = CMD_3D;
+	pixel_shader_program->dw0.opcode = OPC_3DSTATE_PIXEL_SHADER_PROGRAM;
+	pixel_shader_program->dw0.retain = 0;
+	pixel_shader_program->dw0.length = 23;
+	/* dcl      t0.xy */
+	inst = (unsigned int *)(++pixel_shader_program);
+	i915_inst_decl(inst, REG_TYPE_T, T_TEX0, D0_CHANNEL_XY);
+	/* dcl         t1.xy */
+	inst += 3;
+	i915_inst_decl(inst, REG_TYPE_T, T_TEX1, D0_CHANNEL_XY);
+	/* dcl_2D   s0 */
+	inst += 3;
+	i915_inst_decl(inst, REG_TYPE_S, 0, D0_SAMPLE_TYPE_2D);
+	/* dcl_2D   s1 */
+	inst += 3;
+	i915_inst_decl(inst, REG_TYPE_S, 1, D0_SAMPLE_TYPE_2D);
+	/* dcl_2D   s2 */
+	inst += 3;
+	i915_inst_decl(inst, REG_TYPE_S, 2, D0_SAMPLE_TYPE_2D);
+	/* texld    r0 t1 s0 */
+	inst += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_T, 1);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 0);	/* SAMPLER */
+	i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
+	/* texld    r0 t0 s1 */
+	inst += 3;
+	dest = UREG(REG_TYPE_R, 0);
+	src0 = UREG(REG_TYPE_T, 0);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 1);	/* SAMPLER */
+	i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
+	/* texld    oC t1 s2 */
+	inst += 3;
+	dest = UREG(REG_TYPE_OC, 0);
+	src0 = UREG(REG_TYPE_T, 1);	/* COORD */
+	src1 = UREG(REG_TYPE_S, 2);	/* SAMPLER */
+	i915_inst_texld(inst, T0_TEXLD, dest, src0, src1);
 }
 #endif
 
 #if 0
-static void i915_yuv2rgb_proc(XvMCSurface *surface)
+static void i915_yuv2rgb_proc(XvMCSurface * surface)
 {
-    i915XvMCSurface *privSurface = (i915XvMCSurface *)surface->privData;
-    i915XvMCContext *pI915XvMC = (i915XvMCContext *)privSurface->privContext;
-    struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1 = NULL;
-    struct s2_dword *s2 = NULL;
-    struct s3_dword *s3 = NULL;
-    struct s4_dword *s4 = NULL;
-    struct s5_dword *s5 = NULL;
-    struct s6_dword *s6 = NULL;
-    struct s7_dword *s7 = NULL;
-    struct i915_3dstate_scissor_rectangle scissor_rectangle;
-    struct i915_3dstate_load_indirect *load_indirect = NULL;
-    sis_state *sis = NULL;
-    ssb_state *ssb = NULL;
-    msb_state *msb = NULL;
-    psp_state *psp = NULL;
-    struct i915_3dprimitive *_3dprimitive = NULL;
-    struct vertex_data *vd = NULL;
-    unsigned int size;
-    void *base = NULL;
-
-    /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
-    size = sizeof(*load_state_immediate_1) + sizeof(*s2) + sizeof(*s3) +
-        sizeof(*s4) + sizeof(*s5) + sizeof(*s6) + sizeof(*s7);
-    base = calloc(1, size);
-    load_state_immediate_1 = (struct i915_3dstate_load_state_immediate_1 *)base;
-    load_state_immediate_1->dw0.type = CMD_3D;
-    load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
-    load_state_immediate_1->dw0.load_s2 = 1;
-    load_state_immediate_1->dw0.load_s3 = 1;
-    load_state_immediate_1->dw0.load_s4 = 1;
-    load_state_immediate_1->dw0.load_s5 = 1;
-    load_state_immediate_1->dw0.load_s6 = 1;
-    load_state_immediate_1->dw0.load_s7 = 1;
-    load_state_immediate_1->dw0.length = 5;
-
-    s2 = (struct s2_dword *)(++load_state_immediate_1);
-    s2->set0_texcoord_fmt = TEXCOORDFMT_2FP;
-    s2->set1_texcoord_fmt = TEXCOORDFMT_2FP;
-    s2->set2_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-    s2->set3_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-    s2->set4_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-    s2->set5_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-    s2->set6_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-    s2->set7_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
-
-    s3 = (struct s3_dword *)(++s2);
-    s4 = (struct s4_dword *)(++s3);
-    s4->position_mask = VERTEXHAS_XY;
-    s4->cull_mode = CULLMODE_NONE;
-    s4->color_shade_mode = SHADEMODE_FLAT;
-    s4->specular_shade_mode = SHADEMODE_FLAT;
-    s4->fog_shade_mode = SHADEMODE_FLAT;
-    s4->alpha_shade_mode = SHADEMODE_FLAT;
-    s4->line_width = 0x2;     /* FIXME: 1.0??? */
-    s4->point_width = 0x1;
-
-    s5 = (struct s5_dword *)(++s4);
-    s6 = (struct s6_dword *)(++s5);
-    s6->src_blend_factor = 1;
-    s6->dest_blend_factor = 1;
-    s6->color_buffer_write = 1;
-
-    s7 = (struct s7_dword *)(++s6);
-    intelBatchbufferData(base, size, 0);
-    free(base);
-
-    /* 3DSTATE_3DSTATE_SCISSOR_RECTANGLE */
-    scissor_rectangle.dw0.type = CMD_3D;
-    scissor_rectangle.dw0.opcode = OPC_3DSTATE_SCISSOR_RECTANGLE;
-    scissor_rectangle.dw0.length = 1;
-    scissor_rectangle.dw1.min_x = 0;
-    scissor_rectangle.dw1.min_y = 0;
-    scissor_rectangle.dw2.max_x = 2047;
-    scissor_rectangle.dw2.max_y = 2047;
-    intelBatchbufferData(&scissor_rectangle, sizeof(scissor_rectangle), 0);
-
-    /* 3DSTATE_LOAD_INDIRECT */
-    size = sizeof(*load_indirect) + sizeof(*sis) + sizeof(*ssb) + sizeof(*msb) + sizeof(*psp);
-    base = calloc(1, size);
-    load_indirect = (struct i915_3dstate_load_indirect *)base;
-    load_indirect->dw0.type = CMD_3D;
-    load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
-    load_indirect->dw0.mem_select = 1;  /* Bearlake only */
-    load_indirect->dw0.block_mask = BLOCK_SIS | BLOCK_SSB | BLOCK_MSB | BLOCK_PSP;
-    load_indirect->dw0.length = 7;
-
-    /* SIS */
-    sis = (sis_state *)(++load_indirect);
-    sis->dw0.valid = 1;
-    sis->dw0.buffer_address = pI915XvMC->sis.offset;
-    sis->dw1.length = ((sizeof(struct i915_3dstate_buffer_info) +
-                        sizeof(struct i915_3dstate_dest_buffer_variables)) >> 2) - 1;
-
-    /* SSB */
-    ssb = (ssb_state *)(++sis);
-    ssb->dw0.valid = 1;
-    ssb->dw0.buffer_address = pI915XvMC->ssb.offset;
-    ssb->dw1.length = ((sizeof(struct i915_3dstate_sampler_state) +
-                        sizeof(struct texture_sampler) * 3) >> 2) - 1;
-
-    /* MSB */
-    msb = (msb_state *)(++ssb);
-    msb->dw0.valid = 1;
-    msb->dw0.buffer_address = pI915XvMC->msb.offset;
-    msb->dw1.length = ((sizeof(struct i915_3dstate_map_state) +
-                        sizeof(struct texture_map) * 3) >> 2) - 1;
-
-    /* PSP */
-    psp = (psp_state *)(++msb);
-    psp->dw0.valid = 1;
-    psp->dw0.buffer_address = pI915XvMC->psp.offset;
-    psp->dw1.length = ((sizeof(struct i915_3dstate_pixel_shader_program) +
-                        sizeof(union shader_inst)) >> 2) - 1;
-
-    intelBatchbufferData(base, size, 0);
-    free(base);
-
-    /* 3DPRIMITIVE */
-    size = sizeof(*_3dprimitive) + sizeof(*vd) * 3;
-    base = calloc(1, size);
-    _3dprimitive = (struct i915_3dprimitive *)base;
-    _3dprimitive->dw0.inline_prim.type = CMD_3D;
-    _3dprimitive->dw0.inline_prim.opcode = OPC_3DPRIMITIVE;
-    _3dprimitive->dw0.inline_prim.vertex_location = VERTEX_INLINE;
-    _3dprimitive->dw0.inline_prim.prim = PRIM_RECTLIST;
-    _3dprimitive->dw0.inline_prim.length = size - 2;
-
-    vd = (struct vertex_data *)(++_3dprimitive);
-    vd->x = 0;          /* FIXME!!! */
-    vd->x = 0;          /* FIXME */
-    vd->tc0.tcx = 0;
-    vd->tc0.tcy = 0;
-    vd->tc1.tcx = 0;
-    vd->tc1.tcy = 0;
-
-    ++vd;
-    vd->x = 0;          /* FIXME!!! */
-    vd->x = 0;          /* FIXME */
-    vd->tc0.tcx = 0;
-    vd->tc0.tcy = 0;
-    vd->tc1.tcx = 0;
-    vd->tc1.tcy = 0;
-
-    ++vd;
-    vd->x = 0;          /* FIXME!!! */
-    vd->x = 0;          /* FIXME */
-    vd->tc0.tcx = 0;
-    vd->tc0.tcy = 0;
-    vd->tc1.tcx = 0;
-    vd->tc1.tcy = 0;
-
-    intelBatchbufferData(base, size, 0);
-    free(base);
+	i915XvMCSurface *privSurface = (i915XvMCSurface *) surface->privData;
+	i915XvMCContext *pI915XvMC =
+	    (i915XvMCContext *) privSurface->privContext;
+	struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1 =
+	    NULL;
+	struct s2_dword *s2 = NULL;
+	struct s3_dword *s3 = NULL;
+	struct s4_dword *s4 = NULL;
+	struct s5_dword *s5 = NULL;
+	struct s6_dword *s6 = NULL;
+	struct s7_dword *s7 = NULL;
+	struct i915_3dstate_scissor_rectangle scissor_rectangle;
+	struct i915_3dstate_load_indirect *load_indirect = NULL;
+	sis_state *sis = NULL;
+	ssb_state *ssb = NULL;
+	msb_state *msb = NULL;
+	psp_state *psp = NULL;
+	struct i915_3dprimitive *_3dprimitive = NULL;
+	struct vertex_data *vd = NULL;
+	unsigned int size;
+	void *base = NULL;
+
+	/* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */
+	size = sizeof(*load_state_immediate_1) + sizeof(*s2) + sizeof(*s3) +
+	    sizeof(*s4) + sizeof(*s5) + sizeof(*s6) + sizeof(*s7);
+	base = calloc(1, size);
+	load_state_immediate_1 =
+	    (struct i915_3dstate_load_state_immediate_1 *)base;
+	load_state_immediate_1->dw0.type = CMD_3D;
+	load_state_immediate_1->dw0.opcode = OPC_3DSTATE_LOAD_STATE_IMMEDIATE_1;
+	load_state_immediate_1->dw0.load_s2 = 1;
+	load_state_immediate_1->dw0.load_s3 = 1;
+	load_state_immediate_1->dw0.load_s4 = 1;
+	load_state_immediate_1->dw0.load_s5 = 1;
+	load_state_immediate_1->dw0.load_s6 = 1;
+	load_state_immediate_1->dw0.load_s7 = 1;
+	load_state_immediate_1->dw0.length = 5;
+
+	s2 = (struct s2_dword *)(++load_state_immediate_1);
+	s2->set0_texcoord_fmt = TEXCOORDFMT_2FP;
+	s2->set1_texcoord_fmt = TEXCOORDFMT_2FP;
+	s2->set2_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+	s2->set3_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+	s2->set4_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+	s2->set5_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+	s2->set6_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+	s2->set7_texcoord_fmt = TEXCOORDFMT_NOT_PRESENT;
+
+	s3 = (struct s3_dword *)(++s2);
+	s4 = (struct s4_dword *)(++s3);
+	s4->position_mask = VERTEXHAS_XY;
+	s4->cull_mode = CULLMODE_NONE;
+	s4->color_shade_mode = SHADEMODE_FLAT;
+	s4->specular_shade_mode = SHADEMODE_FLAT;
+	s4->fog_shade_mode = SHADEMODE_FLAT;
+	s4->alpha_shade_mode = SHADEMODE_FLAT;
+	s4->line_width = 0x2;	/* FIXME: 1.0??? */
+	s4->point_width = 0x1;
+
+	s5 = (struct s5_dword *)(++s4);
+	s6 = (struct s6_dword *)(++s5);
+	s6->src_blend_factor = 1;
+	s6->dest_blend_factor = 1;
+	s6->color_buffer_write = 1;
+
+	s7 = (struct s7_dword *)(++s6);
+	intelBatchbufferData(base, size, 0);
+	free(base);
+
+	/* 3DSTATE_3DSTATE_SCISSOR_RECTANGLE */
+	scissor_rectangle.dw0.type = CMD_3D;
+	scissor_rectangle.dw0.opcode = OPC_3DSTATE_SCISSOR_RECTANGLE;
+	scissor_rectangle.dw0.length = 1;
+	scissor_rectangle.dw1.min_x = 0;
+	scissor_rectangle.dw1.min_y = 0;
+	scissor_rectangle.dw2.max_x = 2047;
+	scissor_rectangle.dw2.max_y = 2047;
+	intelBatchbufferData(&scissor_rectangle, sizeof(scissor_rectangle), 0);
+
+	/* 3DSTATE_LOAD_INDIRECT */
+	size =
+	    sizeof(*load_indirect) + sizeof(*sis) + sizeof(*ssb) +
+	    sizeof(*msb) + sizeof(*psp);
+	base = calloc(1, size);
+	load_indirect = (struct i915_3dstate_load_indirect *)base;
+	load_indirect->dw0.type = CMD_3D;
+	load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
+	load_indirect->dw0.mem_select = 1;	/* Bearlake only */
+	load_indirect->dw0.block_mask =
+	    BLOCK_SIS | BLOCK_SSB | BLOCK_MSB | BLOCK_PSP;
+	load_indirect->dw0.length = 7;
+
+	/* SIS */
+	sis = (sis_state *) (++load_indirect);
+	sis->dw0.valid = 1;
+	sis->dw0.buffer_address = pI915XvMC->sis.offset;
+	sis->dw1.length = ((sizeof(struct i915_3dstate_buffer_info) +
+			    sizeof(struct i915_3dstate_dest_buffer_variables))
+			   >> 2) - 1;
+
+	/* SSB */
+	ssb = (ssb_state *) (++sis);
+	ssb->dw0.valid = 1;
+	ssb->dw0.buffer_address = pI915XvMC->ssb.offset;
+	ssb->dw1.length = ((sizeof(struct i915_3dstate_sampler_state) +
+			    sizeof(struct texture_sampler) * 3) >> 2) - 1;
+
+	/* MSB */
+	msb = (msb_state *) (++ssb);
+	msb->dw0.valid = 1;
+	msb->dw0.buffer_address = pI915XvMC->msb.offset;
+	msb->dw1.length = ((sizeof(struct i915_3dstate_map_state) +
+			    sizeof(struct texture_map) * 3) >> 2) - 1;
+
+	/* PSP */
+	psp = (psp_state *) (++msb);
+	psp->dw0.valid = 1;
+	psp->dw0.buffer_address = pI915XvMC->psp.offset;
+	psp->dw1.length = ((sizeof(struct i915_3dstate_pixel_shader_program) +
+			    sizeof(union shader_inst)) >> 2) - 1;
+
+	intelBatchbufferData(base, size, 0);
+	free(base);
+
+	/* 3DPRIMITIVE */
+	size = sizeof(*_3dprimitive) + sizeof(*vd) * 3;
+	base = calloc(1, size);
+	_3dprimitive = (struct i915_3dprimitive *)base;
+	_3dprimitive->dw0.inline_prim.type = CMD_3D;
+	_3dprimitive->dw0.inline_prim.opcode = OPC_3DPRIMITIVE;
+	_3dprimitive->dw0.inline_prim.vertex_location = VERTEX_INLINE;
+	_3dprimitive->dw0.inline_prim.prim = PRIM_RECTLIST;
+	_3dprimitive->dw0.inline_prim.length = size - 2;
+
+	vd = (struct vertex_data *)(++_3dprimitive);
+	vd->x = 0;		/* FIXME!!! */
+	vd->x = 0;		/* FIXME */
+	vd->tc0.tcx = 0;
+	vd->tc0.tcy = 0;
+	vd->tc1.tcx = 0;
+	vd->tc1.tcy = 0;
+
+	++vd;
+	vd->x = 0;		/* FIXME!!! */
+	vd->x = 0;		/* FIXME */
+	vd->tc0.tcx = 0;
+	vd->tc0.tcy = 0;
+	vd->tc1.tcx = 0;
+	vd->tc1.tcy = 0;
+
+	++vd;
+	vd->x = 0;		/* FIXME!!! */
+	vd->x = 0;		/* FIXME */
+	vd->tc0.tcx = 0;
+	vd->tc0.tcy = 0;
+	vd->tc1.tcx = 0;
+	vd->tc1.tcy = 0;
+
+	intelBatchbufferData(base, size, 0);
+	free(base);
 }
 #endif
 
 /*
  * Function: i915_release_resource
  */
-static void i915_release_resource(Display *display, XvMCContext *context)
+static void i915_release_resource(Display * display, XvMCContext * context)
 {
-    i915XvMCContext *pI915XvMC;
+	i915XvMCContext *pI915XvMC;
 
-    if (!(pI915XvMC = context->privData))
-        return;
+	if (!(pI915XvMC = context->privData))
+		return;
 
-    pI915XvMC->ref--;
-    i915_xvmc_unmap_buffers(pI915XvMC);
+	pI915XvMC->ref--;
+	i915_xvmc_unmap_buffers(pI915XvMC);
 
-    free(pI915XvMC);
-    context->privData = NULL;
+	free(pI915XvMC);
+	context->privData = NULL;
 }
 
-static Status i915_xvmc_mc_create_context(Display *display, XvMCContext *context,
-	int priv_count, CARD32 *priv_data)
+static Status i915_xvmc_mc_create_context(Display * display,
+					  XvMCContext * context, int priv_count,
+					  CARD32 * priv_data)
 {
-    i915XvMCContext *pI915XvMC = NULL;
-    I915XvMCCreateContextRec *tmpComm = NULL;
-
-    XVMC_DBG("%s\n", __FUNCTION__);
-
-    if (priv_count != (sizeof(I915XvMCCreateContextRec) >> 2)) {
-        XVMC_ERR("_xvmc_create_context() returned incorrect data size!");
-        XVMC_INFO("\tExpected %d, got %d",
-               (int)(sizeof(I915XvMCCreateContextRec) >> 2),priv_count);
-        _xvmc_destroy_context(display, context);
-        XFree(priv_data);
-        context->privData = NULL;
-        return BadValue;
-    }
-
-    context->privData = (void *)calloc(1, sizeof(i915XvMCContext));
-    if (!context->privData) {
-        XVMC_ERR("Unable to allocate resources for XvMC context.");
-        return BadAlloc;
-    }
-    pI915XvMC = (i915XvMCContext *)context->privData;
-
-    tmpComm = (I915XvMCCreateContextRec *)priv_data;
-    pI915XvMC->ctxno = tmpComm->ctxno;
-    pI915XvMC->deviceID = tmpComm->deviceID;
-    pI915XvMC->sis.handle = tmpComm->sis.handle;
-    pI915XvMC->sis.offset = tmpComm->sis.offset;
-    pI915XvMC->sis.size = tmpComm->sis.size;
-    pI915XvMC->ssb.handle = tmpComm->ssb.handle;
-    pI915XvMC->ssb.offset = tmpComm->ssb.offset;
-    pI915XvMC->ssb.size = tmpComm->ssb.size;
-    pI915XvMC->msb.handle = tmpComm->msb.handle;
-    pI915XvMC->msb.offset = tmpComm->msb.offset;
-    pI915XvMC->msb.size = tmpComm->msb.size;
-    pI915XvMC->psp.handle = tmpComm->psp.handle;
-    pI915XvMC->psp.offset = tmpComm->psp.offset;
-    pI915XvMC->psp.size = tmpComm->psp.size;
-    pI915XvMC->psc.handle = tmpComm->psc.handle;
-    pI915XvMC->psc.offset = tmpComm->psc.offset;
-    pI915XvMC->psc.size = tmpComm->psc.size;
-
-    if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
-        pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
-        pI915XvMC->ssb.bus_addr = tmpComm->ssb.bus_addr;
-        pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
-        pI915XvMC->psp.bus_addr = tmpComm->psp.bus_addr;
-        pI915XvMC->psc.bus_addr = tmpComm->psc.bus_addr;
-    }
-
-    pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
-    pI915XvMC->corrdata.offset = tmpComm->corrdata.offset;
-    pI915XvMC->corrdata.size = tmpComm->corrdata.size;
-
-    /* Must free the private data we were passed from X */
-    XFree(priv_data);
-    priv_data = NULL;
-
-    if (i915_xvmc_map_buffers(pI915XvMC)) {
-        i915_xvmc_unmap_buffers(pI915XvMC);
-        free(pI915XvMC);
-        context->privData = NULL;
-        return BadAlloc;
-    }
-
-    /* Initialize private context values */
-    pI915XvMC->yStride = STRIDE(context->width);
-    pI915XvMC->uvStride = STRIDE(context->width >> 1);
-    pI915XvMC->haveXv = 0;
-    pI915XvMC->dual_prime = 0;
-    pI915XvMC->last_flip = 0;
-    pI915XvMC->port = context->port;
-    pI915XvMC->ref = 1;
-
-    /* pre-init state buffers */
-    i915_mc_one_time_context_init(context);
-    i915_mc_one_time_state_init(context);
-
-    i915_mc_static_indirect_state_init(context);
-
-    i915_mc_map_state_init(context);
-
-    i915_mc_load_indirect_render_init(context);
-    return Success;
+	i915XvMCContext *pI915XvMC = NULL;
+	I915XvMCCreateContextRec *tmpComm = NULL;
+
+	XVMC_DBG("%s\n", __FUNCTION__);
+
+	if (priv_count != (sizeof(I915XvMCCreateContextRec) >> 2)) {
+		XVMC_ERR
+		    ("_xvmc_create_context() returned incorrect data size!");
+		XVMC_INFO("\tExpected %d, got %d",
+			  (int)(sizeof(I915XvMCCreateContextRec) >> 2),
+			  priv_count);
+		_xvmc_destroy_context(display, context);
+		XFree(priv_data);
+		context->privData = NULL;
+		return BadValue;
+	}
+
+	context->privData = (void *)calloc(1, sizeof(i915XvMCContext));
+	if (!context->privData) {
+		XVMC_ERR("Unable to allocate resources for XvMC context.");
+		return BadAlloc;
+	}
+	pI915XvMC = (i915XvMCContext *) context->privData;
+
+	tmpComm = (I915XvMCCreateContextRec *) priv_data;
+	pI915XvMC->ctxno = tmpComm->ctxno;
+	pI915XvMC->deviceID = tmpComm->deviceID;
+	pI915XvMC->sis.handle = tmpComm->sis.handle;
+	pI915XvMC->sis.offset = tmpComm->sis.offset;
+	pI915XvMC->sis.size = tmpComm->sis.size;
+	pI915XvMC->ssb.handle = tmpComm->ssb.handle;
+	pI915XvMC->ssb.offset = tmpComm->ssb.offset;
+	pI915XvMC->ssb.size = tmpComm->ssb.size;
+	pI915XvMC->msb.handle = tmpComm->msb.handle;
+	pI915XvMC->msb.offset = tmpComm->msb.offset;
+	pI915XvMC->msb.size = tmpComm->msb.size;
+	pI915XvMC->psp.handle = tmpComm->psp.handle;
+	pI915XvMC->psp.offset = tmpComm->psp.offset;
+	pI915XvMC->psp.size = tmpComm->psp.size;
+	pI915XvMC->psc.handle = tmpComm->psc.handle;
+	pI915XvMC->psc.offset = tmpComm->psc.offset;
+	pI915XvMC->psc.size = tmpComm->psc.size;
+
+	if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
+	    pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
+		pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
+		pI915XvMC->ssb.bus_addr = tmpComm->ssb.bus_addr;
+		pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
+		pI915XvMC->psp.bus_addr = tmpComm->psp.bus_addr;
+		pI915XvMC->psc.bus_addr = tmpComm->psc.bus_addr;
+	}
+
+	pI915XvMC->corrdata.handle = tmpComm->corrdata.handle;
+	pI915XvMC->corrdata.offset = tmpComm->corrdata.offset;
+	pI915XvMC->corrdata.size = tmpComm->corrdata.size;
+
+	/* Must free the private data we were passed from X */
+	XFree(priv_data);
+	priv_data = NULL;
+
+	if (i915_xvmc_map_buffers(pI915XvMC)) {
+		i915_xvmc_unmap_buffers(pI915XvMC);
+		free(pI915XvMC);
+		context->privData = NULL;
+		return BadAlloc;
+	}
+
+	/* Initialize private context values */
+	pI915XvMC->yStride = STRIDE(context->width);
+	pI915XvMC->uvStride = STRIDE(context->width >> 1);
+	pI915XvMC->haveXv = 0;
+	pI915XvMC->dual_prime = 0;
+	pI915XvMC->last_flip = 0;
+	pI915XvMC->port = context->port;
+	pI915XvMC->ref = 1;
+
+	/* pre-init state buffers */
+	i915_mc_one_time_context_init(context);
+	i915_mc_one_time_state_init(context);
+
+	i915_mc_static_indirect_state_init(context);
+
+	i915_mc_map_state_init(context);
+
+	i915_mc_load_indirect_render_init(context);
+	return Success;
 }
 
-static int i915_xvmc_mc_destroy_context(Display *display, XvMCContext *context)
+static int i915_xvmc_mc_destroy_context(Display * display,
+					XvMCContext * context)
 {
-    i915XvMCContext *pI915XvMC;
+	i915XvMCContext *pI915XvMC;
 
-    if (!(pI915XvMC = context->privData))
-        return XvMCBadContext;
+	if (!(pI915XvMC = context->privData))
+		return XvMCBadContext;
 
-    /* Pass Control to the X server to destroy the drm_context_t */
-    i915_release_resource(display,context);
+	/* Pass Control to the X server to destroy the drm_context_t */
+	i915_release_resource(display, context);
 
-    free(one_time_load_state_imm1);
-    free(one_time_load_indirect);
-    free(mc_render_load_indirect);
-    return Success;
+	free(one_time_load_state_imm1);
+	free(one_time_load_indirect);
+	free(mc_render_load_indirect);
+	return Success;
 }
 
-static Status i915_xvmc_mc_create_surface(Display *display,
-	XvMCContext *context, XvMCSurface *surface, int priv_count,
-	CARD32 *priv_data)
+static Status i915_xvmc_mc_create_surface(Display * display,
+					  XvMCContext * context,
+					  XvMCSurface * surface, int priv_count,
+					  CARD32 * priv_data)
 {
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSurface *pI915Surface;
-    I915XvMCCreateSurfaceRec *tmpComm = NULL;
-
-    if (!(pI915XvMC = context->privData))
-        return XvMCBadContext;
-
-    XVMC_DBG("%s\n", __FUNCTION__);
-
-    if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
-        XVMC_ERR("_xvmc_create_surface() returned incorrect data size!");
-        XVMC_INFO("\tExpected %d, got %d",
-               (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2), priv_count);
-        _xvmc_destroy_surface(display, surface);
-        XFree(priv_data);
-        return BadAlloc;
-    }
-
-    PPTHREAD_MUTEX_LOCK();
-    surface->privData = (i915XvMCSurface *)malloc(sizeof(i915XvMCSurface));
-
-    if (!(pI915Surface = surface->privData)) {
-        PPTHREAD_MUTEX_UNLOCK();
-        return BadAlloc;
-    }
-
-    /* Initialize private values */
-    pI915Surface->last_render = 0;
-    pI915Surface->last_flip = 0;
-    pI915Surface->yStride = pI915XvMC->yStride;
-    pI915Surface->uvStride = pI915XvMC->uvStride;
-    pI915Surface->width = context->width;
-    pI915Surface->height = context->height;
-    pI915Surface->privContext = pI915XvMC;
-    pI915Surface->privSubPic = NULL;
-    pI915Surface->srf.map = NULL;
-
-    tmpComm = (I915XvMCCreateSurfaceRec *)priv_data;
-
-    pI915Surface->srfNo = tmpComm->srfno;
-    pI915Surface->srf.handle = tmpComm->srf.handle;
-    pI915Surface->srf.offset = tmpComm->srf.offset;
-    pI915Surface->srf.size = tmpComm->srf.size;
-
-    XFree(priv_data);
-
-    if (drmMap(xvmc_driver->fd,
-               pI915Surface->srf.handle,
-               pI915Surface->srf.size,
-               (drmAddress *)&pI915Surface->srf.map) != 0) {
-	XVMC_ERR("mapping surface memory failed!\n");
-        _xvmc_destroy_surface(display, surface);
-        free(pI915Surface);
-        surface->privData = NULL;
-        PPTHREAD_MUTEX_UNLOCK();
-        return BadAlloc;
-    }
-
-    pI915XvMC->ref++;
-    PPTHREAD_MUTEX_UNLOCK();
-    return 0;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSurface *pI915Surface;
+	I915XvMCCreateSurfaceRec *tmpComm = NULL;
+
+	if (!(pI915XvMC = context->privData))
+		return XvMCBadContext;
+
+	XVMC_DBG("%s\n", __FUNCTION__);
+
+	if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
+		XVMC_ERR
+		    ("_xvmc_create_surface() returned incorrect data size!");
+		XVMC_INFO("\tExpected %d, got %d",
+			  (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2),
+			  priv_count);
+		_xvmc_destroy_surface(display, surface);
+		XFree(priv_data);
+		return BadAlloc;
+	}
+
+	PPTHREAD_MUTEX_LOCK();
+	surface->privData = (i915XvMCSurface *) malloc(sizeof(i915XvMCSurface));
+
+	if (!(pI915Surface = surface->privData)) {
+		PPTHREAD_MUTEX_UNLOCK();
+		return BadAlloc;
+	}
+
+	/* Initialize private values */
+	pI915Surface->last_render = 0;
+	pI915Surface->last_flip = 0;
+	pI915Surface->yStride = pI915XvMC->yStride;
+	pI915Surface->uvStride = pI915XvMC->uvStride;
+	pI915Surface->width = context->width;
+	pI915Surface->height = context->height;
+	pI915Surface->privContext = pI915XvMC;
+	pI915Surface->privSubPic = NULL;
+	pI915Surface->srf.map = NULL;
+
+	tmpComm = (I915XvMCCreateSurfaceRec *) priv_data;
+
+	pI915Surface->srfNo = tmpComm->srfno;
+	pI915Surface->srf.handle = tmpComm->srf.handle;
+	pI915Surface->srf.offset = tmpComm->srf.offset;
+	pI915Surface->srf.size = tmpComm->srf.size;
+
+	XFree(priv_data);
+
+	if (drmMap(xvmc_driver->fd,
+		   pI915Surface->srf.handle,
+		   pI915Surface->srf.size,
+		   (drmAddress *) & pI915Surface->srf.map) != 0) {
+		XVMC_ERR("mapping surface memory failed!\n");
+		_xvmc_destroy_surface(display, surface);
+		free(pI915Surface);
+		surface->privData = NULL;
+		PPTHREAD_MUTEX_UNLOCK();
+		return BadAlloc;
+	}
+
+	pI915XvMC->ref++;
+	PPTHREAD_MUTEX_UNLOCK();
+	return 0;
 }
 
-
-static int i915_xvmc_mc_destroy_surface(Display *display, XvMCSurface *surface)
+static int i915_xvmc_mc_destroy_surface(Display * display,
+					XvMCSurface * surface)
 {
-    i915XvMCSurface *pI915Surface;
-    i915XvMCContext *pI915XvMC;
+	i915XvMCSurface *pI915Surface;
+	i915XvMCContext *pI915XvMC;
 
-    if (!display || !surface)
-        return BadValue;
+	if (!display || !surface)
+		return BadValue;
 
-    if (!(pI915Surface = surface->privData))
-        return XvMCBadSurface;
+	if (!(pI915Surface = surface->privData))
+		return XvMCBadSurface;
 
-    if (!(pI915XvMC = pI915Surface->privContext))
-        return XvMCBadSurface;
+	if (!(pI915XvMC = pI915Surface->privContext))
+		return XvMCBadSurface;
 
-    if (pI915Surface->last_flip)
-        XvMCSyncSurface(display,surface);
+	if (pI915Surface->last_flip)
+		XvMCSyncSurface(display, surface);
 
-    if (pI915Surface->srf.map)
-        drmUnmap(pI915Surface->srf.map, pI915Surface->srf.size);
+	if (pI915Surface->srf.map)
+		drmUnmap(pI915Surface->srf.map, pI915Surface->srf.size);
 
-    free(pI915Surface);
-    surface->privData = NULL;
-    pI915XvMC->ref--;
+	free(pI915Surface);
+	surface->privData = NULL;
+	pI915XvMC->ref--;
 
-    return Success;
+	return Success;
 }
 
-
-static int i915_xvmc_mc_render_surface(Display *display, XvMCContext *context,
-                         unsigned int picture_structure,
-                         XvMCSurface *target_surface,
-                         XvMCSurface *past_surface,
-                         XvMCSurface *future_surface,
-                         unsigned int flags,
-                         unsigned int num_macroblocks,
-                         unsigned int first_macroblock,
-                         XvMCMacroBlockArray *macroblock_array,
-                         XvMCBlockArray *blocks)
+static int i915_xvmc_mc_render_surface(Display * display, XvMCContext * context,
+				       unsigned int picture_structure,
+				       XvMCSurface * target_surface,
+				       XvMCSurface * past_surface,
+				       XvMCSurface * future_surface,
+				       unsigned int flags,
+				       unsigned int num_macroblocks,
+				       unsigned int first_macroblock,
+				       XvMCMacroBlockArray * macroblock_array,
+				       XvMCBlockArray * blocks)
 {
-    int i;
-    int picture_coding_type = MPEG_I_PICTURE;
-    /* correction data buffer */
-    char *corrdata_ptr;
-    int corrdata_size = 0;
-
-    /* Block Pointer */
-    short *block_ptr;
-    /* Current Macroblock Pointer */
-    XvMCMacroBlock *mb;
-
-    intel_xvmc_context_ptr intel_ctx;
-
-    i915XvMCSurface *privTarget = NULL;
-    i915XvMCSurface *privFuture = NULL;
-    i915XvMCSurface *privPast = NULL;
-    i915XvMCContext *pI915XvMC = NULL;
-
-    XVMC_DBG("%s\n", __FUNCTION__);
-
-    /* Check Parameters for validity */
-    if (!display || !context || !target_surface) {
-        XVMC_ERR("Invalid Display, Context or Target!");
-        return BadValue;
-    }
-
-    if (!num_macroblocks)
-        return Success;
-
-    if (!macroblock_array || !blocks) {
-        XVMC_ERR("Invalid block data!");
-        return BadValue;
-    }
-
-    if (macroblock_array->num_blocks < (num_macroblocks + first_macroblock)) {
-        XVMC_ERR("Too many macroblocks requested for MB array size.");
-        return BadValue;
-    }
-
-    if (!(pI915XvMC = context->privData))
-        return XvMCBadContext;
-
-    if (!(privTarget = target_surface->privData))
-        return XvMCBadSurface;
-
-    if (context->surface_type_id >= SURFACE_TYPE_MAX) {
-        XVMC_ERR("Unsupprted surface_type_id %d.", context->surface_type_id);
-        return BadValue;
-    }
-
-    intel_ctx = intel_xvmc_find_context(context->context_id);
-    if (!intel_ctx) {
-	XVMC_ERR("Can't find intel xvmc context\n");
-	return BadValue;
-    }
-
-    /* P Frame Test */
-    if (!past_surface) {
-        /* Just to avoid some ifs later. */
-        privPast = privTarget;
-    } else {
-        if (!(privPast = past_surface->privData)) {
-            XVMC_ERR("Invalid Past Surface!");
-            return XvMCBadSurface;
-        }
-        picture_coding_type = MPEG_P_PICTURE;
-    }
-
-    /* B Frame Test */
-    if (!future_surface) {
-        privFuture = privPast; // privTarget;
-    } else {
-        if (!past_surface) {
-            XVMC_ERR("No Past Surface!");
-            return BadValue;
-        }
-
-        if (!(privFuture = future_surface->privData)) {
-            XVMC_ERR("Invalid Future Surface!");
-            return XvMCBadSurface;
-        }
-
-        picture_coding_type = MPEG_B_PICTURE;
-    }
-
-    LOCK_HARDWARE(intel_ctx->hw_context);
-    corrdata_ptr = pI915XvMC->corrdata.map;
-    corrdata_size = 0;
-
-    for (i = first_macroblock; i < (num_macroblocks + first_macroblock); i++) {
-        int bspm = 0;
-        mb = &macroblock_array->macro_blocks[i];
-        block_ptr = &(blocks->blocks[mb->index << 6]);
-
-        /* Lockup can happen if the coordinates are too far out of range */
-        if (mb->x > (target_surface->width >> 4)) {
-            mb->x = 0;
-            XVMC_INFO("reset x");
-        }
-
-        if (mb->y > (target_surface->height >> 4)) {
-            mb->y = 0;
-            XVMC_INFO("reset y");
-        }
-
-        /* Catch no pattern case */
-        if (!(mb->macroblock_type & XVMC_MB_TYPE_PATTERN) &&
-            !(mb->macroblock_type & XVMC_MB_TYPE_INTRA) &&
-            mb->coded_block_pattern) {
-            mb->coded_block_pattern = 0;
-            XVMC_INFO("no coded blocks present!");
-        }
-
-        bspm = mb_bytes_420[mb->coded_block_pattern];
-
-        if (!bspm)
-            continue;
-
-        corrdata_size += bspm;
-
-        if (corrdata_size > pI915XvMC->corrdata.size) {
-            XVMC_ERR("correction data buffer overflow.");
-            break;
-        }
-        memcpy(corrdata_ptr, block_ptr, bspm);
-        corrdata_ptr += bspm;
-    }
-
-    i915_flush(1, 0);
-    // i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
-    // | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
-
-    i915_mc_one_time_state_emit();
-
-    i915_mc_static_indirect_state_set(context, target_surface, picture_structure,
-	    flags, picture_coding_type);
-    /* setup reference surfaces */
-    i915_mc_map_state_set(context, privPast, privFuture);
-
-    i915_mc_load_indirect_render_emit();
-
-    i915_mc_mpeg_set_origin(context, &macroblock_array->macro_blocks[first_macroblock]);
-
-    for (i = first_macroblock; i < (num_macroblocks + first_macroblock); i++) {
-        mb = &macroblock_array->macro_blocks[i];
-
-        /* Intra Blocks */
-        if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
-            i915_mc_mpeg_macroblock_ipicture(context, mb);
-        } else if ((picture_structure & XVMC_FRAME_PICTURE) == XVMC_FRAME_PICTURE) {
-	    /* Frame Picture */
-            switch (mb->motion_type & 3) {
-            case XVMC_PREDICTION_FIELD: /* Field Based */
-                i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure);
-                break;
-
-            case XVMC_PREDICTION_FRAME: /* Frame Based */
-                i915_mc_mpeg_macroblock_1fbmv(context, mb);
-                break;
-
-            case XVMC_PREDICTION_DUAL_PRIME:    /* Dual Prime */
-                i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure);
-                break;
-
-            default:    /* No Motion Type */
-		XVMC_ERR("Invalid Macroblock Parameters found.");
-                break;
-            }
-        } else {        /* Field Picture */
-            switch (mb->motion_type & 3) {
-            case XVMC_PREDICTION_FIELD: /* Field Based */
-                i915_mc_mpeg_macroblock_1fbmv(context, mb);
-                break;
-
-            case XVMC_PREDICTION_16x8:  /* 16x8 MC */
-                i915_mc_mpeg_macroblock_2fbmv(context, mb, picture_structure);
-                break;
-
-            case XVMC_PREDICTION_DUAL_PRIME:    /* Dual Prime */
-                i915_mc_mpeg_macroblock_1fbmv(context, mb);
-                break;
-
-            default:    /* No Motion Type */
-		XVMC_ERR("Invalid Macroblock Parameters found.");
-                break;
-            }
-        }
-    }
-
-    intelFlushBatch(TRUE);
-    xvmc_driver->last_render = xvmc_driver->alloc.irq_emitted;
-    privTarget->last_render = xvmc_driver->last_render;
-
-    UNLOCK_HARDWARE(intel_ctx->hw_context);
-    return 0;
+	int i;
+	int picture_coding_type = MPEG_I_PICTURE;
+	/* correction data buffer */
+	char *corrdata_ptr;
+	int corrdata_size = 0;
+
+	/* Block Pointer */
+	short *block_ptr;
+	/* Current Macroblock Pointer */
+	XvMCMacroBlock *mb;
+
+	intel_xvmc_context_ptr intel_ctx;
+
+	i915XvMCSurface *privTarget = NULL;
+	i915XvMCSurface *privFuture = NULL;
+	i915XvMCSurface *privPast = NULL;
+	i915XvMCContext *pI915XvMC = NULL;
+
+	XVMC_DBG("%s\n", __FUNCTION__);
+
+	/* Check Parameters for validity */
+	if (!display || !context || !target_surface) {
+		XVMC_ERR("Invalid Display, Context or Target!");
+		return BadValue;
+	}
+
+	if (!num_macroblocks)
+		return Success;
+
+	if (!macroblock_array || !blocks) {
+		XVMC_ERR("Invalid block data!");
+		return BadValue;
+	}
+
+	if (macroblock_array->num_blocks < (num_macroblocks + first_macroblock)) {
+		XVMC_ERR("Too many macroblocks requested for MB array size.");
+		return BadValue;
+	}
+
+	if (!(pI915XvMC = context->privData))
+		return XvMCBadContext;
+
+	if (!(privTarget = target_surface->privData))
+		return XvMCBadSurface;
+
+	if (context->surface_type_id >= SURFACE_TYPE_MAX) {
+		XVMC_ERR("Unsupprted surface_type_id %d.",
+			 context->surface_type_id);
+		return BadValue;
+	}
+
+	intel_ctx = intel_xvmc_find_context(context->context_id);
+	if (!intel_ctx) {
+		XVMC_ERR("Can't find intel xvmc context\n");
+		return BadValue;
+	}
+
+	/* P Frame Test */
+	if (!past_surface) {
+		/* Just to avoid some ifs later. */
+		privPast = privTarget;
+	} else {
+		if (!(privPast = past_surface->privData)) {
+			XVMC_ERR("Invalid Past Surface!");
+			return XvMCBadSurface;
+		}
+		picture_coding_type = MPEG_P_PICTURE;
+	}
+
+	/* B Frame Test */
+	if (!future_surface) {
+		privFuture = privPast;	// privTarget;
+	} else {
+		if (!past_surface) {
+			XVMC_ERR("No Past Surface!");
+			return BadValue;
+		}
+
+		if (!(privFuture = future_surface->privData)) {
+			XVMC_ERR("Invalid Future Surface!");
+			return XvMCBadSurface;
+		}
+
+		picture_coding_type = MPEG_B_PICTURE;
+	}
+
+	LOCK_HARDWARE(intel_ctx->hw_context);
+	corrdata_ptr = pI915XvMC->corrdata.map;
+	corrdata_size = 0;
+
+	for (i = first_macroblock; i < (num_macroblocks + first_macroblock);
+	     i++) {
+		int bspm = 0;
+		mb = &macroblock_array->macro_blocks[i];
+		block_ptr = &(blocks->blocks[mb->index << 6]);
+
+		/* Lockup can happen if the coordinates are too far out of range */
+		if (mb->x > (target_surface->width >> 4)) {
+			mb->x = 0;
+			XVMC_INFO("reset x");
+		}
+
+		if (mb->y > (target_surface->height >> 4)) {
+			mb->y = 0;
+			XVMC_INFO("reset y");
+		}
+
+		/* Catch no pattern case */
+		if (!(mb->macroblock_type & XVMC_MB_TYPE_PATTERN) &&
+		    !(mb->macroblock_type & XVMC_MB_TYPE_INTRA) &&
+		    mb->coded_block_pattern) {
+			mb->coded_block_pattern = 0;
+			XVMC_INFO("no coded blocks present!");
+		}
+
+		bspm = mb_bytes_420[mb->coded_block_pattern];
+
+		if (!bspm)
+			continue;
+
+		corrdata_size += bspm;
+
+		if (corrdata_size > pI915XvMC->corrdata.size) {
+			XVMC_ERR("correction data buffer overflow.");
+			break;
+		}
+		memcpy(corrdata_ptr, block_ptr, bspm);
+		corrdata_ptr += bspm;
+	}
+
+	i915_flush(1, 0);
+	// i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_DIS | BLOCK_SSB
+	// | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
+
+	i915_mc_one_time_state_emit();
+
+	i915_mc_static_indirect_state_set(context, target_surface,
+					  picture_structure, flags,
+					  picture_coding_type);
+	/* setup reference surfaces */
+	i915_mc_map_state_set(context, privPast, privFuture);
+
+	i915_mc_load_indirect_render_emit();
+
+	i915_mc_mpeg_set_origin(context,
+				&macroblock_array->macro_blocks
+				[first_macroblock]);
+
+	for (i = first_macroblock; i < (num_macroblocks + first_macroblock);
+	     i++) {
+		mb = &macroblock_array->macro_blocks[i];
+
+		/* Intra Blocks */
+		if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
+			i915_mc_mpeg_macroblock_ipicture(context, mb);
+		} else if ((picture_structure & XVMC_FRAME_PICTURE) ==
+			   XVMC_FRAME_PICTURE) {
+			/* Frame Picture */
+			switch (mb->motion_type & 3) {
+			case XVMC_PREDICTION_FIELD:	/* Field Based */
+				i915_mc_mpeg_macroblock_2fbmv(context, mb,
+							      picture_structure);
+				break;
+
+			case XVMC_PREDICTION_FRAME:	/* Frame Based */
+				i915_mc_mpeg_macroblock_1fbmv(context, mb);
+				break;
+
+			case XVMC_PREDICTION_DUAL_PRIME:	/* Dual Prime */
+				i915_mc_mpeg_macroblock_2fbmv(context, mb,
+							      picture_structure);
+				break;
+
+			default:	/* No Motion Type */
+				XVMC_ERR
+				    ("Invalid Macroblock Parameters found.");
+				break;
+			}
+		} else {	/* Field Picture */
+			switch (mb->motion_type & 3) {
+			case XVMC_PREDICTION_FIELD:	/* Field Based */
+				i915_mc_mpeg_macroblock_1fbmv(context, mb);
+				break;
+
+			case XVMC_PREDICTION_16x8:	/* 16x8 MC */
+				i915_mc_mpeg_macroblock_2fbmv(context, mb,
+							      picture_structure);
+				break;
+
+			case XVMC_PREDICTION_DUAL_PRIME:	/* Dual Prime */
+				i915_mc_mpeg_macroblock_1fbmv(context, mb);
+				break;
+
+			default:	/* No Motion Type */
+				XVMC_ERR
+				    ("Invalid Macroblock Parameters found.");
+				break;
+			}
+		}
+	}
+
+	intelFlushBatch(TRUE);
+	xvmc_driver->last_render = xvmc_driver->alloc.irq_emitted;
+	privTarget->last_render = xvmc_driver->last_render;
+
+	UNLOCK_HARDWARE(intel_ctx->hw_context);
+	return 0;
 }
 
-static int i915_xvmc_mc_put_surface(Display *display,XvMCSurface *surface,
-                      Drawable draw, short srcx, short srcy,
-                      unsigned short srcw, unsigned short srch,
-                      short destx, short desty,
-                      unsigned short destw, unsigned short desth,
-                      int flags, struct intel_xvmc_command *data)
+static int i915_xvmc_mc_put_surface(Display * display, XvMCSurface * surface,
+				    Drawable draw, short srcx, short srcy,
+				    unsigned short srcw, unsigned short srch,
+				    short destx, short desty,
+				    unsigned short destw, unsigned short desth,
+				    int flags, struct intel_xvmc_command *data)
 {
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSurface *pI915Surface;
-    i915XvMCSubpicture *pI915SubPic;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSurface *pI915Surface;
+	i915XvMCSubpicture *pI915SubPic;
 
-    if (!(pI915Surface = surface->privData))
-        return XvMCBadSurface;
+	if (!(pI915Surface = surface->privData))
+		return XvMCBadSurface;
 
-    if (!(pI915XvMC = pI915Surface->privContext))
-        return XvMCBadSurface;
+	if (!(pI915XvMC = pI915Surface->privContext))
+		return XvMCBadSurface;
 
-    PPTHREAD_MUTEX_LOCK();
+	PPTHREAD_MUTEX_LOCK();
 
-    data->command = INTEL_XVMC_COMMAND_DISPLAY;
-    data->ctxNo = pI915XvMC->ctxno;
-    data->srfNo = pI915Surface->srfNo;
-    pI915SubPic = pI915Surface->privSubPic;
-    data->subPicNo = (!pI915SubPic ? 0 : pI915SubPic->srfNo);
-    data->real_id = FOURCC_YV12;
-    data->flags = flags;
+	data->command = INTEL_XVMC_COMMAND_DISPLAY;
+	data->ctxNo = pI915XvMC->ctxno;
+	data->srfNo = pI915Surface->srfNo;
+	pI915SubPic = pI915Surface->privSubPic;
+	data->subPicNo = (!pI915SubPic ? 0 : pI915SubPic->srfNo);
+	data->real_id = FOURCC_YV12;
+	data->flags = flags;
 
-    PPTHREAD_MUTEX_UNLOCK();
+	PPTHREAD_MUTEX_UNLOCK();
 
-    return 0;
+	return 0;
 }
 
-static int i915_xvmc_mc_get_surface_status(Display *display,
-	XvMCSurface *surface, int *stat)
+static int i915_xvmc_mc_get_surface_status(Display * display,
+					   XvMCSurface * surface, int *stat)
 {
-    i915XvMCSurface *pI915Surface;
-    i915XvMCContext *pI915XvMC;
-
-    if (!display || !surface || !stat)
-        return BadValue;
-
-    *stat = 0;
-
-    if (!(pI915Surface = surface->privData))
-        return XvMCBadSurface;
-
-    if (!(pI915XvMC = pI915Surface->privContext))
-        return XvMCBadSurface;
-
-    PPTHREAD_MUTEX_LOCK();
-    if (pI915Surface->last_flip) {
-        /* This can not happen */
-        if (pI915XvMC->last_flip < pI915Surface->last_flip) {
-            XVMC_ERR("Context last flip is less than surface last flip.");
-            PPTHREAD_MUTEX_UNLOCK();
-            return BadValue;
-        }
-
-        /*
-          If the context has 2 or more flips after this surface it
-          cannot be displaying. Don't bother to check.
-        */
-        if (!(pI915XvMC->last_flip > (pI915Surface->last_flip + 1))) {
-            /*
-              If this surface was the last flipped it is either displaying
-              or about to be so don't bother checking.
-            */
-            if (pI915XvMC->last_flip == pI915Surface->last_flip) {
-                *stat |= XVMC_DISPLAYING;
-            }
-        }
-    }
-
-    PPTHREAD_MUTEX_UNLOCK();
-    return 0;
+	i915XvMCSurface *pI915Surface;
+	i915XvMCContext *pI915XvMC;
+
+	if (!display || !surface || !stat)
+		return BadValue;
+
+	*stat = 0;
+
+	if (!(pI915Surface = surface->privData))
+		return XvMCBadSurface;
+
+	if (!(pI915XvMC = pI915Surface->privContext))
+		return XvMCBadSurface;
+
+	PPTHREAD_MUTEX_LOCK();
+	if (pI915Surface->last_flip) {
+		/* This can not happen */
+		if (pI915XvMC->last_flip < pI915Surface->last_flip) {
+			XVMC_ERR
+			    ("Context last flip is less than surface last flip.");
+			PPTHREAD_MUTEX_UNLOCK();
+			return BadValue;
+		}
+
+		/*
+		   If the context has 2 or more flips after this surface it
+		   cannot be displaying. Don't bother to check.
+		 */
+		if (!(pI915XvMC->last_flip > (pI915Surface->last_flip + 1))) {
+			/*
+			   If this surface was the last flipped it is either displaying
+			   or about to be so don't bother checking.
+			 */
+			if (pI915XvMC->last_flip == pI915Surface->last_flip) {
+				*stat |= XVMC_DISPLAYING;
+			}
+		}
+	}
+
+	PPTHREAD_MUTEX_UNLOCK();
+	return 0;
 }
 
 /* XXX WIP code */
 #if 0
-Status XvMCHideSurface(Display *display, XvMCSurface *surface)
+Status XvMCHideSurface(Display * display, XvMCSurface * surface)
 {
-    i915XvMCSurface *pI915Surface;
-    i915XvMCContext *pI915XvMC;
-    int stat = 0, ret;
+	i915XvMCSurface *pI915Surface;
+	i915XvMCContext *pI915XvMC;
+	int stat = 0, ret;
 
-    if (!display || !surface)
-        return BadValue;
+	if (!display || !surface)
+		return BadValue;
 
-    if (!(pI915Surface = surface->privData))
-        return XvMCBadSurface;
+	if (!(pI915Surface = surface->privData))
+		return XvMCBadSurface;
 
-    /* Get the associated context pointer */
-    if (!(pI915XvMC = pI915Surface->privContext))
-        return XvMCBadSurface;
+	/* Get the associated context pointer */
+	if (!(pI915XvMC = pI915Surface->privContext))
+		return XvMCBadSurface;
 
-    XvMCSyncSurface(display, surface);
+	XvMCSyncSurface(display, surface);
 
-    /*
-      Get the status of the surface, if it is not currently displayed
-      we don't need to worry about it.
-    */
-    if ((ret = XvMCGetSurfaceStatus(display, surface, &stat)) != Success)
-        return ret;
+	/*
+	   Get the status of the surface, if it is not currently displayed
+	   we don't need to worry about it.
+	 */
+	if ((ret = XvMCGetSurfaceStatus(display, surface, &stat)) != Success)
+		return ret;
 
-    if (!(stat & XVMC_DISPLAYING))
-        return Success;
+	if (!(stat & XVMC_DISPLAYING))
+		return Success;
 
-    /* FIXME: */
-    return Success;
+	/* FIXME: */
+	return Success;
 }
 
-Status i915_xvmc_create_subpict(Display *display, XvMCContext *context,
-                            XvMCSubpicture *subpicture,
-                            unsigned short width, unsigned short height,
-                            int xvimage_id)
+Status i915_xvmc_create_subpict(Display * display, XvMCContext * context,
+				XvMCSubpicture * subpicture,
+				unsigned short width, unsigned short height,
+				int xvimage_id)
 {
-    Status ret;
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSubpicture *pI915Subpicture;
-    I915XvMCCreateSurfaceRec *tmpComm = NULL;
-    int priv_count;
-    uint *priv_data;
-
-    if (!subpicture || !context || !display)
-        return BadValue;
-
-    pI915XvMC = (i915XvMCContext *)context->privData;
-
-    if (!pI915XvMC)
-        return XvMCBadContext;
-
-    subpicture->privData =
-        (i915XvMCSubpicture *)malloc(sizeof(i915XvMCSubpicture));
-
-    if (!subpicture->privData)
-        return BadAlloc;
-
-    PPTHREAD_MUTEX_LOCK();
-    subpicture->context_id = context->context_id;
-    subpicture->xvimage_id = xvimage_id;
-    subpicture->width = width;
-    subpicture->height = height;
-    pI915Subpicture = (i915XvMCSubpicture *)subpicture->privData;
-
-    XLockDisplay(display);
-    if ((ret = _xvmc_create_subpicture(display, context, subpicture,
-                                       &priv_count, &priv_data))) {
-        XUnlockDisplay(display);
-        XVMC_ERR("Unable to create XvMCSubpicture.");
-        free(pI915Subpicture);
-        subpicture->privData = NULL;
-        PPTHREAD_MUTEX_UNLOCK();
-        return ret;
-    }
-    XUnlockDisplay(display);
-
-    if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
-        XVMC_ERR("_xvmc_create_subpicture() returned incorrect data size!");
-        XVMC_INFO("\tExpected %d, got %d",
-               (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2), priv_count);
-        XLockDisplay(display);
-        _xvmc_destroy_subpicture(display, subpicture);
-        XUnlockDisplay(display);
-        XFree(priv_data);
-        free(pI915Subpicture);
-        subpicture->privData = NULL;
-        PPTHREAD_MUTEX_UNLOCK();
-        return BadAlloc;
-    }
-
-    tmpComm = (I915XvMCCreateSurfaceRec *)priv_data;
-    pI915Subpicture->srfNo = tmpComm->srfno;
-    pI915Subpicture->srf.handle = tmpComm->srf.handle;
-    pI915Subpicture->srf.offset = tmpComm->srf.offset;
-    pI915Subpicture->srf.size = tmpComm->srf.size;
-    XFree(priv_data);
-
-    if (drmMap(pI915XvMC->fd,
-               pI915Subpicture->srf.handle,
-               pI915Subpicture->srf.size,
-               (drmAddress *)&pI915Subpicture->srf.map) != 0) {
-        XLockDisplay(display);
-        _xvmc_destroy_subpicture(display, subpicture);
-        XUnlockDisplay(display);
-        free(pI915Subpicture);
-        subpicture->privData = NULL;
-        PPTHREAD_MUTEX_UNLOCK();
-        return BadAlloc;
-    }
-
-    /* subpicture */
-    subpicture->num_palette_entries = I915_SUBPIC_PALETTE_SIZE;
-    subpicture->entry_bytes = 3;
-    strncpy(subpicture->component_order, "YUV", 4);
-
-    /* Initialize private values */
-    pI915Subpicture->privContext = pI915XvMC;
-    pI915Subpicture->last_render= 0;
-    pI915Subpicture->last_flip = 0;
-    pI915Subpicture->pitch = ((subpicture->width + 3) & ~3);
-
-    switch(subpicture->xvimage_id) {
-    case FOURCC_IA44:
-    case FOURCC_AI44:
-        break;
-
-    default:
-        drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
-        XLockDisplay(display);
-        _xvmc_destroy_subpicture(display, subpicture);
-        XUnlockDisplay(display);
-        free(pI915Subpicture);
-        subpicture->privData = NULL;
-        PPTHREAD_MUTEX_UNLOCK();
-        return BadMatch;
-    }
-
-    pI915XvMC->ref++;
-    PPTHREAD_MUTEX_UNLOCK();
-    return Success;
+	Status ret;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
+	I915XvMCCreateSurfaceRec *tmpComm = NULL;
+	int priv_count;
+	uint *priv_data;
+
+	if (!subpicture || !context || !display)
+		return BadValue;
+
+	pI915XvMC = (i915XvMCContext *) context->privData;
+
+	if (!pI915XvMC)
+		return XvMCBadContext;
+
+	subpicture->privData =
+	    (i915XvMCSubpicture *) malloc(sizeof(i915XvMCSubpicture));
+
+	if (!subpicture->privData)
+		return BadAlloc;
+
+	PPTHREAD_MUTEX_LOCK();
+	subpicture->context_id = context->context_id;
+	subpicture->xvimage_id = xvimage_id;
+	subpicture->width = width;
+	subpicture->height = height;
+	pI915Subpicture = (i915XvMCSubpicture *) subpicture->privData;
+
+	XLockDisplay(display);
+	if ((ret = _xvmc_create_subpicture(display, context, subpicture,
+					   &priv_count, &priv_data))) {
+		XUnlockDisplay(display);
+		XVMC_ERR("Unable to create XvMCSubpicture.");
+		free(pI915Subpicture);
+		subpicture->privData = NULL;
+		PPTHREAD_MUTEX_UNLOCK();
+		return ret;
+	}
+	XUnlockDisplay(display);
+
+	if (priv_count != (sizeof(I915XvMCCreateSurfaceRec) >> 2)) {
+		XVMC_ERR
+		    ("_xvmc_create_subpicture() returned incorrect data size!");
+		XVMC_INFO("\tExpected %d, got %d",
+			  (int)(sizeof(I915XvMCCreateSurfaceRec) >> 2),
+			  priv_count);
+		XLockDisplay(display);
+		_xvmc_destroy_subpicture(display, subpicture);
+		XUnlockDisplay(display);
+		XFree(priv_data);
+		free(pI915Subpicture);
+		subpicture->privData = NULL;
+		PPTHREAD_MUTEX_UNLOCK();
+		return BadAlloc;
+	}
+
+	tmpComm = (I915XvMCCreateSurfaceRec *) priv_data;
+	pI915Subpicture->srfNo = tmpComm->srfno;
+	pI915Subpicture->srf.handle = tmpComm->srf.handle;
+	pI915Subpicture->srf.offset = tmpComm->srf.offset;
+	pI915Subpicture->srf.size = tmpComm->srf.size;
+	XFree(priv_data);
+
+	if (drmMap(pI915XvMC->fd,
+		   pI915Subpicture->srf.handle,
+		   pI915Subpicture->srf.size,
+		   (drmAddress *) & pI915Subpicture->srf.map) != 0) {
+		XLockDisplay(display);
+		_xvmc_destroy_subpicture(display, subpicture);
+		XUnlockDisplay(display);
+		free(pI915Subpicture);
+		subpicture->privData = NULL;
+		PPTHREAD_MUTEX_UNLOCK();
+		return BadAlloc;
+	}
+
+	/* subpicture */
+	subpicture->num_palette_entries = I915_SUBPIC_PALETTE_SIZE;
+	subpicture->entry_bytes = 3;
+	strncpy(subpicture->component_order, "YUV", 4);
+
+	/* Initialize private values */
+	pI915Subpicture->privContext = pI915XvMC;
+	pI915Subpicture->last_render = 0;
+	pI915Subpicture->last_flip = 0;
+	pI915Subpicture->pitch = ((subpicture->width + 3) & ~3);
+
+	switch (subpicture->xvimage_id) {
+	case FOURCC_IA44:
+	case FOURCC_AI44:
+		break;
+
+	default:
+		drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
+		XLockDisplay(display);
+		_xvmc_destroy_subpicture(display, subpicture);
+		XUnlockDisplay(display);
+		free(pI915Subpicture);
+		subpicture->privData = NULL;
+		PPTHREAD_MUTEX_UNLOCK();
+		return BadMatch;
+	}
+
+	pI915XvMC->ref++;
+	PPTHREAD_MUTEX_UNLOCK();
+	return Success;
 }
 
-Status i915_xvmc_clear_subpict(Display *display, XvMCSubpicture *subpicture,
-                           short x, short y,
-                           unsigned short width, unsigned short height,
-                           unsigned int color)
+Status i915_xvmc_clear_subpict(Display * display, XvMCSubpicture * subpicture,
+			       short x, short y,
+			       unsigned short width, unsigned short height,
+			       unsigned int color)
 {
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    if (!(pI915XvMC = pI915Subpicture->privContext))
-        return XvMCBadSubpicture;
+	if (!(pI915XvMC = pI915Subpicture->privContext))
+		return XvMCBadSubpicture;
 
-    if ((x < 0) || (x + width) > subpicture->width)
-        return BadValue;
+	if ((x < 0) || (x + width) > subpicture->width)
+		return BadValue;
 
-    if ((y < 0) || (y + height) > subpicture->height)
-        return BadValue;
+	if ((y < 0) || (y + height) > subpicture->height)
+		return BadValue;
 
-    /* FIXME: clear the area */
+	/* FIXME: clear the area */
 
-    return Success;
+	return Success;
 }
 
-Status i915_xvmc_composite_subpict(Display *display, XvMCSubpicture *subpicture,
-                               XvImage *image,
-                               short srcx, short srcy,
-                               unsigned short width, unsigned short height,
-                               short dstx, short dsty)
+Status i915_xvmc_composite_subpict(Display * display,
+				   XvMCSubpicture * subpicture, XvImage * image,
+				   short srcx, short srcy, unsigned short width,
+				   unsigned short height, short dstx,
+				   short dsty)
 {
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    if (!(pI915XvMC = pI915Subpicture->privContext))
-        return XvMCBadSubpicture;
+	if (!(pI915XvMC = pI915Subpicture->privContext))
+		return XvMCBadSubpicture;
 
-    if ((srcx < 0) || (srcx + width) > subpicture->width)
-        return BadValue;
+	if ((srcx < 0) || (srcx + width) > subpicture->width)
+		return BadValue;
 
-    if ((srcy < 0) || (srcy + height) > subpicture->height)
-        return BadValue;
+	if ((srcy < 0) || (srcy + height) > subpicture->height)
+		return BadValue;
 
-    if ((dstx < 0) || (dstx + width) > subpicture->width)
-        return BadValue;
+	if ((dstx < 0) || (dstx + width) > subpicture->width)
+		return BadValue;
 
-    if ((dsty < 0) || (dsty + width) > subpicture->height)
-        return BadValue;
+	if ((dsty < 0) || (dsty + width) > subpicture->height)
+		return BadValue;
 
-    if (image->id != subpicture->xvimage_id)
-        return BadMatch;
+	if (image->id != subpicture->xvimage_id)
+		return BadMatch;
 
-    /* FIXME */
-    return Success;
+	/* FIXME */
+	return Success;
 }
 
-
-Status i915_xvmc_destroy_subpict(Display *display, XvMCSubpicture *subpicture)
+Status i915_xvmc_destroy_subpict(Display * display, XvMCSubpicture * subpicture)
 {
-    i915XvMCSubpicture *pI915Subpicture;
-    i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCContext *pI915XvMC;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    if (!(pI915XvMC = pI915Subpicture->privContext))
-        return XvMCBadSubpicture;
+	if (!(pI915XvMC = pI915Subpicture->privContext))
+		return XvMCBadSubpicture;
 
-    if (pI915Subpicture->last_render)
-        XvMCSyncSubpicture(display, subpicture);
+	if (pI915Subpicture->last_render)
+		XvMCSyncSubpicture(display, subpicture);
 
-    if (pI915Subpicture->srf.map)
-        drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
+	if (pI915Subpicture->srf.map)
+		drmUnmap(pI915Subpicture->srf.map, pI915Subpicture->srf.size);
 
-    PPTHREAD_MUTEX_LOCK();
-    XLockDisplay(display);
-    _xvmc_destroy_subpicture(display,subpicture);
-    XUnlockDisplay(display);
+	PPTHREAD_MUTEX_LOCK();
+	XLockDisplay(display);
+	_xvmc_destroy_subpicture(display, subpicture);
+	XUnlockDisplay(display);
 
-    free(pI915Subpicture);
-    subpicture->privData = NULL;
-    pI915XvMC->ref--;
-    PPTHREAD_MUTEX_UNLOCK();
+	free(pI915Subpicture);
+	subpicture->privData = NULL;
+	pI915XvMC->ref--;
+	PPTHREAD_MUTEX_UNLOCK();
 
-    return Success;
+	return Success;
 }
 
-
-Status i915_xvmc_set_subpict_palette(Display *display,
-	XvMCSubpicture *subpicture,
-	unsigned char *palette)
+Status i915_xvmc_set_subpict_palette(Display * display,
+				     XvMCSubpicture * subpicture,
+				     unsigned char *palette)
 {
-    i915XvMCSubpicture *pI915Subpicture;
-    int i, j;
+	i915XvMCSubpicture *pI915Subpicture;
+	int i, j;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    j = 0;
-    for (i = 0; i < 16; i++) {
-        pI915Subpicture->palette[0][i] = palette[j++];
-        pI915Subpicture->palette[1][i] = palette[j++];
-        pI915Subpicture->palette[2][i] = palette[j++];
-    }
+	j = 0;
+	for (i = 0; i < 16; i++) {
+		pI915Subpicture->palette[0][i] = palette[j++];
+		pI915Subpicture->palette[1][i] = palette[j++];
+		pI915Subpicture->palette[2][i] = palette[j++];
+	}
 
-    /* FIXME: Update the subpicture with the new palette */
-    return Success;
+	/* FIXME: Update the subpicture with the new palette */
+	return Success;
 }
 
-Status i915_xvmc_blend_subpict(Display *display, XvMCSurface *target_surface,
-                           XvMCSubpicture *subpicture,
-                           short subx, short suby,
-                           unsigned short subw, unsigned short subh,
-                           short surfx, short surfy,
-                           unsigned short surfw, unsigned short surfh)
+Status i915_xvmc_blend_subpict(Display * display, XvMCSurface * target_surface,
+			       XvMCSubpicture * subpicture,
+			       short subx, short suby,
+			       unsigned short subw, unsigned short subh,
+			       short surfx, short surfy,
+			       unsigned short surfw, unsigned short surfh)
 {
-    i915XvMCSubpicture *pI915Subpicture;
-    i915XvMCSurface *privTargetSurface;
+	i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCSurface *privTargetSurface;
 
-    if (!display || !target_surface)
-        return BadValue;
+	if (!display || !target_surface)
+		return BadValue;
 
-    if (!(privTargetSurface = target_surface->privData))
-        return XvMCBadSurface;
+	if (!(privTargetSurface = target_surface->privData))
+		return XvMCBadSurface;
 
-    if (subpicture) {
-        if (!(pI915Subpicture = subpicture->privData))
-            return XvMCBadSubpicture;
+	if (subpicture) {
+		if (!(pI915Subpicture = subpicture->privData))
+			return XvMCBadSubpicture;
 
-        if ((FOURCC_AI44 != subpicture->xvimage_id) &&
-            (FOURCC_IA44 != subpicture->xvimage_id))
-            return XvMCBadSubpicture;
+		if ((FOURCC_AI44 != subpicture->xvimage_id) &&
+		    (FOURCC_IA44 != subpicture->xvimage_id))
+			return XvMCBadSubpicture;
 
-        privTargetSurface->privSubPic = pI915Subpicture;
-    } else {
-        privTargetSurface->privSubPic = NULL;
-    }
+		privTargetSurface->privSubPic = pI915Subpicture;
+	} else {
+		privTargetSurface->privSubPic = NULL;
+	}
 
-    return Success;
+	return Success;
 }
 
-Status i915_xvmc_blend_subpict2(Display *display,
-                            XvMCSurface *source_surface,
-                            XvMCSurface *target_surface,
-                            XvMCSubpicture *subpicture,
-                            short subx, short suby,
-                            unsigned short subw, unsigned short subh,
-                            short surfx, short surfy,
-                            unsigned short surfw, unsigned short surfh)
+Status i915_xvmc_blend_subpict2(Display * display,
+				XvMCSurface * source_surface,
+				XvMCSurface * target_surface,
+				XvMCSubpicture * subpicture,
+				short subx, short suby,
+				unsigned short subw, unsigned short subh,
+				short surfx, short surfy,
+				unsigned short surfw, unsigned short surfh)
 {
-    i915XvMCContext *pI915XvMC;
-    i915XvMCSubpicture *pI915Subpicture;
-    i915XvMCSurface *privSourceSurface;
-    i915XvMCSurface *privTargetSurface;
+	i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCSurface *privSourceSurface;
+	i915XvMCSurface *privTargetSurface;
 
-    if (!display || !source_surface || !target_surface)
-        return BadValue;
+	if (!display || !source_surface || !target_surface)
+		return BadValue;
 
-    if (!(privSourceSurface = source_surface->privData))
-        return XvMCBadSurface;
+	if (!(privSourceSurface = source_surface->privData))
+		return XvMCBadSurface;
 
-    if (!(privTargetSurface = target_surface->privData))
-        return XvMCBadSurface;
+	if (!(privTargetSurface = target_surface->privData))
+		return XvMCBadSurface;
 
-    if (!(pI915XvMC = privTargetSurface->privContext))
-        return XvMCBadSurface;
+	if (!(pI915XvMC = privTargetSurface->privContext))
+		return XvMCBadSurface;
 
-    if (((surfx + surfw) > privTargetSurface->width) ||
-        ((surfy + surfh) > privTargetSurface->height))
-        return BadValue;
+	if (((surfx + surfw) > privTargetSurface->width) ||
+	    ((surfy + surfh) > privTargetSurface->height))
+		return BadValue;
 
-    if ((privSourceSurface->width != privTargetSurface->width) ||
-        (privTargetSurface->height != privTargetSurface->height))
-        return BadValue;
+	if ((privSourceSurface->width != privTargetSurface->width) ||
+	    (privTargetSurface->height != privTargetSurface->height))
+		return BadValue;
 
-    if (XvMCSyncSurface(display, source_surface))
-        return BadValue;
+	if (XvMCSyncSurface(display, source_surface))
+		return BadValue;
 
-    /* FIXME: update Target Surface */
+	/* FIXME: update Target Surface */
 
-    if (subpicture) {
-        if (((subx + subw) > subpicture->width) ||
-            ((suby + subh) > subpicture->height))
-            return BadValue;
+	if (subpicture) {
+		if (((subx + subw) > subpicture->width) ||
+		    ((suby + subh) > subpicture->height))
+			return BadValue;
 
-        if (!(pI915Subpicture = subpicture->privData))
-            return XvMCBadSubpicture;
+		if (!(pI915Subpicture = subpicture->privData))
+			return XvMCBadSubpicture;
 
-        if ((FOURCC_AI44 != subpicture->xvimage_id) &&
-            (FOURCC_IA44 != subpicture->xvimage_id))
-            return XvMCBadSubpicture;
+		if ((FOURCC_AI44 != subpicture->xvimage_id) &&
+		    (FOURCC_IA44 != subpicture->xvimage_id))
+			return XvMCBadSubpicture;
 
-        privTargetSurface->privSubPic = pI915Subpicture;
-    } else {
-        privTargetSurface->privSubPic = NULL;
-    }
+		privTargetSurface->privSubPic = pI915Subpicture;
+	} else {
+		privTargetSurface->privSubPic = NULL;
+	}
 
-    return Success;
+	return Success;
 }
 
-Status i915_xvmc_sync_subpict(Display *display, XvMCSubpicture *subpicture)
+Status i915_xvmc_sync_subpict(Display * display, XvMCSubpicture * subpicture)
 {
-    Status ret;
-    int stat = 0;
+	Status ret;
+	int stat = 0;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    do {
-        ret = XvMCGetSubpictureStatus(display, subpicture, &stat);
-    } while(!ret && (stat & XVMC_RENDERING));
+	do {
+		ret = XvMCGetSubpictureStatus(display, subpicture, &stat);
+	} while (!ret && (stat & XVMC_RENDERING));
 
-    return ret;
+	return ret;
 }
 
-Status i915_xvmc_flush_subpict(Display *display, XvMCSubpicture *subpicture)
+Status i915_xvmc_flush_subpict(Display * display, XvMCSubpicture * subpicture)
 {
-    i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCSubpicture *pI915Subpicture;
 
-    if (!display || !subpicture)
-        return BadValue;
+	if (!display || !subpicture)
+		return BadValue;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    return Success;
+	return Success;
 }
 
-Status i915_xvmc_get_subpict_status(Display *display, XvMCSubpicture *subpicture,
-                               int *stat)
+Status i915_xvmc_get_subpict_status(Display * display,
+				    XvMCSubpicture * subpicture, int *stat)
 {
-    i915XvMCSubpicture *pI915Subpicture;
-    i915XvMCContext *pI915XvMC;
+	i915XvMCSubpicture *pI915Subpicture;
+	i915XvMCContext *pI915XvMC;
+
+	if (!display || !subpicture || stat)
+		return BadValue;
 
-    if (!display || !subpicture || stat)
-        return BadValue;
+	*stat = 0;
 
-    *stat = 0;
+	if (!(pI915Subpicture = subpicture->privData))
+		return XvMCBadSubpicture;
 
-    if (!(pI915Subpicture = subpicture->privData))
-        return XvMCBadSubpicture;
+	if (!(pI915XvMC = pI915Subpicture->privContext))
+		return XvMCBadSubpicture;
 
-    if (!(pI915XvMC = pI915Subpicture->privContext))
-        return XvMCBadSubpicture;
+	PPTHREAD_MUTEX_LOCK();
 
-    PPTHREAD_MUTEX_LOCK();
-    
-    PPTHREAD_MUTEX_UNLOCK();
-    return Success;
+	PPTHREAD_MUTEX_UNLOCK();
+	return Success;
 }
 
 #endif
 
 struct _intel_xvmc_driver i915_xvmc_mc_driver = {
-    .type		= XVMC_I915_MPEG2_MC,
-    .num_ctx		= 0,
-    .ctx_list		= NULL,
-    .create_context	= i915_xvmc_mc_create_context,
-    .destroy_context	= i915_xvmc_mc_destroy_context,
-    .create_surface	= i915_xvmc_mc_create_surface,
-    .destroy_surface	= i915_xvmc_mc_destroy_surface,
-    .render_surface	= i915_xvmc_mc_render_surface,
-    .put_surface	= i915_xvmc_mc_put_surface,
-    .get_surface_status	= i915_xvmc_mc_get_surface_status,
+	.type = XVMC_I915_MPEG2_MC,
+	.num_ctx = 0,
+	.ctx_list = NULL,
+	.create_context = i915_xvmc_mc_create_context,
+	.destroy_context = i915_xvmc_mc_destroy_context,
+	.create_surface = i915_xvmc_mc_create_surface,
+	.destroy_surface = i915_xvmc_mc_destroy_surface,
+	.render_surface = i915_xvmc_mc_render_surface,
+	.put_surface = i915_xvmc_mc_put_surface,
+	.get_surface_status = i915_xvmc_mc_get_surface_status,
 };
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index de9eb787..f0e8d3e4 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -49,29 +49,29 @@
  *      pointer in the XvMCContext structure.
  */
 typedef struct _i915XvMCContext {
-    unsigned int ctxno;
-    unsigned int last_flip;
-    unsigned int dual_prime; /* Flag to identify when dual prime is in use. */
-    unsigned int yStride;
-    unsigned int uvStride;
-    unsigned short ref;
-    unsigned int depth;
-    XvPortID port;		       /* Xv Port ID when displaying */
-    int haveXv;                        /* Have I initialized the Xv
-                                        * connection for this surface? */
-    XvImage *xvImage;                  /* Fake Xv Image used for command
-                                        * buffer transport to the X server */
-    GC  gc;                            /* X GC needed for displaying */
-    Drawable draw;                     /* Drawable to undisplay from */
-    void *drawHash;
-    int deviceID;
+	unsigned int ctxno;
+	unsigned int last_flip;
+	unsigned int dual_prime;	/* Flag to identify when dual prime is in use. */
+	unsigned int yStride;
+	unsigned int uvStride;
+	unsigned short ref;
+	unsigned int depth;
+	XvPortID port;		/* Xv Port ID when displaying */
+	int haveXv;		/* Have I initialized the Xv
+				 * connection for this surface? */
+	XvImage *xvImage;	/* Fake Xv Image used for command
+				 * buffer transport to the X server */
+	GC gc;			/* X GC needed for displaying */
+	Drawable draw;		/* Drawable to undisplay from */
+	void *drawHash;
+	int deviceID;
 
-    intel_xvmc_drm_map_t sis;
-    intel_xvmc_drm_map_t msb;
-    intel_xvmc_drm_map_t ssb;
-    intel_xvmc_drm_map_t psp;
-    intel_xvmc_drm_map_t psc;
-    intel_xvmc_drm_map_t corrdata;
+	intel_xvmc_drm_map_t sis;
+	intel_xvmc_drm_map_t msb;
+	intel_xvmc_drm_map_t ssb;
+	intel_xvmc_drm_map_t psp;
+	intel_xvmc_drm_map_t psc;
+	intel_xvmc_drm_map_t corrdata;
 } i915XvMCContext;
 
 /*
@@ -81,13 +81,13 @@ typedef struct _i915XvMCContext {
  *  structure.
  */
 typedef struct _i915XvMCSubpicture {
-    unsigned int srfNo;
-    unsigned int last_render;
-    unsigned int last_flip;
-    unsigned int pitch;
-    unsigned char palette[3][16];
-    intel_xvmc_drm_map_t srf;
-    i915XvMCContext *privContext;
+	unsigned int srfNo;
+	unsigned int last_render;
+	unsigned int last_flip;
+	unsigned int pitch;
+	unsigned char palette[3][16];
+	intel_xvmc_drm_map_t srf;
+	i915XvMCContext *privContext;
 } i915XvMCSubpicture;
 
 /* Number of YUV buffers per surface */
@@ -99,17 +99,17 @@ typedef struct _i915XvMCSubpicture {
  *  structure.
  */
 typedef struct _i915XvMCSurface {
-    unsigned int srfNo;                    /* XvMC private surface numbers */
-    unsigned int last_render;
-    unsigned int last_flip;
-    unsigned int yStride;                  /* Stride of YUV420 Y component. */
-    unsigned int uvStride;
-    unsigned int width;                    /* Dimensions */
-    unsigned int height;
-    intel_xvmc_drm_map_t srf;
-    i915XvMCContext *privContext;
-    i915XvMCSubpicture *privSubPic;     /* Subpicture to be blended when
-                                         * displaying. NULL if none. */
+	unsigned int srfNo;	/* XvMC private surface numbers */
+	unsigned int last_render;
+	unsigned int last_flip;
+	unsigned int yStride;	/* Stride of YUV420 Y component. */
+	unsigned int uvStride;
+	unsigned int width;	/* Dimensions */
+	unsigned int height;
+	intel_xvmc_drm_map_t srf;
+	i915XvMCContext *privContext;
+	i915XvMCSubpicture *privSubPic;	/* Subpicture to be blended when
+					 * displaying. NULL if none. */
 } i915XvMCSurface;
 
 #endif /* _I915XVMC_H */
diff --git a/src/xvmc/i965_xvmc.c b/src/xvmc/i965_xvmc.c
index 316b7a2b..ff67995f 100644
--- a/src/xvmc/i965_xvmc.c
+++ b/src/xvmc/i965_xvmc.c
@@ -31,98 +31,133 @@
 #include "intel_batchbuffer.h"
 #include "i965_hwmc.h"
 #define BATCH_STRUCT(x) intelBatchbufferData(&x, sizeof(x), 0)
-#define URB_SIZE     256        /* XXX */
+#define URB_SIZE     256	/* XXX */
 
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
 
 enum interface {
-    INTRA_INTERFACE = 0,            /* non field intra */
-    NULL_INTERFACE,             /* fill with white, do nothing, for debug */
-    FORWARD_INTERFACE,          /* non field forward predict */
-    BACKWARD_INTERFACE,         /* non field backward predict */
-    F_B_INTERFACE,              /* non field forward and backward predict */
-    FIELD_FORWARD_INTERFACE,    /* field forward predict */
-    FIELD_BACKWARD_INTERFACE,   /* field backward predict */
-    FIELD_F_B_INTERFACE,        /* field forward and backward predict */
-    DUAL_PRIME_INTERFACE
+	INTRA_INTERFACE = 0,	/* non field intra */
+	NULL_INTERFACE,		/* fill with white, do nothing, for debug */
+	FORWARD_INTERFACE,	/* non field forward predict */
+	BACKWARD_INTERFACE,	/* non field backward predict */
+	F_B_INTERFACE,		/* non field forward and backward predict */
+	FIELD_FORWARD_INTERFACE,	/* field forward predict */
+	FIELD_BACKWARD_INTERFACE,	/* field backward predict */
+	FIELD_F_B_INTERFACE,	/* field forward and backward predict */
+	DUAL_PRIME_INTERFACE
 };
 
 static const uint32_t ipicture_kernel_static[][4] = {
-	#include "shader/mc/ipicture.g4b"
+#include "shader/mc/ipicture.g4b"
 };
+
 static const uint32_t null_kernel_static[][4] = {
-	#include "shader/mc/null.g4b"
+#include "shader/mc/null.g4b"
 };
+
 static const uint32_t frame_forward_kernel_static[][4] = {
-	#include "shader/mc/frame_forward.g4b"
+#include "shader/mc/frame_forward.g4b"
 };
+
 static const uint32_t frame_backward_kernel_static[][4] = {
-	#include "shader/mc/frame_backward.g4b"
+#include "shader/mc/frame_backward.g4b"
 };
+
 static const uint32_t frame_f_b_kernel_static[][4] = {
-	#include "shader/mc/frame_f_b.g4b"
-}; 
+#include "shader/mc/frame_f_b.g4b"
+};
+
 static const uint32_t field_forward_kernel_static[][4] = {
-	#include "shader/mc/field_forward.g4b"
+#include "shader/mc/field_forward.g4b"
 };
+
 static const uint32_t field_backward_kernel_static[][4] = {
-	#include "shader/mc/field_backward.g4b"
+#include "shader/mc/field_backward.g4b"
 };
+
 static const uint32_t field_f_b_kernel_static[][4] = {
-	#include "shader/mc/field_f_b.g4b"
-}; 
-static const uint32_t dual_prime_kernel_static[][4]= {
-	#include "shader/mc/dual_prime.g4b"
-}; 
+#include "shader/mc/field_f_b.g4b"
+};
+
+static const uint32_t dual_prime_kernel_static[][4] = {
+#include "shader/mc/dual_prime.g4b"
+};
+
 static const uint32_t frame_forward_igd_kernel_static[][4] = {
-	#include "shader/mc/frame_forward_igd.g4b"
+#include "shader/mc/frame_forward_igd.g4b"
 };
+
 static const uint32_t frame_backward_igd_kernel_static[][4] = {
-	#include "shader/mc/frame_backward_igd.g4b"
+#include "shader/mc/frame_backward_igd.g4b"
 };
+
 static const uint32_t frame_f_b_igd_kernel_static[][4] = {
-	#include "shader/mc/frame_f_b_igd.g4b"
-}; 
+#include "shader/mc/frame_f_b_igd.g4b"
+};
+
 static const uint32_t field_forward_igd_kernel_static[][4] = {
-	#include "shader/mc/field_forward_igd.g4b"
+#include "shader/mc/field_forward_igd.g4b"
 };
+
 static const uint32_t field_backward_igd_kernel_static[][4] = {
-	#include "shader/mc/field_backward_igd.g4b"
+#include "shader/mc/field_backward_igd.g4b"
 };
+
 static const uint32_t field_f_b_igd_kernel_static[][4] = {
-	#include "shader/mc/field_f_b_igd.g4b"
-}; 
-static const uint32_t dual_prime_igd_kernel_static[][4]= {
-	#include "shader/mc/dual_prime_igd.g4b"
-}; 
-
-struct kernel_struct{
-	const uint32_t (*bin)[4];
+#include "shader/mc/field_f_b_igd.g4b"
+};
+
+static const uint32_t dual_prime_igd_kernel_static[][4] = {
+#include "shader/mc/dual_prime_igd.g4b"
+};
+
+struct kernel_struct {
+	const uint32_t(*bin)[4];
 	uint32_t size;
 };
 
 struct kernel_struct kernels_igd[] = {
-    {ipicture_kernel_static, sizeof(ipicture_kernel_static)},
-    {null_kernel_static, sizeof(null_kernel_static)},
-    {frame_forward_igd_kernel_static, sizeof(frame_forward_igd_kernel_static)},
-    {frame_backward_igd_kernel_static, sizeof(frame_backward_igd_kernel_static)},
-    {frame_f_b_igd_kernel_static, sizeof(frame_f_b_igd_kernel_static)},
-    {field_forward_igd_kernel_static, sizeof(field_forward_igd_kernel_static)},
-    {field_backward_igd_kernel_static, sizeof(field_backward_igd_kernel_static)},
-    {field_f_b_igd_kernel_static, sizeof(field_f_b_igd_kernel_static)},
-    {dual_prime_igd_kernel_static, sizeof(dual_prime_igd_kernel_static)}
+	{ipicture_kernel_static, sizeof(ipicture_kernel_static)}
+	,
+	{null_kernel_static, sizeof(null_kernel_static)}
+	,
+	{frame_forward_igd_kernel_static,
+	 sizeof(frame_forward_igd_kernel_static)}
+	,
+	{frame_backward_igd_kernel_static,
+	 sizeof(frame_backward_igd_kernel_static)}
+	,
+	{frame_f_b_igd_kernel_static, sizeof(frame_f_b_igd_kernel_static)}
+	,
+	{field_forward_igd_kernel_static,
+	 sizeof(field_forward_igd_kernel_static)}
+	,
+	{field_backward_igd_kernel_static,
+	 sizeof(field_backward_igd_kernel_static)}
+	,
+	{field_f_b_igd_kernel_static, sizeof(field_f_b_igd_kernel_static)}
+	,
+	{dual_prime_igd_kernel_static, sizeof(dual_prime_igd_kernel_static)}
 };
 
 struct kernel_struct kernels_965[] = {
-    {ipicture_kernel_static, sizeof(ipicture_kernel_static)},
-    {null_kernel_static, sizeof(null_kernel_static)},
-    {frame_forward_kernel_static, sizeof(frame_forward_kernel_static)},
-    {frame_backward_kernel_static, sizeof(frame_backward_kernel_static)},
-    {frame_f_b_kernel_static, sizeof(frame_f_b_kernel_static)},
-    {field_forward_kernel_static, sizeof(field_forward_kernel_static)},
-    {field_backward_kernel_static, sizeof(field_backward_kernel_static)},
-    {field_f_b_kernel_static, sizeof(field_f_b_kernel_static)},
-    {dual_prime_kernel_static, sizeof(dual_prime_kernel_static)}
+	{ipicture_kernel_static, sizeof(ipicture_kernel_static)}
+	,
+	{null_kernel_static, sizeof(null_kernel_static)}
+	,
+	{frame_forward_kernel_static, sizeof(frame_forward_kernel_static)}
+	,
+	{frame_backward_kernel_static, sizeof(frame_backward_kernel_static)}
+	,
+	{frame_f_b_kernel_static, sizeof(frame_f_b_kernel_static)}
+	,
+	{field_forward_kernel_static, sizeof(field_forward_kernel_static)}
+	,
+	{field_backward_kernel_static, sizeof(field_backward_kernel_static)}
+	,
+	{field_f_b_kernel_static, sizeof(field_f_b_kernel_static)}
+	,
+	{dual_prime_kernel_static, sizeof(dual_prime_kernel_static)}
 };
 
 #define ALIGN(i,m)    (((i) + (m) - 1) & ~((m) - 1))
@@ -131,390 +166,411 @@ struct kernel_struct kernels_965[] = {
 #define DESCRIPTOR_NUM 12
 
 struct media_kernel_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct interface_descriptor_obj {
-   dri_bo *bo;
-   struct media_kernel_obj kernels[DESCRIPTOR_NUM];
+	dri_bo *bo;
+	struct media_kernel_obj kernels[DESCRIPTOR_NUM];
 };
 
 struct vfe_state_obj {
-   dri_bo *bo;
-   struct interface_descriptor_obj interface;
+	dri_bo *bo;
+	struct interface_descriptor_obj interface;
 };
 
 struct surface_obj {
-     dri_bo *bo; 
+	dri_bo *bo;
 };
 
 struct surface_state_obj {
-      struct surface_obj surface; 
-      dri_bo *bo;
+	struct surface_obj surface;
+	dri_bo *bo;
 };
 
 struct binding_table_obj {
-    dri_bo *bo;
-    struct surface_state_obj surface_states[MAX_SURFACE_NUM];
+	dri_bo *bo;
+	struct surface_state_obj surface_states[MAX_SURFACE_NUM];
 };
 
 struct indirect_data_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct media_state {
-    unsigned int  is_g4x:1;
-    unsigned int  is_965_q:1;
+	unsigned int is_g4x:1;
+	unsigned int is_965_q:1;
 
-    struct vfe_state_obj vfe_state;
-    struct binding_table_obj binding_table;
-    struct indirect_data_obj indirect_data;
+	struct vfe_state_obj vfe_state;
+	struct binding_table_obj binding_table;
+	struct indirect_data_obj indirect_data;
 };
 struct media_state media_state;
 
 static int free_object(struct media_state *s)
 {
-    int i;
+	int i;
 #define FREE_ONE_BO(bo) drm_intel_bo_unreference(bo)
-    FREE_ONE_BO(s->vfe_state.bo);
-    FREE_ONE_BO(s->vfe_state.interface.bo);
-    for (i = 0; i < DESCRIPTOR_NUM; i++)
-        FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo);
-    FREE_ONE_BO(s->binding_table.bo);
-    for (i = 0; i < MAX_SURFACE_NUM; i++)
-        FREE_ONE_BO(s->binding_table.surface_states[i].bo);
-    FREE_ONE_BO(s->indirect_data.bo);
+	FREE_ONE_BO(s->vfe_state.bo);
+	FREE_ONE_BO(s->vfe_state.interface.bo);
+	for (i = 0; i < DESCRIPTOR_NUM; i++)
+		FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo);
+	FREE_ONE_BO(s->binding_table.bo);
+	for (i = 0; i < MAX_SURFACE_NUM; i++)
+		FREE_ONE_BO(s->binding_table.surface_states[i].bo);
+	FREE_ONE_BO(s->indirect_data.bo);
 }
 
 static int alloc_object(struct media_state *s)
 {
-    int i;
-
-    for (i = 0; i < MAX_SURFACE_NUM; i++) {
-        s->binding_table.surface_states[i].bo =
-            drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", 
- 		sizeof(struct brw_surface_state), 0x1000);
-        if (!s->binding_table.surface_states[i].bo)
-            goto out;
-    }
-    return 0;
+	int i;
+
+	for (i = 0; i < MAX_SURFACE_NUM; i++) {
+		s->binding_table.surface_states[i].bo =
+		    drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state",
+				       sizeof(struct brw_surface_state),
+				       0x1000);
+		if (!s->binding_table.surface_states[i].bo)
+			goto out;
+	}
+	return 0;
 out:
-    free_object(s);
-    return BadAlloc;
+	free_object(s);
+	return BadAlloc;
 }
 
-
-static Status destroy_context(Display *display, XvMCContext *context)
+static Status destroy_context(Display * display, XvMCContext * context)
 {
-    struct i965_xvmc_context *private_context;
-    private_context = context->privData;
+	struct i965_xvmc_context *private_context;
+	private_context = context->privData;
 
-    free_object(&media_state);
-    Xfree(private_context);
-    return Success;
+	free_object(&media_state);
+	Xfree(private_context);
+	return Success;
 }
 
 #define STRIDE(w)               (w)
 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
 
-static Status create_surface(Display *display,
-	XvMCContext *context, XvMCSurface *surface, int priv_count,
-	CARD32 *priv_data)
+static Status create_surface(Display * display,
+			     XvMCContext * context, XvMCSurface * surface,
+			     int priv_count, CARD32 * priv_data)
 {
-    struct i965_xvmc_surface *priv_surface = 
-	(struct i965_xvmc_surface *)priv_data;
-    size_t size = SIZE_YUV420(priv_surface->w, priv_surface->h);
-    surface->privData = priv_data;
-    priv_surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface", 
-	    size, 0x1000);
-    return Success;
+	struct i965_xvmc_surface *priv_surface =
+	    (struct i965_xvmc_surface *)priv_data;
+	size_t size = SIZE_YUV420(priv_surface->w, priv_surface->h);
+	surface->privData = priv_data;
+	priv_surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface",
+					      size, 0x1000);
+	return Success;
 }
 
-static Status destroy_surface(Display *display, XvMCSurface *surface)
+static Status destroy_surface(Display * display, XvMCSurface * surface)
 {
-    struct i965_xvmc_surface *priv_surface = 
-	surface->privData;
-    XSync(display, False);
+	struct i965_xvmc_surface *priv_surface = surface->privData;
+	XSync(display, False);
 
-    drm_intel_bo_unreference(priv_surface->bo);
-    return Success;
+	drm_intel_bo_unreference(priv_surface->bo);
+	return Success;
 }
 
 static void flush()
 {
-    struct brw_mi_flush flush;
-    memset(&flush, 0, sizeof(flush));
-    flush.opcode = CMD_MI_FLUSH;
-    flush.flags = (1<<1);
-    BATCH_STRUCT(flush);
+	struct brw_mi_flush flush;
+	memset(&flush, 0, sizeof(flush));
+	flush.opcode = CMD_MI_FLUSH;
+	flush.flags = (1 << 1);
+	BATCH_STRUCT(flush);
 }
 
 static void clear_sf_state()
 {
-    struct brw_sf_unit_state sf;
-    memset(&sf, 0, sizeof(sf));
-    /* TODO */
+	struct brw_sf_unit_state sf;
+	memset(&sf, 0, sizeof(sf));
+	/* TODO */
 }
 
-
 /* urb fence must be aligned to cacheline */
 static void align_urb_fence()
 {
-    BATCH_LOCALS;
-    int i, offset_to_next_cacheline;
-    unsigned long batch_offset;
-    BEGIN_BATCH(3);
-    batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr;
-    offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset; 
-    if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) {
-	for (i = 0; i < offset_to_next_cacheline/4; i++)
-	    OUT_BATCH(0);
-	ADVANCE_BATCH();
-    }
+	BATCH_LOCALS;
+	int i, offset_to_next_cacheline;
+	unsigned long batch_offset;
+	BEGIN_BATCH(3);
+	batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr;
+	offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset;
+	if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) {
+		for (i = 0; i < offset_to_next_cacheline / 4; i++)
+			OUT_BATCH(0);
+		ADVANCE_BATCH();
+	}
 }
 
 /* setup urb layout for media */
 static void urb_layout()
 {
-    BATCH_LOCALS;
-    align_urb_fence();
-    BEGIN_BATCH(3);
-    OUT_BATCH(BRW_URB_FENCE |
-	    UF0_VFE_REALLOC |
-	    UF0_CS_REALLOC |
-	    UF0_SF_REALLOC |
-	    UF0_CLIP_REALLOC |
-	    UF0_GS_REALLOC |
-	    UF0_VS_REALLOC |
-	    1);
-    OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) |
-	    (0 << UF1_GS_FENCE_SHIFT) |
-	    (0 << UF1_VS_FENCE_SHIFT));
-
-    OUT_BATCH(((URB_SIZE)<< UF2_VFE_FENCE_SHIFT) |	/* VFE_SIZE */
-	    ((URB_SIZE)<< UF2_CS_FENCE_SHIFT));		/* CS_SIZE is 0 */
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	align_urb_fence();
+	BEGIN_BATCH(3);
+	OUT_BATCH(BRW_URB_FENCE |
+		  UF0_VFE_REALLOC |
+		  UF0_CS_REALLOC |
+		  UF0_SF_REALLOC |
+		  UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1);
+	OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) |
+		  (0 << UF1_GS_FENCE_SHIFT) | (0 << UF1_VS_FENCE_SHIFT));
+
+	OUT_BATCH(((URB_SIZE) << UF2_VFE_FENCE_SHIFT) |	/* VFE_SIZE */
+		  ((URB_SIZE) << UF2_CS_FENCE_SHIFT));	/* CS_SIZE is 0 */
+	ADVANCE_BATCH();
 }
 
 static void media_state_pointers(struct media_state *media_state)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(3);
-    OUT_BATCH(BRW_MEDIA_STATE_POINTERS|1);
-    OUT_BATCH(0);
-    OUT_RELOC(media_state->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(3);
+	OUT_BATCH(BRW_MEDIA_STATE_POINTERS | 1);
+	OUT_BATCH(0);
+	OUT_RELOC(media_state->vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	ADVANCE_BATCH();
 }
 
 /* setup 2D surface for media_read or media_write 
  */
 static Status setup_media_surface(struct media_state *media_state,
-	int surface_num, dri_bo *bo, unsigned long offset, int w, int h, Bool write)
+				  int surface_num, dri_bo * bo,
+				  unsigned long offset, int w, int h,
+				  Bool write)
 {
-    struct brw_surface_state s, *ss = &s;
-
-    memset(ss, 0, sizeof(struct brw_surface_state));
-    ss->ss0.surface_type = BRW_SURFACE_2D;
-    ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT;
-    ss->ss1.base_addr = offset + bo->offset;
-    ss->ss2.width = w - 1;
-    ss->ss2.height = h - 1;
-    ss->ss3.pitch = w - 1;
-
-    if (media_state->binding_table.surface_states[surface_num].bo)
-        drm_intel_bo_unreference(media_state->binding_table.surface_states[surface_num].bo);
-    media_state->binding_table.surface_states[surface_num].bo =
-            drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", 
- 		sizeof(struct brw_surface_state), 0x1000);
-    if (!media_state->binding_table.surface_states[surface_num].bo)
-        return BadAlloc;
-
-    drm_intel_bo_subdata(
-	    media_state->binding_table.surface_states[surface_num].bo,
-	    0, sizeof(*ss), ss);
-
-    drm_intel_bo_emit_reloc(media_state->binding_table.surface_states[surface_num].bo, 
-	    offsetof(struct brw_surface_state, ss1),
-	    bo,
-	    offset,
-	    I915_GEM_DOMAIN_RENDER, write?I915_GEM_DOMAIN_RENDER:0);
-
-    return Success;
+	struct brw_surface_state s, *ss = &s;
+
+	memset(ss, 0, sizeof(struct brw_surface_state));
+	ss->ss0.surface_type = BRW_SURFACE_2D;
+	ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT;
+	ss->ss1.base_addr = offset + bo->offset;
+	ss->ss2.width = w - 1;
+	ss->ss2.height = h - 1;
+	ss->ss3.pitch = w - 1;
+
+	if (media_state->binding_table.surface_states[surface_num].bo)
+		drm_intel_bo_unreference(media_state->
+					 binding_table.surface_states
+					 [surface_num].bo);
+	media_state->binding_table.surface_states[surface_num].bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state",
+			       sizeof(struct brw_surface_state), 0x1000);
+	if (!media_state->binding_table.surface_states[surface_num].bo)
+		return BadAlloc;
+
+	drm_intel_bo_subdata(media_state->
+			     binding_table.surface_states[surface_num].bo, 0,
+			     sizeof(*ss), ss);
+
+	drm_intel_bo_emit_reloc(media_state->
+				binding_table.surface_states[surface_num].bo,
+				offsetof(struct brw_surface_state, ss1), bo,
+				offset, I915_GEM_DOMAIN_RENDER,
+				write ? I915_GEM_DOMAIN_RENDER : 0);
+
+	return Success;
 }
 
-static Status setup_surfaces(struct media_state *media_state, 
-	dri_bo *dst_bo, dri_bo *past_bo, dri_bo *future_bo, 
-	int w, int h)
+static Status setup_surfaces(struct media_state *media_state,
+			     dri_bo * dst_bo, dri_bo * past_bo,
+			     dri_bo * future_bo, int w, int h)
 {
-    Status ret;
-    ret = setup_media_surface(media_state, 0, dst_bo, 0, w, h, TRUE);
-    if (ret != Success)
-        return ret;
-    ret = setup_media_surface(media_state, 1, dst_bo, w*h, w/2, h/2, TRUE);
-    if (ret != Success)
-        return ret;
-    ret = setup_media_surface(media_state, 2, dst_bo, w*h + w*h/4, w/2, h/2, TRUE);
-    if (ret != Success)
-        return ret;
-    if (past_bo) {
-	ret = setup_media_surface(media_state, 4, past_bo, 0, w, h, FALSE);
-        if (ret != Success)
-            return ret;
-	ret = setup_media_surface(media_state, 5, past_bo, w*h, w/2, h/2, FALSE);
-        if (ret != Success)
-            return ret;
-	ret = setup_media_surface(media_state, 6, past_bo, w*h + w*h/4, w/2, h/2, FALSE);
-        if (ret != Success)
-            return ret;
-    }
-    if (future_bo) {
-	ret = setup_media_surface(media_state, 7, future_bo, 0, w, h, FALSE);
-        if (ret != Success)
-            return ret;
-	ret = setup_media_surface(media_state, 8, future_bo, w*h, w/2, h/2, FALSE);
-        if (ret != Success)
-            return ret;
-	ret = setup_media_surface(media_state, 9, future_bo, w*h + w*h/4, w/2, h/2, FALSE);
-        if (ret != Success)
-            return ret;
-    }
-    return Success;
+	Status ret;
+	ret = setup_media_surface(media_state, 0, dst_bo, 0, w, h, TRUE);
+	if (ret != Success)
+		return ret;
+	ret =
+	    setup_media_surface(media_state, 1, dst_bo, w * h, w / 2, h / 2,
+				TRUE);
+	if (ret != Success)
+		return ret;
+	ret =
+	    setup_media_surface(media_state, 2, dst_bo, w * h + w * h / 4,
+				w / 2, h / 2, TRUE);
+	if (ret != Success)
+		return ret;
+	if (past_bo) {
+		ret =
+		    setup_media_surface(media_state, 4, past_bo, 0, w, h,
+					FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(media_state, 5, past_bo, w * h, w / 2,
+					h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(media_state, 6, past_bo,
+					w * h + w * h / 4, w / 2, h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+	}
+	if (future_bo) {
+		ret =
+		    setup_media_surface(media_state, 7, future_bo, 0, w, h,
+					FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(media_state, 8, future_bo, w * h, w / 2,
+					h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(media_state, 9, future_bo,
+					w * h + w * h / 4, w / 2, h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+	}
+	return Success;
 }
+
 /* BUFFER SURFACE has a strange format
  * the size of the surface is in part of w h and d component
  */
 
-static Status setup_blocks(struct media_state *media_state, unsigned int block_size)
+static Status setup_blocks(struct media_state *media_state,
+			   unsigned int block_size)
 {
-    union element{
+	union element {
 		struct {
 			unsigned int w:7;
 			unsigned int h:13;
 			unsigned int d:7;
 			unsigned int pad:7;
-		}whd;
-		unsigned int size;	
-    }e;
-    struct brw_surface_state ss;
-    memset(&ss, 0, sizeof(struct brw_surface_state));
-    ss.ss0.surface_type = BRW_SURFACE_BUFFER;
-    ss.ss0.surface_format = BRW_SURFACEFORMAT_R8_UINT;
-    ss.ss1.base_addr = media_state->indirect_data.bo->offset;
-
-    e.size = block_size - 1;
-    ss.ss2.width = e.whd.w;
-    ss.ss2.height = e.whd.h;
-    ss.ss3.depth = e.whd.d;
-    ss.ss3.pitch = block_size - 1;
-  
-    if (media_state->binding_table.surface_states[3].bo)
-        drm_intel_bo_unreference(media_state->binding_table.surface_states[3].bo);
-
-    media_state->binding_table.surface_states[3].bo =
-            drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", 
- 		sizeof(struct brw_surface_state), 0x1000);
-    if (!media_state->binding_table.surface_states[3].bo)
-        return BadAlloc;
-  
-    drm_intel_bo_subdata(media_state->binding_table.surface_states[3].bo, 0, 
-	    sizeof(ss), &ss);
-
-    drm_intel_bo_emit_reloc(media_state->binding_table.surface_states[3].bo,
-        offsetof(struct brw_surface_state, ss1),
-        media_state->indirect_data.bo, 0,
-        I915_GEM_DOMAIN_SAMPLER, 0);
-    return Success;
+		} whd;
+		unsigned int size;
+	} e;
+	struct brw_surface_state ss;
+	memset(&ss, 0, sizeof(struct brw_surface_state));
+	ss.ss0.surface_type = BRW_SURFACE_BUFFER;
+	ss.ss0.surface_format = BRW_SURFACEFORMAT_R8_UINT;
+	ss.ss1.base_addr = media_state->indirect_data.bo->offset;
+
+	e.size = block_size - 1;
+	ss.ss2.width = e.whd.w;
+	ss.ss2.height = e.whd.h;
+	ss.ss3.depth = e.whd.d;
+	ss.ss3.pitch = block_size - 1;
+
+	if (media_state->binding_table.surface_states[3].bo)
+		drm_intel_bo_unreference(media_state->
+					 binding_table.surface_states[3].bo);
+
+	media_state->binding_table.surface_states[3].bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state",
+			       sizeof(struct brw_surface_state), 0x1000);
+	if (!media_state->binding_table.surface_states[3].bo)
+		return BadAlloc;
+
+	drm_intel_bo_subdata(media_state->binding_table.surface_states[3].bo, 0,
+			     sizeof(ss), &ss);
+
+	drm_intel_bo_emit_reloc(media_state->binding_table.surface_states[3].bo,
+				offsetof(struct brw_surface_state, ss1),
+				media_state->indirect_data.bo, 0,
+				I915_GEM_DOMAIN_SAMPLER, 0);
+	return Success;
 }
 
 /* setup state base address */
 static void state_base_address()
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(6);
-    OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
-    OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-    OUT_BATCH(0 | BASE_ADDRESS_MODIFY); 
-    OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-    OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-    OUT_BATCH(0xFFFFF000|BASE_ADDRESS_MODIFY);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(6);
+	OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+	OUT_BATCH(0xFFFFF000 | BASE_ADDRESS_MODIFY);
+	ADVANCE_BATCH();
 }
 
 /* select media pipeline */
 static void pipeline_select(struct media_state *media_state)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(1);
-    if (media_state->is_g4x)
-	    OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
-    else
-	    OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(1);
+	if (media_state->is_g4x)
+		OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+	else
+		OUT_BATCH(BRW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+	ADVANCE_BATCH();
 }
 
 /* kick media object to gpu */
-static void send_media_object(XvMCMacroBlock *mb, int offset, enum interface interface)
+static void send_media_object(XvMCMacroBlock * mb, int offset,
+			      enum interface interface)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(13);
-    OUT_BATCH(BRW_MEDIA_OBJECT|11);
-    OUT_BATCH(interface);
-    if (media_state.is_965_q) {
-	OUT_BATCH(0);
-	OUT_BATCH(0);
-    }else {
-	OUT_BATCH(6*128);
-        OUT_RELOC(media_state.indirect_data.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
-    }
-    
-    OUT_BATCH(mb->x<<4);                 //g1.0
-    OUT_BATCH(mb->y<<4);
-    OUT_RELOC(media_state.indirect_data.bo, //g1.8
-            I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
-    OUT_BATCH_SHORT(mb->coded_block_pattern);  //g1.12
-    OUT_BATCH_SHORT(mb->PMV[0][0][0]);         //g1.14
-    OUT_BATCH_SHORT(mb->PMV[0][0][1]);         //g1.16
-    OUT_BATCH_SHORT(mb->PMV[0][1][0]);         //g1.18
-    OUT_BATCH_SHORT(mb->PMV[0][1][1]);         //g1.20
-    
-    OUT_BATCH_SHORT(mb->PMV[1][0][0]);         //g1.22 
-    OUT_BATCH_SHORT(mb->PMV[1][0][1]);         //g1.24
-    OUT_BATCH_SHORT(mb->PMV[1][1][0]);         //g1.26
-    OUT_BATCH_SHORT(mb->PMV[1][1][1]);         //g1.28
-    OUT_BATCH_CHAR(mb->dct_type);              //g1.30
-    OUT_BATCH_CHAR(mb->motion_vertical_field_select);//g1.31
-    
-    if (media_state.is_965_q) 
-	OUT_BATCH(0x0);
-    else
-	OUT_BATCH(0xffffffff);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(13);
+	OUT_BATCH(BRW_MEDIA_OBJECT | 11);
+	OUT_BATCH(interface);
+	if (media_state.is_965_q) {
+		OUT_BATCH(0);
+		OUT_BATCH(0);
+	} else {
+		OUT_BATCH(6 * 128);
+		OUT_RELOC(media_state.indirect_data.bo,
+			  I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
+	}
+
+	OUT_BATCH(mb->x << 4);	//g1.0
+	OUT_BATCH(mb->y << 4);
+	OUT_RELOC(media_state.indirect_data.bo,	//g1.8
+		  I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
+	OUT_BATCH_SHORT(mb->coded_block_pattern);	//g1.12
+	OUT_BATCH_SHORT(mb->PMV[0][0][0]);	//g1.14
+	OUT_BATCH_SHORT(mb->PMV[0][0][1]);	//g1.16
+	OUT_BATCH_SHORT(mb->PMV[0][1][0]);	//g1.18
+	OUT_BATCH_SHORT(mb->PMV[0][1][1]);	//g1.20
+
+	OUT_BATCH_SHORT(mb->PMV[1][0][0]);	//g1.22
+	OUT_BATCH_SHORT(mb->PMV[1][0][1]);	//g1.24
+	OUT_BATCH_SHORT(mb->PMV[1][1][0]);	//g1.26
+	OUT_BATCH_SHORT(mb->PMV[1][1][1]);	//g1.28
+	OUT_BATCH_CHAR(mb->dct_type);	//g1.30
+	OUT_BATCH_CHAR(mb->motion_vertical_field_select);	//g1.31
+
+	if (media_state.is_965_q)
+		OUT_BATCH(0x0);
+	else
+		OUT_BATCH(0xffffffff);
+	ADVANCE_BATCH();
 }
 
 static Status binding_tables(struct media_state *media_state)
 {
-    unsigned int binding_table[MAX_SURFACE_NUM];
-    int i;
-
-    if (media_state->binding_table.bo)
-        drm_intel_bo_unreference(media_state->binding_table.bo);
-    media_state->binding_table.bo = 
- 	drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table", 
- 		MAX_SURFACE_NUM*4, 0x1000);
-    if (!media_state->binding_table.bo)
-        return BadAlloc;
-
-    for (i = 0; i < MAX_SURFACE_NUM; i++)
-	binding_table[i] = media_state->binding_table.surface_states[i].bo->offset;
-    drm_intel_bo_subdata(media_state->binding_table.bo, 0, sizeof(binding_table),
-        binding_table);
-
-    for (i = 0; i < MAX_SURFACE_NUM; i++)
-        drm_intel_bo_emit_reloc(media_state->binding_table.bo, 
-	    i * sizeof(unsigned int),
-	    media_state->binding_table.surface_states[i].bo, 0,
-	    I915_GEM_DOMAIN_INSTRUCTION, 0);
-     return Success;
+	unsigned int binding_table[MAX_SURFACE_NUM];
+	int i;
+
+	if (media_state->binding_table.bo)
+		drm_intel_bo_unreference(media_state->binding_table.bo);
+	media_state->binding_table.bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table",
+			       MAX_SURFACE_NUM * 4, 0x1000);
+	if (!media_state->binding_table.bo)
+		return BadAlloc;
+
+	for (i = 0; i < MAX_SURFACE_NUM; i++)
+		binding_table[i] =
+		    media_state->binding_table.surface_states[i].bo->offset;
+	drm_intel_bo_subdata(media_state->binding_table.bo, 0,
+			     sizeof(binding_table), binding_table);
+
+	for (i = 0; i < MAX_SURFACE_NUM; i++)
+		drm_intel_bo_emit_reloc(media_state->binding_table.bo,
+					i * sizeof(unsigned int),
+					media_state->
+					binding_table.surface_states[i].bo, 0,
+					I915_GEM_DOMAIN_INSTRUCTION, 0);
+	return Success;
 }
 
 static int media_kernels(struct media_state *media_state)
@@ -532,8 +588,8 @@ static int media_kernels(struct media_state *media_state)
 
 	for (i = 0; i < kernel_array_size; i++) {
 		media_state->vfe_state.interface.kernels[i].bo =
-			drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel",
-					kernels[i].size, 0x1000);
+		    drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel",
+				       kernels[i].size, 0x1000);
 		if (!media_state->vfe_state.interface.kernels[i].bo)
 			goto out;
 	}
@@ -548,51 +604,51 @@ out:
 	return BadAlloc;
 }
 
-static void setup_interface(struct media_state *media_state, 
-	enum interface i)
+static void setup_interface(struct media_state *media_state, enum interface i)
 {
-    struct brw_interface_descriptor desc;
-    memset(&desc, 0, sizeof(desc));
-
-    desc.desc0.grf_reg_blocks = 15;
-    desc.desc0.kernel_start_pointer =
-        media_state->vfe_state.interface.kernels[i].bo->offset >> 6;
-
-    desc.desc1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
-
-    /* use same binding table for all interface
-     * may change this if it affect performance
-     */
-    desc.desc3.binding_table_entry_count = MAX_SURFACE_NUM;
-    desc.desc3.binding_table_pointer = media_state->binding_table.bo->offset >> 5;
-
-    drm_intel_bo_subdata(media_state->vfe_state.interface.bo, i*sizeof(desc), 
-	    sizeof(desc), &desc);
-
-    drm_intel_bo_emit_reloc(
-	    media_state->vfe_state.interface.bo,
-	    i * sizeof(desc) + 
-	    offsetof(struct brw_interface_descriptor, desc0),
-	    media_state->vfe_state.interface.kernels[i].bo,
-	    desc.desc0.grf_reg_blocks,
-	    I915_GEM_DOMAIN_INSTRUCTION, 0);
-
-    drm_intel_bo_emit_reloc(
-	    media_state->vfe_state.interface.bo,
-	    i * sizeof(desc) + 
-	    offsetof(struct brw_interface_descriptor, desc3),
-	    media_state->binding_table.bo,
-	    desc.desc3.binding_table_entry_count,
-	    I915_GEM_DOMAIN_INSTRUCTION, 0);
+	struct brw_interface_descriptor desc;
+	memset(&desc, 0, sizeof(desc));
+
+	desc.desc0.grf_reg_blocks = 15;
+	desc.desc0.kernel_start_pointer =
+	    media_state->vfe_state.interface.kernels[i].bo->offset >> 6;
+
+	desc.desc1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
+
+	/* use same binding table for all interface
+	 * may change this if it affect performance
+	 */
+	desc.desc3.binding_table_entry_count = MAX_SURFACE_NUM;
+	desc.desc3.binding_table_pointer =
+	    media_state->binding_table.bo->offset >> 5;
+
+	drm_intel_bo_subdata(media_state->vfe_state.interface.bo,
+			     i * sizeof(desc), sizeof(desc), &desc);
+
+	drm_intel_bo_emit_reloc(media_state->vfe_state.interface.bo,
+				i * sizeof(desc) +
+				offsetof(struct brw_interface_descriptor,
+					 desc0),
+				media_state->vfe_state.interface.kernels[i].bo,
+				desc.desc0.grf_reg_blocks,
+				I915_GEM_DOMAIN_INSTRUCTION, 0);
+
+	drm_intel_bo_emit_reloc(media_state->vfe_state.interface.bo,
+				i * sizeof(desc) +
+				offsetof(struct brw_interface_descriptor,
+					 desc3), media_state->binding_table.bo,
+				desc.desc3.binding_table_entry_count,
+				I915_GEM_DOMAIN_INSTRUCTION, 0);
 }
 
 static Status interface_descriptor(struct media_state *media_state)
 {
 	if (media_state->vfe_state.interface.bo)
 		drm_intel_bo_unreference(media_state->vfe_state.interface.bo);
-	media_state->vfe_state.interface.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-			"interfaces", DESCRIPTOR_NUM*sizeof(struct brw_interface_descriptor),
-			0x1000);
+	media_state->vfe_state.interface.bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "interfaces",
+			       DESCRIPTOR_NUM *
+			       sizeof(struct brw_interface_descriptor), 0x1000);
 	if (!media_state->vfe_state.interface.bo)
 		return BadAlloc;
 
@@ -620,184 +676,215 @@ static Status vfe_state(struct media_state *media_state)
 	/* should carefully caculate those values for performance */
 	state.vfe1.urb_entry_alloc_size = 2;
 	state.vfe1.max_threads = 31;
-        state.vfe2.interface_descriptor_base =
-		media_state->vfe_state.interface.bo->offset >> 4;
+	state.vfe2.interface_descriptor_base =
+	    media_state->vfe_state.interface.bo->offset >> 4;
 
 	if (media_state->vfe_state.bo)
 		drm_intel_bo_unreference(media_state->vfe_state.bo);
 	media_state->vfe_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-		"vfe state", sizeof(struct brw_vfe_state), 0x1000);
+						       "vfe state",
+						       sizeof(struct
+							      brw_vfe_state),
+						       0x1000);
 	if (!media_state->vfe_state.bo)
 		return BadAlloc;
 
-	drm_intel_bo_subdata(media_state->vfe_state.bo, 0, sizeof(state), &state);
+	drm_intel_bo_subdata(media_state->vfe_state.bo, 0, sizeof(state),
+			     &state);
 
 	drm_intel_bo_emit_reloc(media_state->vfe_state.bo,
-		offsetof(struct brw_vfe_state, vfe2),
-		media_state->vfe_state.interface.bo, 0,
-		I915_GEM_DOMAIN_INSTRUCTION, 0);
+				offsetof(struct brw_vfe_state, vfe2),
+				media_state->vfe_state.interface.bo, 0,
+				I915_GEM_DOMAIN_INSTRUCTION, 0);
 	return Success;
 }
 
-static Status render_surface(Display *display, 
-	XvMCContext *context,
-	unsigned int picture_structure,
-	XvMCSurface *target_surface,
-	XvMCSurface *past_surface,
-	XvMCSurface *future_surface,
-	unsigned int flags,
-	unsigned int num_macroblocks,
-	unsigned int first_macroblock,
-	XvMCMacroBlockArray *macroblock_array,
-	XvMCBlockArray *blocks)
+static Status render_surface(Display * display,
+			     XvMCContext * context,
+			     unsigned int picture_structure,
+			     XvMCSurface * target_surface,
+			     XvMCSurface * past_surface,
+			     XvMCSurface * future_surface,
+			     unsigned int flags,
+			     unsigned int num_macroblocks,
+			     unsigned int first_macroblock,
+			     XvMCMacroBlockArray * macroblock_array,
+			     XvMCBlockArray * blocks)
 {
 
-    intel_xvmc_context_ptr intel_ctx;
-    int i, j;
-    struct i965_xvmc_context *i965_ctx;
-    XvMCMacroBlock *mb;
-    struct i965_xvmc_surface *priv_target_surface = 
-	target_surface->privData;
-    struct i965_xvmc_surface *priv_past_surface = 
-	past_surface?past_surface->privData:0;
-    struct i965_xvmc_surface *priv_future_surface = 
-	future_surface?future_surface->privData:0;
-    unsigned short *block_ptr;
-    intel_ctx = intel_xvmc_find_context(context->context_id);
-    i965_ctx = context->privData;
-    if (!intel_ctx) {
-	XVMC_ERR("Can't find intel xvmc context\n");
-	return BadValue;
-    }
-
-    if (media_state.indirect_data.bo) {
-        if (xvmc_driver->kernel_exec_fencing)
-            drm_intel_gem_bo_unmap_gtt(media_state.indirect_data.bo);
-        else
-            drm_intel_bo_unmap(media_state.indirect_data.bo);
-
-        drm_intel_bo_unreference(media_state.indirect_data.bo);
-    }
-    media_state.indirect_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-	    "indirect data", 128*6*num_macroblocks, 64);
-    if (!media_state.indirect_data.bo)
-        return BadAlloc;
-    setup_surfaces(&media_state, 
-	    priv_target_surface->bo, 
-	    past_surface? priv_past_surface->bo:NULL, 
-	    future_surface?priv_future_surface->bo:NULL, 
-	    context->width, context->height);
-    setup_blocks(&media_state, 128*6*num_macroblocks);
-    binding_tables(&media_state);
-    interface_descriptor(&media_state);
-    vfe_state(&media_state);
-
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_map_gtt(media_state.indirect_data.bo);
-    else
-        drm_intel_bo_map(media_state.indirect_data.bo, 1);
-
-    block_ptr = media_state.indirect_data.bo->virtual;
-    for (i = first_macroblock; 
-	    i < num_macroblocks + first_macroblock; i++) {
-	unsigned short *mb_block_ptr;
-	mb = &macroblock_array->macro_blocks[i];
-	mb_block_ptr = &blocks->blocks[(mb->index<<6)];
-	if (mb->coded_block_pattern & 0x20)  {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
+	intel_xvmc_context_ptr intel_ctx;
+	int i, j;
+	struct i965_xvmc_context *i965_ctx;
+	XvMCMacroBlock *mb;
+	struct i965_xvmc_surface *priv_target_surface =
+	    target_surface->privData;
+	struct i965_xvmc_surface *priv_past_surface =
+	    past_surface ? past_surface->privData : 0;
+	struct i965_xvmc_surface *priv_future_surface =
+	    future_surface ? future_surface->privData : 0;
+	unsigned short *block_ptr;
+	intel_ctx = intel_xvmc_find_context(context->context_id);
+	i965_ctx = context->privData;
+	if (!intel_ctx) {
+		XVMC_ERR("Can't find intel xvmc context\n");
+		return BadValue;
 	}
 
-	if (mb->coded_block_pattern & 0x10)  {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j + 8, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
-	}
-	block_ptr += 2*64;
-	if (mb->coded_block_pattern & 0x08)  {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
-	}
+	if (media_state.indirect_data.bo) {
+		if (xvmc_driver->kernel_exec_fencing)
+			drm_intel_gem_bo_unmap_gtt(media_state.
+						   indirect_data.bo);
+		else
+			drm_intel_bo_unmap(media_state.indirect_data.bo);
 
-	if (mb->coded_block_pattern & 0x04)  {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j + 8, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
+		drm_intel_bo_unreference(media_state.indirect_data.bo);
 	}
+	media_state.indirect_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+							  "indirect data",
+							  128 * 6 *
+							  num_macroblocks, 64);
+	if (!media_state.indirect_data.bo)
+		return BadAlloc;
+	setup_surfaces(&media_state,
+		       priv_target_surface->bo,
+		       past_surface ? priv_past_surface->bo : NULL,
+		       future_surface ? priv_future_surface->bo : NULL,
+		       context->width, context->height);
+	setup_blocks(&media_state, 128 * 6 * num_macroblocks);
+	binding_tables(&media_state);
+	interface_descriptor(&media_state);
+	vfe_state(&media_state);
+
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_map_gtt(media_state.indirect_data.bo);
+	else
+		drm_intel_bo_map(media_state.indirect_data.bo, 1);
+
+	block_ptr = media_state.indirect_data.bo->virtual;
+	for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++) {
+		unsigned short *mb_block_ptr;
+		mb = &macroblock_array->macro_blocks[i];
+		mb_block_ptr = &blocks->blocks[(mb->index << 6)];
+		if (mb->coded_block_pattern & 0x20) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j,
+				       16);
+			mb_block_ptr += 64;
+		}
 
-	block_ptr += 2*64;
-	if (mb->coded_block_pattern & 0x2) {
-	    memcpy(block_ptr, mb_block_ptr, 128);
-	    mb_block_ptr += 64;
-	}
+		if (mb->coded_block_pattern & 0x10) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j + 8,
+				       mb_block_ptr + 8 * j, 16);
+			mb_block_ptr += 64;
+		}
+		block_ptr += 2 * 64;
+		if (mb->coded_block_pattern & 0x08) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j,
+				       16);
+			mb_block_ptr += 64;
+		}
+
+		if (mb->coded_block_pattern & 0x04) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j + 8,
+				       mb_block_ptr + 8 * j, 16);
+			mb_block_ptr += 64;
+		}
+
+		block_ptr += 2 * 64;
+		if (mb->coded_block_pattern & 0x2) {
+			memcpy(block_ptr, mb_block_ptr, 128);
+			mb_block_ptr += 64;
+		}
 
-	block_ptr += 64;
-	if (mb->coded_block_pattern & 0x1) 
-	    memcpy(block_ptr, mb_block_ptr, 128);
-	block_ptr += 64;
-    }
-    {
-	int block_offset = 0;
-	LOCK_HARDWARE(intel_ctx->hw_context);
-	state_base_address();
-	flush();	
-	clear_sf_state();
-	pipeline_select(&media_state);
-	urb_layout();	
-	media_state_pointers(&media_state);
-	for (i = first_macroblock; 
-		i < num_macroblocks + first_macroblock; 
-		i++, block_offset += 128*6) {
-	    mb = &macroblock_array->macro_blocks[i];
-
-	    if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
-		send_media_object(mb, block_offset, INTRA_INTERFACE);
-	    } else {
-		if (((mb->motion_type & 3) == XVMC_PREDICTION_FRAME)) {
-		    if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_FORWARD))
-		    {
-			if (((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD)))
-			    send_media_object(mb, block_offset, F_B_INTERFACE);
-			else
-			    send_media_object(mb, block_offset, FORWARD_INTERFACE);
-		    } else if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD))
-		    {
-			send_media_object(mb, block_offset, BACKWARD_INTERFACE);
-		    }
-		} else if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) {
-		    if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_FORWARD))
-		    {
-			if (((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD)))	
-			    send_media_object(mb, block_offset, FIELD_F_B_INTERFACE);
-			else 
-
-			    send_media_object(mb, block_offset, FIELD_FORWARD_INTERFACE);
-		    } else if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD))
-		    {
-			send_media_object(mb, block_offset, FIELD_BACKWARD_INTERFACE);
-		    }
-		}else {
-		    send_media_object(mb, block_offset, DUAL_PRIME_INTERFACE);
+		block_ptr += 64;
+		if (mb->coded_block_pattern & 0x1)
+			memcpy(block_ptr, mb_block_ptr, 128);
+		block_ptr += 64;
+	}
+	{
+		int block_offset = 0;
+		LOCK_HARDWARE(intel_ctx->hw_context);
+		state_base_address();
+		flush();
+		clear_sf_state();
+		pipeline_select(&media_state);
+		urb_layout();
+		media_state_pointers(&media_state);
+		for (i = first_macroblock;
+		     i < num_macroblocks + first_macroblock;
+		     i++, block_offset += 128 * 6) {
+			mb = &macroblock_array->macro_blocks[i];
+
+			if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
+				send_media_object(mb, block_offset,
+						  INTRA_INTERFACE);
+			} else {
+				if (((mb->motion_type & 3) ==
+				     XVMC_PREDICTION_FRAME)) {
+					if ((mb->macroblock_type &
+					     XVMC_MB_TYPE_MOTION_FORWARD)) {
+						if (((mb->macroblock_type &
+						      XVMC_MB_TYPE_MOTION_BACKWARD)))
+							send_media_object(mb,
+									  block_offset,
+									  F_B_INTERFACE);
+						else
+							send_media_object(mb,
+									  block_offset,
+									  FORWARD_INTERFACE);
+					} else
+					    if ((mb->macroblock_type &
+						 XVMC_MB_TYPE_MOTION_BACKWARD))
+					{
+						send_media_object(mb,
+								  block_offset,
+								  BACKWARD_INTERFACE);
+					}
+				} else if ((mb->motion_type & 3) ==
+					   XVMC_PREDICTION_FIELD) {
+					if ((mb->macroblock_type &
+					     XVMC_MB_TYPE_MOTION_FORWARD)) {
+						if (((mb->macroblock_type &
+						      XVMC_MB_TYPE_MOTION_BACKWARD)))
+							send_media_object(mb,
+									  block_offset,
+									  FIELD_F_B_INTERFACE);
+						else
+
+							send_media_object(mb,
+									  block_offset,
+									  FIELD_FORWARD_INTERFACE);
+					} else
+					    if ((mb->macroblock_type &
+						 XVMC_MB_TYPE_MOTION_BACKWARD))
+					{
+						send_media_object(mb,
+								  block_offset,
+								  FIELD_BACKWARD_INTERFACE);
+					}
+				} else {
+					send_media_object(mb, block_offset,
+							  DUAL_PRIME_INTERFACE);
+				}
+			}
 		}
-	    }
+		intelFlushBatch(TRUE);
+		UNLOCK_HARDWARE(intel_ctx->hw_context);
 	}
-	intelFlushBatch(TRUE);
-	UNLOCK_HARDWARE(intel_ctx->hw_context);
-    }
-    return Success;
+	return Success;
 }
 
-static Status put_surface(Display *display,XvMCSurface *surface,
-	Drawable draw, short srcx, short srcy,
-	unsigned short srcw, unsigned short srch,
-	short destx, short desty,
-	unsigned short destw, unsigned short desth,
-	int flags, struct intel_xvmc_command *data)
+static Status put_surface(Display * display, XvMCSurface * surface,
+			  Drawable draw, short srcx, short srcy,
+			  unsigned short srcw, unsigned short srch,
+			  short destx, short desty,
+			  unsigned short destw, unsigned short desth,
+			  int flags, struct intel_xvmc_command *data)
 {
-	struct i965_xvmc_surface *private_surface =
-		surface->privData;
+	struct i965_xvmc_surface *private_surface = surface->privData;
 	uint32_t handle = 0;
 
 	drm_intel_bo_flink(private_surface->bo, &handle);
@@ -806,38 +893,37 @@ static Status put_surface(Display *display,XvMCSurface *surface,
 	return Success;
 }
 
-static Status get_surface_status(Display *display,
-	XvMCSurface *surface, int *stats)
+static Status get_surface_status(Display * display,
+				 XvMCSurface * surface, int *stats)
 {
-    *stats = 0;
-    return 0;
+	*stats = 0;
+	return 0;
 }
 
-static Status create_context(Display *display, XvMCContext *context,
-	int priv_count, CARD32 *priv_data)
+static Status create_context(Display * display, XvMCContext * context,
+			     int priv_count, CARD32 * priv_data)
 {
-    struct i965_xvmc_context *i965_ctx;
-    i965_ctx = (struct i965_xvmc_context *)priv_data;
-    context->privData = i965_ctx;
-
-    media_state.is_g4x = i965_ctx->is_g4x;
-    media_state.is_965_q = i965_ctx->is_965_q;
-
-    if (alloc_object(&media_state))
-        return BadAlloc;
-    if (media_kernels(&media_state))
-        return BadAlloc;
-    return Success;
+	struct i965_xvmc_context *i965_ctx;
+	i965_ctx = (struct i965_xvmc_context *)priv_data;
+	context->privData = i965_ctx;
+
+	media_state.is_g4x = i965_ctx->is_g4x;
+	media_state.is_965_q = i965_ctx->is_965_q;
+
+	if (alloc_object(&media_state))
+		return BadAlloc;
+	if (media_kernels(&media_state))
+		return BadAlloc;
+	return Success;
 }
 
 struct _intel_xvmc_driver i965_xvmc_mc_driver = {
-    .type               = XVMC_I965_MPEG2_MC,
-    .create_context     = create_context,
-    .destroy_context    = destroy_context,
-    .create_surface     = create_surface,
-    .destroy_surface    = destroy_surface,
-    .render_surface     = render_surface,
-    .put_surface        = put_surface,
-    .get_surface_status = get_surface_status,
+	.type = XVMC_I965_MPEG2_MC,
+	.create_context = create_context,
+	.destroy_context = destroy_context,
+	.create_surface = create_surface,
+	.destroy_surface = destroy_surface,
+	.render_surface = render_surface,
+	.put_surface = put_surface,
+	.get_surface_status = get_surface_status,
 };
-
diff --git a/src/xvmc/i965_xvmc.h b/src/xvmc/i965_xvmc.h
index bbee76c0..ed201c89 100644
--- a/src/xvmc/i965_xvmc.h
+++ b/src/xvmc/i965_xvmc.h
@@ -1,2 +1 @@
 #include "intel_xvmc.h"
-
diff --git a/src/xvmc/intel_batchbuffer.c b/src/xvmc/intel_batchbuffer.c
index 8c96d7f1..ebaac7a4 100644
--- a/src/xvmc/intel_batchbuffer.c
+++ b/src/xvmc/intel_batchbuffer.c
@@ -48,142 +48,144 @@
 #include "brw_defines.h"
 #include "brw_structs.h"
 #define MI_BATCH_BUFFER_END     (0xA << 23)
-#define BATCH_SIZE 8*1024 /* one bo is allocated each time, so the size can be small */
+#define BATCH_SIZE 8*1024	/* one bo is allocated each time, so the size can be small */
 static int intelEmitIrqLocked(void)
 {
-   drmI830IrqEmit ie;
-   int ret, seq;
+	drmI830IrqEmit ie;
+	int ret, seq;
 
-   ie.irq_seq = &seq;
-   ret = drmCommandWriteRead(xvmc_driver->fd, DRM_I830_IRQ_EMIT,
-                             &ie, sizeof(ie));
+	ie.irq_seq = &seq;
+	ret = drmCommandWriteRead(xvmc_driver->fd, DRM_I830_IRQ_EMIT,
+				  &ie, sizeof(ie));
 
-   if ( ret ) {
-      fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret);
-      exit(1);
-   }
+	if (ret) {
+		fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret);
+		exit(1);
+	}
 
-   return seq;
+	return seq;
 }
 
 static void intelWaitIrq(int seq)
 {
-   int ret;
-   drmI830IrqWait iw;
+	int ret;
+	drmI830IrqWait iw;
 
-   iw.irq_seq = seq;
+	iw.irq_seq = seq;
 
-   do {
-      ret = drmCommandWrite(xvmc_driver->fd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
-   } while (ret == -EAGAIN || ret == -EINTR);
+	do {
+		ret =
+		    drmCommandWrite(xvmc_driver->fd, DRM_I830_IRQ_WAIT, &iw,
+				    sizeof(iw));
+	} while (ret == -EAGAIN || ret == -EINTR);
 
-   if (ret) {
-      fprintf(stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret);
-      exit(1);
-   }
+	if (ret) {
+		fprintf(stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret);
+		exit(1);
+	}
 }
 
 static void i965_end_batch(void)
 {
-    unsigned int size = xvmc_driver->batch.ptr - 
-	xvmc_driver->batch.init_ptr;
-    if ((size & 4) == 0) {
-	*(unsigned int*)xvmc_driver->batch.ptr = 0;
+	unsigned int size = xvmc_driver->batch.ptr -
+	    xvmc_driver->batch.init_ptr;
+	if ((size & 4) == 0) {
+		*(unsigned int *)xvmc_driver->batch.ptr = 0;
+		xvmc_driver->batch.ptr += 4;
+	}
+	*(unsigned int *)xvmc_driver->batch.ptr = MI_BATCH_BUFFER_END;
 	xvmc_driver->batch.ptr += 4;
-    }
-    *(unsigned int*)xvmc_driver->batch.ptr = MI_BATCH_BUFFER_END;
-    xvmc_driver->batch.ptr += 4;
 }
 
 Bool intelInitBatchBuffer(void)
 {
-    int i;
-
-    if((xvmc_driver->batch.buf = 
-		drm_intel_bo_alloc(xvmc_driver->bufmgr, 
-		    "batch buffer", BATCH_SIZE, 0x1000)) == NULL) {
-	fprintf(stderr, "unable to alloc batch buffer\n");
-	return False;
-    }
-
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
-    else
-        drm_intel_bo_map(xvmc_driver->batch.buf, 1);
-
-    xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
-    xvmc_driver->batch.size = BATCH_SIZE;
-    xvmc_driver->batch.space = BATCH_SIZE;
-    xvmc_driver->batch.ptr = xvmc_driver->batch.init_ptr;
-    return True;
+	int i;
+
+	if ((xvmc_driver->batch.buf =
+	     drm_intel_bo_alloc(xvmc_driver->bufmgr,
+				"batch buffer", BATCH_SIZE, 0x1000)) == NULL) {
+		fprintf(stderr, "unable to alloc batch buffer\n");
+		return False;
+	}
+
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
+	else
+		drm_intel_bo_map(xvmc_driver->batch.buf, 1);
+
+	xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
+	xvmc_driver->batch.size = BATCH_SIZE;
+	xvmc_driver->batch.space = BATCH_SIZE;
+	xvmc_driver->batch.ptr = xvmc_driver->batch.init_ptr;
+	return True;
 }
 
 void intelFiniBatchBuffer(void)
 {
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
-    else
-        drm_intel_bo_unmap(xvmc_driver->batch.buf);
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
+	else
+		drm_intel_bo_unmap(xvmc_driver->batch.buf);
 
-    drm_intel_bo_unreference(xvmc_driver->batch.buf);
+	drm_intel_bo_unreference(xvmc_driver->batch.buf);
 }
 
-
-void intelFlushBatch(Bool refill )
+void intelFlushBatch(Bool refill)
 {
-    i965_end_batch();
-
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
-    else
-        drm_intel_bo_unmap(xvmc_driver->batch.buf);
-
-    drm_intel_bo_exec(xvmc_driver->batch.buf, 
-	    xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr,
-	    0, 0, 0);
-
-    if (xvmc_driver == &i915_xvmc_mc_driver)
-	    dri_bo_wait_rendering(xvmc_driver->batch.buf);
-
-    drm_intel_bo_unreference(xvmc_driver->batch.buf);
-    if((xvmc_driver->batch.buf = 
-		drm_intel_bo_alloc(xvmc_driver->bufmgr, 
-		    "batch buffer", BATCH_SIZE, 0x1000)) == NULL) {
-	fprintf(stderr, "unable to alloc batch buffer\n");
-    }
-
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
-    else
-        drm_intel_bo_map(xvmc_driver->batch.buf, 1);
-
-    xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
-    xvmc_driver->batch.size = BATCH_SIZE;
-    xvmc_driver->batch.space = BATCH_SIZE;
-    xvmc_driver->batch.ptr = xvmc_driver->batch.init_ptr;
+	i965_end_batch();
+
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_unmap_gtt(xvmc_driver->batch.buf);
+	else
+		drm_intel_bo_unmap(xvmc_driver->batch.buf);
+
+	drm_intel_bo_exec(xvmc_driver->batch.buf,
+			  xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr,
+			  0, 0, 0);
+
+	if (xvmc_driver == &i915_xvmc_mc_driver)
+		dri_bo_wait_rendering(xvmc_driver->batch.buf);
+
+	drm_intel_bo_unreference(xvmc_driver->batch.buf);
+	if ((xvmc_driver->batch.buf =
+	     drm_intel_bo_alloc(xvmc_driver->bufmgr,
+				"batch buffer", BATCH_SIZE, 0x1000)) == NULL) {
+		fprintf(stderr, "unable to alloc batch buffer\n");
+	}
+
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_map_gtt(xvmc_driver->batch.buf);
+	else
+		drm_intel_bo_map(xvmc_driver->batch.buf, 1);
+
+	xvmc_driver->batch.init_ptr = xvmc_driver->batch.buf->virtual;
+	xvmc_driver->batch.size = BATCH_SIZE;
+	xvmc_driver->batch.space = BATCH_SIZE;
+	xvmc_driver->batch.ptr = xvmc_driver->batch.init_ptr;
 }
 
 void intelBatchbufferRequireSpace(int size)
 {
-    assert(xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr + size <
-        xvmc_driver->batch.size - 8);
-    if (xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr + size 
-	    >= xvmc_driver->batch.size - 8) 
-	intelFlushBatch(1);
+	assert(xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr + size <
+	       xvmc_driver->batch.size - 8);
+	if (xvmc_driver->batch.ptr - xvmc_driver->batch.init_ptr + size
+	    >= xvmc_driver->batch.size - 8)
+		intelFlushBatch(1);
 }
 
 void intelBatchbufferData(const void *data, unsigned bytes, unsigned flags)
 {
-   intelBatchbufferRequireSpace(bytes);
-   memcpy(xvmc_driver->batch.ptr, data, bytes);
-   xvmc_driver->batch.ptr += bytes;
-   xvmc_driver->batch.space -= bytes;
+	intelBatchbufferRequireSpace(bytes);
+	memcpy(xvmc_driver->batch.ptr, data, bytes);
+	xvmc_driver->batch.ptr += bytes;
+	xvmc_driver->batch.space -= bytes;
 }
 
-void intel_batch_emit_reloc(dri_bo *bo, uint32_t read_domain,
-	uint32_t write_domain, uint32_t delta, unsigned char *ptr)
+void intel_batch_emit_reloc(dri_bo * bo, uint32_t read_domain,
+			    uint32_t write_domain, uint32_t delta,
+			    unsigned char *ptr)
 {
-    drm_intel_bo_emit_reloc(xvmc_driver->batch.buf, 
-	    ptr - xvmc_driver->batch.init_ptr, bo, delta,
-	    read_domain, write_domain);
+	drm_intel_bo_emit_reloc(xvmc_driver->batch.buf,
+				ptr - xvmc_driver->batch.init_ptr, bo, delta,
+				read_domain, write_domain);
 }
diff --git a/src/xvmc/intel_batchbuffer.h b/src/xvmc/intel_batchbuffer.h
index ea9058ce..6fa1c05b 100644
--- a/src/xvmc/intel_batchbuffer.h
+++ b/src/xvmc/intel_batchbuffer.h
@@ -52,6 +52,7 @@ extern void intelBatchbufferData(const void *, unsigned, unsigned);
 extern Bool intelInitBatchBuffer(void);
 extern void intelFiniBatchBuffer(void);
 extern void intelCmdIoctl(char *, unsigned);
-extern void intel_batch_emit_reloc(dri_bo *bo, uint32_t read_domain,
-	uint32_t write_domain, uint32_t delta, unsigned char *);
+extern void intel_batch_emit_reloc(dri_bo * bo, uint32_t read_domain,
+				   uint32_t write_domain, uint32_t delta,
+				   unsigned char *);
 #endif /* _INTEL_BATCHBUFFER_H */
diff --git a/src/xvmc/intel_xvmc.c b/src/xvmc/intel_xvmc.c
index 06763aef..947f97d4 100644
--- a/src/xvmc/intel_xvmc.c
+++ b/src/xvmc/intel_xvmc.c
@@ -33,207 +33,208 @@ struct _intel_xvmc_driver *xvmc_driver = NULL;
 /* Lookup tables to speed common calculations for coded_block_pattern */
 /* each block is ((8*8) * sizeof(short)) */
 unsigned int mb_bytes_420[] = {
-    0, /* 0 */
-    128, /* 1 */
-    128, /* 10 */
-    256, /* 11 */
-    128, /* 100 */
-    256, /* 101 */
-    256, /* 110 */
-    384, /* 111 */
-    128, /* 1000 */
-    256, /* 1001 */
-    256, /* 1010 */
-    384, /* 1011 */
-    256, /* 1100 */
-    384, /* 1101 */
-    384, /* 1110 */
-    512, /* 1111 */
-    128, /* 10000 */
-    256, /* 10001 */
-    256, /* 10010 */
-    384, /* 10011 */
-    256, /* 10100 */
-    384, /* 10101 */
-    384, /* 10110 */
-    512, /* 10111 */
-    256, /* 11000 */
-    384, /* 11001 */
-    384, /* 11010 */
-    512, /* 11011 */
-    384, /* 11100 */
-    512, /* 11101 */
-    512, /* 11110 */
-    640, /* 11111 */
-    128, /* 100000 */
-    256, /* 100001 */
-    256, /* 100010 */
-    384, /* 100011 */
-    256, /* 100100 */
-    384, /* 100101 */
-    384, /* 100110 */
-    512, /* 100111 */
-    256, /* 101000 */
-    384, /* 101001 */
-    384, /* 101010 */
-    512, /* 101011 */
-    384, /* 101100 */
-    512, /* 101101 */
-    512, /* 101110 */
-    640, /* 101111 */
-    256, /* 110000 */
-    384, /* 110001 */
-    384, /* 110010 */
-    512, /* 110011 */
-    384, /* 110100 */
-    512, /* 110101 */
-    512, /* 110110 */
-    640, /* 110111 */
-    384, /* 111000 */
-    512, /* 111001 */
-    512, /* 111010 */
-    640, /* 111011 */
-    512, /* 111100 */
-    640, /* 111101 */
-    640, /* 111110 */
-    768  /* 111111 */
+	0,			/* 0 */
+	128,			/* 1 */
+	128,			/* 10 */
+	256,			/* 11 */
+	128,			/* 100 */
+	256,			/* 101 */
+	256,			/* 110 */
+	384,			/* 111 */
+	128,			/* 1000 */
+	256,			/* 1001 */
+	256,			/* 1010 */
+	384,			/* 1011 */
+	256,			/* 1100 */
+	384,			/* 1101 */
+	384,			/* 1110 */
+	512,			/* 1111 */
+	128,			/* 10000 */
+	256,			/* 10001 */
+	256,			/* 10010 */
+	384,			/* 10011 */
+	256,			/* 10100 */
+	384,			/* 10101 */
+	384,			/* 10110 */
+	512,			/* 10111 */
+	256,			/* 11000 */
+	384,			/* 11001 */
+	384,			/* 11010 */
+	512,			/* 11011 */
+	384,			/* 11100 */
+	512,			/* 11101 */
+	512,			/* 11110 */
+	640,			/* 11111 */
+	128,			/* 100000 */
+	256,			/* 100001 */
+	256,			/* 100010 */
+	384,			/* 100011 */
+	256,			/* 100100 */
+	384,			/* 100101 */
+	384,			/* 100110 */
+	512,			/* 100111 */
+	256,			/* 101000 */
+	384,			/* 101001 */
+	384,			/* 101010 */
+	512,			/* 101011 */
+	384,			/* 101100 */
+	512,			/* 101101 */
+	512,			/* 101110 */
+	640,			/* 101111 */
+	256,			/* 110000 */
+	384,			/* 110001 */
+	384,			/* 110010 */
+	512,			/* 110011 */
+	384,			/* 110100 */
+	512,			/* 110101 */
+	512,			/* 110110 */
+	640,			/* 110111 */
+	384,			/* 111000 */
+	512,			/* 111001 */
+	512,			/* 111010 */
+	640,			/* 111011 */
+	512,			/* 111100 */
+	640,			/* 111101 */
+	640,			/* 111110 */
+	768			/* 111111 */
 };
 
 int DEBUG;
 
 static void intel_xvmc_debug_init(void)
 {
-    if (getenv("INTEL_XVMC_DEBUG"))
-	DEBUG = 1;
+	if (getenv("INTEL_XVMC_DEBUG"))
+		DEBUG = 1;
 }
 
 void LOCK_HARDWARE(drm_context_t ctx)
 {
-    char __ret = 0;
+	char __ret = 0;
 
-    PPTHREAD_MUTEX_LOCK();
-    assert(!xvmc_driver->locked);
+	PPTHREAD_MUTEX_LOCK();
+	assert(!xvmc_driver->locked);
 
-    xvmc_driver->locked = 1;
+	xvmc_driver->locked = 1;
 }
 
 void UNLOCK_HARDWARE(drm_context_t ctx)
 {
-    xvmc_driver->locked = 0;
-    
-    PPTHREAD_MUTEX_UNLOCK();
+	xvmc_driver->locked = 0;
+
+	PPTHREAD_MUTEX_UNLOCK();
 }
 
-static intel_xvmc_context_ptr intel_xvmc_new_context(Display *dpy)
+static intel_xvmc_context_ptr intel_xvmc_new_context(Display * dpy)
 {
-    intel_xvmc_context_ptr ret;
+	intel_xvmc_context_ptr ret;
 
-    ret = (intel_xvmc_context_ptr)calloc(1, sizeof(intel_xvmc_context_t));
-    if (!ret)
-	return NULL;
+	ret = (intel_xvmc_context_ptr) calloc(1, sizeof(intel_xvmc_context_t));
+	if (!ret)
+		return NULL;
 
-    if (!xvmc_driver->ctx_list)
-	ret->next = NULL;
-    else
-	ret->next = xvmc_driver->ctx_list;
-    xvmc_driver->ctx_list = ret;
-    xvmc_driver->num_ctx++;
+	if (!xvmc_driver->ctx_list)
+		ret->next = NULL;
+	else
+		ret->next = xvmc_driver->ctx_list;
+	xvmc_driver->ctx_list = ret;
+	xvmc_driver->num_ctx++;
 
-    return ret;
+	return ret;
 
 }
 
 static void intel_xvmc_free_context(XID id)
 {
-    intel_xvmc_context_ptr p = xvmc_driver->ctx_list;
-    intel_xvmc_context_ptr pre = p;
-
-    while(p) {
-	if (p->context && p->context->context_id == id) {
-	    if (p == xvmc_driver->ctx_list)
-		xvmc_driver->ctx_list = p->next;
-	    else
-		pre->next = p->next;
-	    break;
+	intel_xvmc_context_ptr p = xvmc_driver->ctx_list;
+	intel_xvmc_context_ptr pre = p;
+
+	while (p) {
+		if (p->context && p->context->context_id == id) {
+			if (p == xvmc_driver->ctx_list)
+				xvmc_driver->ctx_list = p->next;
+			else
+				pre->next = p->next;
+			break;
+		}
+		pre = p;
+		p = p->next;
+	}
+
+	if (p) {
+		free(p);
+		xvmc_driver->num_ctx--;
 	}
-	pre = p;
-	p = p->next;
-    }
-
-    if (p) {
-	free(p);
-	xvmc_driver->num_ctx--;
-    }
 }
 
 intel_xvmc_context_ptr intel_xvmc_find_context(XID id)
 {
-    intel_xvmc_context_ptr p = xvmc_driver->ctx_list;
-
-    while(p) {
-	if (p->context && p->context->context_id == id)
-	    return p;
-	p = p->next;
-    }
-    return NULL;
+	intel_xvmc_context_ptr p = xvmc_driver->ctx_list;
+
+	while (p) {
+		if (p->context && p->context->context_id == id)
+			return p;
+		p = p->next;
+	}
+	return NULL;
 }
 
-static intel_xvmc_surface_ptr intel_xvmc_new_surface(Display *dpy)
+static intel_xvmc_surface_ptr intel_xvmc_new_surface(Display * dpy)
 {
-    intel_xvmc_surface_ptr ret;
+	intel_xvmc_surface_ptr ret;
 
-    ret = (intel_xvmc_surface_ptr)calloc(1, sizeof(intel_xvmc_surface_t));
-    if (!ret)
-	return NULL;
+	ret = (intel_xvmc_surface_ptr) calloc(1, sizeof(intel_xvmc_surface_t));
+	if (!ret)
+		return NULL;
 
-    if (!xvmc_driver->surf_list)
-	ret->next = NULL;
-    else
-	ret->next = xvmc_driver->surf_list;
-    xvmc_driver->surf_list = ret;
-    xvmc_driver->num_surf++;
+	if (!xvmc_driver->surf_list)
+		ret->next = NULL;
+	else
+		ret->next = xvmc_driver->surf_list;
+	xvmc_driver->surf_list = ret;
+	xvmc_driver->num_surf++;
 
-    ret->image = NULL;
-    ret->gc_init = FALSE;
+	ret->image = NULL;
+	ret->gc_init = FALSE;
 
-    return ret;
+	return ret;
 
 }
 
 static void intel_xvmc_free_surface(XID id)
 {
-    intel_xvmc_surface_ptr p = xvmc_driver->surf_list;
-    intel_xvmc_surface_ptr pre = p;
-
-    while(p) {
-	if (p->surface && p->surface->surface_id == id) {
-	    if (p == xvmc_driver->surf_list)
-		xvmc_driver->surf_list = p->next;
-	    else
-		pre->next = p->next;
-	    break;
+	intel_xvmc_surface_ptr p = xvmc_driver->surf_list;
+	intel_xvmc_surface_ptr pre = p;
+
+	while (p) {
+		if (p->surface && p->surface->surface_id == id) {
+			if (p == xvmc_driver->surf_list)
+				xvmc_driver->surf_list = p->next;
+			else
+				pre->next = p->next;
+			break;
+		}
+		pre = p;
+		p = p->next;
+	}
+
+	if (p) {
+		free(p);
+		xvmc_driver->num_surf--;
 	}
-	pre = p;
-	p = p->next;
-    }
-
-    if (p) {
-	free(p);
-	xvmc_driver->num_surf--;
-    }
 }
 
 intel_xvmc_surface_ptr intel_xvmc_find_surface(XID id)
 {
-    intel_xvmc_surface_ptr p = xvmc_driver->surf_list;
-
-    while(p) {
-	if (p->surface && p->surface->surface_id == id)
-	    return p;
-	p = p->next;
-    }
-    return NULL;
+	intel_xvmc_surface_ptr p = xvmc_driver->surf_list;
+
+	while (p) {
+		if (p->surface && p->surface->surface_id == id)
+			return p;
+		p = p->next;
+	}
+	return NULL;
 }
+
 /*
 * Function: XvMCCreateContext
 * Description: Create a XvMC context for the given surface parameters.
@@ -250,188 +251,194 @@ intel_xvmc_surface_ptr intel_xvmc_find_surface(XID id)
 *        returned by XvMCListSurfaceTypes.
 * Returns: Status
 */
-_X_EXPORT Status XvMCCreateContext(Display *display, XvPortID port,
-                         int surface_type_id, int width, int height,
-                         int flags, XvMCContext *context)
+_X_EXPORT Status XvMCCreateContext(Display * display, XvPortID port,
+				   int surface_type_id, int width, int height,
+				   int flags, XvMCContext * context)
 {
-    Status ret;
-    CARD32 *priv_data = NULL;
-    struct _intel_xvmc_common *comm;
-    drm_magic_t magic;
-    int major, minor;
-    int error_base;
-    int event_base;
-    int priv_count;
-    int isCapable;
-    int screen = DefaultScreen(display);
-    intel_xvmc_context_ptr intel_ctx;
-    int fd;
-    char *driverName = NULL, *deviceName = NULL;
-
-    /* Verify Obvious things first */
-    if (!display || !context)
-        return BadValue;
-
-    if (!(flags & XVMC_DIRECT)) {
-        XVMC_ERR("Indirect Rendering not supported! Using Direct.");
-        return BadValue;
-    }
-
-    intel_xvmc_debug_init();
-
-    /*
-       Width, Height, and flags are checked against surface_type_id
-       and port for validity inside the X server, no need to check
-       here.
-    */
-    context->surface_type_id = surface_type_id;
-    context->width = (unsigned short)((width + 15) & ~15);
-    context->height = (unsigned short)((height + 15) & ~15);
-    context->flags = flags;
-    context->port = port;
-
-    if (!XvMCQueryExtension(display, &event_base, &error_base)) {
-        XVMC_ERR("XvMCExtension is not available!");
-        return BadValue;
-    }
-    ret = XvMCQueryVersion(display, &major, &minor);
-    if (ret) {
-        XVMC_ERR("XvMCQueryVersion Failed, unable to determine protocol version.");
-	return ret;
-    }
-
-    /* XXX: major and minor could be checked in future for XvMC
-     * protocol capability (i.e H.264/AVC decode available)
-     */
-
-    /*
-      Pass control to the X server to create a drm_context_t for us and
-      validate the with/height and flags.
-    */
-    if ((ret = _xvmc_create_context(display, context, &priv_count, &priv_data))) {
-        XVMC_ERR("Unable to create XvMC Context.");
-        return ret;
-    }
-    XVMC_DBG("new context %d created\n", (int)context->context_id);
-
-    comm = (struct _intel_xvmc_common *)priv_data;
-
-    if (xvmc_driver == NULL || xvmc_driver->type != comm->type) {
-	switch (comm->type) {
-	    case XVMC_I915_MPEG2_MC:
-		xvmc_driver = &i915_xvmc_mc_driver;
-		break;
-	    case XVMC_I965_MPEG2_MC:
-		xvmc_driver = &i965_xvmc_mc_driver;
-		break;
-	    case XVMC_I965_MPEG2_VLD:
-		xvmc_driver = &xvmc_vld_driver;
-		break;
-	    case XVMC_I945_MPEG2_VLD:
-	    default:
-		XVMC_ERR("unimplemented xvmc type %d", comm->type);
-		XFree(priv_data);
-		priv_data = NULL;
+	Status ret;
+	CARD32 *priv_data = NULL;
+	struct _intel_xvmc_common *comm;
+	drm_magic_t magic;
+	int major, minor;
+	int error_base;
+	int event_base;
+	int priv_count;
+	int isCapable;
+	int screen = DefaultScreen(display);
+	intel_xvmc_context_ptr intel_ctx;
+	int fd;
+	char *driverName = NULL, *deviceName = NULL;
+
+	/* Verify Obvious things first */
+	if (!display || !context)
+		return BadValue;
+
+	if (!(flags & XVMC_DIRECT)) {
+		XVMC_ERR("Indirect Rendering not supported! Using Direct.");
 		return BadValue;
 	}
-    }
 
-    if (xvmc_driver == NULL || xvmc_driver->type != comm->type) {
-	XVMC_ERR("fail to load xvmc driver for type %d\n", comm->type);
-	return BadValue;
-    }
-
-    XVMC_INFO("decoder type is %s", intel_xvmc_decoder_string(comm->type));
-
-    xvmc_driver->kernel_exec_fencing = comm->kernel_exec_fencing;
-
-    /* assign local ctx info */
-    intel_ctx = intel_xvmc_new_context(display);
-    if (!intel_ctx) {
-	XVMC_ERR("Intel XvMC context create fail\n");
-	return BadAlloc;
-    }
-    intel_ctx->context = context;
-
-    /* check DRI2 */
-    ret = Success;
-    xvmc_driver->fd = -1;
-
-    do {
-        if (!DRI2QueryExtension(display, &event_base, &error_base)) {
-            ret = BadValue;
-            break;
-        }
-
-        if (!DRI2QueryVersion(display, &major, &minor)) {
-            ret = BadValue;
-            break;
-        }
-
-        if (!DRI2Connect(display, RootWindow(display, screen),
-                         &driverName, &deviceName)) {
-            ret = BadValue;
-            break;
-        }
-
-        xvmc_driver->fd = open(deviceName, O_RDWR);
-
-        if (xvmc_driver->fd < 0) {
-            XVMC_ERR("Failed to open drm device: %s\n", strerror(errno));
-            ret = BadValue;
-            break;
-        }
-
-        if (drmGetMagic(xvmc_driver->fd, &magic)) {
-            XVMC_ERR("Failed to get magic\n");
-            ret = BadValue;
-            break;
-        }
-
-        if (!DRI2Authenticate(display, RootWindow(display, screen), magic)) {
-            XVMC_ERR("Failed to authenticate magic %d\n", magic);
-            ret = BadValue;
-            break;
-        }
-    } while (0);
-
-    XFree(driverName);
-    XFree(deviceName);
-
-    if (ret != Success) {
-        XFree(priv_data);
-        context->privData = NULL;
-
-        if (xvmc_driver->fd >= 0)
-            close(xvmc_driver->fd);
-
-        xvmc_driver = NULL;
-        return ret;
-    }
-
-    if ((xvmc_driver->bufmgr =
-		intel_bufmgr_gem_init(xvmc_driver->fd, 1024*64)) == NULL) {
-	XVMC_ERR("Can't init bufmgr\n");
- 	return BadAlloc;
-    }
-    drm_intel_bufmgr_gem_enable_reuse(xvmc_driver->bufmgr);
-
-    /* call driver hook.
-     * driver hook should free priv_data after return if success.*/
-    ret = (xvmc_driver->create_context)(display, context, priv_count, priv_data);
-    if (ret) {
-	XVMC_ERR("driver create context failed\n");
-	XFree(priv_data);
-	context->privData = NULL;
-	xvmc_driver = NULL;
-	return ret;
-    }
+	intel_xvmc_debug_init();
+
+	/*
+	   Width, Height, and flags are checked against surface_type_id
+	   and port for validity inside the X server, no need to check
+	   here.
+	 */
+	context->surface_type_id = surface_type_id;
+	context->width = (unsigned short)((width + 15) & ~15);
+	context->height = (unsigned short)((height + 15) & ~15);
+	context->flags = flags;
+	context->port = port;
+
+	if (!XvMCQueryExtension(display, &event_base, &error_base)) {
+		XVMC_ERR("XvMCExtension is not available!");
+		return BadValue;
+	}
+	ret = XvMCQueryVersion(display, &major, &minor);
+	if (ret) {
+		XVMC_ERR
+		    ("XvMCQueryVersion Failed, unable to determine protocol version.");
+		return ret;
+	}
 
-    pthread_mutex_init(&xvmc_driver->ctxmutex, NULL);
-    intelInitBatchBuffer();
-    intel_xvmc_dump_open();
+	/* XXX: major and minor could be checked in future for XvMC
+	 * protocol capability (i.e H.264/AVC decode available)
+	 */
+
+	/*
+	   Pass control to the X server to create a drm_context_t for us and
+	   validate the with/height and flags.
+	 */
+	if ((ret =
+	     _xvmc_create_context(display, context, &priv_count, &priv_data))) {
+		XVMC_ERR("Unable to create XvMC Context.");
+		return ret;
+	}
+	XVMC_DBG("new context %d created\n", (int)context->context_id);
+
+	comm = (struct _intel_xvmc_common *)priv_data;
+
+	if (xvmc_driver == NULL || xvmc_driver->type != comm->type) {
+		switch (comm->type) {
+		case XVMC_I915_MPEG2_MC:
+			xvmc_driver = &i915_xvmc_mc_driver;
+			break;
+		case XVMC_I965_MPEG2_MC:
+			xvmc_driver = &i965_xvmc_mc_driver;
+			break;
+		case XVMC_I965_MPEG2_VLD:
+			xvmc_driver = &xvmc_vld_driver;
+			break;
+		case XVMC_I945_MPEG2_VLD:
+		default:
+			XVMC_ERR("unimplemented xvmc type %d", comm->type);
+			XFree(priv_data);
+			priv_data = NULL;
+			return BadValue;
+		}
+	}
+
+	if (xvmc_driver == NULL || xvmc_driver->type != comm->type) {
+		XVMC_ERR("fail to load xvmc driver for type %d\n", comm->type);
+		return BadValue;
+	}
+
+	XVMC_INFO("decoder type is %s", intel_xvmc_decoder_string(comm->type));
+
+	xvmc_driver->kernel_exec_fencing = comm->kernel_exec_fencing;
+
+	/* assign local ctx info */
+	intel_ctx = intel_xvmc_new_context(display);
+	if (!intel_ctx) {
+		XVMC_ERR("Intel XvMC context create fail\n");
+		return BadAlloc;
+	}
+	intel_ctx->context = context;
+
+	/* check DRI2 */
+	ret = Success;
+	xvmc_driver->fd = -1;
+
+	do {
+		if (!DRI2QueryExtension(display, &event_base, &error_base)) {
+			ret = BadValue;
+			break;
+		}
+
+		if (!DRI2QueryVersion(display, &major, &minor)) {
+			ret = BadValue;
+			break;
+		}
+
+		if (!DRI2Connect(display, RootWindow(display, screen),
+				 &driverName, &deviceName)) {
+			ret = BadValue;
+			break;
+		}
+
+		xvmc_driver->fd = open(deviceName, O_RDWR);
+
+		if (xvmc_driver->fd < 0) {
+			XVMC_ERR("Failed to open drm device: %s\n",
+				 strerror(errno));
+			ret = BadValue;
+			break;
+		}
+
+		if (drmGetMagic(xvmc_driver->fd, &magic)) {
+			XVMC_ERR("Failed to get magic\n");
+			ret = BadValue;
+			break;
+		}
+
+		if (!DRI2Authenticate
+		    (display, RootWindow(display, screen), magic)) {
+			XVMC_ERR("Failed to authenticate magic %d\n", magic);
+			ret = BadValue;
+			break;
+		}
+	} while (0);
+
+	XFree(driverName);
+	XFree(deviceName);
+
+	if (ret != Success) {
+		XFree(priv_data);
+		context->privData = NULL;
+
+		if (xvmc_driver->fd >= 0)
+			close(xvmc_driver->fd);
 
-    return Success;
+		xvmc_driver = NULL;
+		return ret;
+	}
+
+	if ((xvmc_driver->bufmgr =
+	     intel_bufmgr_gem_init(xvmc_driver->fd, 1024 * 64)) == NULL) {
+		XVMC_ERR("Can't init bufmgr\n");
+		return BadAlloc;
+	}
+	drm_intel_bufmgr_gem_enable_reuse(xvmc_driver->bufmgr);
+
+	/* call driver hook.
+	 * driver hook should free priv_data after return if success.*/
+	ret =
+	    (xvmc_driver->create_context) (display, context, priv_count,
+					   priv_data);
+	if (ret) {
+		XVMC_ERR("driver create context failed\n");
+		XFree(priv_data);
+		context->privData = NULL;
+		xvmc_driver = NULL;
+		return ret;
+	}
+
+	pthread_mutex_init(&xvmc_driver->ctxmutex, NULL);
+	intelInitBatchBuffer();
+	intel_xvmc_dump_open();
+
+	return Success;
 }
 
 /*
@@ -443,201 +450,207 @@ _X_EXPORT Status XvMCCreateContext(Display *display, XvPortID port,
  *   context - The context to be destroyed.
  *
  */
-_X_EXPORT Status XvMCDestroyContext(Display *display, XvMCContext *context)
+_X_EXPORT Status XvMCDestroyContext(Display * display, XvMCContext * context)
 {
-    Status ret;
-    int screen;
-
-    if (!display || !context)
-        return XvMCBadContext;
-    screen = DefaultScreen(display);
-    ret = (xvmc_driver->destroy_context)(display, context);
-    if (ret) {
-	XVMC_ERR("destroy context fail\n");
-	return ret;
-    }
+	Status ret;
+	int screen;
+
+	if (!display || !context)
+		return XvMCBadContext;
+	screen = DefaultScreen(display);
+	ret = (xvmc_driver->destroy_context) (display, context);
+	if (ret) {
+		XVMC_ERR("destroy context fail\n");
+		return ret;
+	}
 
-    intelFiniBatchBuffer();
+	intelFiniBatchBuffer();
 
-    dri_bufmgr_destroy(xvmc_driver->bufmgr);
+	dri_bufmgr_destroy(xvmc_driver->bufmgr);
 
-    intel_xvmc_free_context(context->context_id);
+	intel_xvmc_free_context(context->context_id);
 
-    ret = _xvmc_destroy_context(display, context);
-    if (ret != Success) {
-	XVMC_ERR("_xvmc_destroy_context fail\n");
-	return ret;
-    }
+	ret = _xvmc_destroy_context(display, context);
+	if (ret != Success) {
+		XVMC_ERR("_xvmc_destroy_context fail\n");
+		return ret;
+	}
 
-    if (xvmc_driver->num_ctx == 0) {
-	pthread_mutex_destroy(&xvmc_driver->ctxmutex);
+	if (xvmc_driver->num_ctx == 0) {
+		pthread_mutex_destroy(&xvmc_driver->ctxmutex);
 
-	if (xvmc_driver->fd >= 0)
-       close(xvmc_driver->fd);
-   
-	xvmc_driver->fd = -1;
-	intel_xvmc_dump_close();
-    }
-    return Success;
+		if (xvmc_driver->fd >= 0)
+			close(xvmc_driver->fd);
+
+		xvmc_driver->fd = -1;
+		intel_xvmc_dump_close();
+	}
+	return Success;
 }
 
 /*
  * Function: XvMCCreateSurface
  */
-_X_EXPORT Status XvMCCreateSurface(Display *display, XvMCContext *context, XvMCSurface *surface)
+_X_EXPORT Status XvMCCreateSurface(Display * display, XvMCContext * context,
+				   XvMCSurface * surface)
 {
-    Status ret;
-    int priv_count;
-    CARD32 *priv_data;
-    intel_xvmc_surface_ptr intel_surf = NULL;
-
-    if (!display || !context)
-        return XvMCBadContext;
-
-    if (!surface)
-	return XvMCBadSurface;
-
-    intel_surf = intel_xvmc_new_surface(display);
-    if (!intel_surf)
-	return BadAlloc;
-    intel_surf->surface = surface;
-
-    if ((ret = _xvmc_create_surface(display, context, surface,
-                                    &priv_count, &priv_data))) {
-        XVMC_ERR("Unable to create XvMCSurface.");
-        return ret;
-    }
-
-    intel_surf->image = XvCreateImage(display, context->port,
-	    FOURCC_XVMC, (char *)&intel_surf->data, surface->width,
-	    surface->height);
-    if (!intel_surf->image) {
-	XVMC_ERR("Can't create XvImage for surface\n");
-	_xvmc_destroy_surface(display, surface);
-	intel_xvmc_free_surface(surface->surface_id);
-	return BadAlloc;
-    }
-    intel_surf->image->data = (char *)&intel_surf->data;
-
-    ret = (xvmc_driver->create_surface)(display, context, surface, priv_count,
-	    priv_data);
-    if (ret) {
-	XVMC_ERR("create surface failed\n");
-	return ret;
-    }
+	Status ret;
+	int priv_count;
+	CARD32 *priv_data;
+	intel_xvmc_surface_ptr intel_surf = NULL;
+
+	if (!display || !context)
+		return XvMCBadContext;
+
+	if (!surface)
+		return XvMCBadSurface;
+
+	intel_surf = intel_xvmc_new_surface(display);
+	if (!intel_surf)
+		return BadAlloc;
+	intel_surf->surface = surface;
+
+	if ((ret = _xvmc_create_surface(display, context, surface,
+					&priv_count, &priv_data))) {
+		XVMC_ERR("Unable to create XvMCSurface.");
+		return ret;
+	}
 
-    return Success;
-}
+	intel_surf->image = XvCreateImage(display, context->port,
+					  FOURCC_XVMC,
+					  (char *)&intel_surf->data,
+					  surface->width, surface->height);
+	if (!intel_surf->image) {
+		XVMC_ERR("Can't create XvImage for surface\n");
+		_xvmc_destroy_surface(display, surface);
+		intel_xvmc_free_surface(surface->surface_id);
+		return BadAlloc;
+	}
+	intel_surf->image->data = (char *)&intel_surf->data;
+
+	ret =
+	    (xvmc_driver->create_surface) (display, context, surface,
+					   priv_count, priv_data);
+	if (ret) {
+		XVMC_ERR("create surface failed\n");
+		return ret;
+	}
 
+	return Success;
+}
 
 /*
  * Function: XvMCDestroySurface
  */
-_X_EXPORT Status XvMCDestroySurface(Display *display, XvMCSurface *surface)
+_X_EXPORT Status XvMCDestroySurface(Display * display, XvMCSurface * surface)
 {
-    intel_xvmc_surface_ptr intel_surf;
+	intel_xvmc_surface_ptr intel_surf;
 
-    if (!display || !surface)
-        return XvMCBadSurface;
+	if (!display || !surface)
+		return XvMCBadSurface;
 
-    intel_surf = intel_xvmc_find_surface(surface->surface_id);
-    if (!intel_surf)
-	return XvMCBadSurface;
+	intel_surf = intel_xvmc_find_surface(surface->surface_id);
+	if (!intel_surf)
+		return XvMCBadSurface;
 
-    XFree(intel_surf->image);
-    if (intel_surf->gc_init)
-	XFreeGC(display, intel_surf->gc);
-    intel_xvmc_free_surface(surface->surface_id);
+	XFree(intel_surf->image);
+	if (intel_surf->gc_init)
+		XFreeGC(display, intel_surf->gc);
+	intel_xvmc_free_surface(surface->surface_id);
 
-    (xvmc_driver->destroy_surface)(display, surface);
+	(xvmc_driver->destroy_surface) (display, surface);
 
-    _xvmc_destroy_surface(display, surface);
+	_xvmc_destroy_surface(display, surface);
 
-    return Success;
+	return Success;
 }
 
 /*
  * Function: XvMCCreateBlocks
  */
-_X_EXPORT Status XvMCCreateBlocks(Display *display, XvMCContext *context,
-                        unsigned int num_blocks,
-                        XvMCBlockArray *block)
+_X_EXPORT Status XvMCCreateBlocks(Display * display, XvMCContext * context,
+				  unsigned int num_blocks,
+				  XvMCBlockArray * block)
 {
-    Status ret;
-    if (!display || !context || !num_blocks || !block)
-        return BadValue;
+	Status ret;
+	if (!display || !context || !num_blocks || !block)
+		return BadValue;
 
-    memset(block, 0, sizeof(XvMCBlockArray));
+	memset(block, 0, sizeof(XvMCBlockArray));
 
-    if (!(block->blocks = (short *)malloc((num_blocks << 6) * sizeof(short))))
-        return BadAlloc;
+	if (!
+	    (block->blocks =
+	     (short *)malloc((num_blocks << 6) * sizeof(short))))
+		return BadAlloc;
 
-    block->num_blocks = num_blocks;
-    block->context_id = context->context_id;
-    block->privData = NULL;
+	block->num_blocks = num_blocks;
+	block->context_id = context->context_id;
+	block->privData = NULL;
 
-    return Success;
+	return Success;
 }
 
 /*
  * Function: XvMCDestroyBlocks
  */
-_X_EXPORT Status XvMCDestroyBlocks(Display *display, XvMCBlockArray *block)
+_X_EXPORT Status XvMCDestroyBlocks(Display * display, XvMCBlockArray * block)
 {
-    Status ret;
-    if (!display || !block)
-        return BadValue;
+	Status ret;
+	if (!display || !block)
+		return BadValue;
 
-    if (block->blocks)
-        free(block->blocks);
+	if (block->blocks)
+		free(block->blocks);
 
-    block->context_id = 0;
-    block->num_blocks = 0;
-    block->blocks = NULL;
-    block->privData = NULL;
+	block->context_id = 0;
+	block->num_blocks = 0;
+	block->blocks = NULL;
+	block->privData = NULL;
 
-    return Success;
+	return Success;
 }
 
 /*
  * Function: XvMCCreateMacroBlocks
  */
-_X_EXPORT Status XvMCCreateMacroBlocks(Display *display, XvMCContext *context,
-                             unsigned int num_blocks,
-                             XvMCMacroBlockArray *blocks)
+_X_EXPORT Status XvMCCreateMacroBlocks(Display * display, XvMCContext * context,
+				       unsigned int num_blocks,
+				       XvMCMacroBlockArray * blocks)
 {
-    if (!display || !context || !blocks || !num_blocks)
-        return BadValue;
+	if (!display || !context || !blocks || !num_blocks)
+		return BadValue;
 
-    memset(blocks, 0, sizeof(XvMCMacroBlockArray));
-    blocks->macro_blocks = (XvMCMacroBlock *)malloc(num_blocks * sizeof(XvMCMacroBlock));
+	memset(blocks, 0, sizeof(XvMCMacroBlockArray));
+	blocks->macro_blocks =
+	    (XvMCMacroBlock *) malloc(num_blocks * sizeof(XvMCMacroBlock));
 
-    if (!blocks->macro_blocks)
-        return BadAlloc;
+	if (!blocks->macro_blocks)
+		return BadAlloc;
 
-    blocks->num_blocks = num_blocks;
-    blocks->context_id = context->context_id;
-    blocks->privData = NULL;
+	blocks->num_blocks = num_blocks;
+	blocks->context_id = context->context_id;
+	blocks->privData = NULL;
 
-    return Success;
+	return Success;
 }
 
 /*
  * Function: XvMCDestroyMacroBlocks
  */
-_X_EXPORT Status XvMCDestroyMacroBlocks(Display *display, XvMCMacroBlockArray *block)
+_X_EXPORT Status XvMCDestroyMacroBlocks(Display * display,
+					XvMCMacroBlockArray * block)
 {
-    if (!display || !block)
-        return BadValue;
-    if (block->macro_blocks)
-        free(block->macro_blocks);
+	if (!display || !block)
+		return BadValue;
+	if (block->macro_blocks)
+		free(block->macro_blocks);
 
-    block->context_id = 0;
-    block->num_blocks = 0;
-    block->macro_blocks = NULL;
-    block->privData = NULL;
+	block->context_id = 0;
+	block->num_blocks = 0;
+	block->macro_blocks = NULL;
+	block->privData = NULL;
 
-    return Success;
+	return Success;
 }
 
 /*
@@ -647,40 +660,43 @@ _X_EXPORT Status XvMCDestroyMacroBlocks(Display *display, XvMCMacroBlockArray *b
  *  macroblock structures it dispatched the hardware commands to execute
  *  them.
  */
-_X_EXPORT Status XvMCRenderSurface(Display *display, XvMCContext *context,
-                         unsigned int picture_structure,
-                         XvMCSurface *target_surface,
-                         XvMCSurface *past_surface,
-                         XvMCSurface *future_surface,
-                         unsigned int flags,
-                         unsigned int num_macroblocks,
-                         unsigned int first_macroblock,
-                         XvMCMacroBlockArray *macroblock_array,
-                         XvMCBlockArray *blocks)
+_X_EXPORT Status XvMCRenderSurface(Display * display, XvMCContext * context,
+				   unsigned int picture_structure,
+				   XvMCSurface * target_surface,
+				   XvMCSurface * past_surface,
+				   XvMCSurface * future_surface,
+				   unsigned int flags,
+				   unsigned int num_macroblocks,
+				   unsigned int first_macroblock,
+				   XvMCMacroBlockArray * macroblock_array,
+				   XvMCBlockArray * blocks)
 {
-    Status ret;
-
-    if (!display || !context) {
-        XVMC_ERR("Invalid Display, Context or Target!");
-        return XvMCBadContext;
-    }
-    if (!target_surface)
-	return XvMCBadSurface;
-
-    intel_xvmc_dump_render(context, picture_structure, target_surface,
-	    past_surface, future_surface, flags, num_macroblocks,
-	    first_macroblock, macroblock_array, blocks);
-
-    ret = (xvmc_driver->render_surface)(display, context, picture_structure,
-	    target_surface, past_surface, future_surface, flags,
-	    num_macroblocks, first_macroblock, macroblock_array,
-	    blocks);
-
-    if (ret) {
-	XVMC_ERR("render surface fail\n");
-	return ret;
-    }
-    return Success;
+	Status ret;
+
+	if (!display || !context) {
+		XVMC_ERR("Invalid Display, Context or Target!");
+		return XvMCBadContext;
+	}
+	if (!target_surface)
+		return XvMCBadSurface;
+
+	intel_xvmc_dump_render(context, picture_structure, target_surface,
+			       past_surface, future_surface, flags,
+			       num_macroblocks, first_macroblock,
+			       macroblock_array, blocks);
+
+	ret =
+	    (xvmc_driver->render_surface) (display, context, picture_structure,
+					   target_surface, past_surface,
+					   future_surface, flags,
+					   num_macroblocks, first_macroblock,
+					   macroblock_array, blocks);
+
+	if (ret) {
+		XVMC_ERR("render surface fail\n");
+		return ret;
+	}
+	return Success;
 }
 
 /*
@@ -708,46 +724,47 @@ _X_EXPORT Status XvMCRenderSurface(Display *display, XvMCContext *context,
  *	XVMC_BOTTOM_FIELD - Display only the Bottom Field of the surface.
  *	XVMC_FRAME_PICTURE - Display both fields or frame.
  */
-_X_EXPORT Status XvMCPutSurface(Display *display,XvMCSurface *surface,
-                      Drawable draw, short srcx, short srcy,
-                      unsigned short srcw, unsigned short srch,
-                      short destx, short desty,
-                      unsigned short destw, unsigned short desth,
-                      int flags)
+_X_EXPORT Status XvMCPutSurface(Display * display, XvMCSurface * surface,
+				Drawable draw, short srcx, short srcy,
+				unsigned short srcw, unsigned short srch,
+				short destx, short desty,
+				unsigned short destw, unsigned short desth,
+				int flags)
 {
-    Status ret = Success;
-    XvMCContext *context;
-    intel_xvmc_context_ptr intel_ctx;
-    intel_xvmc_surface_ptr intel_surf;
-
-    if (!display || !surface)
-        return XvMCBadSurface;
-
-    intel_ctx = intel_xvmc_find_context(surface->context_id);
-    intel_surf = intel_xvmc_find_surface(surface->surface_id);
-    if (!intel_ctx || !intel_surf)
-	return XvMCBadSurface;
-    context = intel_ctx->context;
-
-    if (intel_surf->gc_init == FALSE) {
-	intel_surf->gc = XCreateGC(display, draw, 0, NULL);
-	intel_surf->gc_init = TRUE;
-    } else if (draw != intel_surf->last_draw) {
-	XFreeGC(display, intel_surf->gc);
-	intel_surf->gc = XCreateGC(display, draw, 0, NULL);
-    }
-    intel_surf->last_draw = draw;
-    /* fill intel_surf->data */
-    ret = (xvmc_driver->put_surface)(display, surface, draw, srcx, srcy,
-	    srcw, srch, destx, desty, destw, desth, flags, &intel_surf->data);
-    if (ret) {
-	XVMC_ERR("put surface fail\n");
+	Status ret = Success;
+	XvMCContext *context;
+	intel_xvmc_context_ptr intel_ctx;
+	intel_xvmc_surface_ptr intel_surf;
+
+	if (!display || !surface)
+		return XvMCBadSurface;
+
+	intel_ctx = intel_xvmc_find_context(surface->context_id);
+	intel_surf = intel_xvmc_find_surface(surface->surface_id);
+	if (!intel_ctx || !intel_surf)
+		return XvMCBadSurface;
+	context = intel_ctx->context;
+
+	if (intel_surf->gc_init == FALSE) {
+		intel_surf->gc = XCreateGC(display, draw, 0, NULL);
+		intel_surf->gc_init = TRUE;
+	} else if (draw != intel_surf->last_draw) {
+		XFreeGC(display, intel_surf->gc);
+		intel_surf->gc = XCreateGC(display, draw, 0, NULL);
+	}
+	intel_surf->last_draw = draw;
+	/* fill intel_surf->data */
+	ret = (xvmc_driver->put_surface) (display, surface, draw, srcx, srcy,
+					  srcw, srch, destx, desty, destw,
+					  desth, flags, &intel_surf->data);
+	if (ret) {
+		XVMC_ERR("put surface fail\n");
+		return ret;
+	}
+	ret = XvPutImage(display, context->port, draw, intel_surf->gc,
+			 intel_surf->image, srcx, srcy, srcw, srch, destx,
+			 desty, destw, desth);
 	return ret;
-    }
-    ret = XvPutImage(display, context->port, draw, intel_surf->gc,
-	    intel_surf->image, srcx, srcy, srcw, srch, destx, desty,
-	    destw, desth);
-    return ret;
 }
 
 /*
@@ -756,19 +773,19 @@ _X_EXPORT Status XvMCPutSurface(Display *display,XvMCSurface *surface,
  *   display - Connection to the X server
  *   surface - The surface to synchronize
  */
-_X_EXPORT Status XvMCSyncSurface(Display *display, XvMCSurface *surface)
+_X_EXPORT Status XvMCSyncSurface(Display * display, XvMCSurface * surface)
 {
-    Status ret;
-    int stat = 0;
+	Status ret;
+	int stat = 0;
 
-    if (!display || !surface)
-	return XvMCBadSurface;
+	if (!display || !surface)
+		return XvMCBadSurface;
 
-    do {
-        ret = XvMCGetSurfaceStatus(display, surface, &stat);
-    } while (!ret && (stat & XVMC_RENDERING));
+	do {
+		ret = XvMCGetSurfaceStatus(display, surface, &stat);
+	} while (!ret && (stat & XVMC_RENDERING));
 
-    return ret;
+	return ret;
 }
 
 /*
@@ -781,11 +798,11 @@ _X_EXPORT Status XvMCSyncSurface(Display *display, XvMCSurface *surface)
  *   surface - Surface to flush
  * Returns: Status
  */
-_X_EXPORT Status XvMCFlushSurface(Display * display, XvMCSurface *surface)
+_X_EXPORT Status XvMCFlushSurface(Display * display, XvMCSurface * surface)
 {
-    if (!display || !surface)
-	return XvMCBadSurface;
-    return Success;
+	if (!display || !surface)
+		return XvMCBadSurface;
+	return Success;
 }
 
 /*
@@ -800,20 +817,21 @@ _X_EXPORT Status XvMCFlushSurface(Display * display, XvMCSurface *surface)
  *    XVMC_DISPLAYING - The surface is currently being displayed or a
  *                     display is pending.
  */
-_X_EXPORT Status XvMCGetSurfaceStatus(Display *display, XvMCSurface *surface, int *stat)
+_X_EXPORT Status XvMCGetSurfaceStatus(Display * display, XvMCSurface * surface,
+				      int *stat)
 {
-    Status ret;
+	Status ret;
 
-    if (!display || !surface || !stat)
-        return XvMCBadSurface;
+	if (!display || !surface || !stat)
+		return XvMCBadSurface;
 
-    ret = (xvmc_driver->get_surface_status)(display, surface, stat);
-    if (ret) {
-	XVMC_ERR("get surface status fail\n");
-	return ret;
-    }
+	ret = (xvmc_driver->get_surface_status) (display, surface, stat);
+	if (ret) {
+		XVMC_ERR("get surface status fail\n");
+		return ret;
+	}
 
-    return Success;
+	return Success;
 }
 
 /*
@@ -825,29 +843,29 @@ _X_EXPORT Status XvMCGetSurfaceStatus(Display *display, XvMCSurface *surface, in
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCHideSurface(Display *display, XvMCSurface *surface)
+_X_EXPORT Status XvMCHideSurface(Display * display, XvMCSurface * surface)
 {
-    int stat = 0;
-    Status ret;
+	int stat = 0;
+	Status ret;
 
-    if (!display || !surface)
-        return XvMCBadSurface;
+	if (!display || !surface)
+		return XvMCBadSurface;
 
-    XvMCSyncSurface(display, surface);
+	XvMCSyncSurface(display, surface);
 
-    /*
-      Get the status of the surface, if it is not currently displayed
-      we don't need to worry about it.
-    */
-    if ((ret = XvMCGetSurfaceStatus(display, surface, &stat)) != Success)
-        return ret;
+	/*
+	   Get the status of the surface, if it is not currently displayed
+	   we don't need to worry about it.
+	 */
+	if ((ret = XvMCGetSurfaceStatus(display, surface, &stat)) != Success)
+		return ret;
 
-    if (!(stat & XVMC_DISPLAYING))
-        return Success;
+	if (!(stat & XVMC_DISPLAYING))
+		return Success;
 
-    /* FIXME: */
-    XVMC_ERR("XvMCHideSurface not implemented!\n");
-    return BadValue;
+	/* FIXME: */
+	XVMC_ERR("XvMCHideSurface not implemented!\n");
+	return BadValue;
 }
 
 /*
@@ -864,13 +882,13 @@ _X_EXPORT Status XvMCHideSurface(Display *display, XvMCSurface *surface)
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCCreateSubpicture(Display *display, XvMCContext *context,
-                            XvMCSubpicture *subpicture,
-                            unsigned short width, unsigned short height,
-                            int xvimage_id)
+_X_EXPORT Status XvMCCreateSubpicture(Display * display, XvMCContext * context,
+				      XvMCSubpicture * subpicture,
+				      unsigned short width,
+				      unsigned short height, int xvimage_id)
 {
-    XVMC_ERR("XvMCCreateSubpicture not implemented!\n");
-    return BadValue;
+	XVMC_ERR("XvMCCreateSubpicture not implemented!\n");
+	return BadValue;
 }
 
 /*
@@ -885,13 +903,13 @@ _X_EXPORT Status XvMCCreateSubpicture(Display *display, XvMCContext *context,
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCClearSubpicture(Display *display, XvMCSubpicture *subpicture,
-                           short x, short y,
-                           unsigned short width, unsigned short height,
-                           unsigned int color)
+_X_EXPORT Status XvMCClearSubpicture(Display * display,
+				     XvMCSubpicture * subpicture, short x,
+				     short y, unsigned short width,
+				     unsigned short height, unsigned int color)
 {
-    XVMC_ERR("XvMCClearSubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCClearSubpicture not implemented!");
+	return BadValue;
 }
 
 /*
@@ -909,17 +927,17 @@ _X_EXPORT Status XvMCClearSubpicture(Display *display, XvMCSubpicture *subpictur
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCCompositeSubpicture(Display *display, XvMCSubpicture *subpicture,
-                               XvImage *image,
-                               short srcx, short srcy,
-                               unsigned short width, unsigned short height,
-                               short dstx, short dsty)
+_X_EXPORT Status XvMCCompositeSubpicture(Display * display,
+					 XvMCSubpicture * subpicture,
+					 XvImage * image, short srcx,
+					 short srcy, unsigned short width,
+					 unsigned short height, short dstx,
+					 short dsty)
 {
-    XVMC_ERR("XvMCCompositeSubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCCompositeSubpicture not implemented!");
+	return BadValue;
 }
 
-
 /*
  * Function: XvMCDestroySubpicture
  * Description: Destroys the specified subpicture.
@@ -929,13 +947,13 @@ _X_EXPORT Status XvMCCompositeSubpicture(Display *display, XvMCSubpicture *subpi
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCDestroySubpicture(Display *display, XvMCSubpicture *subpicture)
+_X_EXPORT Status XvMCDestroySubpicture(Display * display,
+				       XvMCSubpicture * subpicture)
 {
-    XVMC_ERR("XvMCDestroySubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCDestroySubpicture not implemented!");
+	return BadValue;
 }
 
-
 /*
  * Function: XvMCSetSubpicturePalette
  * Description: Set the subpictures palette
@@ -946,11 +964,12 @@ _X_EXPORT Status XvMCDestroySubpicture(Display *display, XvMCSubpicture *subpict
  *     is num_palette_entries * entry_bytes in size.
  * Returns: Status
  */
-_X_EXPORT Status XvMCSetSubpicturePalette(Display *display, XvMCSubpicture *subpicture,
-                                unsigned char *palette)
+_X_EXPORT Status XvMCSetSubpicturePalette(Display * display,
+					  XvMCSubpicture * subpicture,
+					  unsigned char *palette)
 {
-    XVMC_ERR("XvMCSetSubpicturePalette not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCSetSubpicturePalette not implemented!");
+	return BadValue;
 }
 
 /*
@@ -976,15 +995,16 @@ _X_EXPORT Status XvMCSetSubpicturePalette(Display *display, XvMCSubpicture *subp
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCBlendSubpicture(Display *display, XvMCSurface *target_surface,
-                           XvMCSubpicture *subpicture,
-                           short subx, short suby,
-                           unsigned short subw, unsigned short subh,
-                           short surfx, short surfy,
-                           unsigned short surfw, unsigned short surfh)
+_X_EXPORT Status XvMCBlendSubpicture(Display * display,
+				     XvMCSurface * target_surface,
+				     XvMCSubpicture * subpicture, short subx,
+				     short suby, unsigned short subw,
+				     unsigned short subh, short surfx,
+				     short surfy, unsigned short surfw,
+				     unsigned short surfh)
 {
-    XVMC_ERR("XvMCBlendSubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCBlendSubpicture not implemented!");
+	return BadValue;
 }
 
 /*
@@ -1013,17 +1033,18 @@ _X_EXPORT Status XvMCBlendSubpicture(Display *display, XvMCSurface *target_surfa
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCBlendSubpicture2(Display *display,
-                            XvMCSurface *source_surface,
-                            XvMCSurface *target_surface,
-                            XvMCSubpicture *subpicture,
-                            short subx, short suby,
-                            unsigned short subw, unsigned short subh,
-                            short surfx, short surfy,
-                            unsigned short surfw, unsigned short surfh)
+_X_EXPORT Status XvMCBlendSubpicture2(Display * display,
+				      XvMCSurface * source_surface,
+				      XvMCSurface * target_surface,
+				      XvMCSubpicture * subpicture,
+				      short subx, short suby,
+				      unsigned short subw, unsigned short subh,
+				      short surfx, short surfy,
+				      unsigned short surfw,
+				      unsigned short surfh)
 {
-    XVMC_ERR("XvMCBlendSubpicture2 not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCBlendSubpicture2 not implemented!");
+	return BadValue;
 }
 
 /*
@@ -1036,10 +1057,11 @@ _X_EXPORT Status XvMCBlendSubpicture2(Display *display,
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCSyncSubpicture(Display *display, XvMCSubpicture *subpicture)
+_X_EXPORT Status XvMCSyncSubpicture(Display * display,
+				    XvMCSubpicture * subpicture)
 {
-    XVMC_ERR("XvMCSyncSubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCSyncSubpicture not implemented!");
+	return BadValue;
 }
 
 /*
@@ -1053,10 +1075,11 @@ _X_EXPORT Status XvMCSyncSubpicture(Display *display, XvMCSubpicture *subpicture
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCFlushSubpicture(Display *display, XvMCSubpicture *subpicture)
+_X_EXPORT Status XvMCFlushSubpicture(Display * display,
+				     XvMCSubpicture * subpicture)
 {
-    XVMC_ERR("XvMCFlushSubpicture not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCFlushSubpicture not implemented!");
+	return BadValue;
 }
 
 /*
@@ -1073,11 +1096,11 @@ _X_EXPORT Status XvMCFlushSubpicture(Display *display, XvMCSubpicture *subpictur
  *
  * Returns: Status
  */
-_X_EXPORT Status XvMCGetSubpictureStatus(Display *display, XvMCSubpicture *subpicture,
-                               int *stat)
+_X_EXPORT Status XvMCGetSubpictureStatus(Display * display,
+					 XvMCSubpicture * subpicture, int *stat)
 {
-    XVMC_ERR("XvMCGetSubpictureStatus not implemented!");
-    return BadValue;
+	XVMC_ERR("XvMCGetSubpictureStatus not implemented!");
+	return BadValue;
 }
 
 /*
@@ -1094,12 +1117,12 @@ _X_EXPORT Status XvMCGetSubpictureStatus(Display *display, XvMCSubpicture *subpi
  * Returns:
  *  An array of XvAttributes.
  */
-_X_EXPORT XvAttribute *XvMCQueryAttributes(Display *display, XvMCContext *context,
-                                 int *number)
+_X_EXPORT XvAttribute *XvMCQueryAttributes(Display * display,
+					   XvMCContext * context, int *number)
 {
-    /* now XvMC has no extra attribs than Xv */
-    *number = 0;
-    return NULL;
+	/* now XvMC has no extra attribs than Xv */
+	*number = 0;
+	return NULL;
 }
 
 /*
@@ -1115,10 +1138,10 @@ _X_EXPORT XvAttribute *XvMCQueryAttributes(Display *display, XvMCContext *contex
  * Returns:
  *  Status
  */
-_X_EXPORT Status XvMCSetAttribute(Display *display, XvMCContext *context,
-                        Atom attribute, int value)
+_X_EXPORT Status XvMCSetAttribute(Display * display, XvMCContext * context,
+				  Atom attribute, int value)
 {
-    return Success;
+	return Success;
 }
 
 /*
@@ -1135,52 +1158,53 @@ _X_EXPORT Status XvMCSetAttribute(Display *display, XvMCContext *context,
  * Returns:
  *  Status
  */
-_X_EXPORT Status XvMCGetAttribute(Display *display, XvMCContext *context,
-                        Atom attribute, int *value)
+_X_EXPORT Status XvMCGetAttribute(Display * display, XvMCContext * context,
+				  Atom attribute, int *value)
 {
-    return Success;
+	return Success;
 }
 
-_X_EXPORT Status XvMCBeginSurface(Display *display, XvMCContext *context,
-                         XvMCSurface *target,
-                         XvMCSurface *past,
-                         XvMCSurface *future,
-			 const XvMCMpegControl *control)
+_X_EXPORT Status XvMCBeginSurface(Display * display, XvMCContext * context,
+				  XvMCSurface * target,
+				  XvMCSurface * past,
+				  XvMCSurface * future,
+				  const XvMCMpegControl * control)
 {
-    if (xvmc_driver->begin_surface(display, context, 
-		target, past, future, control)) {
-	XVMC_ERR("BeginSurface fail\n");
-	return BadValue;
-    }
-    return Success;
+	if (xvmc_driver->begin_surface(display, context,
+				       target, past, future, control)) {
+		XVMC_ERR("BeginSurface fail\n");
+		return BadValue;
+	}
+	return Success;
 }
 
-_X_EXPORT Status XvMCLoadQMatrix(Display *display, XvMCContext *context,
-	const XvMCQMatrix *qmx)
+_X_EXPORT Status XvMCLoadQMatrix(Display * display, XvMCContext * context,
+				 const XvMCQMatrix * qmx)
 {
-    if (xvmc_driver->load_qmatrix(display, context, qmx)) {
-	XVMC_ERR("LoadQMatrix fail\n");
-	return BadValue;
-    }
-    return Success;
+	if (xvmc_driver->load_qmatrix(display, context, qmx)) {
+		XVMC_ERR("LoadQMatrix fail\n");
+		return BadValue;
+	}
+	return Success;
 }
 
-_X_EXPORT Status XvMCPutSlice(Display *display, XvMCContext *context,
-			char *slice, int nbytes)
+_X_EXPORT Status XvMCPutSlice(Display * display, XvMCContext * context,
+			      char *slice, int nbytes)
 {
-    if (xvmc_driver->put_slice(display, context, slice, nbytes)) {
-	XVMC_ERR("PutSlice fail\n");
-	return BadValue;
-    }
-    return Success;
+	if (xvmc_driver->put_slice(display, context, slice, nbytes)) {
+		XVMC_ERR("PutSlice fail\n");
+		return BadValue;
+	}
+	return Success;
 }
 
-_X_EXPORT Status XvMCPutSlice2(Display *display, XvMCContext *context,
-			char *slice, int nbytes, int slice_code)
+_X_EXPORT Status XvMCPutSlice2(Display * display, XvMCContext * context,
+			       char *slice, int nbytes, int slice_code)
 {
-    if (xvmc_driver->put_slice2(display, context, slice, nbytes, slice_code)) {
-	XVMC_ERR("PutSlice2 fail\n");
-	return BadValue;
-    }
-    return Success;
+	if (xvmc_driver->put_slice2
+	    (display, context, slice, nbytes, slice_code)) {
+		XVMC_ERR("PutSlice2 fail\n");
+		return BadValue;
+	}
+	return Success;
 }
diff --git a/src/xvmc/intel_xvmc.h b/src/xvmc/intel_xvmc.h
index 169e7f8d..67c7b380 100644
--- a/src/xvmc/intel_xvmc.h
+++ b/src/xvmc/intel_xvmc.h
@@ -83,131 +83,132 @@ extern int DEBUG;
   Definitions for temporary wire protocol hooks to be replaced
   when a HW independent libXvMC is created.
 */
-extern Status _xvmc_create_context(Display *dpy, XvMCContext *context,
-				   int *priv_count, CARD32 **priv_data);
+extern Status _xvmc_create_context(Display * dpy, XvMCContext * context,
+				   int *priv_count, CARD32 ** priv_data);
 
-extern Status _xvmc_destroy_context(Display *dpy, XvMCContext *context);
+extern Status _xvmc_destroy_context(Display * dpy, XvMCContext * context);
 
-extern Status _xvmc_create_surface(Display *dpy, XvMCContext *context,
-				   XvMCSurface *surface, int *priv_count,
-				   CARD32 **priv_data);
+extern Status _xvmc_create_surface(Display * dpy, XvMCContext * context,
+				   XvMCSurface * surface, int *priv_count,
+				   CARD32 ** priv_data);
 
-extern Status _xvmc_destroy_surface(Display *dpy, XvMCSurface *surface);
+extern Status _xvmc_destroy_surface(Display * dpy, XvMCSurface * surface);
 
-extern Status  _xvmc_create_subpicture(Display *dpy, XvMCContext *context,
-				       XvMCSubpicture *subpicture,
-				       int *priv_count, uint **priv_data);
+extern Status _xvmc_create_subpicture(Display * dpy, XvMCContext * context,
+				      XvMCSubpicture * subpicture,
+				      int *priv_count, uint ** priv_data);
 
-extern Status   _xvmc_destroy_subpicture(Display *dpy,
-					 XvMCSubpicture *subpicture);
+extern Status _xvmc_destroy_subpicture(Display * dpy,
+				       XvMCSubpicture * subpicture);
 
 typedef struct _intel_xvmc_context {
-    XvMCContext *context;
-    drm_context_t hw_context;	/* context id to kernel drm */
-    struct _intel_xvmc_context *next;
+	XvMCContext *context;
+	drm_context_t hw_context;	/* context id to kernel drm */
+	struct _intel_xvmc_context *next;
 } intel_xvmc_context_t, *intel_xvmc_context_ptr;
 
 typedef struct _intel_xvmc_surface {
-    XvMCSurface *surface;
-    XvImage *image;
-    GC gc;
-    Bool gc_init;
-    Drawable last_draw;
-    struct intel_xvmc_command data;
-    struct _intel_xvmc_surface *next;
+	XvMCSurface *surface;
+	XvImage *image;
+	GC gc;
+	Bool gc_init;
+	Drawable last_draw;
+	struct intel_xvmc_command data;
+	struct _intel_xvmc_surface *next;
 } intel_xvmc_surface_t, *intel_xvmc_surface_ptr;
 
 typedef struct _intel_xvmc_drm_map {
-    drm_handle_t handle;
-    unsigned long offset;
-    unsigned long size;
-    unsigned long bus_addr;
-    drmAddress map;
+	drm_handle_t handle;
+	unsigned long offset;
+	unsigned long size;
+	unsigned long bus_addr;
+	drmAddress map;
 } intel_xvmc_drm_map_t, *intel_xvmc_drm_map_ptr;
 
 typedef struct _intel_xvmc_driver {
-    int type;			/* hw xvmc type - i830_hwmc.h */
-    int screen;			/* current screen num*/
-
-    int fd;			/* drm file handler */
-
-    dri_bufmgr      *bufmgr;
-    unsigned int kernel_exec_fencing:1;
-
-    struct {
-	unsigned int init_offset;
-	unsigned int size;
-	unsigned int space;
-	unsigned char *ptr;
-	unsigned char *init_ptr;
-	dri_bo *buf;
-    } batch;
-
-    struct
-    {
-        void *ptr;
-        unsigned int size;
-        unsigned int offset;
-        unsigned int active_buf;
-        unsigned int irq_emitted;
-    } alloc;
-    intel_xvmc_drm_map_t batchbuffer;
-    unsigned int last_render;
-
-    sigset_t sa_mask;
-    pthread_mutex_t ctxmutex;
-    int locked;
-
-    int num_ctx;
-    intel_xvmc_context_ptr ctx_list;
-    int num_surf;
-    intel_xvmc_surface_ptr surf_list;
-
-    void *private;
-
-    /* driver specific xvmc callbacks */
-    Status (*create_context)(Display* display, XvMCContext *context,
-	    int priv_count, CARD32 *priv_data);
-
-    Status (*destroy_context)(Display* display, XvMCContext *context);
-
-    Status (*create_surface)(Display* display, XvMCContext *context,
-	    XvMCSurface *surface, int priv_count, CARD32 *priv_data);
-
-    Status (*destroy_surface)(Display* display, XvMCSurface *surface);
-
-    Status (*render_surface)(Display *display, XvMCContext *context,
-	    unsigned int picture_structure,
-	    XvMCSurface *target_surface,
-	    XvMCSurface *past_surface,
-	    XvMCSurface *future_surface,
-	    unsigned int flags,
-	    unsigned int num_macroblocks,
-	    unsigned int first_macroblock,
-	    XvMCMacroBlockArray *macroblock_array,
-	    XvMCBlockArray *blocks);
-
-    Status (*put_surface)(Display *display, XvMCSurface *surface,
-	    Drawable draw, short srcx, short srcy,
-	    unsigned short srcw, unsigned short srch,
-	    short destx, short desty,
-	    unsigned short destw, unsigned short desth,
-	    int flags, struct intel_xvmc_command *data);
-
-    Status (*get_surface_status)(Display *display, XvMCSurface *surface, int *stat);
-
-    Status (*begin_surface)(Display *display, XvMCContext *context,
-	    XvMCSurface *target_surface,
-	    XvMCSurface *past_surface,
-	    XvMCSurface *future_surface,
-	    const XvMCMpegControl *control);
-    Status (*load_qmatrix)(Display *display, XvMCContext *context,
-	    	const XvMCQMatrix *qmx);
-    Status (*put_slice)(Display *display, XvMCContext *context,
-	    	unsigned char *slice, int bytes);
-    Status (*put_slice2)(Display *display, XvMCContext *context,
-	    	unsigned char *slice, int bytes, int slice_code);
-    
+	int type;		/* hw xvmc type - i830_hwmc.h */
+	int screen;		/* current screen num */
+
+	int fd;			/* drm file handler */
+
+	dri_bufmgr *bufmgr;
+	unsigned int kernel_exec_fencing:1;
+
+	struct {
+		unsigned int init_offset;
+		unsigned int size;
+		unsigned int space;
+		unsigned char *ptr;
+		unsigned char *init_ptr;
+		dri_bo *buf;
+	} batch;
+
+	struct {
+		void *ptr;
+		unsigned int size;
+		unsigned int offset;
+		unsigned int active_buf;
+		unsigned int irq_emitted;
+	} alloc;
+	intel_xvmc_drm_map_t batchbuffer;
+	unsigned int last_render;
+
+	sigset_t sa_mask;
+	pthread_mutex_t ctxmutex;
+	int locked;
+
+	int num_ctx;
+	intel_xvmc_context_ptr ctx_list;
+	int num_surf;
+	intel_xvmc_surface_ptr surf_list;
+
+	void *private;
+
+	/* driver specific xvmc callbacks */
+	 Status(*create_context) (Display * display, XvMCContext * context,
+				  int priv_count, CARD32 * priv_data);
+
+	 Status(*destroy_context) (Display * display, XvMCContext * context);
+
+	 Status(*create_surface) (Display * display, XvMCContext * context,
+				  XvMCSurface * surface, int priv_count,
+				  CARD32 * priv_data);
+
+	 Status(*destroy_surface) (Display * display, XvMCSurface * surface);
+
+	 Status(*render_surface) (Display * display, XvMCContext * context,
+				  unsigned int picture_structure,
+				  XvMCSurface * target_surface,
+				  XvMCSurface * past_surface,
+				  XvMCSurface * future_surface,
+				  unsigned int flags,
+				  unsigned int num_macroblocks,
+				  unsigned int first_macroblock,
+				  XvMCMacroBlockArray * macroblock_array,
+				  XvMCBlockArray * blocks);
+
+	 Status(*put_surface) (Display * display, XvMCSurface * surface,
+			       Drawable draw, short srcx, short srcy,
+			       unsigned short srcw, unsigned short srch,
+			       short destx, short desty,
+			       unsigned short destw, unsigned short desth,
+			       int flags, struct intel_xvmc_command * data);
+
+	 Status(*get_surface_status) (Display * display, XvMCSurface * surface,
+				      int *stat);
+
+	 Status(*begin_surface) (Display * display, XvMCContext * context,
+				 XvMCSurface * target_surface,
+				 XvMCSurface * past_surface,
+				 XvMCSurface * future_surface,
+				 const XvMCMpegControl * control);
+	 Status(*load_qmatrix) (Display * display, XvMCContext * context,
+				const XvMCQMatrix * qmx);
+	 Status(*put_slice) (Display * display, XvMCContext * context,
+			     unsigned char *slice, int bytes);
+	 Status(*put_slice2) (Display * display, XvMCContext * context,
+			      unsigned char *slice, int bytes, int slice_code);
+
 } intel_xvmc_driver_t, *intel_xvmc_driver_ptr;
 
 extern struct _intel_xvmc_driver i915_xvmc_mc_driver;
@@ -243,20 +244,20 @@ extern struct _intel_xvmc_driver *xvmc_driver;
 extern void LOCK_HARDWARE(drm_context_t);
 extern void UNLOCK_HARDWARE(drm_context_t);
 
-static inline const char* intel_xvmc_decoder_string(int flag)
+static inline const char *intel_xvmc_decoder_string(int flag)
 {
-    switch (flag) {
+	switch (flag) {
 	case XVMC_I915_MPEG2_MC:
-	    return "i915/945 MPEG2 MC decoder";
+		return "i915/945 MPEG2 MC decoder";
 	case XVMC_I965_MPEG2_MC:
-	    return "i965 MPEG2 MC decoder";
+		return "i965 MPEG2 MC decoder";
 	case XVMC_I945_MPEG2_VLD:
-	    return "i945 MPEG2 VLD decoder";
+		return "i945 MPEG2 VLD decoder";
 	case XVMC_I965_MPEG2_VLD:
-	    return "i965 MPEG2 VLD decoder";
+		return "i965 MPEG2 VLD decoder";
 	default:
-	    return "Unknown decoder";
-    }
+		return "Unknown decoder";
+	}
 }
 
 extern intel_xvmc_context_ptr intel_xvmc_find_context(XID id);
@@ -267,12 +268,16 @@ extern unsigned int mb_bytes_420[64];
 /* dump function */
 extern void intel_xvmc_dump_open(void);
 extern void intel_xvmc_dump_close(void);
-extern void intel_xvmc_dump_render(XvMCContext *context, unsigned int picture_structure,
-	    XvMCSurface *target_surface, XvMCSurface *past_surface,
-	    XvMCSurface *future_surface, unsigned int flags,
-	    unsigned int num_macroblocks, unsigned int first_macroblock,
-	    XvMCMacroBlockArray *macroblock_array, XvMCBlockArray *blocks);
-
+extern void intel_xvmc_dump_render(XvMCContext * context,
+				   unsigned int picture_structure,
+				   XvMCSurface * target_surface,
+				   XvMCSurface * past_surface,
+				   XvMCSurface * future_surface,
+				   unsigned int flags,
+				   unsigned int num_macroblocks,
+				   unsigned int first_macroblock,
+				   XvMCMacroBlockArray * macroblock_array,
+				   XvMCBlockArray * blocks);
 
 #define	VFE_GENERIC_MODE	0x0
 #define	VFE_VLD_MODE		0x1
diff --git a/src/xvmc/intel_xvmc_dump.c b/src/xvmc/intel_xvmc_dump.c
index 419bd0d8..015d4828 100644
--- a/src/xvmc/intel_xvmc_dump.c
+++ b/src/xvmc/intel_xvmc_dump.c
@@ -33,117 +33,126 @@ static FILE *fp = NULL;
 
 void intel_xvmc_dump_open(void)
 {
-    char *d  = NULL;
+	char *d = NULL;
 
-    if (xvmc_dump)
-	return;
+	if (xvmc_dump)
+		return;
 
-    if (d = getenv("INTEL_XVMC_DUMP"))
-	xvmc_dump = 1;
+	if (d = getenv("INTEL_XVMC_DUMP"))
+		xvmc_dump = 1;
 
-    if (xvmc_dump) {
-	fp = fopen(DUMPFILE, "a");
-	if (!fp)
-	    xvmc_dump = 0;
-    }
+	if (xvmc_dump) {
+		fp = fopen(DUMPFILE, "a");
+		if (!fp)
+			xvmc_dump = 0;
+	}
 }
 
 void intel_xvmc_dump_close(void)
 {
-    if (xvmc_dump) {
-	fclose(fp);
-	xvmc_dump = 0;
-    }
+	if (xvmc_dump) {
+		fclose(fp);
+		xvmc_dump = 0;
+	}
 }
 
-void intel_xvmc_dump_render(XvMCContext *context, unsigned int picture_structure,
-	XvMCSurface *target, XvMCSurface *past, XvMCSurface *future, unsigned int flags,
-	unsigned int num_macroblocks, unsigned int first_macroblock,
-	XvMCMacroBlockArray *macroblock_array, XvMCBlockArray *blocks)
+void intel_xvmc_dump_render(XvMCContext * context,
+			    unsigned int picture_structure,
+			    XvMCSurface * target, XvMCSurface * past,
+			    XvMCSurface * future, unsigned int flags,
+			    unsigned int num_macroblocks,
+			    unsigned int first_macroblock,
+			    XvMCMacroBlockArray * macroblock_array,
+			    XvMCBlockArray * blocks)
 {
-    int i;
-    XvMCMacroBlock *mb;
-
-    if (!xvmc_dump)
-	return;
-
-    fprintf(fp, "========== new surface rendering ==========\n");
-    fprintf(fp, "Context (id:%d) (surface_type_id:%d) (width:%d) (height:%d)\n",
-	    context->context_id, context->surface_type_id, context->width, context->height);
-
-    if (picture_structure == XVMC_FRAME_PICTURE)
-	fprintf(fp, "picture structure: frame picture\n");
-    else if (picture_structure == XVMC_TOP_FIELD)
-	fprintf(fp, "picture structure: top field picture (%s)\n",
-		(flags == XVMC_SECOND_FIELD)?"second":"first");
-    else if (picture_structure == XVMC_BOTTOM_FIELD)
-	fprintf(fp, "picture structure: bottom field picture (%s)\n",
-		(flags == XVMC_SECOND_FIELD)?"second":"first");
-
-    if (!past && !future)
-	fprintf(fp, "picture type: I\n");
-    else if (past && !future)
-	fprintf(fp, "picture type: P\n");
-    else if (past && future)
-	fprintf(fp, "picture type: B\n");
-    else
-	fprintf(fp, "picture type: Bad!\n");
-
-    fprintf(fp, "target picture: id (%d) width (%d) height (%d)\n", target->surface_id,
-	    target->width, target->height);
-    if (past)
-	fprintf(fp, "past picture: id (%d) width (%d) height (%d)\n", past->surface_id,
-		past->width, past->height);
-    if (future)
-	fprintf(fp, "future picture: id (%d) width (%d) height (%d)\n", future->surface_id,
-		future->width, future->height);
-
-    fprintf(fp, "num macroblocks: %d, first macroblocks %d\n", num_macroblocks, first_macroblock);
-
-    for (i = first_macroblock; i < (first_macroblock + num_macroblocks); i++) {
-	mb = &macroblock_array->macro_blocks[i];
-
-	fprintf(fp, "- MB(%d): ", i);
-	fprintf(fp, "x (%d) y (%d)  ", mb->x, mb->y);
-	fprintf(fp, "macroblock type (");
-	if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)
-	    fprintf(fp, "motion_forward ");
-	if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)
-	    fprintf(fp, "motion_backward ");
-	if (mb->macroblock_type & XVMC_MB_TYPE_PATTERN)
-	    fprintf(fp, "pattern ");
-	if (mb->macroblock_type & XVMC_MB_TYPE_INTRA)
-	    fprintf(fp, "intra ");
-	fprintf(fp, ")  ");
-	fprintf(fp, "mc type ");
-	if (picture_structure == XVMC_FRAME_PICTURE) {
-	    if (mb->motion_type & XVMC_PREDICTION_FIELD)
-		fprintf(fp, "(field)  ");
-	    else if (mb->motion_type & XVMC_PREDICTION_FRAME)
-		fprintf(fp, "(frame)  ");
-	    else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME)
-		fprintf(fp, "(dual-prime)  ");
-	    else
-		fprintf(fp, "(unknown %d)  ", mb->motion_type);
-	} else { /* field */
-	    if (mb->motion_type & XVMC_PREDICTION_FIELD)
-		fprintf(fp, "(field)  ");
-	    else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME)
-		fprintf(fp, "(dual-prime)  ");
-	    else if (mb->motion_type & XVMC_PREDICTION_16x8)
-		fprintf(fp, "(16x8)  ");
-	    else
-		fprintf(fp, "(unknown %d)  ", mb->motion_type);
+	int i;
+	XvMCMacroBlock *mb;
+
+	if (!xvmc_dump)
+		return;
+
+	fprintf(fp, "========== new surface rendering ==========\n");
+	fprintf(fp,
+		"Context (id:%d) (surface_type_id:%d) (width:%d) (height:%d)\n",
+		context->context_id, context->surface_type_id, context->width,
+		context->height);
+
+	if (picture_structure == XVMC_FRAME_PICTURE)
+		fprintf(fp, "picture structure: frame picture\n");
+	else if (picture_structure == XVMC_TOP_FIELD)
+		fprintf(fp, "picture structure: top field picture (%s)\n",
+			(flags == XVMC_SECOND_FIELD) ? "second" : "first");
+	else if (picture_structure == XVMC_BOTTOM_FIELD)
+		fprintf(fp, "picture structure: bottom field picture (%s)\n",
+			(flags == XVMC_SECOND_FIELD) ? "second" : "first");
+
+	if (!past && !future)
+		fprintf(fp, "picture type: I\n");
+	else if (past && !future)
+		fprintf(fp, "picture type: P\n");
+	else if (past && future)
+		fprintf(fp, "picture type: B\n");
+	else
+		fprintf(fp, "picture type: Bad!\n");
+
+	fprintf(fp, "target picture: id (%d) width (%d) height (%d)\n",
+		target->surface_id, target->width, target->height);
+	if (past)
+		fprintf(fp, "past picture: id (%d) width (%d) height (%d)\n",
+			past->surface_id, past->width, past->height);
+	if (future)
+		fprintf(fp, "future picture: id (%d) width (%d) height (%d)\n",
+			future->surface_id, future->width, future->height);
+
+	fprintf(fp, "num macroblocks: %d, first macroblocks %d\n",
+		num_macroblocks, first_macroblock);
+
+	for (i = first_macroblock; i < (first_macroblock + num_macroblocks);
+	     i++) {
+		mb = &macroblock_array->macro_blocks[i];
+
+		fprintf(fp, "- MB(%d): ", i);
+		fprintf(fp, "x (%d) y (%d)  ", mb->x, mb->y);
+		fprintf(fp, "macroblock type (");
+		if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)
+			fprintf(fp, "motion_forward ");
+		if (mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)
+			fprintf(fp, "motion_backward ");
+		if (mb->macroblock_type & XVMC_MB_TYPE_PATTERN)
+			fprintf(fp, "pattern ");
+		if (mb->macroblock_type & XVMC_MB_TYPE_INTRA)
+			fprintf(fp, "intra ");
+		fprintf(fp, ")  ");
+		fprintf(fp, "mc type ");
+		if (picture_structure == XVMC_FRAME_PICTURE) {
+			if (mb->motion_type & XVMC_PREDICTION_FIELD)
+				fprintf(fp, "(field)  ");
+			else if (mb->motion_type & XVMC_PREDICTION_FRAME)
+				fprintf(fp, "(frame)  ");
+			else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME)
+				fprintf(fp, "(dual-prime)  ");
+			else
+				fprintf(fp, "(unknown %d)  ", mb->motion_type);
+		} else {	/* field */
+			if (mb->motion_type & XVMC_PREDICTION_FIELD)
+				fprintf(fp, "(field)  ");
+			else if (mb->motion_type & XVMC_PREDICTION_DUAL_PRIME)
+				fprintf(fp, "(dual-prime)  ");
+			else if (mb->motion_type & XVMC_PREDICTION_16x8)
+				fprintf(fp, "(16x8)  ");
+			else
+				fprintf(fp, "(unknown %d)  ", mb->motion_type);
+		}
+
+		if (mb->dct_type == XVMC_DCT_TYPE_FRAME)
+			fprintf(fp, "dct type (frame)  ");
+		else if (mb->dct_type == XVMC_DCT_TYPE_FIELD)
+			fprintf(fp, "dct type (field)  ");
+
+		fprintf(fp, "coded_block_pattern (0x%x)\n",
+			mb->coded_block_pattern);
+
+		/* XXX mv dump */
 	}
 
-	if (mb->dct_type == XVMC_DCT_TYPE_FRAME)
-	    fprintf(fp, "dct type (frame)  ");
-	else if (mb->dct_type == XVMC_DCT_TYPE_FIELD)
-	    fprintf(fp, "dct type (field)  ");
-
-	fprintf(fp, "coded_block_pattern (0x%x)\n", mb->coded_block_pattern);
-
-	/* XXX mv dump */
-    }
-
 }
diff --git a/src/xvmc/xvmc_vld.c b/src/xvmc/xvmc_vld.c
index d964fc1b..dca05737 100644
--- a/src/xvmc/xvmc_vld.c
+++ b/src/xvmc/xvmc_vld.c
@@ -47,246 +47,307 @@
 #define C6 8867
 #define C7 4520
 const uint32_t idct_table[] = {
-    C4, C1, C2, C3, C4, C5, C6, C7,    		//g5
-    C4, C1, C2, C3, C4, C5, C6, C7,
-    C4, C3, C6,-C7,-C4,-C1,-C2,-C5,    
-    C4, C3, C6,-C7,-C4,-C1,-C2,-C5,
-    C4, C5,-C6,-C1,-C4, C7, C2, C3,
-    C4, C5,-C6,-C1,-C4, C7, C2, C3,
-    C4, C7,-C2,-C5, C4, C3,-C6,-C1,
-    C4, C7,-C2,-C5, C4, C3,-C6,-C1,
-    C4,-C7,-C2, C5, C4,-C3,-C6, C1,
-    C4,-C7,-C2, C5, C4,-C3,-C6, C1,
-    C4,-C5,-C6, C1,-C4,-C7, C2,-C3,
-    C4,-C5,-C6, C1,-C4,-C7, C2,-C3,
-    C4,-C3, C6, C7,-C4, C1,-C2, C5,
-    C4,-C3, C6, C7,-C4, C1,-C2, C5,
-    C4,-C1, C2,-C3, C4,-C5, C6,-C7,
-    C4,-C1, C2,-C3, C4,-C5, C6,-C7		//g20
+	C4, C1, C2, C3, C4, C5, C6, C7,	//g5
+	C4, C1, C2, C3, C4, C5, C6, C7,
+	C4, C3, C6, -C7, -C4, -C1, -C2, -C5,
+	C4, C3, C6, -C7, -C4, -C1, -C2, -C5,
+	C4, C5, -C6, -C1, -C4, C7, C2, C3,
+	C4, C5, -C6, -C1, -C4, C7, C2, C3,
+	C4, C7, -C2, -C5, C4, C3, -C6, -C1,
+	C4, C7, -C2, -C5, C4, C3, -C6, -C1,
+	C4, -C7, -C2, C5, C4, -C3, -C6, C1,
+	C4, -C7, -C2, C5, C4, -C3, -C6, C1,
+	C4, -C5, -C6, C1, -C4, -C7, C2, -C3,
+	C4, -C5, -C6, C1, -C4, -C7, C2, -C3,
+	C4, -C3, C6, C7, -C4, C1, -C2, C5,
+	C4, -C3, C6, C7, -C4, C1, -C2, C5,
+	C4, -C1, C2, -C3, C4, -C5, C6, -C7,
+	C4, -C1, C2, -C3, C4, -C5, C6, -C7	//g20
 };
-#undef C0 
-#undef C1 
-#undef C2 
-#undef C3 
-#undef C4 
-#undef C5 
-#undef C6 
-#undef C7 
+
+#undef C0
+#undef C1
+#undef C2
+#undef C3
+#undef C4
+#undef C5
+#undef C6
+#undef C7
 
 #define INTERFACE_NUM	8
 enum interface {
-    FRAME_INTRA = 0,
+	FRAME_INTRA = 0,
 	FRAME_FRAME_PRED_FORWARD,
 	FRAME_FRAME_PRED_BACKWARD,
 	FRAME_FRAME_PRED_BIDIRECT,
 	FRAME_FIELD_PRED_FORWARD,
 	FRAME_FIELD_PRED_BACKWARD,
 	FRAME_FIELD_PRED_BIDIRECT,
-    LIB_INTERFACE
+	LIB_INTERFACE
 };
 
 /*kernels for vld mode*/
 static uint32_t lib_kernel[][4] = {
-   #include "shader/vld/lib.g4b"
+#include "shader/vld/lib.g4b"
 };
+
 static uint32_t ipicture_kernel[][4] = {
-   #include "shader/vld/ipicture.g4b"
+#include "shader/vld/ipicture.g4b"
 };
+
 static uint32_t frame_forward_kernel[][4] = {
-   #include "shader/vld/frame_forward.g4b"
+#include "shader/vld/frame_forward.g4b"
 };
+
 static uint32_t frame_backward_kernel[][4] = {
-   #include "shader/vld/frame_backward.g4b"
+#include "shader/vld/frame_backward.g4b"
 };
+
 static uint32_t frame_f_b_kernel[][4] = {
-   #include "shader/vld/frame_f_b.g4b"
+#include "shader/vld/frame_f_b.g4b"
 };
+
 static uint32_t field_forward_kernel[][4] = {
-   #include "shader/vld/field_forward.g4b"
+#include "shader/vld/field_forward.g4b"
 };
+
 static uint32_t field_backward_kernel[][4] = {
-   #include "shader/vld/field_backward.g4b"
+#include "shader/vld/field_backward.g4b"
 };
+
 static uint32_t field_f_b_kernel[][4] = {
-   #include "shader/vld/field_f_b.g4b"
+#include "shader/vld/field_f_b.g4b"
 };
 
 /* on IGDNG */
 static uint32_t lib_kernel_gen5[][4] = {
-   #include "shader/vld/lib.g4b.gen5"
+#include "shader/vld/lib.g4b.gen5"
 };
+
 static uint32_t ipicture_kernel_gen5[][4] = {
-   #include "shader/vld/ipicture.g4b.gen5"
+#include "shader/vld/ipicture.g4b.gen5"
 };
+
 static uint32_t frame_forward_kernel_gen5[][4] = {
-   #include "shader/vld/frame_forward.g4b.gen5"
+#include "shader/vld/frame_forward.g4b.gen5"
 };
+
 static uint32_t frame_backward_kernel_gen5[][4] = {
-   #include "shader/vld/frame_backward.g4b.gen5"
+#include "shader/vld/frame_backward.g4b.gen5"
 };
+
 static uint32_t frame_f_b_kernel_gen5[][4] = {
-   #include "shader/vld/frame_f_b.g4b.gen5"
+#include "shader/vld/frame_f_b.g4b.gen5"
 };
+
 static uint32_t field_forward_kernel_gen5[][4] = {
-   #include "shader/vld/field_forward.g4b.gen5"
+#include "shader/vld/field_forward.g4b.gen5"
 };
+
 static uint32_t field_backward_kernel_gen5[][4] = {
-   #include "shader/vld/field_backward.g4b.gen5"
+#include "shader/vld/field_backward.g4b.gen5"
 };
+
 static uint32_t field_f_b_kernel_gen5[][4] = {
-   #include "shader/vld/field_f_b.g4b.gen5"
+#include "shader/vld/field_f_b.g4b.gen5"
 };
 
 /*kernels for mc mode*/
 static uint32_t lib_kernel_idct[][4] = {
-   #include "shader/mc/lib_igd.g4b"
+#include "shader/mc/lib_igd.g4b"
 };
+
 static uint32_t ipicture_kernel_idct[][4] = {
-   #include "shader/mc/ipicture_igd.g4b"
+#include "shader/mc/ipicture_igd.g4b"
 };
+
 static uint32_t frame_forward_kernel_idct[][4] = {
-   #include "shader/mc/frame_forward_igd.g4b"
+#include "shader/mc/frame_forward_igd.g4b"
 };
+
 static uint32_t frame_backward_kernel_idct[][4] = {
-   #include "shader/mc/frame_backward_igd.g4b"
+#include "shader/mc/frame_backward_igd.g4b"
 };
+
 static uint32_t frame_f_b_kernel_idct[][4] = {
-   #include "shader/mc/frame_f_b_igd.g4b"
+#include "shader/mc/frame_f_b_igd.g4b"
 };
+
 static uint32_t field_forward_kernel_idct[][4] = {
-   #include "shader/mc/field_forward_igd.g4b"
+#include "shader/mc/field_forward_igd.g4b"
 };
+
 static uint32_t field_backward_kernel_idct[][4] = {
-   #include "shader/mc/field_backward_igd.g4b"
+#include "shader/mc/field_backward_igd.g4b"
 };
+
 static uint32_t field_f_b_kernel_idct[][4] = {
-   #include "shader/mc/field_f_b_igd.g4b"
+#include "shader/mc/field_f_b_igd.g4b"
 };
 
 /* on IGDNG */
 static uint32_t lib_kernel_idct_gen5[][4] = {
-   #include "shader/mc/lib_igd.g4b.gen5"
+#include "shader/mc/lib_igd.g4b.gen5"
 };
+
 static uint32_t ipicture_kernel_idct_gen5[][4] = {
-   #include "shader/mc/ipicture_igd.g4b.gen5"
+#include "shader/mc/ipicture_igd.g4b.gen5"
 };
+
 static uint32_t frame_forward_kernel_idct_gen5[][4] = {
-   #include "shader/mc/frame_forward_igd.g4b.gen5"
+#include "shader/mc/frame_forward_igd.g4b.gen5"
 };
+
 static uint32_t frame_backward_kernel_idct_gen5[][4] = {
-   #include "shader/mc/frame_backward_igd.g4b.gen5"
+#include "shader/mc/frame_backward_igd.g4b.gen5"
 };
+
 static uint32_t frame_f_b_kernel_idct_gen5[][4] = {
-   #include "shader/mc/frame_f_b_igd.g4b.gen5"
+#include "shader/mc/frame_f_b_igd.g4b.gen5"
 };
+
 static uint32_t field_forward_kernel_idct_gen5[][4] = {
-   #include "shader/mc/field_forward_igd.g4b.gen5"
+#include "shader/mc/field_forward_igd.g4b.gen5"
 };
+
 static uint32_t field_backward_kernel_idct_gen5[][4] = {
-   #include "shader/mc/field_backward_igd.g4b.gen5"
+#include "shader/mc/field_backward_igd.g4b.gen5"
 };
+
 static uint32_t field_f_b_kernel_idct_gen5[][4] = {
-   #include "shader/mc/field_f_b_igd.g4b.gen5"
+#include "shader/mc/field_f_b_igd.g4b.gen5"
 };
 
 struct media_kernel {
-   uint32_t (*bin)[4];
-   int size;
+	uint32_t(*bin)[4];
+	int size;
 };
 static struct media_kernel media_kernels[] = {
-	/*kernels for vld mode*/
-    {ipicture_kernel, sizeof(ipicture_kernel)},
-    {frame_forward_kernel, sizeof(frame_forward_kernel)},
-    {frame_backward_kernel, sizeof(frame_backward_kernel)},
-    {frame_f_b_kernel, sizeof(frame_f_b_kernel)},
-    {field_forward_kernel, sizeof(field_forward_kernel)},
-    {field_backward_kernel, sizeof(field_backward_kernel)},
-    {field_f_b_kernel, sizeof(field_f_b_kernel)},
-    {lib_kernel, sizeof(lib_kernel)},
-	/*kernels for mc mode*/
-    {ipicture_kernel_idct, sizeof(ipicture_kernel_idct)},
-    {frame_forward_kernel_idct, sizeof(frame_forward_kernel_idct)},
-    {frame_backward_kernel_idct, sizeof(frame_backward_kernel_idct)},
-    {frame_f_b_kernel_idct, sizeof(frame_f_b_kernel_idct)},
-    {field_forward_kernel_idct, sizeof(field_forward_kernel_idct)},
-    {field_backward_kernel_idct, sizeof(field_backward_kernel_idct)},
-    {field_f_b_kernel_idct, sizeof(field_f_b_kernel_idct)},
-    {lib_kernel_idct, sizeof(lib_kernel_idct)}
+	/*kernels for vld mode */
+	{ipicture_kernel, sizeof(ipicture_kernel)}
+	,
+	{frame_forward_kernel, sizeof(frame_forward_kernel)}
+	,
+	{frame_backward_kernel, sizeof(frame_backward_kernel)}
+	,
+	{frame_f_b_kernel, sizeof(frame_f_b_kernel)}
+	,
+	{field_forward_kernel, sizeof(field_forward_kernel)}
+	,
+	{field_backward_kernel, sizeof(field_backward_kernel)}
+	,
+	{field_f_b_kernel, sizeof(field_f_b_kernel)}
+	,
+	{lib_kernel, sizeof(lib_kernel)}
+	,
+	/*kernels for mc mode */
+	{ipicture_kernel_idct, sizeof(ipicture_kernel_idct)}
+	,
+	{frame_forward_kernel_idct, sizeof(frame_forward_kernel_idct)}
+	,
+	{frame_backward_kernel_idct, sizeof(frame_backward_kernel_idct)}
+	,
+	{frame_f_b_kernel_idct, sizeof(frame_f_b_kernel_idct)}
+	,
+	{field_forward_kernel_idct, sizeof(field_forward_kernel_idct)}
+	,
+	{field_backward_kernel_idct, sizeof(field_backward_kernel_idct)}
+	,
+	{field_f_b_kernel_idct, sizeof(field_f_b_kernel_idct)}
+	,
+	{lib_kernel_idct, sizeof(lib_kernel_idct)}
 };
 
 static struct media_kernel media_gen5_kernels[] = {
-	/*kernels for vld mode*/
-    {ipicture_kernel_gen5, sizeof(ipicture_kernel_gen5)},
-    {frame_forward_kernel_gen5, sizeof(frame_forward_kernel_gen5)},
-    {frame_backward_kernel_gen5, sizeof(frame_backward_kernel_gen5)},
-    {frame_f_b_kernel_gen5, sizeof(frame_f_b_kernel_gen5)},
-    {field_forward_kernel_gen5, sizeof(field_forward_kernel_gen5)},
-    {field_backward_kernel_gen5, sizeof(field_backward_kernel_gen5)},
-    {field_f_b_kernel_gen5, sizeof(field_f_b_kernel_gen5)},
-    {lib_kernel_gen5, sizeof(lib_kernel_gen5)},
-	/*kernels for mc mode*/
-    {ipicture_kernel_idct_gen5, sizeof(ipicture_kernel_idct_gen5)},
-    {frame_forward_kernel_idct_gen5, sizeof(frame_forward_kernel_idct_gen5)},
-    {frame_backward_kernel_idct_gen5, sizeof(frame_backward_kernel_idct_gen5)},
-    {frame_f_b_kernel_idct_gen5, sizeof(frame_f_b_kernel_idct_gen5)},
-    {field_forward_kernel_idct_gen5, sizeof(field_forward_kernel_idct_gen5)},
-    {field_backward_kernel_idct_gen5, sizeof(field_backward_kernel_idct_gen5)},
-    {field_f_b_kernel_idct_gen5, sizeof(field_f_b_kernel_idct_gen5)},
-    {lib_kernel_idct_gen5, sizeof(lib_kernel_idct_gen5)}
+	/*kernels for vld mode */
+	{ipicture_kernel_gen5, sizeof(ipicture_kernel_gen5)}
+	,
+	{frame_forward_kernel_gen5, sizeof(frame_forward_kernel_gen5)}
+	,
+	{frame_backward_kernel_gen5, sizeof(frame_backward_kernel_gen5)}
+	,
+	{frame_f_b_kernel_gen5, sizeof(frame_f_b_kernel_gen5)}
+	,
+	{field_forward_kernel_gen5, sizeof(field_forward_kernel_gen5)}
+	,
+	{field_backward_kernel_gen5, sizeof(field_backward_kernel_gen5)}
+	,
+	{field_f_b_kernel_gen5, sizeof(field_f_b_kernel_gen5)}
+	,
+	{lib_kernel_gen5, sizeof(lib_kernel_gen5)}
+	,
+	/*kernels for mc mode */
+	{ipicture_kernel_idct_gen5, sizeof(ipicture_kernel_idct_gen5)}
+	,
+	{frame_forward_kernel_idct_gen5, sizeof(frame_forward_kernel_idct_gen5)}
+	,
+	{frame_backward_kernel_idct_gen5,
+	 sizeof(frame_backward_kernel_idct_gen5)}
+	,
+	{frame_f_b_kernel_idct_gen5, sizeof(frame_f_b_kernel_idct_gen5)}
+	,
+	{field_forward_kernel_idct_gen5, sizeof(field_forward_kernel_idct_gen5)}
+	,
+	{field_backward_kernel_idct_gen5,
+	 sizeof(field_backward_kernel_idct_gen5)}
+	,
+	{field_f_b_kernel_idct_gen5, sizeof(field_f_b_kernel_idct_gen5)}
+	,
+	{lib_kernel_idct_gen5, sizeof(lib_kernel_idct_gen5)}
 };
 
 #define MEDIA_KERNEL_NUM (sizeof(media_kernels)/sizeof(media_kernels[0]))
 
 struct media_kernel_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct interface_descriptor_obj {
-   dri_bo *bo;
-   struct media_kernel_obj kernels[MEDIA_KERNEL_NUM];
+	dri_bo *bo;
+	struct media_kernel_obj kernels[MEDIA_KERNEL_NUM];
 };
 
 struct vfe_state_obj {
-   dri_bo *bo;
-   struct interface_descriptor_obj interface;
+	dri_bo *bo;
+	struct interface_descriptor_obj interface;
 };
 
 struct vld_state_obj {
-   dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct surface_obj {
-     dri_bo *bo; 
+	dri_bo *bo;
 };
 
 struct surface_state_obj {
-      struct surface_obj surface; 
-      dri_bo *bo;
+	struct surface_obj surface;
+	dri_bo *bo;
 };
 
 struct binding_table_obj {
-    dri_bo *bo;
-    struct surface_state_obj surface_states[I965_MAX_SURFACES];
+	dri_bo *bo;
+	struct surface_state_obj surface_states[I965_MAX_SURFACES];
 };
 
 struct slice_data_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct mb_data_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 struct cs_state_obj {
-    dri_bo *bo;
+	dri_bo *bo;
 };
 
 static struct media_state {
-    struct vfe_state_obj vfe_state;
-    struct vld_state_obj vld_state;
-    struct binding_table_obj binding_table;
-    struct cs_state_obj cs_object;
-    struct slice_data_obj slice_data;
+	struct vfe_state_obj vfe_state;
+	struct vld_state_obj vld_state;
+	struct binding_table_obj binding_table;
+	struct cs_state_obj cs_object;
+	struct slice_data_obj slice_data;
 	struct mb_data_obj mb_data;
 } media_state;
 
@@ -294,48 +355,49 @@ static struct media_state {
 #define CS_OBJECT_SIZE (32*20 + sizeof(unsigned int) * 8)
 static int free_object(struct media_state *s)
 {
-    int i;
+	int i;
 #define FREE_ONE_BO(bo) \
     if (bo) \
         drm_intel_bo_unreference(bo)
-    FREE_ONE_BO(s->vfe_state.bo);
-    FREE_ONE_BO(s->vfe_state.interface.bo);
-    for (i = 0; i < MEDIA_KERNEL_NUM; i++)
-        FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo);
-    FREE_ONE_BO(s->binding_table.bo);
-    for (i = 0; i < I965_MAX_SURFACES; i++)
-        FREE_ONE_BO(s->binding_table.surface_states[i].bo);
-    FREE_ONE_BO(s->slice_data.bo);
-    FREE_ONE_BO(s->mb_data.bo);
-    FREE_ONE_BO(s->cs_object.bo);
-    FREE_ONE_BO(s->vld_state.bo);
+	FREE_ONE_BO(s->vfe_state.bo);
+	FREE_ONE_BO(s->vfe_state.interface.bo);
+	for (i = 0; i < MEDIA_KERNEL_NUM; i++)
+		FREE_ONE_BO(s->vfe_state.interface.kernels[i].bo);
+	FREE_ONE_BO(s->binding_table.bo);
+	for (i = 0; i < I965_MAX_SURFACES; i++)
+		FREE_ONE_BO(s->binding_table.surface_states[i].bo);
+	FREE_ONE_BO(s->slice_data.bo);
+	FREE_ONE_BO(s->mb_data.bo);
+	FREE_ONE_BO(s->cs_object.bo);
+	FREE_ONE_BO(s->vld_state.bo);
 }
 
 static int alloc_object(struct media_state *s)
 {
-    int i;
-
-    for (i = 0; i < I965_MAX_SURFACES; i++) {
-        s->binding_table.surface_states[i].bo =
-            drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", 
- 		sizeof(struct brw_surface_state), 0x1000);
-        if (!s->binding_table.surface_states[i].bo)
-            goto out;
-    }
-    return 0;
+	int i;
+
+	for (i = 0; i < I965_MAX_SURFACES; i++) {
+		s->binding_table.surface_states[i].bo =
+		    drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state",
+				       sizeof(struct brw_surface_state),
+				       0x1000);
+		if (!s->binding_table.surface_states[i].bo)
+			goto out;
+	}
+	return 0;
 out:
-    free_object(s);
-    return BadAlloc;
+	free_object(s);
+	return BadAlloc;
 }
 
 static void flush()
 {
-#define FLUSH_STATE_CACHE  	1   
-    struct brw_mi_flush f;
-    memset(&f, 0, sizeof(f));
-    f.opcode = CMD_MI_FLUSH;
-    f.flags = (1<<FLUSH_STATE_CACHE);
-    BATCH_STRUCT(f);
+#define FLUSH_STATE_CACHE  	1
+	struct brw_mi_flush f;
+	memset(&f, 0, sizeof(f));
+	f.opcode = CMD_MI_FLUSH;
+	f.flags = (1 << FLUSH_STATE_CACHE);
+	BATCH_STRUCT(f);
 }
 
 static Status vfe_state(int vfe_mode)
@@ -345,7 +407,7 @@ static Status vfe_state(int vfe_mode)
 	if (vfe_mode == VFE_VLD_MODE) {
 		vfe_state->vfe0.extend_vfe_state_present = 1;
 	} else {
-		vfe_state->vfe0.extend_vfe_state_present = 0; 
+		vfe_state->vfe0.extend_vfe_state_present = 0;
 	}
 	vfe_state->vfe1.vfe_mode = vfe_mode;
 	vfe_state->vfe1.num_urb_entries = 1;
@@ -353,793 +415,868 @@ static Status vfe_state(int vfe_mode)
 	vfe_state->vfe1.urb_entry_alloc_size = 2;
 	vfe_state->vfe1.max_threads = 31;
 	vfe_state->vfe2.interface_descriptor_base =
-		media_state.vfe_state.interface.bo->offset >> 4;
+	    media_state.vfe_state.interface.bo->offset >> 4;
 
-    if (media_state.vfe_state.bo)
-        drm_intel_bo_unreference(media_state.vfe_state.bo);
+	if (media_state.vfe_state.bo)
+		drm_intel_bo_unreference(media_state.vfe_state.bo);
 
-    media_state.vfe_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-        "vfe state", sizeof(struct brw_vfe_state), 0x1000);
-    if (!media_state.vfe_state.bo)
-        return BadAlloc;
+	media_state.vfe_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+						      "vfe state",
+						      sizeof(struct
+							     brw_vfe_state),
+						      0x1000);
+	if (!media_state.vfe_state.bo)
+		return BadAlloc;
 
-    drm_intel_bo_subdata(media_state.vfe_state.bo, 0, sizeof(tmp), &tmp);
+	drm_intel_bo_subdata(media_state.vfe_state.bo, 0, sizeof(tmp), &tmp);
 
-    drm_intel_bo_emit_reloc(media_state.vfe_state.bo,
-		offsetof(struct brw_vfe_state, vfe2),
-		media_state.vfe_state.interface.bo, 0,
-		I915_GEM_DOMAIN_INSTRUCTION, 0);
-    return Success;
+	drm_intel_bo_emit_reloc(media_state.vfe_state.bo,
+				offsetof(struct brw_vfe_state, vfe2),
+				media_state.vfe_state.interface.bo, 0,
+				I915_GEM_DOMAIN_INSTRUCTION, 0);
+	return Success;
 }
 
 static Status interface_descriptor()
 {
-    int i;
-    struct brw_interface_descriptor tmp, *desc = &tmp;
+	int i;
+	struct brw_interface_descriptor tmp, *desc = &tmp;
 
-    if (media_state.vfe_state.interface.bo)
-        drm_intel_bo_unreference(media_state.vfe_state.interface.bo);
+	if (media_state.vfe_state.interface.bo)
+		drm_intel_bo_unreference(media_state.vfe_state.interface.bo);
 
-    media_state.vfe_state.interface.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-        "interfaces", MEDIA_KERNEL_NUM*sizeof(struct brw_interface_descriptor),
-	    0x1000);
-    if (!media_state.vfe_state.interface.bo)
-        return BadAlloc;
+	media_state.vfe_state.interface.bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "interfaces",
+			       MEDIA_KERNEL_NUM *
+			       sizeof(struct brw_interface_descriptor), 0x1000);
+	if (!media_state.vfe_state.interface.bo)
+		return BadAlloc;
 
-    for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
+	for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
 		memset(desc, 0, sizeof(*desc));
 		desc->desc0.grf_reg_blocks = 15;
 		desc->desc0.kernel_start_pointer =
-				media_state.vfe_state.interface.kernels[i].bo->offset >> 6;
+		    media_state.vfe_state.interface.kernels[i].bo->offset >> 6;
 
 		desc->desc1.const_urb_entry_read_offset = 0;
 		desc->desc1.const_urb_entry_read_len = 30;
 
 		desc->desc3.binding_table_entry_count = I965_MAX_SURFACES - 1;
 		desc->desc3.binding_table_pointer =
-				media_state.binding_table.bo->offset >> 5;
-
-		drm_intel_bo_subdata(media_state.vfe_state.interface.bo, i*sizeof(tmp), sizeof(tmp), desc);
-
-		drm_intel_bo_emit_reloc(
-			media_state.vfe_state.interface.bo,
-			i * sizeof(*desc) + 
-			offsetof(struct brw_interface_descriptor, desc0),
-			media_state.vfe_state.interface.kernels[i].bo,
-			desc->desc0.grf_reg_blocks,
-			I915_GEM_DOMAIN_INSTRUCTION, 0);
-		
-		drm_intel_bo_emit_reloc(
-			media_state.vfe_state.interface.bo,
-			i * sizeof(*desc) + 
-			offsetof(struct brw_interface_descriptor, desc3),
-			media_state.binding_table.bo,
-			desc->desc3.binding_table_entry_count,
-			I915_GEM_DOMAIN_INSTRUCTION, 0);
-    }
-    return Success;
+		    media_state.binding_table.bo->offset >> 5;
+
+		drm_intel_bo_subdata(media_state.vfe_state.interface.bo,
+				     i * sizeof(tmp), sizeof(tmp), desc);
+
+		drm_intel_bo_emit_reloc(media_state.vfe_state.interface.bo,
+					i * sizeof(*desc) + offsetof(struct
+								     brw_interface_descriptor,
+								     desc0),
+					media_state.vfe_state.
+					interface.kernels[i].bo,
+					desc->desc0.grf_reg_blocks,
+					I915_GEM_DOMAIN_INSTRUCTION, 0);
+
+		drm_intel_bo_emit_reloc(media_state.vfe_state.interface.bo,
+					i * sizeof(*desc) + offsetof(struct
+								     brw_interface_descriptor,
+								     desc3),
+					media_state.binding_table.bo,
+					desc->desc3.binding_table_entry_count,
+					I915_GEM_DOMAIN_INSTRUCTION, 0);
+	}
+	return Success;
 }
 
 static int setup_media_kernels(struct i965_xvmc_context *i965_ctx)
 {
-    int i;
-
-    assert(MEDIA_KERNEL_NUM == sizeof(media_gen5_kernels) / sizeof(media_gen5_kernels[0]));
-
-    for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
-        if (i965_ctx->is_igdng)
-            media_state.vfe_state.interface.kernels[i].bo =
-		drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel",
-                                   media_gen5_kernels[i].size, 0x1000);
-        else
-            media_state.vfe_state.interface.kernels[i].bo = 
-                drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernels",
-                                   media_kernels[i].size, 0x1000);
-
-        if (!media_state.vfe_state.interface.kernels[i].bo)
-            goto out;
-    }
-
-    for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
-        dri_bo *bo = media_state.vfe_state.interface.kernels[i].bo;
-
-        if (i965_ctx->is_igdng)
-            drm_intel_bo_subdata(bo, 0, media_gen5_kernels[i].size, media_gen5_kernels[i].bin);
-        else
-            drm_intel_bo_subdata(bo, 0, media_kernels[i].size, media_kernels[i].bin);
-    }
-    return 0;
+	int i;
+
+	assert(MEDIA_KERNEL_NUM ==
+	       sizeof(media_gen5_kernels) / sizeof(media_gen5_kernels[0]));
+
+	for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
+		if (i965_ctx->is_igdng)
+			media_state.vfe_state.interface.kernels[i].bo =
+			    drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernel",
+					       media_gen5_kernels[i].size,
+					       0x1000);
+		else
+			media_state.vfe_state.interface.kernels[i].bo =
+			    drm_intel_bo_alloc(xvmc_driver->bufmgr, "kernels",
+					       media_kernels[i].size, 0x1000);
+
+		if (!media_state.vfe_state.interface.kernels[i].bo)
+			goto out;
+	}
+
+	for (i = 0; i < MEDIA_KERNEL_NUM; i++) {
+		dri_bo *bo = media_state.vfe_state.interface.kernels[i].bo;
+
+		if (i965_ctx->is_igdng)
+			drm_intel_bo_subdata(bo, 0, media_gen5_kernels[i].size,
+					     media_gen5_kernels[i].bin);
+		else
+			drm_intel_bo_subdata(bo, 0, media_kernels[i].size,
+					     media_kernels[i].bin);
+	}
+	return 0;
 out:
-    free_object(&media_state);
-    return BadAlloc;
+	free_object(&media_state);
+	return BadAlloc;
 }
 
 static Status binding_tables()
 {
-   unsigned int table[I965_MAX_SURFACES];
-   int i;
-
-   if (media_state.binding_table.bo)
-       drm_intel_bo_unreference(media_state.binding_table.bo);
-   media_state.binding_table.bo = 
-	drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table", 
-		I965_MAX_SURFACES*4, 0x1000);
-   if (!media_state.binding_table.bo)
-       return BadAlloc;
-
-   for (i = 0; i < I965_MAX_SURFACES; i++) {
-       table[i] = media_state.binding_table.surface_states[i].bo->offset;
-       drm_intel_bo_emit_reloc(media_state.binding_table.bo, 
-	    i * sizeof(unsigned int),
-	    media_state.binding_table.surface_states[i].bo, 0,
-	    I915_GEM_DOMAIN_INSTRUCTION, 0);
-   }
-
-   drm_intel_bo_subdata(media_state.binding_table.bo, 0, sizeof(table), table);
-   return Success;
+	unsigned int table[I965_MAX_SURFACES];
+	int i;
+
+	if (media_state.binding_table.bo)
+		drm_intel_bo_unreference(media_state.binding_table.bo);
+	media_state.binding_table.bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "binding_table",
+			       I965_MAX_SURFACES * 4, 0x1000);
+	if (!media_state.binding_table.bo)
+		return BadAlloc;
+
+	for (i = 0; i < I965_MAX_SURFACES; i++) {
+		table[i] =
+		    media_state.binding_table.surface_states[i].bo->offset;
+		drm_intel_bo_emit_reloc(media_state.binding_table.bo,
+					i * sizeof(unsigned int),
+					media_state.
+					binding_table.surface_states[i].bo, 0,
+					I915_GEM_DOMAIN_INSTRUCTION, 0);
+	}
+
+	drm_intel_bo_subdata(media_state.binding_table.bo, 0, sizeof(table),
+			     table);
+	return Success;
 }
 
 static Status cs_init(int interface_offset)
 {
-   char buf[CS_OBJECT_SIZE];
-   unsigned int *lib_reloc;
-   int i;
-
-   if (media_state.cs_object.bo)
-       drm_intel_bo_unreference(media_state.cs_object.bo);
-
-   media_state.cs_object.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "cs object", CS_OBJECT_SIZE, 64);
-   if (!media_state.cs_object.bo)
-       return BadAlloc;
-
-   memcpy(buf + 32*4, idct_table, sizeof(idct_table));
-   /* idct lib reloction */
-   lib_reloc = (unsigned int *)(buf + 32*20);
-   for (i = 0; i < 8; i++)
-       lib_reloc[i] = 
-	   media_state.vfe_state.interface.kernels[LIB_INTERFACE + interface_offset].bo->offset;
-   drm_intel_bo_subdata(media_state.cs_object.bo, 32*4, 32*16 + 8*sizeof(unsigned int), buf + 32*4);
-
-   for (i = 0; i < 8; i++)
-       drm_intel_bo_emit_reloc(media_state.cs_object.bo,
-           32*20 + sizeof(unsigned int) * i,
-           media_state.vfe_state.interface.kernels[LIB_INTERFACE + interface_offset].bo, 0,
-           I915_GEM_DOMAIN_INSTRUCTION, 0);
-
-   return Success;
+	char buf[CS_OBJECT_SIZE];
+	unsigned int *lib_reloc;
+	int i;
+
+	if (media_state.cs_object.bo)
+		drm_intel_bo_unreference(media_state.cs_object.bo);
+
+	media_state.cs_object.bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "cs object", CS_OBJECT_SIZE,
+			       64);
+	if (!media_state.cs_object.bo)
+		return BadAlloc;
+
+	memcpy(buf + 32 * 4, idct_table, sizeof(idct_table));
+	/* idct lib reloction */
+	lib_reloc = (unsigned int *)(buf + 32 * 20);
+	for (i = 0; i < 8; i++)
+		lib_reloc[i] =
+		    media_state.vfe_state.interface.kernels[LIB_INTERFACE +
+							    interface_offset].bo->
+		    offset;
+	drm_intel_bo_subdata(media_state.cs_object.bo, 32 * 4,
+			     32 * 16 + 8 * sizeof(unsigned int), buf + 32 * 4);
+
+	for (i = 0; i < 8; i++)
+		drm_intel_bo_emit_reloc(media_state.cs_object.bo,
+					32 * 20 + sizeof(unsigned int) * i,
+					media_state.vfe_state.
+					interface.kernels[LIB_INTERFACE +
+							  interface_offset].bo,
+					0, I915_GEM_DOMAIN_INSTRUCTION, 0);
+
+	return Success;
 }
 
-static Status create_context(Display *display, XvMCContext *context,
-	int priv_count, CARD32 *priv_data)
+static Status create_context(Display * display, XvMCContext * context,
+			     int priv_count, CARD32 * priv_data)
 {
-    struct i965_xvmc_context *i965_ctx;
-    i965_ctx = (struct i965_xvmc_context *)priv_data;
-    context->privData = priv_data;
+	struct i965_xvmc_context *i965_ctx;
+	i965_ctx = (struct i965_xvmc_context *)priv_data;
+	context->privData = priv_data;
 
-    if (alloc_object(&media_state))
-        return BadAlloc;
+	if (alloc_object(&media_state))
+		return BadAlloc;
 
-    if (setup_media_kernels(i965_ctx))
-        return BadAlloc;
-    return Success;
+	if (setup_media_kernels(i965_ctx))
+		return BadAlloc;
+	return Success;
 }
 
-static Status destroy_context(Display *display, XvMCContext *context)
+static Status destroy_context(Display * display, XvMCContext * context)
 {
-    struct i965_xvmc_context *i965_ctx;
-    i965_ctx = context->privData;
-    Xfree(i965_ctx);
-    return Success;
+	struct i965_xvmc_context *i965_ctx;
+	i965_ctx = context->privData;
+	Xfree(i965_ctx);
+	return Success;
 }
 
 #define STRIDE(w)               (w)
 #define SIZE_YUV420(w, h)       (h * (STRIDE(w) + STRIDE(w >> 1)))
-static Status create_surface(Display *display,
-	XvMCContext *context, XvMCSurface *surface, int priv_count,
-	CARD32 *priv_data)
+static Status create_surface(Display * display,
+			     XvMCContext * context, XvMCSurface * surface,
+			     int priv_count, CARD32 * priv_data)
 {
-    struct i965_xvmc_surface *priv_surface =
-	(struct i965_xvmc_surface *)priv_data;
-    size_t size = SIZE_YUV420(priv_surface->w, priv_surface->h);
-    surface->privData = priv_data;
-    priv_surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface", 
-	    size, 0x1000);
-
-    return Success;
+	struct i965_xvmc_surface *priv_surface =
+	    (struct i965_xvmc_surface *)priv_data;
+	size_t size = SIZE_YUV420(priv_surface->w, priv_surface->h);
+	surface->privData = priv_data;
+	priv_surface->bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface",
+					      size, 0x1000);
+
+	return Success;
 }
-static Status destroy_surface(Display *display,
-	XvMCSurface *surface)
+
+static Status destroy_surface(Display * display, XvMCSurface * surface)
 {
-    struct i965_xvmc_surface *priv_surface = 
-	surface->privData;
-    XSync(display, False);
-    drm_intel_bo_unreference(priv_surface->bo);
-    return Success;
+	struct i965_xvmc_surface *priv_surface = surface->privData;
+	XSync(display, False);
+	drm_intel_bo_unreference(priv_surface->bo);
+	return Success;
 }
 
-static Status load_qmatrix(Display *display, XvMCContext *context,
-	const XvMCQMatrix *qmx)
+static Status load_qmatrix(Display * display, XvMCContext * context,
+			   const XvMCQMatrix * qmx)
 {
-    Status ret;
-    ret = cs_init(0);
-    if (ret != Success)
-        return ret;
-    drm_intel_bo_subdata(media_state.cs_object.bo, 0, 64, qmx->intra_quantiser_matrix);
-    drm_intel_bo_subdata(media_state.cs_object.bo, 64, 64, qmx->non_intra_quantiser_matrix);
-
-    return Success;
+	Status ret;
+	ret = cs_init(0);
+	if (ret != Success)
+		return ret;
+	drm_intel_bo_subdata(media_state.cs_object.bo, 0, 64,
+			     qmx->intra_quantiser_matrix);
+	drm_intel_bo_subdata(media_state.cs_object.bo, 64, 64,
+			     qmx->non_intra_quantiser_matrix);
+
+	return Success;
 }
 
-static Status get_surface_status(Display *display, XvMCSurface *surface,
-	int *status)
+static Status get_surface_status(Display * display, XvMCSurface * surface,
+				 int *status)
 {
-    *status = 0;
-    return Success;
+	*status = 0;
+	return Success;
 }
 
-static Status vld_state(const XvMCMpegControl *control)
+static Status vld_state(const XvMCMpegControl * control)
 {
-    struct brw_vld_state tmp, *vld = &tmp;
-
-    if (media_state.vld_state.bo)
-	drm_intel_bo_unreference(media_state.vld_state.bo);
-    media_state.vld_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, 
-	    "vld state", sizeof(struct brw_vld_state), 64);
-    if (!media_state.vld_state.bo)
-	return BadAlloc;
-
-    memset(vld, 0, sizeof(*vld));
-    vld->vld0.f_code_0_0 = control->FHMV_range + 1;
-    vld->vld0.f_code_0_1 = control->FVMV_range + 1;
-    vld->vld0.f_code_1_0 = control->BHMV_range + 1;
-    vld->vld0.f_code_1_1 = control->BVMV_range + 1;
-    vld->vld0.intra_dc_precision = control->intra_dc_precision;
-    vld->vld0.picture_structure = control->picture_structure;
-    vld->vld0.top_field_first = !!(control->flags & XVMC_TOP_FIELD_FIRST);
-    vld->vld0.frame_predict_frame_dct =
-	!!(control->flags & XVMC_PRED_DCT_FRAME);
-    vld->vld0.concealment_motion_vector =
-	!!(control->flags & XVMC_CONCEALMENT_MOTION_VECTORS);
-    vld->vld0.quantizer_scale_type = !!(control->flags & XVMC_Q_SCALE_TYPE);
-    vld->vld0.intra_vlc_format = !!(control->flags & XVMC_INTRA_VLC_FORMAT);
-    vld->vld0.scan_order = !!(control->flags & XVMC_ALTERNATE_SCAN);
-
-    vld->vld1.picture_coding_type = control->picture_coding_type;
-
-    vld->desc_remap_table0.index_0 = FRAME_INTRA;
-    vld->desc_remap_table0.index_1 = FRAME_FRAME_PRED_FORWARD;
-    vld->desc_remap_table0.index_2 = FRAME_FIELD_PRED_FORWARD;
-    vld->desc_remap_table0.index_3 = FRAME_FIELD_PRED_BIDIRECT; /* dual prime */
-    vld->desc_remap_table0.index_4 = FRAME_FRAME_PRED_BACKWARD;
-    vld->desc_remap_table0.index_5 = FRAME_FIELD_PRED_BACKWARD;
-    vld->desc_remap_table0.index_6 = FRAME_FRAME_PRED_BIDIRECT;
-    vld->desc_remap_table0.index_7 = FRAME_FIELD_PRED_BIDIRECT;
-
-    vld->desc_remap_table1.index_8 = FRAME_INTRA;
-    vld->desc_remap_table1.index_9 = FRAME_FRAME_PRED_FORWARD;
-    vld->desc_remap_table1.index_10 = FRAME_FIELD_PRED_FORWARD;
-    vld->desc_remap_table1.index_11 = FRAME_FIELD_PRED_BIDIRECT;
-    vld->desc_remap_table1.index_12 = FRAME_FRAME_PRED_BACKWARD;
-    vld->desc_remap_table1.index_13 = FRAME_FIELD_PRED_BACKWARD;
-    vld->desc_remap_table1.index_14 = FRAME_FRAME_PRED_BIDIRECT;
-    vld->desc_remap_table1.index_15 = FRAME_FIELD_PRED_BIDIRECT;
-
-    drm_intel_bo_subdata(media_state.vld_state.bo, 0, sizeof(tmp), vld);
-    return Success;
+	struct brw_vld_state tmp, *vld = &tmp;
+
+	if (media_state.vld_state.bo)
+		drm_intel_bo_unreference(media_state.vld_state.bo);
+	media_state.vld_state.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+						      "vld state",
+						      sizeof(struct
+							     brw_vld_state),
+						      64);
+	if (!media_state.vld_state.bo)
+		return BadAlloc;
+
+	memset(vld, 0, sizeof(*vld));
+	vld->vld0.f_code_0_0 = control->FHMV_range + 1;
+	vld->vld0.f_code_0_1 = control->FVMV_range + 1;
+	vld->vld0.f_code_1_0 = control->BHMV_range + 1;
+	vld->vld0.f_code_1_1 = control->BVMV_range + 1;
+	vld->vld0.intra_dc_precision = control->intra_dc_precision;
+	vld->vld0.picture_structure = control->picture_structure;
+	vld->vld0.top_field_first = !!(control->flags & XVMC_TOP_FIELD_FIRST);
+	vld->vld0.frame_predict_frame_dct =
+	    !!(control->flags & XVMC_PRED_DCT_FRAME);
+	vld->vld0.concealment_motion_vector =
+	    !!(control->flags & XVMC_CONCEALMENT_MOTION_VECTORS);
+	vld->vld0.quantizer_scale_type = !!(control->flags & XVMC_Q_SCALE_TYPE);
+	vld->vld0.intra_vlc_format = !!(control->flags & XVMC_INTRA_VLC_FORMAT);
+	vld->vld0.scan_order = !!(control->flags & XVMC_ALTERNATE_SCAN);
+
+	vld->vld1.picture_coding_type = control->picture_coding_type;
+
+	vld->desc_remap_table0.index_0 = FRAME_INTRA;
+	vld->desc_remap_table0.index_1 = FRAME_FRAME_PRED_FORWARD;
+	vld->desc_remap_table0.index_2 = FRAME_FIELD_PRED_FORWARD;
+	vld->desc_remap_table0.index_3 = FRAME_FIELD_PRED_BIDIRECT;	/* dual prime */
+	vld->desc_remap_table0.index_4 = FRAME_FRAME_PRED_BACKWARD;
+	vld->desc_remap_table0.index_5 = FRAME_FIELD_PRED_BACKWARD;
+	vld->desc_remap_table0.index_6 = FRAME_FRAME_PRED_BIDIRECT;
+	vld->desc_remap_table0.index_7 = FRAME_FIELD_PRED_BIDIRECT;
+
+	vld->desc_remap_table1.index_8 = FRAME_INTRA;
+	vld->desc_remap_table1.index_9 = FRAME_FRAME_PRED_FORWARD;
+	vld->desc_remap_table1.index_10 = FRAME_FIELD_PRED_FORWARD;
+	vld->desc_remap_table1.index_11 = FRAME_FIELD_PRED_BIDIRECT;
+	vld->desc_remap_table1.index_12 = FRAME_FRAME_PRED_BACKWARD;
+	vld->desc_remap_table1.index_13 = FRAME_FIELD_PRED_BACKWARD;
+	vld->desc_remap_table1.index_14 = FRAME_FRAME_PRED_BIDIRECT;
+	vld->desc_remap_table1.index_15 = FRAME_FIELD_PRED_BIDIRECT;
+
+	drm_intel_bo_subdata(media_state.vld_state.bo, 0, sizeof(tmp), vld);
+	return Success;
 }
 
-static Status setup_media_surface(int index, dri_bo *bo,
-	unsigned long offset, int w, int h, Bool write)
+static Status setup_media_surface(int index, dri_bo * bo,
+				  unsigned long offset, int w, int h,
+				  Bool write)
 {
-    struct brw_surface_state tmp, *ss = &tmp;
-    memset(ss, 0, sizeof(*ss)); 
-    ss->ss0.surface_type = BRW_SURFACE_2D;
-    ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT;
-    ss->ss1.base_addr = offset + bo->offset;
-    ss->ss2.width = w - 1;
-    ss->ss2.height = h - 1;
-    ss->ss3.pitch = w - 1;
-
-    if (media_state.binding_table.surface_states[index].bo)
-        drm_intel_bo_unreference(media_state.binding_table.surface_states[index].bo);
-
-    media_state.binding_table.surface_states[index].bo =
-            drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state", 
- 		sizeof(struct brw_surface_state), 0x1000);
-    if (!media_state.binding_table.surface_states[index].bo)
-        return BadAlloc;
-
-    drm_intel_bo_subdata(
-	    media_state.binding_table.surface_states[index].bo,
-	    0, sizeof(*ss), ss);
-    drm_intel_bo_emit_reloc(media_state.binding_table.surface_states[index].bo, 
-	    offsetof(struct brw_surface_state, ss1),
-	    bo, offset,
-	    I915_GEM_DOMAIN_RENDER, write?I915_GEM_DOMAIN_RENDER:0);
-    return Success;
+	struct brw_surface_state tmp, *ss = &tmp;
+	memset(ss, 0, sizeof(*ss));
+	ss->ss0.surface_type = BRW_SURFACE_2D;
+	ss->ss0.surface_format = BRW_SURFACEFORMAT_R8_SINT;
+	ss->ss1.base_addr = offset + bo->offset;
+	ss->ss2.width = w - 1;
+	ss->ss2.height = h - 1;
+	ss->ss3.pitch = w - 1;
+
+	if (media_state.binding_table.surface_states[index].bo)
+		drm_intel_bo_unreference(media_state.
+					 binding_table.surface_states[index].
+					 bo);
+
+	media_state.binding_table.surface_states[index].bo =
+	    drm_intel_bo_alloc(xvmc_driver->bufmgr, "surface_state",
+			       sizeof(struct brw_surface_state), 0x1000);
+	if (!media_state.binding_table.surface_states[index].bo)
+		return BadAlloc;
+
+	drm_intel_bo_subdata(media_state.binding_table.surface_states[index].bo,
+			     0, sizeof(*ss), ss);
+	drm_intel_bo_emit_reloc(media_state.binding_table.
+				surface_states[index].bo,
+				offsetof(struct brw_surface_state, ss1), bo,
+				offset, I915_GEM_DOMAIN_RENDER,
+				write ? I915_GEM_DOMAIN_RENDER : 0);
+	return Success;
 }
 
 static Status setup_surface(struct i965_xvmc_surface *target,
-	 struct i965_xvmc_surface *past,
-	 struct i965_xvmc_surface *future,
-	 int w, int h)
+			    struct i965_xvmc_surface *past,
+			    struct i965_xvmc_surface *future, int w, int h)
 {
-    Status ret;
-    ret = setup_media_surface(0, target->bo, 0, w, h, TRUE);
-    if (ret != Success)
-	return ret;
-    ret = setup_media_surface(1, target->bo, w*h, w/2, h/2, TRUE);
-    if (ret != Success)
-	return ret;
-    ret = setup_media_surface(2, target->bo, w*h + w*h/4, w/2, h/2, TRUE);
-    if (ret != Success)
-	return ret;
-    if (past) {
-	ret = setup_media_surface(4, past->bo, 0, w, h, FALSE);
+	Status ret;
+	ret = setup_media_surface(0, target->bo, 0, w, h, TRUE);
 	if (ret != Success)
-	    return ret;
-	ret = setup_media_surface(5, past->bo, w*h, w/2, h/2, FALSE);
+		return ret;
+	ret = setup_media_surface(1, target->bo, w * h, w / 2, h / 2, TRUE);
 	if (ret != Success)
-	    return ret;
-	ret = setup_media_surface(6, past->bo, w*h + w*h/4, w/2, h/2, FALSE);
+		return ret;
+	ret =
+	    setup_media_surface(2, target->bo, w * h + w * h / 4, w / 2, h / 2,
+				TRUE);
 	if (ret != Success)
-	    return ret;
-    }
-    if (future) {
-	ret = setup_media_surface(7, future->bo, 0, w, h, FALSE);
+		return ret;
+	if (past) {
+		ret = setup_media_surface(4, past->bo, 0, w, h, FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(5, past->bo, w * h, w / 2, h / 2,
+					FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(6, past->bo, w * h + w * h / 4, w / 2,
+					h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+	}
+	if (future) {
+		ret = setup_media_surface(7, future->bo, 0, w, h, FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(8, future->bo, w * h, w / 2, h / 2,
+					FALSE);
+		if (ret != Success)
+			return ret;
+		ret =
+		    setup_media_surface(9, future->bo, w * h + w * h / 4, w / 2,
+					h / 2, FALSE);
+		if (ret != Success)
+			return ret;
+	}
+	return Success;
+}
+
+static Status begin_surface(Display * display, XvMCContext * context,
+			    XvMCSurface * target,
+			    XvMCSurface * past,
+			    XvMCSurface * future,
+			    const XvMCMpegControl * control)
+{
+	struct i965_xvmc_contex *i965_ctx;
+	struct i965_xvmc_surface *priv_target, *priv_past, *priv_future;
+	intel_xvmc_context_ptr intel_ctx;
+	Status ret;
+
+	intel_ctx = intel_xvmc_find_context(context->context_id);
+	priv_target = target->privData;
+	priv_past = past ? past->privData : NULL;
+	priv_future = future ? future->privData : NULL;
+
+	ret = vld_state(control);
 	if (ret != Success)
-	    return ret;
-	ret = setup_media_surface(8, future->bo, w*h, w/2, h/2, FALSE);
+		return ret;
+	ret = setup_surface(priv_target, priv_past, priv_future,
+			    context->width, context->height);
 	if (ret != Success)
-	    return ret;
-	ret = setup_media_surface(9, future->bo, w*h + w*h/4, w/2, h/2, FALSE);
+		return ret;
+	ret = binding_tables();
 	if (ret != Success)
-	    return ret;
-    }
-    return Success;
-}
+		return ret;
+	ret = interface_descriptor();
+	if (ret != Success)
+		return ret;
+	ret = vfe_state(VFE_VLD_MODE);
+	if (ret != Success)
+		return ret;
 
-static  Status begin_surface(Display *display, XvMCContext *context,
-	    XvMCSurface *target,
-	    XvMCSurface *past,
-	    XvMCSurface *future,
-	    const XvMCMpegControl *control)
-{
-    struct i965_xvmc_contex *i965_ctx;
-    struct i965_xvmc_surface *priv_target, *priv_past, *priv_future;
-    intel_xvmc_context_ptr intel_ctx;
-    Status ret;
-
-    intel_ctx = intel_xvmc_find_context(context->context_id);
-    priv_target = target->privData;
-    priv_past = past?past->privData:NULL;
-    priv_future = future?future->privData:NULL;
-
-    ret = vld_state(control);
-    if (ret != Success)
-        return ret;
-    ret = setup_surface(priv_target, priv_past, priv_future, 
-	    context->width, context->height);
-    if (ret != Success)
-        return ret;
-    ret = binding_tables();
-    if (ret != Success)
-        return ret;
-    ret = interface_descriptor();
-    if (ret != Success)
-        return ret;
-    ret = vfe_state(VFE_VLD_MODE);
-    if (ret != Success)
-        return ret;
-
-    LOCK_HARDWARE(intel_ctx->hw_context);
-    flush();
-    UNLOCK_HARDWARE(intel_ctx->hw_context);
-    return Success;
+	LOCK_HARDWARE(intel_ctx->hw_context);
+	flush();
+	UNLOCK_HARDWARE(intel_ctx->hw_context);
+	return Success;
 }
 
-static Status put_slice(Display *display, XvMCContext *context, 
-	unsigned char *slice, int nbytes)
+static Status put_slice(Display * display, XvMCContext * context,
+			unsigned char *slice, int nbytes)
 {
-    return Success;
+	return Success;
 }
 
 static void state_base_address(struct i965_xvmc_context *i965_ctx)
 {
-    BATCH_LOCALS;
-
-    if (i965_ctx->is_igdng) {
-        BEGIN_BATCH(8);
-        OUT_BATCH(BRW_STATE_BASE_ADDRESS|6);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        ADVANCE_BATCH();
-    } else {
-        BEGIN_BATCH(6);
-        OUT_BATCH(BRW_STATE_BASE_ADDRESS|4);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
-        ADVANCE_BATCH();
-    }
+	BATCH_LOCALS;
+
+	if (i965_ctx->is_igdng) {
+		BEGIN_BATCH(8);
+		OUT_BATCH(BRW_STATE_BASE_ADDRESS | 6);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		ADVANCE_BATCH();
+	} else {
+		BEGIN_BATCH(6);
+		OUT_BATCH(BRW_STATE_BASE_ADDRESS | 4);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+		ADVANCE_BATCH();
+	}
 }
+
 static void pipeline_select()
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(1);
-    OUT_BATCH(NEW_PIPELINE_SELECT|PIPELINE_SELECT_MEDIA);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(1);
+	OUT_BATCH(NEW_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+	ADVANCE_BATCH();
 }
 
 static void media_state_pointers(int vfe_mode)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(3);
-    OUT_BATCH(BRW_MEDIA_STATE_POINTERS|1);
-	if (vfe_mode == VFE_VLD_MODE) 
-		OUT_RELOC(media_state.vld_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 1);
+	BATCH_LOCALS;
+	BEGIN_BATCH(3);
+	OUT_BATCH(BRW_MEDIA_STATE_POINTERS | 1);
+	if (vfe_mode == VFE_VLD_MODE)
+		OUT_RELOC(media_state.vld_state.bo, I915_GEM_DOMAIN_INSTRUCTION,
+			  0, 1);
 	else
 		OUT_BATCH(0);
-    OUT_RELOC(media_state.vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    ADVANCE_BATCH();
+	OUT_RELOC(media_state.vfe_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	ADVANCE_BATCH();
 }
 
 static void align_urb_fence()
 {
-    BATCH_LOCALS;
-    int i, offset_to_next_cacheline;
-    unsigned long batch_offset;
-    BEGIN_BATCH(3);
-    batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr;
-    offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset; 
-    if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) {
-	for (i = 0; i < offset_to_next_cacheline/4; i++)
-	    OUT_BATCH(0);
-	ADVANCE_BATCH();
-    }
+	BATCH_LOCALS;
+	int i, offset_to_next_cacheline;
+	unsigned long batch_offset;
+	BEGIN_BATCH(3);
+	batch_offset = (void *)batch_ptr - xvmc_driver->alloc.ptr;
+	offset_to_next_cacheline = ALIGN(batch_offset, 64) - batch_offset;
+	if (offset_to_next_cacheline <= 12 && offset_to_next_cacheline != 0) {
+		for (i = 0; i < offset_to_next_cacheline / 4; i++)
+			OUT_BATCH(0);
+		ADVANCE_BATCH();
+	}
 }
 
 static void urb_layout()
 {
-    BATCH_LOCALS;
-    align_urb_fence();
-    BEGIN_BATCH(3);
-    OUT_BATCH(BRW_URB_FENCE |
-	    UF0_VFE_REALLOC |
-	    UF0_CS_REALLOC |
-	    UF0_SF_REALLOC |
-	    UF0_CLIP_REALLOC |
-	    UF0_GS_REALLOC |
-	    UF0_VS_REALLOC |
-	    1);
-
-    OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) |
-	    (0 << UF1_GS_FENCE_SHIFT) |
-	    (0 << UF1_VS_FENCE_SHIFT));
-
-    OUT_BATCH((0 << UF2_CS_FENCE_SHIFT) |
-	    (0 << UF2_SF_FENCE_SHIFT) |
-	    ((URB_SIZE - CS_SIZE - 1)<< UF2_VFE_FENCE_SHIFT) |	/* VFE_SIZE */
-	    ((URB_SIZE)<< UF2_CS_FENCE_SHIFT));			/* CS_SIZE */
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	align_urb_fence();
+	BEGIN_BATCH(3);
+	OUT_BATCH(BRW_URB_FENCE |
+		  UF0_VFE_REALLOC |
+		  UF0_CS_REALLOC |
+		  UF0_SF_REALLOC |
+		  UF0_CLIP_REALLOC | UF0_GS_REALLOC | UF0_VS_REALLOC | 1);
+
+	OUT_BATCH((0 << UF1_CLIP_FENCE_SHIFT) |
+		  (0 << UF1_GS_FENCE_SHIFT) | (0 << UF1_VS_FENCE_SHIFT));
+
+	OUT_BATCH((0 << UF2_CS_FENCE_SHIFT) | (0 << UF2_SF_FENCE_SHIFT) | ((URB_SIZE - CS_SIZE - 1) << UF2_VFE_FENCE_SHIFT) |	/* VFE_SIZE */
+		  ((URB_SIZE) << UF2_CS_FENCE_SHIFT));	/* CS_SIZE */
+	ADVANCE_BATCH();
 }
 
 static void cs_urb_layout()
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(2);
-    OUT_BATCH(BRW_CS_URB_STATE | 0);
-    OUT_BATCH((CS_SIZE << 4) |    /* URB Entry Allocation Size */
-	    (1 << 0));    /* Number of URB Entries */
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(2);
+	OUT_BATCH(BRW_CS_URB_STATE | 0);
+	OUT_BATCH((CS_SIZE << 4) |	/* URB Entry Allocation Size */
+		  (1 << 0));	/* Number of URB Entries */
+	ADVANCE_BATCH();
 }
 
 static void cs_buffer()
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(2);
-    OUT_BATCH(BRW_CONSTANT_BUFFER|0|(1<<8));
-    OUT_RELOC(media_state.cs_object.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, CS_SIZE);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(2);
+	OUT_BATCH(BRW_CONSTANT_BUFFER | 0 | (1 << 8));
+	OUT_RELOC(media_state.cs_object.bo, I915_GEM_DOMAIN_INSTRUCTION, 0,
+		  CS_SIZE);
+	ADVANCE_BATCH();
 }
 
 /* kick media object to gpu in idct mode*/
-static void send_media_object(XvMCMacroBlock *mb, dri_bo *bo, 
-							uint32_t offset,  
-							enum interface interface)
+static void send_media_object(XvMCMacroBlock * mb, dri_bo * bo,
+			      uint32_t offset, enum interface interface)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(13);
-    OUT_BATCH(BRW_MEDIA_OBJECT|11);
-    OUT_BATCH(interface);
-    OUT_BATCH(6*128);
-    OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
-    
-    OUT_BATCH(mb->x<<4);                 	  		
-    OUT_BATCH(mb->y<<4);
+	BATCH_LOCALS;
+	BEGIN_BATCH(13);
+	OUT_BATCH(BRW_MEDIA_OBJECT | 11);
+	OUT_BATCH(interface);
+	OUT_BATCH(6 * 128);
 	OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
-    OUT_BATCH_SHORT(mb->coded_block_pattern); 			
-    OUT_BATCH_SHORT(mb->PMV[0][0][0]);        			
-    OUT_BATCH_SHORT(mb->PMV[0][0][1]);        			
-    OUT_BATCH_SHORT(mb->PMV[0][1][0]);        			
-    OUT_BATCH_SHORT(mb->PMV[0][1][1]);        			
-    
-    OUT_BATCH_SHORT(mb->PMV[1][0][0]);        			 
-    OUT_BATCH_SHORT(mb->PMV[1][0][1]);        			
-    OUT_BATCH_SHORT(mb->PMV[1][1][0]);        			
-    OUT_BATCH_SHORT(mb->PMV[1][1][1]);        			
-    OUT_BATCH_CHAR(mb->dct_type);             			
-    OUT_BATCH_CHAR(mb->motion_vertical_field_select);	
-    
-    OUT_BATCH(0xffffffff);
-    ADVANCE_BATCH();
+
+	OUT_BATCH(mb->x << 4);
+	OUT_BATCH(mb->y << 4);
+	OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, offset);
+	OUT_BATCH_SHORT(mb->coded_block_pattern);
+	OUT_BATCH_SHORT(mb->PMV[0][0][0]);
+	OUT_BATCH_SHORT(mb->PMV[0][0][1]);
+	OUT_BATCH_SHORT(mb->PMV[0][1][0]);
+	OUT_BATCH_SHORT(mb->PMV[0][1][1]);
+
+	OUT_BATCH_SHORT(mb->PMV[1][0][0]);
+	OUT_BATCH_SHORT(mb->PMV[1][0][1]);
+	OUT_BATCH_SHORT(mb->PMV[1][1][0]);
+	OUT_BATCH_SHORT(mb->PMV[1][1][1]);
+	OUT_BATCH_CHAR(mb->dct_type);
+	OUT_BATCH_CHAR(mb->motion_vertical_field_select);
+
+	OUT_BATCH(0xffffffff);
+	ADVANCE_BATCH();
 }
 
 /* kick media object to gpu in vld mode*/
-static void vld_send_media_object(dri_bo *bo,
-	int slice_len, int mb_h_pos, int mb_v_pos, int mb_bit_offset,
-	int mb_count, int q_scale_code)
+static void vld_send_media_object(dri_bo * bo,
+				  int slice_len, int mb_h_pos, int mb_v_pos,
+				  int mb_bit_offset, int mb_count,
+				  int q_scale_code)
 {
-    BATCH_LOCALS;
-    BEGIN_BATCH(6);
-    OUT_BATCH(BRW_MEDIA_OBJECT|4);
-    OUT_BATCH(0);
-    OUT_BATCH(slice_len);
-    OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
-    OUT_BATCH((mb_h_pos<<24)|(mb_v_pos<<16)|(mb_count<<8)|(mb_bit_offset));
-    OUT_BATCH(q_scale_code<<24);
-    ADVANCE_BATCH();
+	BATCH_LOCALS;
+	BEGIN_BATCH(6);
+	OUT_BATCH(BRW_MEDIA_OBJECT | 4);
+	OUT_BATCH(0);
+	OUT_BATCH(slice_len);
+	OUT_RELOC(bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+	OUT_BATCH((mb_h_pos << 24) | (mb_v_pos << 16) | (mb_count << 8) |
+		  (mb_bit_offset));
+	OUT_BATCH(q_scale_code << 24);
+	ADVANCE_BATCH();
 }
 
-static Status put_slice2(Display *display, XvMCContext *context, 
-	unsigned char *slice, int nbytes, int sliceCode)
+static Status put_slice2(Display * display, XvMCContext * context,
+			 unsigned char *slice, int nbytes, int sliceCode)
 {
-    unsigned int bit_buf;
-    intel_xvmc_context_ptr intel_ctx;
-    struct i965_xvmc_context *i965_ctx;
-    int q_scale_code, mb_row;
-
-    i965_ctx = (struct i965_xvmc_context *)context->privData;
-    mb_row = *(slice - 1) - 1;
-    bit_buf = (slice[0]<<24) | (slice[1]<<16) | (slice[2]<<8) | (slice[3]);
-
-    q_scale_code = bit_buf>>27;
-
-    if (media_state.slice_data.bo) {
-        if (xvmc_driver->kernel_exec_fencing)
-            drm_intel_gem_bo_unmap_gtt(media_state.slice_data.bo);
-        else
-            drm_intel_bo_unmap(media_state.slice_data.bo);
-
-        drm_intel_bo_unreference(media_state.slice_data.bo);
-    }
-    media_state.slice_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr, 
-	    "slice data", VLD_MAX_SLICE_SIZE, 64);
-    if (!media_state.slice_data.bo)
-        return BadAlloc;
-    if (xvmc_driver->kernel_exec_fencing)
-        drm_intel_gem_bo_map_gtt(media_state.slice_data.bo);
-    else
-        drm_intel_bo_map(media_state.slice_data.bo, 1);
-
-    memcpy(media_state.slice_data.bo->virtual, slice, nbytes);
-
-    intel_ctx = intel_xvmc_find_context(context->context_id);
-    LOCK_HARDWARE(intel_ctx->hw_context);
-    state_base_address(i965_ctx);
-    pipeline_select();
-    media_state_pointers(VFE_VLD_MODE);
-    urb_layout();	
-    cs_urb_layout();
-    cs_buffer();
-    vld_send_media_object(media_state.slice_data.bo,
-	    nbytes, 
-	    0, mb_row, 6, 127, q_scale_code);
-    intelFlushBatch(TRUE);
-    UNLOCK_HARDWARE(intel_ctx->hw_context);
-
-    return Success;
+	unsigned int bit_buf;
+	intel_xvmc_context_ptr intel_ctx;
+	struct i965_xvmc_context *i965_ctx;
+	int q_scale_code, mb_row;
+
+	i965_ctx = (struct i965_xvmc_context *)context->privData;
+	mb_row = *(slice - 1) - 1;
+	bit_buf =
+	    (slice[0] << 24) | (slice[1] << 16) | (slice[2] << 8) | (slice[3]);
+
+	q_scale_code = bit_buf >> 27;
+
+	if (media_state.slice_data.bo) {
+		if (xvmc_driver->kernel_exec_fencing)
+			drm_intel_gem_bo_unmap_gtt(media_state.slice_data.bo);
+		else
+			drm_intel_bo_unmap(media_state.slice_data.bo);
+
+		drm_intel_bo_unreference(media_state.slice_data.bo);
+	}
+	media_state.slice_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+						       "slice data",
+						       VLD_MAX_SLICE_SIZE, 64);
+	if (!media_state.slice_data.bo)
+		return BadAlloc;
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_map_gtt(media_state.slice_data.bo);
+	else
+		drm_intel_bo_map(media_state.slice_data.bo, 1);
+
+	memcpy(media_state.slice_data.bo->virtual, slice, nbytes);
+
+	intel_ctx = intel_xvmc_find_context(context->context_id);
+	LOCK_HARDWARE(intel_ctx->hw_context);
+	state_base_address(i965_ctx);
+	pipeline_select();
+	media_state_pointers(VFE_VLD_MODE);
+	urb_layout();
+	cs_urb_layout();
+	cs_buffer();
+	vld_send_media_object(media_state.slice_data.bo,
+			      nbytes, 0, mb_row, 6, 127, q_scale_code);
+	intelFlushBatch(TRUE);
+	UNLOCK_HARDWARE(intel_ctx->hw_context);
+
+	return Success;
 }
 
-static Status put_surface(Display *display,XvMCSurface *surface,
-	Drawable draw, short srcx, short srcy,
-	unsigned short srcw, unsigned short srch,
-	short destx, short desty,
-	unsigned short destw, unsigned short desth,
-	int flags, struct intel_xvmc_command *data)
+static Status put_surface(Display * display, XvMCSurface * surface,
+			  Drawable draw, short srcx, short srcy,
+			  unsigned short srcw, unsigned short srch,
+			  short destx, short desty,
+			  unsigned short destw, unsigned short desth,
+			  int flags, struct intel_xvmc_command *data)
 {
-	struct i965_xvmc_surface *private_surface =
-		surface->privData;
-        uint32_t handle;
+	struct i965_xvmc_surface *private_surface = surface->privData;
+	uint32_t handle;
 
-        drm_intel_bo_flink(private_surface->bo, &handle);
-        data->handle = handle;
+	drm_intel_bo_flink(private_surface->bo, &handle);
+	data->handle = handle;
 	return Success;
 }
 
-static Status render_surface(Display *display, 
-	XvMCContext *context,
-	unsigned int picture_structure,
-	XvMCSurface *target_surface,
-	XvMCSurface *past_surface,
-	XvMCSurface *future_surface,
-	unsigned int flags,
-	unsigned int num_macroblocks,
-	unsigned int first_macroblock,
-	XvMCMacroBlockArray *macroblock_array,
-	XvMCBlockArray *blocks)
+static Status render_surface(Display * display,
+			     XvMCContext * context,
+			     unsigned int picture_structure,
+			     XvMCSurface * target_surface,
+			     XvMCSurface * past_surface,
+			     XvMCSurface * future_surface,
+			     unsigned int flags,
+			     unsigned int num_macroblocks,
+			     unsigned int first_macroblock,
+			     XvMCMacroBlockArray * macroblock_array,
+			     XvMCBlockArray * blocks)
 {
-    struct i965_xvmc_surface *priv_target, *priv_past, *priv_future;
-    intel_xvmc_context_ptr intel_ctx;
-    XvMCMacroBlock *mb;
-    Status ret;
-    unsigned short *block_ptr;
-    int i, j;
-    int block_offset = 0;
-    struct i965_xvmc_context *i965_ctx;
-
-    intel_ctx = intel_xvmc_find_context(context->context_id);
-    if (!intel_ctx) {
-	XVMC_ERR("Can't find intel xvmc context\n");
-	return BadValue;
-    }
-
-    i965_ctx = (struct i965_xvmc_context *)context->privData;
-    priv_target = target_surface->privData;
-    priv_past = past_surface?past_surface->privData:NULL;
-    priv_future = future_surface?future_surface->privData:NULL;
-
-    ret = setup_surface(priv_target, priv_past, priv_future, 
-	    context->width, context->height);
-    if (ret != Success)
-	return ret;
-    ret = binding_tables();
-    if (ret != Success)
-	return ret;
-    ret = interface_descriptor();
-    if (ret != Success)
-	return ret;
-    ret = cs_init(INTERFACE_NUM);
-    if (ret != Success)
-	return ret;
-    ret = vfe_state(VFE_GENERIC_MODE);
-    if (ret != Success)
-	return ret;
-
-    if (media_state.mb_data.bo) {
-	if (xvmc_driver->kernel_exec_fencing)
-	    drm_intel_gem_bo_unmap_gtt(media_state.mb_data.bo);
-	else
-	    drm_intel_bo_unmap(media_state.mb_data.bo);
-
-	drm_intel_bo_unreference(media_state.mb_data.bo);
-    }
-    unsigned int block_num = 
-	(((context->width + 15) >> 4) * ((context->height + 15) >> 4));
-    unsigned int surface_size = (64 * sizeof(short) * 6 * block_num);
-    media_state.mb_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
-	    "macroblock data", surface_size, 64); 
-    if(!media_state.mb_data.bo)
-	return BadAlloc;
-    if(xvmc_driver->kernel_exec_fencing)
-	drm_intel_gem_bo_map_gtt(media_state.mb_data.bo);
-    else
-	drm_intel_bo_map(media_state.mb_data.bo, 1);
-
-    block_ptr = media_state.mb_data.bo->virtual;
-    unsigned short *mb_block_ptr;
-    for (i = first_macroblock; 
-	    i < num_macroblocks + first_macroblock; i++) {
-	mb = &macroblock_array->macro_blocks[i];
-	mb_block_ptr = &blocks->blocks[(mb->index<<6)];
-
-	if (mb->coded_block_pattern & 0x20) {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
-	}
-	if (mb->coded_block_pattern & 0x10) {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j + 8, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
+	struct i965_xvmc_surface *priv_target, *priv_past, *priv_future;
+	intel_xvmc_context_ptr intel_ctx;
+	XvMCMacroBlock *mb;
+	Status ret;
+	unsigned short *block_ptr;
+	int i, j;
+	int block_offset = 0;
+	struct i965_xvmc_context *i965_ctx;
+
+	intel_ctx = intel_xvmc_find_context(context->context_id);
+	if (!intel_ctx) {
+		XVMC_ERR("Can't find intel xvmc context\n");
+		return BadValue;
 	}
 
-	block_ptr += 2*64;
-	if (mb->coded_block_pattern & 0x08) {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
-	}
-	if (mb->coded_block_pattern & 0x04) {
-	    for (j = 0; j < 8; j++)
-		memcpy(block_ptr + 16*j + 8, mb_block_ptr + 8*j, 16);	
-	    mb_block_ptr += 64;
-	}
+	i965_ctx = (struct i965_xvmc_context *)context->privData;
+	priv_target = target_surface->privData;
+	priv_past = past_surface ? past_surface->privData : NULL;
+	priv_future = future_surface ? future_surface->privData : NULL;
+
+	ret = setup_surface(priv_target, priv_past, priv_future,
+			    context->width, context->height);
+	if (ret != Success)
+		return ret;
+	ret = binding_tables();
+	if (ret != Success)
+		return ret;
+	ret = interface_descriptor();
+	if (ret != Success)
+		return ret;
+	ret = cs_init(INTERFACE_NUM);
+	if (ret != Success)
+		return ret;
+	ret = vfe_state(VFE_GENERIC_MODE);
+	if (ret != Success)
+		return ret;
 
-	block_ptr += 2*64;
-	if (mb->coded_block_pattern & 0x2) {
-	    memcpy(block_ptr, mb_block_ptr, 128);
-	    mb_block_ptr += 64;
+	if (media_state.mb_data.bo) {
+		if (xvmc_driver->kernel_exec_fencing)
+			drm_intel_gem_bo_unmap_gtt(media_state.mb_data.bo);
+		else
+			drm_intel_bo_unmap(media_state.mb_data.bo);
+
+		drm_intel_bo_unreference(media_state.mb_data.bo);
 	}
+	unsigned int block_num =
+	    (((context->width + 15) >> 4) * ((context->height + 15) >> 4));
+	unsigned int surface_size = (64 * sizeof(short) * 6 * block_num);
+	media_state.mb_data.bo = drm_intel_bo_alloc(xvmc_driver->bufmgr,
+						    "macroblock data",
+						    surface_size, 64);
+	if (!media_state.mb_data.bo)
+		return BadAlloc;
+	if (xvmc_driver->kernel_exec_fencing)
+		drm_intel_gem_bo_map_gtt(media_state.mb_data.bo);
+	else
+		drm_intel_bo_map(media_state.mb_data.bo, 1);
+
+	block_ptr = media_state.mb_data.bo->virtual;
+	unsigned short *mb_block_ptr;
+	for (i = first_macroblock; i < num_macroblocks + first_macroblock; i++) {
+		mb = &macroblock_array->macro_blocks[i];
+		mb_block_ptr = &blocks->blocks[(mb->index << 6)];
+
+		if (mb->coded_block_pattern & 0x20) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j,
+				       16);
+			mb_block_ptr += 64;
+		}
+		if (mb->coded_block_pattern & 0x10) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j + 8,
+				       mb_block_ptr + 8 * j, 16);
+			mb_block_ptr += 64;
+		}
 
-	block_ptr += 64;
-	if (mb->coded_block_pattern & 0x1) 
-	    memcpy(block_ptr, mb_block_ptr, 128);
-	block_ptr += 64; 
-    }
-
-    LOCK_HARDWARE(intel_ctx->hw_context);
-    state_base_address(i965_ctx);
-    flush();	
-    pipeline_select();
-    urb_layout();	
-    media_state_pointers(VFE_GENERIC_MODE);
-    cs_urb_layout();
-    cs_buffer();
-    for (i = first_macroblock; 
-	    i < num_macroblocks + first_macroblock; 
-	    i++, block_offset += 128*6) {
-	mb = &macroblock_array->macro_blocks[i];
-
-	if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
-	    send_media_object(mb, media_state.mb_data.bo, block_offset, 
-		    FRAME_INTRA + INTERFACE_NUM);
-	} else {
-	    if (((mb->motion_type & 3) == XVMC_PREDICTION_FRAME)) {
-		if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_FORWARD)) {
-		    if ((mb->macroblock_type & XVMC_MB_TYPE_MOTION_BACKWARD)) {
-			send_media_object(mb, media_state.mb_data.bo, block_offset, 
-				FRAME_FRAME_PRED_BIDIRECT + INTERFACE_NUM);
-		    } else {
-			send_media_object(mb, media_state.mb_data.bo, block_offset, 
-				FRAME_FRAME_PRED_FORWARD + INTERFACE_NUM);
-		    }
-		} else if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD)) {
-		    send_media_object(mb, media_state.mb_data.bo, block_offset, 
-			    FRAME_FRAME_PRED_BACKWARD + INTERFACE_NUM);
+		block_ptr += 2 * 64;
+		if (mb->coded_block_pattern & 0x08) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j, mb_block_ptr + 8 * j,
+				       16);
+			mb_block_ptr += 64;
 		}
-	    } else if ((mb->motion_type & 3) == XVMC_PREDICTION_FIELD) {
-		if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_FORWARD)) {
-		    if (((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD))) {
-			send_media_object(mb, media_state.mb_data.bo, block_offset, 
-				FRAME_FIELD_PRED_BIDIRECT + INTERFACE_NUM);
-		    } else {
-			send_media_object(mb, media_state.mb_data.bo, block_offset, 
-				FRAME_FIELD_PRED_FORWARD + INTERFACE_NUM);
-		    }
-		} else if ((mb->macroblock_type&XVMC_MB_TYPE_MOTION_BACKWARD)) {
-		    send_media_object(mb, media_state.mb_data.bo, block_offset, 
-			    FRAME_FIELD_PRED_BACKWARD + INTERFACE_NUM);
+		if (mb->coded_block_pattern & 0x04) {
+			for (j = 0; j < 8; j++)
+				memcpy(block_ptr + 16 * j + 8,
+				       mb_block_ptr + 8 * j, 16);
+			mb_block_ptr += 64;
 		}
-	    } else {
-		send_media_object(mb, media_state.mb_data.bo, block_offset, 
-			FRAME_FIELD_PRED_BIDIRECT + INTERFACE_NUM); /*dual prime*/
-	    } 
+
+		block_ptr += 2 * 64;
+		if (mb->coded_block_pattern & 0x2) {
+			memcpy(block_ptr, mb_block_ptr, 128);
+			mb_block_ptr += 64;
+		}
+
+		block_ptr += 64;
+		if (mb->coded_block_pattern & 0x1)
+			memcpy(block_ptr, mb_block_ptr, 128);
+		block_ptr += 64;
 	}
-    }
-    intelFlushBatch(TRUE);
-    UNLOCK_HARDWARE(intel_ctx->hw_context);
-    return Success;
+
+	LOCK_HARDWARE(intel_ctx->hw_context);
+	state_base_address(i965_ctx);
+	flush();
+	pipeline_select();
+	urb_layout();
+	media_state_pointers(VFE_GENERIC_MODE);
+	cs_urb_layout();
+	cs_buffer();
+	for (i = first_macroblock;
+	     i < num_macroblocks + first_macroblock;
+	     i++, block_offset += 128 * 6) {
+		mb = &macroblock_array->macro_blocks[i];
+
+		if (mb->macroblock_type & XVMC_MB_TYPE_INTRA) {
+			send_media_object(mb, media_state.mb_data.bo,
+					  block_offset,
+					  FRAME_INTRA + INTERFACE_NUM);
+		} else {
+			if (((mb->motion_type & 3) == XVMC_PREDICTION_FRAME)) {
+				if ((mb->macroblock_type &
+				     XVMC_MB_TYPE_MOTION_FORWARD)) {
+					if ((mb->macroblock_type &
+					     XVMC_MB_TYPE_MOTION_BACKWARD)) {
+						send_media_object(mb,
+								  media_state.mb_data.
+								  bo,
+								  block_offset,
+								  FRAME_FRAME_PRED_BIDIRECT
+								  +
+								  INTERFACE_NUM);
+					} else {
+						send_media_object(mb,
+								  media_state.mb_data.
+								  bo,
+								  block_offset,
+								  FRAME_FRAME_PRED_FORWARD
+								  +
+								  INTERFACE_NUM);
+					}
+				} else
+				    if ((mb->macroblock_type &
+					 XVMC_MB_TYPE_MOTION_BACKWARD)) {
+					send_media_object(mb,
+							  media_state.
+							  mb_data.bo,
+							  block_offset,
+							  FRAME_FRAME_PRED_BACKWARD
+							  + INTERFACE_NUM);
+				}
+			} else if ((mb->motion_type & 3) ==
+				   XVMC_PREDICTION_FIELD) {
+				if ((mb->macroblock_type &
+				     XVMC_MB_TYPE_MOTION_FORWARD)) {
+					if (((mb->macroblock_type &
+					      XVMC_MB_TYPE_MOTION_BACKWARD))) {
+						send_media_object(mb,
+								  media_state.mb_data.
+								  bo,
+								  block_offset,
+								  FRAME_FIELD_PRED_BIDIRECT
+								  +
+								  INTERFACE_NUM);
+					} else {
+						send_media_object(mb,
+								  media_state.mb_data.
+								  bo,
+								  block_offset,
+								  FRAME_FIELD_PRED_FORWARD
+								  +
+								  INTERFACE_NUM);
+					}
+				} else
+				    if ((mb->macroblock_type &
+					 XVMC_MB_TYPE_MOTION_BACKWARD)) {
+					send_media_object(mb,
+							  media_state.
+							  mb_data.bo,
+							  block_offset,
+							  FRAME_FIELD_PRED_BACKWARD
+							  + INTERFACE_NUM);
+				}
+			} else {
+				send_media_object(mb, media_state.mb_data.bo, block_offset, FRAME_FIELD_PRED_BIDIRECT + INTERFACE_NUM);	/*dual prime */
+			}
+		}
+	}
+	intelFlushBatch(TRUE);
+	UNLOCK_HARDWARE(intel_ctx->hw_context);
+	return Success;
 }
 
 struct _intel_xvmc_driver xvmc_vld_driver = {
-    .type = XVMC_I965_MPEG2_VLD,
-    .create_context = create_context,
-    .destroy_context = destroy_context,
-    .create_surface = create_surface,
-    .destroy_surface = destroy_surface,
-    .load_qmatrix = load_qmatrix,
-    .get_surface_status = get_surface_status,
-    .begin_surface = begin_surface,
+	.type = XVMC_I965_MPEG2_VLD,
+	.create_context = create_context,
+	.destroy_context = destroy_context,
+	.create_surface = create_surface,
+	.destroy_surface = destroy_surface,
+	.load_qmatrix = load_qmatrix,
+	.get_surface_status = get_surface_status,
+	.begin_surface = begin_surface,
 	.render_surface = render_surface,
-    .put_surface = put_surface,
-    .put_slice = put_slice,
-    .put_slice2 = put_slice2
+	.put_surface = put_surface,
+	.put_slice = put_slice,
+	.put_slice2 = put_slice2
 };