Rename common infrastructure to the intel namespace.

After splitting out the i810 driver into its own legacy directory, we
can identify the common routines not as i830 but as intel. This
clarifies the code which *is* i830 specific.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

26 files changed, 547 insertions, 657 deletions

diff --git a/src/Makefile.am b/src/Makefile.am
index 9a502cc4..dfc55ef0 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -37,51 +37,36 @@ intel_drv_la_LIBADD += @PCIACCESS_LIBS@
 
 NULL:=#
 
-INTEL_DRI_SRCS = \
-         i830_dri.c \
-	 $(NULL)
-
-INTEL_XVMC_SRCS = \
-	 i830_hwmc.h \
-	 i830_hwmc.c \
-	 $(NULL)
-
 intel_drv_la_SOURCES = \
          brw_defines.h \
          brw_structs.h \
          common.h \
+         intel.h \
 	 intel_module.c \
+         intel_driver.c \
+         intel_batchbuffer.c \
+         intel_batchbuffer.h \
+         intel_memory.c \
+	 intel_uxa.c \
+         intel_video.c \
+         intel_video.h \
 	 i830_3d.c \
-         i830_accel.c \
-         i830_batchbuffer.c \
-         i830_batchbuffer.h \
-         i830_driver.c \
-         i830.h \
-         i830_memory.c \
-         i830_video.c \
-         i830_video.h \
+	 i830_render.c \
 	 i830_reg.h \
-	 i915_3d.c \
 	 i915_3d.h \
 	 i915_reg.h \
+	 i915_3d.c \
+	 i915_render.c \
 	 i915_video.c \
+	 i965_reg.h \
 	 i965_video.c \
-	 i830_uxa.c \
-	 i830_render.c \
-	 i915_render.c \
 	 i965_render.c \
 	 drmmode_display.c \
 	 $(NULL)
 
-EXTRA_DIST = 		\
-	$(XMODE_SRCS)	\
-	$(INTEL_DRI_SRCS) \
-	$(INTEL_XVMC_SRCS) \
-	$(NULL)
-
 if DRI
 intel_drv_la_SOURCES += \
-	$(INTEL_DRI_SRCS) \
+	intel_dri.c \
 	$(NULL)
 intel_drv_la_LIBADD += \
 	$(DRI_LIBS) \
@@ -90,6 +75,7 @@ endif
 
 if XVMC
 intel_drv_la_SOURCES += \
-	$(INTEL_XVMC_SRCS) \
+	intel_hwmc.h \
+	intel_hwmc.c \
 	$(NULL)
 endif
diff --git a/src/drmmode_display.c b/src/drmmode_display.c
index ba24206e..17f65415 100644
--- a/src/drmmode_display.c
+++ b/src/drmmode_display.c
@@ -38,7 +38,7 @@
 
 #include "xorgVersion.h"
 
-#include "i830.h"
+#include "intel.h"
 #include "intel_bufmgr.h"
 #include "xf86drmMode.h"
 #include "X11/Xatom.h"
@@ -402,7 +402,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode,
 		drmmode_output_dpms(output, DPMSModeOn);
 	}
 
-	i830_set_gem_max_sizes(scrn);
+	intel_set_gem_max_sizes(scrn);
 
 	if (scrn->pScreen)
 		xf86_reload_cursors(scrn->pScreen);
@@ -476,10 +476,10 @@ drmmode_crtc_shadow_allocate(xf86CrtcPtr crtc, int width, int height)
 	unsigned long rotate_pitch;
 	int ret;
 
-	drmmode_crtc->rotate_bo = i830_allocate_framebuffer(scrn,
-							    width, height,
-							    drmmode->cpp,
-							    &rotate_pitch);
+	drmmode_crtc->rotate_bo = intel_allocate_framebuffer(scrn,
+							     width, height,
+							     drmmode->cpp,
+							     &rotate_pitch);
 
 	if (!drmmode_crtc->rotate_bo) {
 		xf86DrvMsg(crtc->scrn->scrnIndex, X_ERROR,
@@ -536,7 +536,7 @@ drmmode_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height)
 		return NULL;
 	}
 
-	i830_set_pixmap_bo(rotate_pixmap, drmmode_crtc->rotate_bo);
+	intel_set_pixmap_bo(rotate_pixmap, drmmode_crtc->rotate_bo);
 
 	intel->shadow_present = TRUE;
 
@@ -552,7 +552,7 @@ drmmode_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *dat
 	drmmode_ptr drmmode = drmmode_crtc->drmmode;
 
 	if (rotate_pixmap) {
-		i830_set_pixmap_bo(rotate_pixmap, NULL);
+		intel_set_pixmap_bo(rotate_pixmap, NULL);
 		FreeScratchPixmapHeader(rotate_pixmap);
 	}
 
@@ -1267,10 +1267,10 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
 	old_fb_id = drmmode->fb_id;
 	old_front = intel->front_buffer;
 
-	intel->front_buffer = i830_allocate_framebuffer(scrn,
-							width, height,
-							intel->cpp,
-							&pitch);
+	intel->front_buffer = intel_allocate_framebuffer(scrn,
+							 width, height,
+							 intel->cpp,
+							 &pitch);
 	if (!intel->front_buffer)
 		goto fail;
 
@@ -1287,7 +1287,8 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
 
 	pixmap = screen->GetScreenPixmap(screen);
 	screen->ModifyPixmapHeader(pixmap, width, height, -1, -1, pitch, NULL);
-	i830_set_pixmap_bo(pixmap, intel->front_buffer);
+	intel_set_pixmap_bo(pixmap, intel->front_buffer);
+	intel_get_pixmap_private(pixmap)->busy = 1;
 
 	for (i = 0; i < xf86_config->num_crtc; i++) {
 		xf86CrtcPtr crtc = xf86_config->crtc[i];
diff --git a/src/i830_3d.c b/src/i830_3d.c
index a92da055..10432011 100644
--- a/src/i830_3d.c
+++ b/src/i830_3d.c
@@ -30,7 +30,7 @@
 #endif
 
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 
 #include "i830_reg.h"
 
diff --git a/src/i830_accel.c b/src/i830_accel.c
deleted file mode 100644
index 1e5f03bd..00000000
--- a/src/i830_accel.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/**************************************************************************
-
-Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas.
-All Rights Reserved.
-
-Permission is hereby granted, free of charge, to any person obtaining a
-copy of this software and associated documentation files (the
-"Software"), to deal in the Software without restriction, including
-without limitation the rights to use, copy, modify, merge, publish,
-distribute, sub license, and/or sell copies of the Software, and to
-permit persons to whom the Software is furnished to do so, subject to
-the following conditions:
-
-The above copyright notice and this permission notice (including the
-next paragraph) shall be included in all copies or substantial portions
-of the Software.
-
-THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
-OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
-IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
-ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-**************************************************************************/
-
-/*
- * Authors:
- *   Keith Whitwell <keith@tungstengraphics.com>
- *
- */
-
-/*
- * XXX So far, for GXxor this is about 40% of the speed of SW, but CPU
- * utilisation falls from 95% to < 5%.
- */
-
-#ifdef HAVE_CONFIG_H
-#include "config.h"
-#endif
-
-#include "xf86.h"
-#include "i830.h"
-#include "i915_drm.h"
-
-unsigned long intel_get_pixmap_pitch(PixmapPtr pixmap)
-{
-	return (unsigned long)pixmap->devKind;
-}
-
-void i830_debug_flush(ScrnInfoPtr scrn)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	if (intel->debug_flush & DEBUG_FLUSH_CACHES)
-		intel_batch_emit_flush(scrn);
-
-	if (intel->debug_flush & DEBUG_FLUSH_BATCHES)
-		intel_batch_submit(scrn, FALSE);
-}
-
-/* The following function sets up the supported acceleration. Call it
- * from the FbInit() function in the SVGA driver, or before ScreenInit
- * in a monolithic server.
- */
-Bool I830AccelInit(ScreenPtr screen)
-{
-	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	/* Limits are described in the BLT engine chapter under Graphics Data Size
-	 * Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO,
-	 * 3DSTATE_DRAWING_RECTANGLE, 3DSTATE_MAP_INFO, and 3DSTATE_MAP_INFO.
-	 *
-	 * i845 through i965 limits 2D rendering to 65536 lines and pitch of 32768.
-	 *
-	 * i965 limits 3D surface to (2*element size)-aligned offset if un-tiled.
-	 * i965 limits 3D surface to 4kB-aligned offset if tiled.
-	 * i965 limits 3D surfaces to w,h of ?,8192.
-	 * i965 limits 3D surface to pitch of 1B - 128kB.
-	 * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
-	 * i965 limits 3D surface pitch alignment to 512B if tiled.
-	 * i965 limits 3D destination drawing rect to w,h of 8192,8192.
-	 *
-	 * i915 limits 3D textures to 4B-aligned offset if un-tiled.
-	 * i915 limits 3D textures to ~4kB-aligned offset if tiled.
-	 * i915 limits 3D textures to width,height of 2048,2048.
-	 * i915 limits 3D textures to pitch of 16B - 8kB, in dwords.
-	 * i915 limits 3D destination to ~4kB-aligned offset if tiled.
-	 * i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled.
-	 * i915 limits 3D destination to pitch 64B-aligned if used with depth.
-	 * i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled.
-	 * i915 limits 3D destination to POT aligned pitch if tiled.
-	 * i915 limits 3D destination drawing rect to w,h of 2048,2048.
-	 *
-	 * i845 limits 3D textures to 4B-aligned offset if un-tiled.
-	 * i845 limits 3D textures to ~4kB-aligned offset if tiled.
-	 * i845 limits 3D textures to width,height of 2048,2048.
-	 * i845 limits 3D textures to pitch of 4B - 8kB, in dwords.
-	 * i845 limits 3D destination to 4B-aligned offset if un-tiled.
-	 * i845 limits 3D destination to ~4kB-aligned offset if tiled.
-	 * i845 limits 3D destination to pitch of 8B - 8kB, in dwords.
-	 * i845 limits 3D destination drawing rect to w,h of 2048,2048.
-	 *
-	 * For the tiled issues, the only tiled buffer we draw to should be
-	 * the front, which will have an appropriate pitch/offset already set up,
-	 * so UXA doesn't need to worry.
-	 */
-	if (IS_I965G(intel)) {
-		intel->accel_pixmap_offset_alignment = 4 * 2;
-		intel->accel_pixmap_pitch_alignment = 64;
-		intel->accel_max_x = 8192;
-		intel->accel_max_y = 8192;
-	} else {
-		intel->accel_pixmap_offset_alignment = 4;
-		intel->accel_pixmap_pitch_alignment = 64;
-		intel->accel_max_x = 2048;
-		intel->accel_max_y = 2048;
-	}
-
-	return i830_uxa_init(screen);
-}
diff --git a/src/i830_render.c b/src/i830_render.c
index 622fe653..4bc582c9 100644
--- a/src/i830_render.c
+++ b/src/i830_render.c
@@ -31,7 +31,7 @@
 #endif
 
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 #include "i830_reg.h"
 
 struct blendinfo {
@@ -251,12 +251,12 @@ static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
 	uint32_t wrap_mode;
 	uint32_t texcoordtype;
 
-	pitch = intel_get_pixmap_pitch(pixmap);
+	pitch = intel_pixmap_pitch(pixmap);
 	intel->scale_units[unit][0] = pixmap->drawable.width;
 	intel->scale_units[unit][1] = pixmap->drawable.height;
 	intel->transform[unit] = picture->transform;
 
-	if (i830_transform_is_affine(intel->transform[unit]))
+	if (intel_transform_is_affine(intel->transform[unit]))
 		texcoordtype = TEXCOORDTYPE_CARTESIAN;
 	else
 		texcoordtype = TEXCOORDTYPE_HOMOGENEOUS;
@@ -292,9 +292,9 @@ static void i830_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
 	}
 	filter |= (MIPFILTER_NONE << TM0S3_MIP_FILTER_SHIFT);
 
-	if (i830_pixmap_tiled(pixmap)) {
+	if (intel_pixmap_tiled(pixmap)) {
 		tiling_bits = TM0S1_TILED_SURFACE;
-		if (i830_get_pixmap_intel(pixmap)->tiling
+		if (intel_get_pixmap_private(pixmap)->tiling
 				== I915_TILING_Y)
 			tiling_bits |= TM0S1_TILE_WALK;
 	} else
@@ -450,9 +450,9 @@ i830_prepare_composite(int op, PicturePtr source_picture,
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	drm_intel_bo *bo_table[] = {
 		NULL,		/* batch_bo */
-		i830_get_pixmap_bo(source),
-		mask ? i830_get_pixmap_bo(mask) : NULL,
-		i830_get_pixmap_bo(dest),
+		intel_get_pixmap_bo(source),
+		mask ? intel_get_pixmap_bo(mask) : NULL,
+		intel_get_pixmap_bo(dest),
 	};
 
 	intel->render_source_picture = source_picture;
@@ -488,7 +488,7 @@ i830_prepare_composite(int op, PicturePtr source_picture,
 	if (!i830_get_dest_format(dest_picture, &intel->render_dest_format))
 		return FALSE;
 
-	if (!i830_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
+	if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
 		return FALSE;
 
 	if (mask) {
@@ -563,8 +563,8 @@ i830_prepare_composite(int op, PicturePtr source_picture,
 		intel->s8_blendctl = blendctl;
 	}
 
-	if(i830_uxa_pixmap_is_dirty(source) ||
-	   (mask && i830_uxa_pixmap_is_dirty(mask)))
+	if(intel_pixmap_is_dirty(source) ||
+	   (mask && intel_pixmap_is_dirty(mask)))
 		intel_batch_emit_flush(scrn);
 
 	intel->needs_render_state_emit = TRUE;
@@ -585,9 +585,9 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 
 	assert(intel->in_batch_atomic);
 
-	if (i830_pixmap_tiled(intel->render_dest)) {
+	if (intel_pixmap_tiled(intel->render_dest)) {
 		tiling_bits = BUF_3D_TILED_SURFACE;
-		if (i830_get_pixmap_intel(intel->render_dest)->tiling
+		if (intel_get_pixmap_private(intel->render_dest)->tiling
 				== I915_TILING_Y)
 			tiling_bits |= BUF_3D_TILE_WALK_Y;
 	} else
@@ -595,7 +595,7 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 
 	OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 	OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits |
-		  BUF_3D_PITCH(intel_get_pixmap_pitch(intel->render_dest)));
+		  BUF_3D_PITCH(intel_pixmap_pitch(intel->render_dest)));
 	OUT_RELOC_PIXMAP(intel->render_dest,
 			 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 
@@ -636,12 +636,12 @@ static void i830_emit_composite_state(ScrnInfoPtr scrn)
 		  DISABLE_STENCIL_WRITE | ENABLE_TEX_CACHE |
 		  DISABLE_DITHER | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE);
 
-	if (i830_transform_is_affine(intel->render_source_picture->transform))
+	if (intel_transform_is_affine(intel->render_source_picture->transform))
 		texcoordfmt |= (TEXCOORDFMT_2D << 0);
 	else
 		texcoordfmt |= (TEXCOORDFMT_3D << 0);
 	if (intel->render_mask) {
-		if (i830_transform_is_affine
+		if (intel_transform_is_affine
 		    (intel->render_mask_picture->transform))
 			texcoordfmt |= (TEXCOORDFMT_2D << 2);
 		else
@@ -677,23 +677,23 @@ i830_emit_composite_primitive(PixmapPtr dest,
 	{
 		float x = srcX, y = srcY;
 
-		is_affine_src = i830_transform_is_affine(intel->transform[0]);
+		is_affine_src = intel_transform_is_affine(intel->transform[0]);
 		if (is_affine_src) {
-			if (!i830_get_transformed_coordinates(x, y,
+			if (!intel_get_transformed_coordinates(x, y,
 							      intel->
 							      transform[0],
 							      &src_x[0],
 							      &src_y[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates(x, y + h,
+			if (!intel_get_transformed_coordinates(x, y + h,
 							      intel->
 							      transform[0],
 							      &src_x[1],
 							      &src_y[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates(x + w, y + h,
+			if (!intel_get_transformed_coordinates(x + w, y + h,
 							      intel->
 							      transform[0],
 							      &src_x[2],
@@ -702,7 +702,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 
 			per_vertex += 2;	/* src x/y */
 		} else {
-			if (!i830_get_transformed_coordinates_3d(x, y,
+			if (!intel_get_transformed_coordinates_3d(x, y,
 								 intel->
 								 transform[0],
 								 &src_x[0],
@@ -710,7 +710,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 								 &src_w[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(x, y + h,
+			if (!intel_get_transformed_coordinates_3d(x, y + h,
 								 intel->
 								 transform[0],
 								 &src_x[1],
@@ -718,7 +718,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 								 &src_w[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+			if (!intel_get_transformed_coordinates_3d(x + w, y + h,
 								 intel->
 								 transform[0],
 								 &src_x[2],
@@ -733,23 +733,23 @@ i830_emit_composite_primitive(PixmapPtr dest,
 	if (intel->render_mask) {
 		float x = maskX, y = maskY;
 
-		is_affine_mask = i830_transform_is_affine(intel->transform[1]);
+		is_affine_mask = intel_transform_is_affine(intel->transform[1]);
 		if (is_affine_mask) {
-			if (!i830_get_transformed_coordinates(x, y,
+			if (!intel_get_transformed_coordinates(x, y,
 							      intel->
 							      transform[1],
 							      &mask_x[0],
 							      &mask_y[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates(x, y + h,
+			if (!intel_get_transformed_coordinates(x, y + h,
 							      intel->
 							      transform[1],
 							      &mask_x[1],
 							      &mask_y[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates(x + w, y + h,
+			if (!intel_get_transformed_coordinates(x + w, y + h,
 							      intel->
 							      transform[1],
 							      &mask_x[2],
@@ -758,7 +758,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 
 			per_vertex += 2;	/* mask x/y */
 		} else {
-			if (!i830_get_transformed_coordinates_3d(x, y,
+			if (!intel_get_transformed_coordinates_3d(x, y,
 								 intel->
 								 transform[1],
 								 &mask_x[0],
@@ -766,7 +766,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 								 &mask_w[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(x, y + h,
+			if (!intel_get_transformed_coordinates_3d(x, y + h,
 								 intel->
 								 transform[1],
 								 &mask_x[1],
@@ -774,7 +774,7 @@ i830_emit_composite_primitive(PixmapPtr dest,
 								 &mask_w[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(x + w, y + h,
+			if (!intel_get_transformed_coordinates_3d(x + w, y + h,
 								 intel->
 								 transform[1],
 								 &mask_x[2],
diff --git a/src/i915_3d.c b/src/i915_3d.c
index de919eec..77db5685 100644
--- a/src/i915_3d.c
+++ b/src/i915_3d.c
@@ -30,7 +30,7 @@
 #endif
 
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 
 #include "i915_reg.h"
 
diff --git a/src/i915_render.c b/src/i915_render.c
index 782c2594..f50b5c9b 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -31,7 +31,7 @@
 #endif
 
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 #include "i915_reg.h"
 #include "i915_3d.h"
 
@@ -301,7 +301,7 @@ static Bool i915_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
 	int w, h, i;
 	uint32_t wrap_mode, tiling_bits;
 
-	pitch = intel_get_pixmap_pitch(pixmap);
+	pitch = intel_pixmap_pitch(pixmap);
 	w = picture->pDrawable->width;
 	h = picture->pDrawable->height;
 	intel->scale_units[unit][0] = 1. / pixmap->drawable.width;
@@ -352,9 +352,9 @@ static Bool i915_texture_setup(PicturePtr picture, PixmapPtr pixmap, int unit)
 	}
 
 	/* offset filled in at emit time */
-	if (i830_pixmap_tiled(pixmap)) {
+	if (intel_pixmap_tiled(pixmap)) {
 		tiling_bits = MS3_TILED_SURFACE;
-		if (i830_get_pixmap_intel(pixmap)->tiling
+		if (intel_get_pixmap_private(pixmap)->tiling
 				== I915_TILING_Y)
 			tiling_bits |= MS3_TILE_WALK;
 	} else
@@ -441,19 +441,19 @@ i915_emit_composite_primitive_affine_source(PixmapPtr dest,
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	float src_x[3], src_y[3];
 
-	if (!i830_get_transformed_coordinates(srcX, srcY,
+	if (!intel_get_transformed_coordinates(srcX, srcY,
 					      intel->transform[0],
 					      &src_x[0],
 					      &src_y[0]))
 		return;
 
-	if (!i830_get_transformed_coordinates(srcX, srcY + h,
+	if (!intel_get_transformed_coordinates(srcX, srcY + h,
 					      intel->transform[0],
 					      &src_x[1],
 					      &src_y[1]))
 		return;
 
-	if (!i830_get_transformed_coordinates(srcX + w, srcY + h,
+	if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
 					      intel->transform[0],
 					      &src_x[2],
 					      &src_y[2]))
@@ -553,23 +553,23 @@ i915_emit_composite_primitive(PixmapPtr dest,
 	if (! intel->render_source_is_solid) {
 		src_unit = tex_unit++;
 
-		is_affine_src = i830_transform_is_affine(intel->transform[src_unit]);
+		is_affine_src = intel_transform_is_affine(intel->transform[src_unit]);
 		if (is_affine_src) {
-			if (!i830_get_transformed_coordinates(srcX, srcY,
+			if (!intel_get_transformed_coordinates(srcX, srcY,
 							      intel->
 							      transform[src_unit],
 							      &src_x[0],
 							      &src_y[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates(srcX, srcY + h,
+			if (!intel_get_transformed_coordinates(srcX, srcY + h,
 							      intel->
 							      transform[src_unit],
 							      &src_x[1],
 							      &src_y[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates(srcX + w, srcY + h,
+			if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
 							      intel->
 							      transform[src_unit],
 							      &src_x[2],
@@ -578,7 +578,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 
 			per_vertex += 2;	/* src x/y */
 		} else {
-			if (!i830_get_transformed_coordinates_3d(srcX, srcY,
+			if (!intel_get_transformed_coordinates_3d(srcX, srcY,
 								 intel->
 								 transform[src_unit],
 								 &src_x[0],
@@ -586,7 +586,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 								 &src_w[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(srcX, srcY + h,
+			if (!intel_get_transformed_coordinates_3d(srcX, srcY + h,
 								 intel->
 								 transform[src_unit],
 								 &src_x[1],
@@ -594,7 +594,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 								 &src_w[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(srcX + w, srcY + h,
+			if (!intel_get_transformed_coordinates_3d(srcX + w, srcY + h,
 								 intel->
 								 transform[src_unit],
 								 &src_x[2],
@@ -609,23 +609,23 @@ i915_emit_composite_primitive(PixmapPtr dest,
 	if (intel->render_mask && ! intel->render_mask_is_solid) {
 		mask_unit = tex_unit++;
 
-		is_affine_mask = i830_transform_is_affine(intel->transform[mask_unit]);
+		is_affine_mask = intel_transform_is_affine(intel->transform[mask_unit]);
 		if (is_affine_mask) {
-			if (!i830_get_transformed_coordinates(maskX, maskY,
+			if (!intel_get_transformed_coordinates(maskX, maskY,
 							      intel->
 							      transform[mask_unit],
 							      &mask_x[0],
 							      &mask_y[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates(maskX, maskY + h,
+			if (!intel_get_transformed_coordinates(maskX, maskY + h,
 							      intel->
 							      transform[mask_unit],
 							      &mask_x[1],
 							      &mask_y[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates(maskX + w, maskY + h,
+			if (!intel_get_transformed_coordinates(maskX + w, maskY + h,
 							      intel->
 							      transform[mask_unit],
 							      &mask_x[2],
@@ -634,7 +634,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 
 			per_vertex += 2;	/* mask x/y */
 		} else {
-			if (!i830_get_transformed_coordinates_3d(maskX, maskY,
+			if (!intel_get_transformed_coordinates_3d(maskX, maskY,
 								 intel->
 								 transform[mask_unit],
 								 &mask_x[0],
@@ -642,7 +642,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 								 &mask_w[0]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(maskX, maskY + h,
+			if (!intel_get_transformed_coordinates_3d(maskX, maskY + h,
 								 intel->
 								 transform[mask_unit],
 								 &mask_x[1],
@@ -650,7 +650,7 @@ i915_emit_composite_primitive(PixmapPtr dest,
 								 &mask_w[1]))
 				return;
 
-			if (!i830_get_transformed_coordinates_3d(maskX + w, maskY + h,
+			if (!intel_get_transformed_coordinates_3d(maskX + w, maskY + h,
 								 intel->
 								 transform[mask_unit],
 								 &mask_x[2],
@@ -731,9 +731,9 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	drm_intel_bo *bo_table[] = {
 		NULL,		/* batch_bo */
-		i830_get_pixmap_bo(dest),
-		source ? i830_get_pixmap_bo(source) : NULL,
-		mask ? i830_get_pixmap_bo(mask) : NULL,
+		intel_get_pixmap_bo(dest),
+		source ? intel_get_pixmap_bo(source) : NULL,
+		mask ? intel_get_pixmap_bo(mask) : NULL,
 	};
 	int tex_unit = 0;
 	int floats_per_vertex;
@@ -776,7 +776,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 				  &intel->i915_render_state.dst_format))
 		return FALSE;
 
-	if (!i830_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
+	if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
 		return FALSE;
 
 	intel->needs_render_ca_pass = FALSE;
@@ -809,7 +809,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 			return FALSE;
 		}
 
-		if (i830_transform_is_affine(source_picture->transform))
+		if (intel_transform_is_affine(source_picture->transform))
 			floats_per_vertex += 2;	/* src x/y */
 		else
 			floats_per_vertex += 4;	/* src x/y/z/w */
@@ -823,7 +823,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 				return FALSE;
 			}
 
-			if (i830_transform_is_affine(mask_picture->transform))
+			if (intel_transform_is_affine(mask_picture->transform))
 				floats_per_vertex += 2;	/* mask x/y */
 			else
 				floats_per_vertex += 4;	/* mask x/y/z/w */
@@ -835,8 +835,8 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 	/* BUF_INFO is an implicit flush */
 	if (dest != intel->render_current_dest)
 		intel_batch_do_flush(scrn);
-	else if((source && i830_uxa_pixmap_is_dirty(source)) ||
-		(mask && i830_uxa_pixmap_is_dirty(mask)))
+	else if((source && intel_pixmap_is_dirty(source)) ||
+		(mask && intel_pixmap_is_dirty(mask)))
 		intel_batch_emit_flush(scrn);
 
 	intel->needs_render_state_emit = TRUE;
@@ -847,7 +847,7 @@ i915_prepare_composite(int op, PicturePtr source_picture,
 			intel->prim_emit = i915_emit_composite_primitive_constant;
 		else if (intel->transform[0] == NULL)
 			intel->prim_emit = i915_emit_composite_primitive_identity_source;
-		else if (i830_transform_is_affine(intel->transform[0]))
+		else if (intel_transform_is_affine(intel->transform[0]))
 			intel->prim_emit = i915_emit_composite_primitive_affine_source;
 	} else {
 		if (intel->transform[0] == NULL) {
@@ -900,7 +900,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
 			else
 				src_reg = FS_OC;
 
-			if (i830_transform_is_affine(intel->transform[0]))
+			if (intel_transform_is_affine(intel->transform[0]))
 				i915_fs_texld(src_reg, FS_S0, FS_T0);
 			else
 				i915_fs_texldp(src_reg, FS_S0, FS_T0);
@@ -924,7 +924,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
 		tex_unit = 0;
 		if (! is_solid_src) {
 			/* Load the source_picture texel */
-			if (i830_transform_is_affine(intel->transform[tex_unit]))
+			if (intel_transform_is_affine(intel->transform[tex_unit]))
 				i915_fs_texld(FS_R0, FS_S0, FS_T0);
 			else
 				i915_fs_texldp(FS_R0, FS_S0, FS_T0);
@@ -935,7 +935,7 @@ i915_composite_emit_shader(intel_screen_private *intel, CARD8 op)
 
 		if (! is_solid_mask) {
 			/* Load the mask_picture texel */
-			if (i830_transform_is_affine(intel->transform[tex_unit]))
+			if (intel_transform_is_affine(intel->transform[tex_unit]))
 				i915_fs_texld(FS_R1, FS_S0 + t, FS_T0 + t);
 			else
 				i915_fs_texldp(FS_R1, FS_S0 + t, FS_T0 + t);
@@ -1041,9 +1041,9 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
 
 		intel_batch_do_flush(scrn);
 
-		if (i830_pixmap_tiled(dest)) {
+		if (intel_pixmap_tiled(dest)) {
 			tiling_bits = BUF_3D_TILED_SURFACE;
-			if (i830_get_pixmap_intel(dest)->tiling
+			if (intel_get_pixmap_private(dest)->tiling
 			    == I915_TILING_Y)
 				tiling_bits |= BUF_3D_TILE_WALK_Y;
 		} else
@@ -1051,7 +1051,7 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
 
 		OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 		OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling_bits |
-			  BUF_3D_PITCH(intel_get_pixmap_pitch(dest)));
+			  BUF_3D_PITCH(intel_pixmap_pitch(dest)));
 		OUT_RELOC_PIXMAP(dest, I915_GEM_DOMAIN_RENDER,
 				 I915_GEM_DOMAIN_RENDER, 0);
 
@@ -1078,14 +1078,14 @@ static void i915_emit_composite_setup(ScrnInfoPtr scrn)
 		if (! is_solid_src) {
 		    ss2 &= ~S2_TEXCOORD_FMT(t, TEXCOORDFMT_NOT_PRESENT);
 		    ss2 |= S2_TEXCOORD_FMT(t,
-					   i830_transform_is_affine(intel->transform[t]) ?
+					   intel_transform_is_affine(intel->transform[t]) ?
 					   TEXCOORDFMT_2D : TEXCOORDFMT_4D);
 		    t++;
 		}
 		if (mask && ! is_solid_mask) {
 		    ss2 &= ~S2_TEXCOORD_FMT(t, TEXCOORDFMT_NOT_PRESENT);
 		    ss2 |= S2_TEXCOORD_FMT(t,
-					   i830_transform_is_affine(intel->transform[t]) ?
+					   intel_transform_is_affine(intel->transform[t]) ?
 					   TEXCOORDFMT_2D : TEXCOORDFMT_4D);
 		    t++;
 		}
diff --git a/src/i915_video.c b/src/i915_video.c
index 893855bd..428ea3dc 100644
--- a/src/i915_video.c
+++ b/src/i915_video.c
@@ -34,8 +34,8 @@
 #include "xf86xv.h"
 #include "fourcc.h"
 
-#include "i830.h"
-#include "i830_video.h"
+#include "intel.h"
+#include "intel_video.h"
 #include "i915_reg.h"
 #include "i915_3d.h"
 
@@ -149,15 +149,15 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
 			  DSTORG_VERT_BIAS(0x8) | format);
 
 		/* front buffer, pitch, offset */
-		if (i830_pixmap_tiled(target)) {
+		if (intel_pixmap_tiled(target)) {
 			tiling = BUF_3D_TILED_SURFACE;
-			if (i830_get_pixmap_intel(target)->tiling == I915_TILING_Y)
+			if (intel_get_pixmap_private(target)->tiling == I915_TILING_Y)
 				tiling |= BUF_3D_TILE_WALK_Y;
 		} else
 			tiling = 0;
 		OUT_BATCH(_3DSTATE_BUF_INFO_CMD);
 		OUT_BATCH(BUF_3D_ID_COLOR_BACK | tiling |
-			  BUF_3D_PITCH(intel_get_pixmap_pitch(target)));
+			  BUF_3D_PITCH(intel_pixmap_pitch(target)));
 		OUT_RELOC_PIXMAP(target, I915_GEM_DOMAIN_RENDER,
 				 I915_GEM_DOMAIN_RENDER, 0);
 
@@ -477,5 +477,5 @@ I915DisplayVideoTextured(ScrnInfoPtr scrn,
 		target->drawable.pScreen->DestroyPixmap(target);
 	}
 
-	i830_debug_flush(scrn);
+	intel_debug_flush(scrn);
 }
diff --git a/src/i965_render.c b/src/i965_render.c
index 1402d148..37a7ab73 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -35,7 +35,7 @@
 
 #include <assert.h>
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 #include "i830_reg.h"
 #include "i965_reg.h"
 
@@ -1071,7 +1071,7 @@ i965_set_picture_surface_state(intel_screen_private *intel,
 {
 	struct brw_surface_state_padded *ss;
 	struct brw_surface_state local_ss;
-	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
+	struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
 
 	ss = (struct brw_surface_state_padded *)ss_bo->virtual + ss_index;
 
@@ -1107,9 +1107,9 @@ i965_set_picture_surface_state(intel_screen_private *intel,
 	local_ss.ss2.render_target_rotation = 0;
 	local_ss.ss2.height = pixmap->drawable.height - 1;
 	local_ss.ss2.width = pixmap->drawable.width - 1;
-	local_ss.ss3.pitch = intel_get_pixmap_pitch(pixmap) - 1;
+	local_ss.ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
 	local_ss.ss3.tile_walk = 0;	/* Tiled X */
-	local_ss.ss3.tiled_surface = i830_pixmap_tiled(pixmap) ? 1 : 0;
+	local_ss.ss3.tiled_surface = intel_pixmap_tiled(pixmap) ? 1 : 0;
 
 	memcpy(ss, &local_ss, sizeof(local_ss));
 
@@ -1163,7 +1163,7 @@ static void i965_emit_composite_state(ScrnInfoPtr scrn)
 
 	/* Mark the destination dirty within this batch */
 	intel_batch_mark_pixmap_domains(intel,
-					i830_get_pixmap_intel(dest),
+					intel_get_pixmap_private(dest),
 					I915_GEM_DOMAIN_RENDER,
 					I915_GEM_DOMAIN_RENDER);
 
@@ -1552,8 +1552,8 @@ i965_prepare_composite(int op, PicturePtr source_picture,
 	}
 
 	/* Flush any pending writes prior to relocating the textures. */
-	if(i830_uxa_pixmap_is_dirty(source) ||
-	   (mask && i830_uxa_pixmap_is_dirty(mask)))
+	if (intel_pixmap_is_dirty(source) ||
+	    (mask && intel_pixmap_is_dirty(mask)))
 		intel_batch_emit_flush(scrn);
 
 
@@ -1632,7 +1632,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
 	intel->scale_units[0][1] = source->drawable.height;
 
 	intel->transform[0] = source_picture->transform;
-	composite_op->is_affine = i830_transform_is_affine(intel->transform[0]);
+	composite_op->is_affine = intel_transform_is_affine(intel->transform[0]);
 
 	if (!mask) {
 		intel->transform[1] = NULL;
@@ -1643,7 +1643,7 @@ i965_prepare_composite(int op, PicturePtr source_picture,
 		intel->scale_units[1][0] = mask->drawable.width;
 		intel->scale_units[1][1] = mask->drawable.height;
 		composite_op->is_affine &=
-		    i830_transform_is_affine(intel->transform[1]);
+		    intel_transform_is_affine(intel->transform[1]);
 	}
 
 	if (mask) {
@@ -1735,30 +1735,30 @@ i965_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY,
 	Bool is_affine = render_state->composite_op.is_affine;
 
 	if (is_affine) {
-		if (!i830_get_transformed_coordinates(srcX, srcY,
+		if (!intel_get_transformed_coordinates(srcX, srcY,
 						      intel->transform[0],
 						      &src_x[0], &src_y[0]))
 			return;
-		if (!i830_get_transformed_coordinates(srcX, srcY + h,
+		if (!intel_get_transformed_coordinates(srcX, srcY + h,
 						      intel->transform[0],
 						      &src_x[1], &src_y[1]))
 			return;
-		if (!i830_get_transformed_coordinates(srcX + w, srcY + h,
+		if (!intel_get_transformed_coordinates(srcX + w, srcY + h,
 						      intel->transform[0],
 						      &src_x[2], &src_y[2]))
 			return;
 	} else {
-		if (!i830_get_transformed_coordinates_3d(srcX, srcY,
+		if (!intel_get_transformed_coordinates_3d(srcX, srcY,
 							 intel->transform[0],
 							 &src_x[0], &src_y[0],
 							 &src_w[0]))
 			return;
-		if (!i830_get_transformed_coordinates_3d(srcX, srcY + h,
+		if (!intel_get_transformed_coordinates_3d(srcX, srcY + h,
 							 intel->transform[0],
 							 &src_x[1], &src_y[1],
 							 &src_w[1]))
 			return;
-		if (!i830_get_transformed_coordinates_3d(srcX + w, srcY + h,
+		if (!intel_get_transformed_coordinates_3d(srcX + w, srcY + h,
 							 intel->transform[0],
 							 &src_x[2], &src_y[2],
 							 &src_w[2]))
@@ -1770,35 +1770,35 @@ i965_composite(PixmapPtr dest, int srcX, int srcY, int maskX, int maskY,
 	} else {
 		has_mask = TRUE;
 		if (is_affine) {
-			if (!i830_get_transformed_coordinates(maskX, maskY,
+			if (!intel_get_transformed_coordinates(maskX, maskY,
 							      intel->
 							      transform[1],
 							      &mask_x[0],
 							      &mask_y[0]))
 				return;
-			if (!i830_get_transformed_coordinates(maskX, maskY + h,
+			if (!intel_get_transformed_coordinates(maskX, maskY + h,
 							      intel->
 							      transform[1],
 							      &mask_x[1],
 							      &mask_y[1]))
 				return;
-			if (!i830_get_transformed_coordinates
+			if (!intel_get_transformed_coordinates
 			    (maskX + w, maskY + h, intel->transform[1],
 			     &mask_x[2], &mask_y[2]))
 				return;
 		} else {
-			if (!i830_get_transformed_coordinates_3d(maskX, maskY,
+			if (!intel_get_transformed_coordinates_3d(maskX, maskY,
 								 intel->
 								 transform[1],
 								 &mask_x[0],
 								 &mask_y[0],
 								 &mask_w[0]))
 				return;
-			if (!i830_get_transformed_coordinates_3d
+			if (!intel_get_transformed_coordinates_3d
 			    (maskX, maskY + h, intel->transform[1], &mask_x[1],
 			     &mask_y[1], &mask_w[1]))
 				return;
-			if (!i830_get_transformed_coordinates_3d
+			if (!intel_get_transformed_coordinates_3d
 			    (maskX + w, maskY + h, intel->transform[1],
 			     &mask_x[2], &mask_y[2], &mask_w[2]))
 				return;
diff --git a/src/i965_video.c b/src/i965_video.c
index 9ec94dde..c0cbd4b8 100644
--- a/src/i965_video.c
+++ b/src/i965_video.c
@@ -35,10 +35,10 @@
 #include "xf86xv.h"
 #include "fourcc.h"
 
-#include "i830.h"
+#include "intel.h"
+#include "intel_hwmc.h"
+#include "intel_video.h"
 #include "i830_reg.h"
-#include "i830_video.h"
-#include "i830_hwmc.h"
 #include "i965_reg.h"
 #include "brw_defines.h"
 #include "brw_structs.h"
@@ -365,7 +365,7 @@ static drm_intel_bo *i965_create_dst_surface_state(ScrnInfoPtr scrn,
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct brw_surface_state *dest_surf_state;
-	drm_intel_bo *pixmap_bo = i830_get_pixmap_bo(pixmap);
+	drm_intel_bo *pixmap_bo = intel_get_pixmap_bo(pixmap);
 	drm_intel_bo *surf_bo;
 
 	if (intel_alloc_and_map(intel, "textured video surface state", 4096,
@@ -400,8 +400,8 @@ static drm_intel_bo *i965_create_dst_surface_state(ScrnInfoPtr scrn,
 	dest_surf_state->ss2.width = scrn->virtualX - 1;
 	dest_surf_state->ss2.mip_count = 0;
 	dest_surf_state->ss2.render_target_rotation = 0;
-	dest_surf_state->ss3.pitch = intel_get_pixmap_pitch(pixmap) - 1;
-	dest_surf_state->ss3.tiled_surface = i830_pixmap_tiled(pixmap);
+	dest_surf_state->ss3.pitch = intel_pixmap_pitch(pixmap) - 1;
+	dest_surf_state->ss3.tiled_surface = intel_pixmap_tiled(pixmap);
 	dest_surf_state->ss3.tile_walk = 0;	/* TileX */
 
 	drm_intel_bo_unmap(surf_bo);
@@ -1240,11 +1240,7 @@ I965DisplayVideoTextured(ScrnInfoPtr scrn,
 	/* release reference once we're finished */
 	drm_intel_bo_unreference(bind_bo);
 
-#if WATCH_STATS
-	/* i830_dump_error_state(scrn); */
-#endif
-
-	i830_debug_flush(scrn);
+	intel_debug_flush(scrn);
 }
 
 void i965_free_video(ScrnInfoPtr scrn)
diff --git a/src/i830.h b/src/intel.h
index f8e4d496..bdd89e5f 100644
--- a/src/i830.h
+++ b/src/intel.h
@@ -72,12 +72,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "intel_driver.h"
 
 #include "uxa.h"
-Bool i830_uxa_init(ScreenPtr pScreen);
-void i830_uxa_create_screen_resources(ScreenPtr pScreen);
-void i830_uxa_block_handler(ScreenPtr pScreen);
-Bool i830_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
-			     int num_bos);
-
 /* XXX
  * The X server gained an *almost* identical implementation in 1.9.
  *
@@ -181,7 +175,7 @@ extern DevPrivateKeyRec uxa_pixmap_index;
 extern int uxa_pixmap_index;
 #endif
 
-static inline struct intel_pixmap *i830_get_pixmap_intel(PixmapPtr pixmap)
+static inline struct intel_pixmap *intel_get_pixmap_private(PixmapPtr pixmap)
 {
 #if HAS_DEVPRIVATEKEYREC
 	return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index);
@@ -197,23 +191,23 @@ static inline Bool intel_pixmap_is_busy(struct intel_pixmap *priv)
 	return priv->busy;
 }
 
-static inline void i830_set_pixmap_intel(PixmapPtr pixmap, struct intel_pixmap *intel)
+static inline void intel_set_pixmap_private(PixmapPtr pixmap, struct intel_pixmap *intel)
 {
 	dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel);
 }
 
-static inline Bool i830_uxa_pixmap_is_dirty(PixmapPtr pixmap)
+static inline Bool intel_pixmap_is_dirty(PixmapPtr pixmap)
 {
-	return !list_is_empty(&i830_get_pixmap_intel(pixmap)->flush);
+	return !list_is_empty(&intel_get_pixmap_private(pixmap)->flush);
 }
 
-static inline Bool i830_pixmap_tiled(PixmapPtr pixmap)
+static inline Bool intel_pixmap_tiled(PixmapPtr pixmap)
 {
-	return i830_get_pixmap_intel(pixmap)->tiling != I915_TILING_NONE;
+	return intel_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE;
 }
 
-dri_bo *i830_get_pixmap_bo(PixmapPtr pixmap);
-void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
+dri_bo *intel_get_pixmap_bo(PixmapPtr pixmap);
+void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo);
 
 typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
 
@@ -228,16 +222,16 @@ typedef struct _I830OutputRec I830OutputRec, *I830OutputPtr;
 #define PITCH_NONE 0
 
 /** Record of a linear allocation in the aperture. */
-typedef struct _i830_memory i830_memory;
-struct _i830_memory {
+typedef struct _intel_memory intel_memory;
+struct _intel_memory {
 	/** Description of the allocation, for logging */
 	char *name;
 
 	/** @{
 	 * Memory allocator linked list pointers
 	 */
-	i830_memory *next;
-	i830_memory *prev;
+	intel_memory *next;
+	intel_memory *prev;
 	/** @} */
 
 	drm_intel_bo *bo;
@@ -299,7 +293,7 @@ typedef struct intel_screen_private {
 	dri_bo *last_batch_bo;
 	/** Whether we're in a section of code that can't tolerate flushing */
 	Bool in_batch_atomic;
-	/** Ending batch_used that was verified by i830_start_batch_atomic() */
+	/** Ending batch_used that was verified by intel_start_batch_atomic() */
 	int batch_atomic_limit;
 	struct list batch_pixmaps;
 	struct list flush_pixmaps;
@@ -335,7 +329,7 @@ typedef struct intel_screen_private {
 	void (*batch_flush_notify) (ScrnInfoPtr scrn);
 
 	uxa_driver_t *uxa_driver;
-	Bool need_flush;
+	Bool need_sync;
 	int accel_pixmap_pitch_alignment;
 	int accel_pixmap_offset_alignment;
 	int accel_max_x;
@@ -456,10 +450,13 @@ intel_get_screen_private(ScrnInfoPtr scrn)
 #define ALIGN(i,m)	(((i) + (m) - 1) & ~((m) - 1))
 #define MIN(a,b)	((a) < (b) ? (a) : (b))
 
-unsigned long intel_get_pixmap_pitch(PixmapPtr pixmap);
+static inline unsigned long intel_pixmap_pitch(PixmapPtr pixmap)
+{
+	return (unsigned long)pixmap->devKind;
+}
 
 /* Batchbuffer support macros and functions */
-#include "i830_batchbuffer.h"
+#include "intel_batchbuffer.h"
 
 /* I830 specific functions */
 extern void IntelEmitInvarientState(ScrnInfoPtr scrn);
@@ -469,10 +466,10 @@ extern void I915EmitInvarientState(ScrnInfoPtr scrn);
 extern void I830EmitFlush(ScrnInfoPtr scrn);
 
 extern void I830InitVideo(ScreenPtr pScreen);
-extern xf86CrtcPtr i830_covering_crtc(ScrnInfoPtr scrn, BoxPtr box,
+extern xf86CrtcPtr intel_covering_crtc(ScrnInfoPtr scrn, BoxPtr box,
 				      xf86CrtcPtr desired, BoxPtr crtc_box_ret);
 
-extern xf86CrtcPtr i830_pipe_to_crtc(ScrnInfoPtr scrn, int pipe);
+extern xf86CrtcPtr intel_pipe_to_crtc(ScrnInfoPtr scrn, int pipe);
 
 Bool I830DRI2ScreenInit(ScreenPtr pScreen);
 void I830DRI2CloseScreen(ScreenPtr pScreen);
@@ -488,19 +485,16 @@ extern int drmmode_get_pipe_from_crtc_id(drm_intel_bufmgr * bufmgr,
 extern int drmmode_output_dpms_status(xf86OutputPtr output);
 extern int drmmode_crtc_id(xf86CrtcPtr crtc);
 
-extern Bool i830_crtc_on(xf86CrtcPtr crtc);
-extern int i830_crtc_to_pipe(xf86CrtcPtr crtc);
-extern Bool I830AccelInit(ScreenPtr pScreen);
-
-void i830_init_bufmgr(ScrnInfoPtr scrn);
+extern Bool intel_crtc_on(xf86CrtcPtr crtc);
+extern int intel_crtc_to_pipe(xf86CrtcPtr crtc);
 
-/* i830_memory.c */
-unsigned long i830_get_fence_size(intel_screen_private *intel, unsigned long size);
-unsigned long i830_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
+/* intel_memory.c */
+unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size);
+unsigned long intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
 				   uint32_t tiling_mode);
-void i830_set_gem_max_sizes(ScrnInfoPtr scrn);
+void intel_set_gem_max_sizes(ScrnInfoPtr scrn);
 
-drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn,
+drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn,
 					int w, int h, int cpp,
 					unsigned long *pitch);
 
@@ -513,11 +507,9 @@ Bool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture);
 Bool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask,
 			    PicturePtr dest, PixmapPtr sourcecPixmap,
 			    PixmapPtr maskPixmap, PixmapPtr destPixmap);
-Bool i830_transform_is_affine(PictTransformPtr t);
 
 void i830_composite(PixmapPtr dest, int srcX, int srcY,
 		    int maskX, int maskY, int dstX, int dstY, int w, int h);
-void i830_done_composite(PixmapPtr dest);
 /* i915_render.c */
 Bool i915_check_composite(int op,
 			  PicturePtr sourcec, PicturePtr mask, PicturePtr dest,
@@ -548,16 +540,15 @@ void i965_composite(PixmapPtr dest, int srcX, int srcY,
 
 void i965_batch_flush_notify(ScrnInfoPtr scrn);
 
+Bool intel_transform_is_affine(PictTransformPtr t);
 Bool
-i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
+intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
 				 float *x_out, float *y_out);
 
 Bool
-i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
+intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
 				    float *x_out, float *y_out, float *z_out);
 
-void i830_enter_render(ScrnInfoPtr);
-
 static inline void
 intel_debug_fallback(ScrnInfoPtr scrn, char *format, ...)
 {
@@ -575,7 +566,7 @@ intel_debug_fallback(ScrnInfoPtr scrn, char *format, ...)
 static inline Bool
 intel_check_pitch_2d(PixmapPtr pixmap)
 {
-	uint32_t pitch = intel_get_pixmap_pitch(pixmap);
+	uint32_t pitch = intel_pixmap_pitch(pixmap);
 	if (pitch > KB(32)) {
 		ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 		intel_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n");
@@ -588,7 +579,7 @@ intel_check_pitch_2d(PixmapPtr pixmap)
 static inline Bool
 intel_check_pitch_3d(PixmapPtr pixmap)
 {
-	uint32_t pitch = intel_get_pixmap_pitch(pixmap);
+	uint32_t pitch = intel_pixmap_pitch(pixmap);
 	if (pitch > KB(8)) {
 		ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 		intel_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n");
@@ -630,15 +621,12 @@ static inline drm_intel_bo *intel_bo_alloc_for_data(ScrnInfoPtr scrn,
 	return bo;
 }
 
-extern const int I830PatternROP[16];
-extern const int I830CopyROP[16];
-
 /* Flags for memory allocation function */
 #define NEED_PHYSICAL_ADDR		0x00000001
 #define ALLOW_SHARING			0x00000010
 #define DISABLE_REUSE			0x00000020
 
-void i830_debug_flush(ScrnInfoPtr scrn);
+void intel_debug_flush(ScrnInfoPtr scrn);
 
 static inline PixmapPtr get_drawable_pixmap(DrawablePtr drawable)
 {
@@ -657,6 +645,12 @@ static inline Bool pixmap_is_scanout(PixmapPtr pixmap)
 	return pixmap == screen->GetScreenPixmap(screen);
 }
 
-const OptionInfoRec *i830_available_options(int chipid, int busid);
+const OptionInfoRec *intel_uxa_available_options(int chipid, int busid);
+
+Bool intel_uxa_init(ScreenPtr pScreen);
+void intel_uxa_create_screen_resources(ScreenPtr pScreen);
+void intel_uxa_block_handler(intel_screen_private *intel);
+Bool intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
+			      int num_bos);
 
 #endif /* _I830_H_ */
diff --git a/src/i830_batchbuffer.c b/src/intel_batchbuffer.c
index 84b699a6..a4802d0f 100644
--- a/src/i830_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -35,7 +35,7 @@
 #include <errno.h>
 
 #include "xf86.h"
-#include "i830.h"
+#include "intel.h"
 #include "i830_reg.h"
 #include "i915_drm.h"
 
@@ -267,3 +267,14 @@ void intel_batch_wait_last(ScrnInfoPtr scrn)
 	drm_intel_gem_bo_map_gtt(intel->last_batch_bo);
 	drm_intel_gem_bo_unmap_gtt(intel->last_batch_bo);
 }
+
+void intel_debug_flush(ScrnInfoPtr scrn)
+{
+	intel_screen_private *intel = intel_get_screen_private(scrn);
+
+	if (intel->debug_flush & DEBUG_FLUSH_CACHES)
+		intel_batch_emit_flush(scrn);
+
+	if (intel->debug_flush & DEBUG_FLUSH_BATCHES)
+		intel_batch_submit(scrn, FALSE);
+}
diff --git a/src/i830_batchbuffer.h b/src/intel_batchbuffer.h
index 21aae8d9..bf9b2794 100644
--- a/src/i830_batchbuffer.h
+++ b/src/intel_batchbuffer.h
@@ -138,7 +138,7 @@ intel_batch_emit_reloc_pixmap(intel_screen_private *intel, PixmapPtr pixmap,
 			      uint32_t read_domains, uint32_t write_domain,
 			      uint32_t delta, int needs_fence)
 {
-	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
+	struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
 
 	intel_batch_mark_pixmap_domains(intel, priv, read_domains, write_domain);
 
diff --git a/src/i830_dri.c b/src/intel_dri.c
index 37d93cc7..e876ab23 100644
--- a/src/i830_dri.c
+++ b/src/intel_dri.c
@@ -60,7 +60,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "GL/glxtokens.h"
 
-#include "i830.h"
+#include "intel.h"
 #include "i830_reg.h"
 
 #include "i915_drm.h"
@@ -146,7 +146,7 @@ I830DRI2CreateBuffers(DrawablePtr drawable, unsigned int *attachments,
 		privates[i].pixmap = pixmap;
 		privates[i].attachment = attachments[i];
 
-		bo = i830_get_pixmap_bo(pixmap);
+		bo = intel_get_pixmap_bo(pixmap);
 		if (bo != NULL && dri_bo_flink(bo, &buffers[i].name) != 0) {
 			/* failed to name buffer */
 		}
@@ -245,7 +245,7 @@ I830DRI2CreateBuffer(DrawablePtr drawable, unsigned int attachment,
 	privates->pixmap = pixmap;
 	privates->attachment = attachment;
 
-	bo = i830_get_pixmap_bo(pixmap);
+	bo = intel_get_pixmap_bo(pixmap);
 	if (bo == NULL || dri_bo_flink(bo, &buffer->name) != 0) {
 		/* failed to name buffer */
 		screen->DestroyPixmap(pixmap);
@@ -318,14 +318,14 @@ I830DRI2CopyRegion(DrawablePtr drawable, RegionPtr pRegion,
 		Bool full_height = FALSE;
 
 		box = REGION_EXTENTS(unused, gc->pCompositeClip);
-		crtc = i830_covering_crtc(scrn, box, NULL, &crtcbox);
+		crtc = intel_covering_crtc(scrn, box, NULL, &crtcbox);
 
 		/*
 		 * Make sure the CRTC is valid and this is the real front
 		 * buffer
 		 */
 		if (crtc != NULL && !crtc->rotatedData) {
-			pipe = i830_crtc_to_pipe(crtc);
+			pipe = intel_crtc_to_pipe(crtc);
 
 			/*
 			 * Make sure we don't wait for a scanline that will
@@ -429,11 +429,11 @@ I830DRI2DrawablePipe(DrawablePtr pDraw)
 	box.x2 = box.x1 + pDraw->width;
 	box.y2 = box.y1 + pDraw->height;
 
-	crtc = i830_covering_crtc(pScrn, &box, NULL, &crtcbox);
+	crtc = intel_covering_crtc(pScrn, &box, NULL, &crtcbox);
 
 	/* Make sure the CRTC is valid and this is the real front buffer */
 	if (crtc != NULL && !crtc->rotatedData)
-		pipe = i830_crtc_to_pipe(crtc);
+		pipe = intel_crtc_to_pipe(crtc);
 
 	return pipe;
 }
@@ -457,10 +457,10 @@ I830DRI2ExchangeBuffers(DrawablePtr draw, DRI2BufferPtr front,
 	back->name = tmp;
 
 	/* Swap pixmap bos */
-	front_intel = i830_get_pixmap_intel(front_priv->pixmap);
-	back_intel = i830_get_pixmap_intel(back_priv->pixmap);
-	i830_set_pixmap_intel(front_priv->pixmap, back_intel);
-	i830_set_pixmap_intel(back_priv->pixmap, front_intel); /* should be screen */
+	front_intel = intel_get_pixmap_private(front_priv->pixmap);
+	back_intel = intel_get_pixmap_private(back_priv->pixmap);
+	intel_set_pixmap_private(front_priv->pixmap, back_intel);
+	intel_set_pixmap_private(back_priv->pixmap, front_intel); /* should be screen */
 
 	/* Do we need to update the Screen? */
 	screen = draw->pScreen;
@@ -469,8 +469,10 @@ I830DRI2ExchangeBuffers(DrawablePtr draw, DRI2BufferPtr front,
 	    dri_bo_unreference (intel->front_buffer);
 	    intel->front_buffer = back_intel->bo;
 	    dri_bo_reference (intel->front_buffer);
-	    i830_set_pixmap_intel(screen->GetScreenPixmap(screen),
-				  back_intel);
+	    intel_set_pixmap_private(screen->GetScreenPixmap(screen),
+				     back_intel);
+	    back_intel->busy = 1;
+	    front_intel->busy = -1;
 	}
 }
 
@@ -499,7 +501,7 @@ I830DRI2ScheduleFlip(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front,
 	/* Page flip the full screen buffer */
 	back_priv = back->driverPrivate;
 	return drmmode_do_pageflip(screen,
-				   i830_get_pixmap_bo(back_priv->pixmap),
+				   intel_get_pixmap_bo(back_priv->pixmap),
 				   flip_info);
 }
 
diff --git a/src/i830_driver.c b/src/intel_driver.c
index 2c165f44..4dbe2873 100644
--- a/src/i830_driver.c
+++ b/src/intel_driver.c
@@ -66,15 +66,15 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xf86xv.h"
 #include <X11/extensions/Xv.h>
 #include "shadow.h"
-#include "i830.h"
-#include "i830_video.h"
+#include "intel.h"
+#include "intel_video.h"
 #if HAVE_SYS_MMAN_H && HAVE_MPROTECT
 #include <sys/mman.h>
 #endif
 
 #ifdef INTEL_XVMC
 #define _INTEL_XVMC_SERVER_
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 #endif
 
 #include "legacy/legacy.h"
@@ -155,7 +155,7 @@ I830DPRINTF(const char *filename, int line, const char *function,
 #endif /* #ifdef I830DEBUG */
 
 /* Export I830 options to i830 driver where necessary */
-const OptionInfoRec *i830_available_options(int chipid, int busid)
+const OptionInfoRec *intel_uxa_available_options(int chipid, int busid)
 {
 	return I830Options;
 }
@@ -269,7 +269,7 @@ static Bool i830CreateScreenResources(ScreenPtr screen)
 	if (!(*screen->CreateScreenResources) (screen))
 		return FALSE;
 
-	i830_uxa_create_screen_resources(screen);
+	intel_uxa_create_screen_resources(screen);
 
 	return TRUE;
 }
@@ -283,7 +283,7 @@ static void PreInitCleanup(ScrnInfoPtr scrn)
  * DRM mode setting Linux only at this point... later on we could
  * add a wrapper here.
  */
-static Bool i830_kernel_mode_enabled(ScrnInfoPtr scrn)
+static Bool intel_kernel_mode_enabled(ScrnInfoPtr scrn)
 {
 	struct pci_device *PciInfo;
 	EntityInfoPtr pEnt;
@@ -313,7 +313,7 @@ static Bool i830_kernel_mode_enabled(ScrnInfoPtr scrn)
 	return TRUE;
 }
 
-static void i830_detect_chipset(ScrnInfoPtr scrn)
+static void intel_check_chipset_option(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	MessageType from = X_PROBED;
@@ -384,7 +384,7 @@ static Bool I830GetEarlyOptions(ScrnInfoPtr scrn)
 	return TRUE;
 }
 
-static void i830_check_dri_option(ScrnInfoPtr scrn)
+static void intel_check_dri_option(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	intel->directRenderingType = DRI_NONE;
@@ -399,7 +399,7 @@ static void i830_check_dri_option(ScrnInfoPtr scrn)
 	}
 }
 
-static Bool i830_open_drm_master(ScrnInfoPtr scrn)
+static Bool intel_open_drm_master(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct pci_device *dev = intel->PciInfo;
@@ -456,7 +456,7 @@ static Bool i830_open_drm_master(ScrnInfoPtr scrn)
 	return TRUE;
 }
 
-static void i830_close_drm_master(ScrnInfoPtr scrn)
+static void intel_close_drm_master(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	if (intel && intel->drmSubFD > 0) {
@@ -465,11 +465,34 @@ static void i830_close_drm_master(ScrnInfoPtr scrn)
 	}
 }
 
+static void intel_init_bufmgr(ScrnInfoPtr scrn)
+{
+	intel_screen_private *intel = intel_get_screen_private(scrn);
+	int batch_size;
+
+	if (intel->bufmgr)
+		return;
+
+	batch_size = 4096 * 4;
+
+	/* The 865 has issues with larger-than-page-sized batch buffers. */
+	if (IS_I865G(intel))
+		batch_size = 4096;
+
+	intel->bufmgr = drm_intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
+	drm_intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+	drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
+
+	list_init(&intel->batch_pixmaps);
+	list_init(&intel->flush_pixmaps);
+	list_init(&intel->in_flight);
+}
+
 static Bool I830DrmModeInit(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
-	i830_init_bufmgr(scrn);
+	intel_init_bufmgr(scrn);
 
 	if (drmmode_pre_init(scrn, intel->drmSubFD, intel->cpp) == FALSE) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -531,7 +554,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
 	if (scrn->numEntities != 1)
 		return FALSE;
 
-	drm_mode_setting = i830_kernel_mode_enabled(scrn);
+	drm_mode_setting = intel_kernel_mode_enabled(scrn);
 	if (!drm_mode_setting) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 			   "No kernel modesetting driver detected.\n");
@@ -557,7 +580,7 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
 
 	intel->PciInfo = xf86GetPciInfoForEntity(intel->pEnt->index);
 
-	if (!i830_open_drm_master(scrn))
+	if (!intel_open_drm_master(scrn))
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 			   "Failed to become DRM master.\n");
 
@@ -594,9 +617,8 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
 	if (!I830GetEarlyOptions(scrn))
 		return FALSE;
 
-	i830_detect_chipset(scrn);
-
-	i830_check_dri_option(scrn);
+	intel_check_chipset_option(scrn);
+	intel_check_dri_option(scrn);
 
 	I830XvInit(scrn);
 
@@ -688,12 +710,11 @@ I830BlockHandler(int i, pointer blockData, pointer pTimeout, pointer pReadmask)
 		drmCommandNone(intel->drmSubFD, DRM_I915_GEM_THROTTLE);
 	}
 
-	i830_uxa_block_handler(screen);
-
-	I830VideoBlockHandler(i, blockData, pTimeout, pReadmask);
+	intel_uxa_block_handler(intel);
+	intel_video_block_handler(intel);
 }
 
-static void i830_fixup_mtrrs(ScrnInfoPtr scrn)
+static void intel_fixup_mtrrs(ScrnInfoPtr scrn)
 {
 #ifdef HAS_MTRR_SUPPORT
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -743,11 +764,11 @@ intel_init_initial_framebuffer(ScrnInfoPtr scrn)
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	unsigned long pitch;
 
-	intel->front_buffer = i830_allocate_framebuffer(scrn,
-							scrn->virtualX,
-							scrn->virtualY,
-							intel->cpp,
-							&pitch);
+	intel->front_buffer = intel_allocate_framebuffer(scrn,
+							 scrn->virtualX,
+							 scrn->virtualY,
+							 intel->cpp,
+							 &pitch);
 
 	if (!intel->front_buffer) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -760,30 +781,7 @@ intel_init_initial_framebuffer(ScrnInfoPtr scrn)
 	return TRUE;
 }
 
-void i830_init_bufmgr(ScrnInfoPtr scrn)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-	int batch_size;
-
-	if (intel->bufmgr)
-		return;
-
-	batch_size = 4096 * 4;
-
-	/* The 865 has issues with larger-than-page-sized batch buffers. */
-	if (IS_I865G(intel))
-		batch_size = 4096;
-
-	intel->bufmgr = drm_intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
-	drm_intel_bufmgr_gem_enable_reuse(intel->bufmgr);
-	drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
-
-	list_init(&intel->batch_pixmaps);
-	list_init(&intel->flush_pixmaps);
-	list_init(&intel->in_flight);
-}
-
-Bool i830_crtc_on(xf86CrtcPtr crtc)
+Bool intel_crtc_on(xf86CrtcPtr crtc)
 {
 	ScrnInfoPtr scrn = crtc->scrn;
 	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
@@ -802,7 +800,7 @@ Bool i830_crtc_on(xf86CrtcPtr crtc)
 	return FALSE;
 }
 
-int i830_crtc_to_pipe(xf86CrtcPtr crtc)
+int intel_crtc_to_pipe(xf86CrtcPtr crtc)
 {
 	ScrnInfoPtr scrn = crtc->scrn;
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -900,7 +898,7 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv)
 	if (!intel_init_initial_framebuffer(scrn))
 		return FALSE;
 
-	i830_fixup_mtrrs(scrn);
+	intel_fixup_mtrrs(scrn);
 
 	intel_batch_init(scrn);
 
@@ -943,20 +941,12 @@ I830ScreenInit(int scrnIndex, ScreenPtr screen, int argc, char **argv)
 
 	xf86SetBlackWhitePixels(screen);
 
-	if (!I830AccelInit(screen)) {
+	if (!intel_uxa_init(screen)) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 			   "Hardware acceleration initialization failed\n");
 		return FALSE;
 	}
 
-	if (IS_I965G(intel)) {
-		intel->batch_flush_notify = i965_batch_flush_notify;
-	} else if (IS_I9XX(intel)) {
-		intel->vertex_flush = i915_vertex_flush;
-		intel->batch_flush_notify = i915_batch_flush_notify;
-	} else
-		intel->batch_flush_notify = i830_batch_flush_notify;
-
 	miInitializeBackingStore(screen);
 	xf86SetBackingStore(screen);
 	xf86SetSilkenMouse(screen);
@@ -1058,7 +1048,7 @@ static void I830FreeScreen(int scrnIndex, int flags)
 {
 	ScrnInfoPtr scrn = xf86Screens[scrnIndex];
 
-	i830_close_drm_master(scrn);
+	intel_close_drm_master(scrn);
 
 	I830FreeRec(xf86Screens[scrnIndex]);
 	if (xf86LoaderCheckSymbol("vgaHWFreeHWRec"))
@@ -1101,7 +1091,7 @@ static Bool I830EnterVT(int scrnIndex, int flags)
 			   strerror(errno));
 	}
 
-	i830_set_gem_max_sizes(scrn);
+	intel_set_gem_max_sizes(scrn);
 
 	if (!xf86SetDesiredModes(scrn))
 		return FALSE;
@@ -1131,7 +1121,7 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
 		intel->uxa_driver = NULL;
 	}
 	if (intel->front_buffer) {
-		i830_set_pixmap_bo(screen->GetScreenPixmap(screen), NULL);
+		intel_set_pixmap_bo(screen->GetScreenPixmap(screen), NULL);
 		drmmode_closefb(scrn);
 		drm_intel_bo_unreference(intel->front_buffer);
 		intel->front_buffer = NULL;
@@ -1245,7 +1235,7 @@ static Bool I830PMEvent(int scrnIndex, pmEvent event, Bool undo)
 	return TRUE;
 }
 
-xf86CrtcPtr i830_pipe_to_crtc(ScrnInfoPtr scrn, int pipe)
+xf86CrtcPtr intel_pipe_to_crtc(ScrnInfoPtr scrn, int pipe)
 {
 	xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR(scrn);
 	int c;
diff --git a/src/i830_hwmc.c b/src/intel_hwmc.c
index 9aa0af33..a0861ec8 100644
--- a/src/i830_hwmc.c
+++ b/src/intel_hwmc.c
@@ -29,8 +29,8 @@
 #endif
 
 #define _INTEL_XVMC_SERVER_
-#include "i830.h"
-#include "i830_hwmc.h"
+#include "intel.h"
+#include "intel_hwmc.h"
 
 #include <X11/extensions/Xv.h>
 #include <X11/extensions/XvMC.h>
diff --git a/src/i830_hwmc.h b/src/intel_hwmc.h
index 8682fe0e..8682fe0e 100644
--- a/src/i830_hwmc.h
+++ b/src/intel_hwmc.h
diff --git a/src/i830_memory.c b/src/intel_memory.c
index 5e530aa5..a3d67b47 100644
--- a/src/i830_memory.c
+++ b/src/intel_memory.c
@@ -37,7 +37,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
 /**
- * @file i830_memory.c
+ * @file intel_memory.c
  *
  * This is the video memory allocator.  Our memory allocation is different from
  * other graphics chips, where you have a fixed amount of graphics memory
@@ -83,13 +83,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "xf86.h"
 #include "xf86_OSproc.h"
 
-#include "i830.h"
+#include "intel.h"
 #include "i915_drm.h"
 
 /**
  * Returns the fence size for a tiled area of the given size.
  */
-unsigned long i830_get_fence_size(intel_screen_private *intel, unsigned long size)
+unsigned long intel_get_fence_size(intel_screen_private *intel, unsigned long size)
 {
 	unsigned long i;
 	unsigned long start;
@@ -117,7 +117,7 @@ unsigned long i830_get_fence_size(intel_screen_private *intel, unsigned long siz
  * calculate that here.
  */
 unsigned long
-i830_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
+intel_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
 		     uint32_t tiling_mode)
 {
 	unsigned long i;
@@ -137,7 +137,7 @@ i830_get_fence_pitch(intel_screen_private *intel, unsigned long pitch,
 }
 
 static Bool
-i830_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
+intel_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	int limit = KB(32);
@@ -165,7 +165,7 @@ i830_check_display_stride(ScrnInfoPtr scrn, int stride, Bool tiling)
 /*
  * Pad to accelerator requirement
  */
-static inline int i830_pad_drawable_width(int width)
+static inline int intel_pad_drawable_width(int width)
 {
 	return (width + 63) & ~63;
 }
@@ -176,7 +176,7 @@ static inline int i830_pad_drawable_width(int width)
  * Used once for each X screen, so once with RandR 1.2 and twice with classic
  * dualhead.
  */
-drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn,
+drm_intel_bo *intel_allocate_framebuffer(ScrnInfoPtr scrn,
 					int width, int height, int cpp,
 					unsigned long *out_pitch)
 {
@@ -190,7 +190,7 @@ drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn,
 	else
 		tiling_mode = I915_TILING_NONE;
 
-	width = i830_pad_drawable_width(width);
+	width = intel_pad_drawable_width(width);
 
 	front_buffer = drm_intel_bo_alloc_tiled(intel->bufmgr, "front buffer",
 						width, height, intel->cpp,
@@ -201,7 +201,7 @@ drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn,
 		return NULL;
 	}
 
-	if (!i830_check_display_stride(scrn, pitch,
+	if (!intel_check_display_stride(scrn, pitch,
 				       tiling_mode != I915_TILING_NONE)) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 			   "Front buffer stride %ld kB "
@@ -222,13 +222,13 @@ drm_intel_bo *i830_allocate_framebuffer(ScrnInfoPtr scrn,
 
 	drm_intel_bo_disable_reuse(front_buffer);
 
-	i830_set_gem_max_sizes(scrn);
+	intel_set_gem_max_sizes(scrn);
 	*out_pitch = pitch;
 
 	return front_buffer;
 }
 
-static void i830_set_max_bo_size(intel_screen_private *intel,
+static void intel_set_max_bo_size(intel_screen_private *intel,
 				 const struct drm_i915_gem_get_aperture *aperture)
 {
 	if (aperture->aper_available_size)
@@ -242,7 +242,7 @@ static void i830_set_max_bo_size(intel_screen_private *intel,
 		intel->max_bo_size = 64 * 1024 * 1024;
 }
 
-static void i830_set_max_gtt_map_size(intel_screen_private *intel,
+static void intel_set_max_gtt_map_size(intel_screen_private *intel,
 				      const struct drm_i915_gem_get_aperture *aperture)
 {
 	if (aperture->aper_available_size)
@@ -256,7 +256,7 @@ static void i830_set_max_gtt_map_size(intel_screen_private *intel,
 		intel->max_gtt_map_size = 16 * 1024 * 1024;
 }
 
-static void i830_set_max_tiling_size(intel_screen_private *intel,
+static void intel_set_max_tiling_size(intel_screen_private *intel,
 				     const struct drm_i915_gem_get_aperture *aperture)
 {
 	if (aperture->aper_available_size)
@@ -268,7 +268,7 @@ static void i830_set_max_tiling_size(intel_screen_private *intel,
 		intel->max_tiling_size = 4 * 1024 * 1024;
 }
 
-void i830_set_gem_max_sizes(ScrnInfoPtr scrn)
+void intel_set_gem_max_sizes(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct drm_i915_gem_get_aperture aperture;
@@ -276,7 +276,7 @@ void i830_set_gem_max_sizes(ScrnInfoPtr scrn)
 	aperture.aper_available_size = 0;
 	ioctl(intel->drmSubFD, DRM_IOCTL_I915_GEM_GET_APERTURE, &aperture);
 
-	i830_set_max_bo_size(intel, &aperture);
-	i830_set_max_gtt_map_size(intel, &aperture);
-	i830_set_max_tiling_size(intel, &aperture);
+	intel_set_max_bo_size(intel, &aperture);
+	intel_set_max_gtt_map_size(intel, &aperture);
+	intel_set_max_tiling_size(intel, &aperture);
 }
diff --git a/src/intel_module.c b/src/intel_module.c
index 1624d06d..42350d43 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -33,7 +33,7 @@
 #include "xf86cmap.h"
 
 #include "common.h"
-#include "i830.h"
+#include "intel.h"
 #include "intel_driver.h"
 #include "legacy/legacy.h"
 
@@ -390,18 +390,18 @@ static const OptionInfoRec *
 intel_available_options(int chipid, int busid)
 {
 #if KMS_ONLY
-	return i830_available_options(chipid, busid);
+	return intel_uxa_available_options(chipid, busid);
 #else
-    switch (chipid) {
-    case PCI_CHIP_I810:
-    case PCI_CHIP_I810_DC100:
-    case PCI_CHIP_I810_E:
-    case PCI_CHIP_I815:
-	    return lg_i810_available_options(chipid, busid);
+	switch (chipid) {
+	case PCI_CHIP_I810:
+	case PCI_CHIP_I810_DC100:
+	case PCI_CHIP_I810_E:
+	case PCI_CHIP_I815:
+		return lg_i810_available_options(chipid, busid);
 
-    default:
-	    return i830_available_options(chipid, busid);
-    }
+	default:
+		return intel_uxa_available_options(chipid, busid);
+	}
 #endif
 }
 
diff --git a/src/i830_uxa.c b/src/intel_uxa.c
index 8075ff54..1496dbcc 100644
--- a/src/i830_uxa.c
+++ b/src/intel_uxa.c
@@ -33,7 +33,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "xf86.h"
 #include "xaarop.h"
-#include "i830.h"
+#include "intel.h"
 #include "i830_reg.h"
 #include "i915_drm.h"
 #include "brw_defines.h"
@@ -41,7 +41,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <sys/mman.h>
 #include <errno.h>
 
-const int I830CopyROP[16] = {
+static const int I830CopyROP[16] = {
 	ROP_0,			/* GXclear */
 	ROP_DSa,		/* GXand */
 	ROP_SDna,		/* GXandReverse */
@@ -60,7 +60,7 @@ const int I830CopyROP[16] = {
 	ROP_1			/* GXset */
 };
 
-const int I830PatternROP[16] = {
+static const int I830PatternROP[16] = {
 	ROP_0,
 	ROP_DPa,
 	ROP_PDna,
@@ -106,8 +106,8 @@ ironlake_blt_workaround(ScrnInfoPtr scrn)
 }
 
 Bool
-i830_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
-			int num_bos)
+intel_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
+			 int num_bos)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
@@ -130,25 +130,11 @@ i830_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table,
 	return TRUE;
 }
 
-static unsigned long i830_pixmap_pitch(PixmapPtr pixmap)
-{
-	return pixmap->devKind;
-}
-
-static int i830_pixmap_pitch_is_aligned(PixmapPtr pixmap)
-{
-	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	return i830_pixmap_pitch(pixmap) %
-	    intel->accel_pixmap_pitch_alignment == 0;
-}
-
 static unsigned int
-i830_uxa_pixmap_compute_size(PixmapPtr pixmap,
-			     int w, int h,
-			     uint32_t *tiling,
-			     int *stride)
+intel_uxa_pixmap_compute_size(PixmapPtr pixmap,
+			      int w, int h,
+			      uint32_t *tiling,
+			      int *stride)
 {
 	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -193,9 +179,9 @@ i830_uxa_pixmap_compute_size(PixmapPtr pixmap,
 		else
 			aligned_h = ALIGN(h, 32);
 
-		*stride = i830_get_fence_pitch(intel,
-					       ROUND_TO(pitch, 512),
-					       *tiling);
+		*stride = intel_get_fence_pitch(intel,
+						ROUND_TO(pitch, 512),
+						*tiling);
 
 		/* Round the object up to the size of the fence it will live in
 		 * if necessary.  We could potentially make the kernel allocate
@@ -203,7 +189,7 @@ i830_uxa_pixmap_compute_size(PixmapPtr pixmap,
 		 * but this is easier and also keeps us out of trouble (as much)
 		 * with drm_intel_bufmgr_check_aperture().
 		 */
-		size = i830_get_fence_size(intel, *stride * aligned_h);
+		size = intel_get_fence_size(intel, *stride * aligned_h);
 
 		if (size > intel->max_tiling_size)
 			*tiling = I915_TILING_NONE;
@@ -260,18 +246,13 @@ i830_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg)
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	drm_intel_bo *bo_table[] = {
 		NULL,		/* batch_bo */
-		i830_get_pixmap_bo(pixmap),
+		intel_get_pixmap_bo(pixmap),
 	};
 
 	if (!intel_check_pitch_2d(pixmap))
 		return FALSE;
 
-	if (!i830_pixmap_pitch_is_aligned(pixmap)) {
-		intel_debug_fallback(scrn, "pixmap pitch not aligned");
-		return FALSE;
-	}
-
-	if (!i830_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
+	if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
 		return FALSE;
 
 	intel->BR[13] = (I830PatternROP[alu] & 0xff) << 16;
@@ -311,7 +292,7 @@ static void i830_uxa_solid(PixmapPtr pixmap, int x1, int y1, int x2, int y2)
 	if (x2 <= x1 || y2 <= y1)
 		return;
 
-	pitch = i830_pixmap_pitch(pixmap);
+	pitch = intel_pixmap_pitch(pixmap);
 
 	{
 		BEGIN_BATCH(6);
@@ -322,7 +303,7 @@ static void i830_uxa_solid(PixmapPtr pixmap, int x1, int y1, int x2, int y2)
 			cmd |=
 			    XY_COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
 
-		if (IS_I965G(intel) && i830_pixmap_tiled(pixmap)) {
+		if (IS_I965G(intel) && intel_pixmap_tiled(pixmap)) {
 			assert((pitch % 512) == 0);
 			pitch >>= 2;
 			cmd |= XY_COLOR_BLT_TILED;
@@ -346,7 +327,7 @@ static void i830_uxa_done_solid(PixmapPtr pixmap)
 {
 	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 
-	i830_debug_flush(scrn);
+	intel_debug_flush(scrn);
 }
 
 /**
@@ -400,11 +381,11 @@ i830_uxa_prepare_copy(PixmapPtr source, PixmapPtr dest, int xdir,
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	drm_intel_bo *bo_table[] = {
 		NULL,		/* batch_bo */
-		i830_get_pixmap_bo(source),
-		i830_get_pixmap_bo(dest),
+		intel_get_pixmap_bo(source),
+		intel_get_pixmap_bo(dest),
 	};
 
-	if (!i830_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
+	if (!intel_get_aperture_space(scrn, bo_table, ARRAY_SIZE(bo_table)))
 		return FALSE;
 
 	intel->render_source = source;
@@ -437,8 +418,8 @@ i830_uxa_copy(PixmapPtr dest, int src_x1, int src_y1, int dst_x1,
 	dst_x2 = dst_x1 + w;
 	dst_y2 = dst_y1 + h;
 
-	dst_pitch = i830_pixmap_pitch(dest);
-	src_pitch = i830_pixmap_pitch(intel->render_source);
+	dst_pitch = intel_pixmap_pitch(dest);
+	src_pitch = intel_pixmap_pitch(intel->render_source);
 
 	{
 		BEGIN_BATCH(8);
@@ -451,13 +432,13 @@ i830_uxa_copy(PixmapPtr dest, int src_x1, int src_y1, int dst_x1,
 			    XY_SRC_COPY_BLT_WRITE_RGB;
 
 		if (IS_I965G(intel)) {
-			if (i830_pixmap_tiled(dest)) {
+			if (intel_pixmap_tiled(dest)) {
 				assert((dst_pitch % 512) == 0);
 				dst_pitch >>= 2;
 				cmd |= XY_SRC_COPY_BLT_DST_TILED;
 			}
 
-			if (i830_pixmap_tiled(intel->render_source)) {
+			if (intel_pixmap_tiled(intel->render_source)) {
 				assert((src_pitch % 512) == 0);
 				src_pitch >>= 2;
 				cmd |= XY_SRC_COPY_BLT_SRC_TILED;
@@ -488,7 +469,7 @@ static void i830_uxa_done_copy(PixmapPtr dest)
 {
 	ScrnInfoPtr scrn = xf86Screens[dest->drawable.pScreen->myNum];
 
-	i830_debug_flush(scrn);
+	intel_debug_flush(scrn);
 }
 
 /**
@@ -496,7 +477,7 @@ static void i830_uxa_done_copy(PixmapPtr dest)
  *
  * This is shared between i830 through i965.
  */
-void i830_done_composite(PixmapPtr dest)
+static void i830_done_composite(PixmapPtr dest)
 {
 	ScrnInfoPtr scrn = xf86Screens[dest->drawable.pScreen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -504,15 +485,15 @@ void i830_done_composite(PixmapPtr dest)
 	if (intel->vertex_flush)
 		intel->vertex_flush(intel);
 
-	i830_debug_flush(scrn);
+	intel_debug_flush(scrn);
 }
 
 #define xFixedToFloat(val) \
 	((float)xFixedToInt(val) + ((float)xFixedFrac(val) / 65536.0))
 
 static Bool
-_i830_transform_point(PictTransformPtr transform,
-		      float x, float y, float result[3])
+_intel_transform_point(PictTransformPtr transform,
+		       float x, float y, float result[3])
 {
 	int j;
 
@@ -532,8 +513,8 @@ _i830_transform_point(PictTransformPtr transform,
  * transform may be null.
  */
 Bool
-i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
-				 float *x_out, float *y_out)
+intel_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
+				  float *x_out, float *y_out)
 {
 	if (transform == NULL) {
 		*x_out = x;
@@ -541,8 +522,9 @@ i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
 	} else {
 		float result[3];
 
-		if (!_i830_transform_point
-		    (transform, (float)x, (float)y, result))
+		if (!_intel_transform_point(transform,
+					    x, y,
+					    result))
 			return FALSE;
 		*x_out = result[0] / result[2];
 		*y_out = result[1] / result[2];
@@ -556,8 +538,8 @@ i830_get_transformed_coordinates(int x, int y, PictTransformPtr transform,
  * transform may be null.
  */
 Bool
-i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
-				    float *x_out, float *y_out, float *w_out)
+intel_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
+				     float *x_out, float *y_out, float *w_out)
 {
 	if (transform == NULL) {
 		*x_out = x;
@@ -566,8 +548,9 @@ i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
 	} else {
 		float result[3];
 
-		if (!_i830_transform_point
-		    (transform, (float)x, (float)y, result))
+		if (!_intel_transform_point(transform,
+					    x, y,
+					    result))
 			return FALSE;
 		*x_out = result[0];
 		*y_out = result[1];
@@ -581,31 +564,31 @@ i830_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform,
  *
  * transform may be null.
  */
-Bool i830_transform_is_affine(PictTransformPtr t)
+Bool intel_transform_is_affine(PictTransformPtr t)
 {
 	if (t == NULL)
 		return TRUE;
 	return t->matrix[2][0] == 0 && t->matrix[2][1] == 0;
 }
 
-dri_bo *i830_get_pixmap_bo(PixmapPtr pixmap)
+dri_bo *intel_get_pixmap_bo(PixmapPtr pixmap)
 {
 	struct intel_pixmap *intel;
 
-	intel = i830_get_pixmap_intel(pixmap);
+	intel = intel_get_pixmap_private(pixmap);
 	if (intel == NULL)
 		return NULL;
 
 	return intel->bo;
 }
 
-void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
+void intel_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
 {
 	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct intel_pixmap *priv;
 
-	priv = i830_get_pixmap_intel(pixmap);
+	priv = intel_get_pixmap_private(pixmap);
 
 	if (priv == NULL && bo == NULL)
 	    return;
@@ -645,7 +628,7 @@ void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
 
 		dri_bo_reference(bo);
 		priv->bo = bo;
-		priv->stride = i830_pixmap_pitch(pixmap);
+		priv->stride = intel_pixmap_pitch(pixmap);
 
 		ret = drm_intel_bo_get_tiling(bo,
 					      &tiling,
@@ -665,14 +648,14 @@ void i830_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo)
 	}
 
   BAIL:
-	i830_set_pixmap_intel(pixmap, priv);
+	intel_set_pixmap_private(pixmap, priv);
 }
 
-static Bool i830_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
+static Bool intel_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
 {
 	ScrnInfoPtr scrn = xf86Screens[pixmap->drawable.pScreen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
-	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
+	struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
 	dri_bo *bo = priv->bo;
 	int ret;
 
@@ -706,15 +689,15 @@ static Bool i830_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
 	return TRUE;
 }
 
-static void i830_uxa_finish_access(PixmapPtr pixmap)
+static void intel_uxa_finish_access(PixmapPtr pixmap)
 {
-	dri_bo *bo = i830_get_pixmap_bo(pixmap);
+	dri_bo *bo = intel_get_pixmap_bo(pixmap);
 	ScreenPtr screen = pixmap->drawable.pScreen;
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
 	if (bo == intel->front_buffer)
-		intel->need_flush = TRUE;
+		intel->need_sync = TRUE;
 
 	if (bo->size > intel->max_gtt_map_size)
 		dri_bo_unmap(bo);
@@ -724,12 +707,12 @@ static void i830_uxa_finish_access(PixmapPtr pixmap)
 	pixmap->devPrivate.ptr = NULL;
 }
 
-static Bool i830_uxa_pixmap_put_image(PixmapPtr pixmap,
-				      char *src, int src_pitch,
-				      int x, int y, int w, int h)
+static Bool intel_uxa_pixmap_put_image(PixmapPtr pixmap,
+				       char *src, int src_pitch,
+				       int x, int y, int w, int h)
 {
-	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
-	int stride = i830_pixmap_pitch(pixmap);
+	struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
+	int stride = intel_pixmap_pitch(pixmap);
 	int ret = FALSE;
 
 	if (src_pitch == stride && w == pixmap->drawable.width && priv->tiling == I915_TILING_NONE) {
@@ -754,17 +737,17 @@ static Bool i830_uxa_pixmap_put_image(PixmapPtr pixmap,
 	return ret;
 }
 
-static Bool i830_uxa_put_image(PixmapPtr pixmap,
-			       int x, int y,
-			       int w, int h,
-			       char *src, int src_pitch)
+static Bool intel_uxa_put_image(PixmapPtr pixmap,
+				int x, int y,
+				int w, int h,
+				char *src, int src_pitch)
 {
 	struct intel_pixmap *priv;
 
-	priv = i830_get_pixmap_intel(pixmap);
+	priv = intel_get_pixmap_private(pixmap);
 	if (!intel_pixmap_is_busy(priv)) {
 		/* bo is not busy so can be replaced without a stall, upload in-place. */
-		return i830_uxa_pixmap_put_image(pixmap, src, src_pitch, x, y, w, h);
+		return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, x, y, w, h);
 	} else {
 		ScreenPtr screen = pixmap->drawable.pScreen;
 
@@ -778,8 +761,8 @@ static Bool i830_uxa_put_image(PixmapPtr pixmap,
 			dri_bo *bo;
 
 			/* Replace busy bo. */
-			size = i830_uxa_pixmap_compute_size (pixmap, w, h,
-							     &tiling, &stride);
+			size = intel_uxa_pixmap_compute_size (pixmap, w, h,
+							      &tiling, &stride);
 			if (size > intel->max_gtt_map_size)
 				return FALSE;
 
@@ -794,10 +777,10 @@ static Bool i830_uxa_put_image(PixmapPtr pixmap,
 						   w, h,
 						   0, 0,
 						   stride, NULL);
-			i830_set_pixmap_bo(pixmap, bo);
+			intel_set_pixmap_bo(pixmap, bo);
 			dri_bo_unreference(bo);
 
-			return i830_uxa_pixmap_put_image(pixmap, src, src_pitch, 0, 0, w, h);
+			return intel_uxa_pixmap_put_image(pixmap, src, src_pitch, 0, 0, w, h);
 		}
 		else
 		{
@@ -811,7 +794,7 @@ static Bool i830_uxa_put_image(PixmapPtr pixmap,
 			if (!scratch)
 				return FALSE;
 
-			ret = i830_uxa_pixmap_put_image(scratch, src, src_pitch, 0, 0, w, h);
+			ret = intel_uxa_pixmap_put_image(scratch, src, src_pitch, 0, 0, w, h);
 			if (ret) {
 				GCPtr gc = GetScratchGC(pixmap->drawable.depth, screen);
 				if (gc) {
@@ -832,12 +815,12 @@ static Bool i830_uxa_put_image(PixmapPtr pixmap,
 	}
 }
 
-static Bool i830_uxa_pixmap_get_image(PixmapPtr pixmap,
-				      int x, int y, int w, int h,
-				      char *dst, int dst_pitch)
+static Bool intel_uxa_pixmap_get_image(PixmapPtr pixmap,
+				       int x, int y, int w, int h,
+				       char *dst, int dst_pitch)
 {
-	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
-	int stride = i830_pixmap_pitch(pixmap);
+	struct intel_pixmap *priv = intel_get_pixmap_private(pixmap);
+	int stride = intel_pixmap_pitch(pixmap);
 
 	if (dst_pitch == stride && w == pixmap->drawable.width) {
 		return drm_intel_bo_get_subdata(priv->bo, y * stride, stride * h, dst) == 0;
@@ -863,10 +846,10 @@ static Bool i830_uxa_pixmap_get_image(PixmapPtr pixmap,
 	}
 }
 
-static Bool i830_uxa_get_image(PixmapPtr pixmap,
-			       int x, int y,
-			       int w, int h,
-			       char *dst, int dst_pitch)
+static Bool intel_uxa_get_image(PixmapPtr pixmap,
+				int x, int y,
+				int w, int h,
+				char *dst, int dst_pitch)
 {
 	struct intel_pixmap *priv;
 	PixmapPtr scratch = NULL;
@@ -879,7 +862,7 @@ static Bool i830_uxa_get_image(PixmapPtr pixmap,
 	 * Also the gpu is much faster at detiling.
 	 */
 
-	priv = i830_get_pixmap_intel(pixmap);
+	priv = intel_get_pixmap_private(pixmap);
 	if (intel_pixmap_is_busy(priv) || priv->tiling != I915_TILING_NONE) {
 		ScreenPtr screen = pixmap->drawable.pScreen;
 		GCPtr gc;
@@ -911,7 +894,7 @@ static Bool i830_uxa_get_image(PixmapPtr pixmap,
 		pixmap = scratch;
 	}
 
-	ret = i830_uxa_pixmap_get_image(pixmap, x, y, w, h, dst, dst_pitch);
+	ret = intel_uxa_pixmap_get_image(pixmap, x, y, w, h, dst, dst_pitch);
 
 	if (scratch)
 		scratch->drawable.pScreen->DestroyPixmap(scratch);
@@ -920,31 +903,22 @@ static Bool i830_uxa_get_image(PixmapPtr pixmap,
 
 }
 
-void i830_uxa_block_handler(ScreenPtr screen)
+void intel_uxa_block_handler(intel_screen_private *intel)
 {
-	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	if (intel->need_flush) {
+	if (intel->need_sync) {
 		dri_bo_wait_rendering(intel->front_buffer);
-		intel->need_flush = FALSE;
+		intel->need_sync = FALSE;
 	}
 }
 
-static Bool i830_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
+static Bool intel_uxa_pixmap_is_offscreen(PixmapPtr pixmap)
 {
-	ScreenPtr screen = pixmap->drawable.pScreen;
-
-	/* The front buffer is always in memory and pinned */
-	if (screen->GetScreenPixmap(screen) == pixmap)
-		return TRUE;
-
-	return i830_get_pixmap_bo(pixmap) != NULL;
+	return intel_get_pixmap_private(pixmap) != NULL;
 }
 
 static PixmapPtr
-i830_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
-		       unsigned usage)
+intel_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
+			unsigned usage)
 {
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -982,7 +956,7 @@ i830_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
 		    if (h <= 16 && tiling == I915_TILING_Y)
 			tiling = I915_TILING_X;
 		}
-		size = i830_uxa_pixmap_compute_size(pixmap, w, h, &tiling, &stride);
+		size = intel_uxa_pixmap_compute_size(pixmap, w, h, &tiling, &stride);
 
 		/* Fail very large allocations.  Large BOs will tend to hit SW fallbacks
 		 * frequently, and also will tend to fail to successfully map when doing
@@ -1025,7 +999,7 @@ i830_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
 
 				list_del(&priv->in_flight);
 				screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL);
-				i830_set_pixmap_intel(pixmap, priv);
+				intel_set_pixmap_private(pixmap, priv);
 				return pixmap;
 			}
 		}
@@ -1061,22 +1035,22 @@ i830_uxa_create_pixmap(ScreenPtr screen, int w, int h, int depth,
 
 		list_init(&priv->batch);
 		list_init(&priv->flush);
-		i830_set_pixmap_intel(pixmap, priv);
+		intel_set_pixmap_private(pixmap, priv);
 	}
 
 	return pixmap;
 }
 
-static Bool i830_uxa_destroy_pixmap(PixmapPtr pixmap)
+static Bool intel_uxa_destroy_pixmap(PixmapPtr pixmap)
 {
 	if (pixmap->refcnt == 1)
-		i830_set_pixmap_bo(pixmap, NULL);
+		intel_set_pixmap_bo(pixmap, NULL);
 	fbDestroyPixmap(pixmap);
 	return TRUE;
 }
 
 
-void i830_uxa_create_screen_resources(ScreenPtr screen)
+void intel_uxa_create_screen_resources(ScreenPtr screen)
 {
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -1084,12 +1058,66 @@ void i830_uxa_create_screen_resources(ScreenPtr screen)
 
 	if (bo != NULL) {
 		PixmapPtr pixmap = screen->GetScreenPixmap(screen);
-		i830_set_pixmap_bo(pixmap, bo);
-		i830_get_pixmap_intel(pixmap)->busy = 1;
+		intel_set_pixmap_bo(pixmap, bo);
+		intel_get_pixmap_private(pixmap)->busy = 1;
 	}
 }
 
-Bool i830_uxa_init(ScreenPtr screen)
+static void
+intel_limits_init(intel_screen_private *intel)
+{
+	/* Limits are described in the BLT engine chapter under Graphics Data Size
+	 * Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO,
+	 * 3DSTATE_DRAWING_RECTANGLE, 3DSTATE_MAP_INFO, and 3DSTATE_MAP_INFO.
+	 *
+	 * i845 through i965 limits 2D rendering to 65536 lines and pitch of 32768.
+	 *
+	 * i965 limits 3D surface to (2*element size)-aligned offset if un-tiled.
+	 * i965 limits 3D surface to 4kB-aligned offset if tiled.
+	 * i965 limits 3D surfaces to w,h of ?,8192.
+	 * i965 limits 3D surface to pitch of 1B - 128kB.
+	 * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
+	 * i965 limits 3D surface pitch alignment to 512B if tiled.
+	 * i965 limits 3D destination drawing rect to w,h of 8192,8192.
+	 *
+	 * i915 limits 3D textures to 4B-aligned offset if un-tiled.
+	 * i915 limits 3D textures to ~4kB-aligned offset if tiled.
+	 * i915 limits 3D textures to width,height of 2048,2048.
+	 * i915 limits 3D textures to pitch of 16B - 8kB, in dwords.
+	 * i915 limits 3D destination to ~4kB-aligned offset if tiled.
+	 * i915 limits 3D destination to pitch of 16B - 8kB, in dwords, if un-tiled.
+	 * i915 limits 3D destination to pitch 64B-aligned if used with depth.
+	 * i915 limits 3D destination to pitch of 512B - 8kB, in tiles, if tiled.
+	 * i915 limits 3D destination to POT aligned pitch if tiled.
+	 * i915 limits 3D destination drawing rect to w,h of 2048,2048.
+	 *
+	 * i845 limits 3D textures to 4B-aligned offset if un-tiled.
+	 * i845 limits 3D textures to ~4kB-aligned offset if tiled.
+	 * i845 limits 3D textures to width,height of 2048,2048.
+	 * i845 limits 3D textures to pitch of 4B - 8kB, in dwords.
+	 * i845 limits 3D destination to 4B-aligned offset if un-tiled.
+	 * i845 limits 3D destination to ~4kB-aligned offset if tiled.
+	 * i845 limits 3D destination to pitch of 8B - 8kB, in dwords.
+	 * i845 limits 3D destination drawing rect to w,h of 2048,2048.
+	 *
+	 * For the tiled issues, the only tiled buffer we draw to should be
+	 * the front, which will have an appropriate pitch/offset already set up,
+	 * so UXA doesn't need to worry.
+	 */
+	if (IS_I965G(intel)) {
+		intel->accel_pixmap_offset_alignment = 4 * 2;
+		intel->accel_pixmap_pitch_alignment = 64;
+		intel->accel_max_x = 8192;
+		intel->accel_max_y = 8192;
+	} else {
+		intel->accel_pixmap_offset_alignment = 4;
+		intel->accel_pixmap_pitch_alignment = 64;
+		intel->accel_max_x = 2048;
+		intel->accel_max_y = 2048;
+	}
+}
+
+Bool intel_uxa_init(ScreenPtr screen)
 {
 	ScrnInfoPtr scrn = xf86Screens[screen->myNum];
 	intel_screen_private *intel = intel_get_screen_private(scrn);
@@ -1101,6 +1129,8 @@ Bool i830_uxa_init(ScreenPtr screen)
 #endif
 		return FALSE;
 
+	intel_limits_init(intel);
+
 	intel->uxa_driver = uxa_driver_alloc();
 	if (intel->uxa_driver == NULL)
 		return FALSE;
@@ -1140,6 +1170,8 @@ Bool i830_uxa_init(ScreenPtr screen)
 		intel->uxa_driver->prepare_composite = i830_prepare_composite;
 		intel->uxa_driver->composite = i830_composite;
 		intel->uxa_driver->done_composite = i830_done_composite;
+
+		intel->batch_flush_notify = i830_batch_flush_notify;
 	} else if (IS_I915G(intel) || IS_I915GM(intel) ||
 		   IS_I945G(intel) || IS_I945GM(intel) || IS_G33CLASS(intel)) {
 		intel->uxa_driver->check_composite = i915_check_composite;
@@ -1148,24 +1180,29 @@ Bool i830_uxa_init(ScreenPtr screen)
 		intel->uxa_driver->prepare_composite = i915_prepare_composite;
 		intel->uxa_driver->composite = i915_composite;
 		intel->uxa_driver->done_composite = i830_done_composite;
+
+		intel->vertex_flush = i915_vertex_flush;
+		intel->batch_flush_notify = i915_batch_flush_notify;
 	} else {
 		intel->uxa_driver->check_composite = i965_check_composite;
 		intel->uxa_driver->check_composite_texture = i965_check_composite_texture;
 		intel->uxa_driver->prepare_composite = i965_prepare_composite;
 		intel->uxa_driver->composite = i965_composite;
 		intel->uxa_driver->done_composite = i830_done_composite;
+
+		intel->batch_flush_notify = i965_batch_flush_notify;
 	}
 
 	/* PutImage */
-	intel->uxa_driver->put_image = i830_uxa_put_image;
-	intel->uxa_driver->get_image = i830_uxa_get_image;
+	intel->uxa_driver->put_image = intel_uxa_put_image;
+	intel->uxa_driver->get_image = intel_uxa_get_image;
 
-	intel->uxa_driver->prepare_access = i830_uxa_prepare_access;
-	intel->uxa_driver->finish_access = i830_uxa_finish_access;
-	intel->uxa_driver->pixmap_is_offscreen = i830_uxa_pixmap_is_offscreen;
+	intel->uxa_driver->prepare_access = intel_uxa_prepare_access;
+	intel->uxa_driver->finish_access = intel_uxa_finish_access;
+	intel->uxa_driver->pixmap_is_offscreen = intel_uxa_pixmap_is_offscreen;
 
-	screen->CreatePixmap = i830_uxa_create_pixmap;
-	screen->DestroyPixmap = i830_uxa_destroy_pixmap;
+	screen->CreatePixmap = intel_uxa_create_pixmap;
+	screen->DestroyPixmap = intel_uxa_destroy_pixmap;
 
 	if (!uxa_driver_init(screen, intel->uxa_driver)) {
 		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
diff --git a/src/i830_video.c b/src/intel_video.c
index bfa25de6..3ecc8080 100644
--- a/src/i830_video.c
+++ b/src/intel_video.c
@@ -64,9 +64,9 @@
 #include "randrstr.h"
 #include "windowstr.h"
 #include "damage.h"
-#include "i830.h"
+#include "intel.h"
+#include "intel_video.h"
 #include "i830_reg.h"
-#include "i830_video.h"
 #include "xf86xv.h"
 #include <X11/extensions/Xv.h>
 #include "dixstruct.h"
@@ -74,7 +74,7 @@
 
 #ifdef INTEL_XVMC
 #define _INTEL_XVMC_SERVER_
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 #endif
 
 #define OFF_DELAY 	250	/* milliseconds */
@@ -210,9 +210,8 @@ static XF86ImageRec Images[NUM_IMAGES] = {
 };
 
 /* kernel modesetting overlay functions */
-static Bool drmmode_has_overlay(ScrnInfoPtr scrn)
+static Bool drmmode_has_overlay(intel_screen_private *intel)
 {
-	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct drm_i915_getparam gp;
 	int has_overlay = 0;
 
@@ -223,10 +222,9 @@ static Bool drmmode_has_overlay(ScrnInfoPtr scrn)
 	return has_overlay ? TRUE : FALSE;
 }
 
-static void drmmode_overlay_update_attrs(ScrnInfoPtr scrn)
+static void drmmode_overlay_update_attrs(intel_screen_private *intel)
 {
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-	intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(scrn);
+	intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel);
 	struct drm_intel_overlay_attrs attrs;
 	int ret;
 
@@ -249,9 +247,8 @@ static void drmmode_overlay_update_attrs(ScrnInfoPtr scrn)
 		OVERLAY_DEBUG("overlay attrs ioctl failed: %i\n", ret);
 }
 
-static void drmmode_overlay_off(ScrnInfoPtr scrn)
+static void drmmode_overlay_off(intel_screen_private *intel)
 {
-	intel_screen_private *intel = intel_get_screen_private(scrn);
 	struct drm_intel_overlay_put_image request;
 	int ret;
 
@@ -265,14 +262,14 @@ static void drmmode_overlay_off(ScrnInfoPtr scrn)
 }
 
 static Bool
-drmmode_overlay_put_image(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
+drmmode_overlay_put_image(intel_screen_private *intel,
+			  xf86CrtcPtr crtc,
 			  int id, short width, short height,
 			  int dstPitch, int dstPitch2,
 			  BoxPtr dstBox, short src_w, short src_h, short drw_w,
 			  short drw_h)
 {
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-	intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(scrn);
+	intel_adaptor_private *adaptor_priv = intel_get_adaptor_private(intel);
 	struct drm_intel_overlay_put_image request;
 	int ret;
 	int planar = is_planar_fourcc(id);
@@ -380,7 +377,7 @@ void I830InitVideo(ScreenPtr screen)
 	}
 
 	/* Set up overlay video if it is available */
-	intel->use_drmmode_overlay = drmmode_has_overlay(scrn);
+	intel->use_drmmode_overlay = drmmode_has_overlay(intel);
 	if (intel->use_drmmode_overlay) {
 		overlayAdaptor = I830SetupImageVideoOverlay(screen);
 		if (overlayAdaptor != NULL) {
@@ -516,7 +513,7 @@ static XF86VideoAdaptorPtr I830SetupImageVideoOverlay(ScreenPtr screen)
 		xvGamma5 = MAKE_ATOM("XV_GAMMA5");
 	}
 
-	drmmode_overlay_update_attrs(scrn);
+	drmmode_overlay_update_attrs(intel);
 
 	return adapt;
 }
@@ -600,7 +597,7 @@ static XF86VideoAdaptorPtr I830SetupImageVideoTextured(ScreenPtr screen)
 	return adapt;
 }
 
-static void i830_free_video_buffers(intel_adaptor_private *adaptor_priv)
+static void intel_free_video_buffers(intel_adaptor_private *adaptor_priv)
 {
 	if (adaptor_priv->buf) {
 		drm_intel_bo_unreference(adaptor_priv->buf);
@@ -621,9 +618,9 @@ static void I830StopVideo(ScrnInfoPtr scrn, pointer data, Bool shutdown)
 
 	if (shutdown) {
 		if (adaptor_priv->videoStatus & CLIENT_VIDEO_ON)
-			drmmode_overlay_off(scrn);
+			drmmode_overlay_off(intel_get_screen_private(scrn));
 
-		i830_free_video_buffers(adaptor_priv);
+		intel_free_video_buffers(adaptor_priv);
 		adaptor_priv->videoStatus = 0;
 	} else {
 		if (adaptor_priv->videoStatus & CLIENT_VIDEO_ON) {
@@ -716,7 +713,7 @@ I830SetPortAttributeOverlay(ScrnInfoPtr scrn,
 		OVERLAY_DEBUG("GAMMA\n");
 	}
 
-	drmmode_overlay_update_attrs(scrn);
+	drmmode_overlay_update_attrs(intel);
 
 	if (attribute == xvColorKey)
 		REGION_EMPTY(scrn->pScreen, &adaptor_priv->clip);
@@ -895,9 +892,9 @@ I830CopyPackedData(intel_adaptor_private *adaptor_priv,
 	drm_intel_bo_unmap(adaptor_priv->buf);
 }
 
-static void i830_memcpy_plane(unsigned char *dst, unsigned char *src,
-			      int height, int width,
-			      int dstPitch, int srcPitch, Rotation rotation)
+static void intel_memcpy_plane(unsigned char *dst, unsigned char *src,
+			       int height, int width,
+			       int dstPitch, int srcPitch, Rotation rotation)
 {
 	int i, j = 0;
 	unsigned char *s;
@@ -972,7 +969,7 @@ I830CopyPlanarData(intel_adaptor_private *adaptor_priv,
 
 	dst1 = dst_base + adaptor_priv->YBufOffset;
 
-	i830_memcpy_plane(dst1, src1, h, w, dstPitch2, srcPitch,
+	intel_memcpy_plane(dst1, src1, h, w, dstPitch2, srcPitch,
 			  adaptor_priv->rotation);
 
 	/* Copy V data for YV12, or U data for I420 */
@@ -990,7 +987,7 @@ I830CopyPlanarData(intel_adaptor_private *adaptor_priv,
 	else
 		dst2 = dst_base + adaptor_priv->VBufOffset;
 
-	i830_memcpy_plane(dst2, src2, h / 2, w / 2,
+	intel_memcpy_plane(dst2, src2, h / 2, w / 2,
 			  dstPitch, srcPitch2, adaptor_priv->rotation);
 
 	/* Copy U data for YV12, or V data for I420 */
@@ -1008,13 +1005,13 @@ I830CopyPlanarData(intel_adaptor_private *adaptor_priv,
 	else
 		dst3 = dst_base + adaptor_priv->UBufOffset;
 
-	i830_memcpy_plane(dst3, src3, h / 2, w / 2,
+	intel_memcpy_plane(dst3, src3, h / 2, w / 2,
 			  dstPitch, srcPitch2, adaptor_priv->rotation);
 
 	drm_intel_bo_unmap(adaptor_priv->buf);
 }
 
-static void i830_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
+static void intel_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
 {
 	dest->x1 = a->x1 > b->x1 ? a->x1 : b->x1;
 	dest->x2 = a->x2 < b->x2 ? a->x2 : b->x2;
@@ -1024,7 +1021,7 @@ static void i830_box_intersect(BoxPtr dest, BoxPtr a, BoxPtr b)
 		dest->x1 = dest->x2 = dest->y1 = dest->y2 = 0;
 }
 
-static void i830_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
+static void intel_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
 {
 	if (crtc->enabled) {
 		crtc_box->x1 = crtc->x;
@@ -1037,7 +1034,7 @@ static void i830_crtc_box(xf86CrtcPtr crtc, BoxPtr crtc_box)
 		crtc_box->x1 = crtc_box->x2 = crtc_box->y1 = crtc_box->y2 = 0;
 }
 
-static int i830_box_area(BoxPtr box)
+static int intel_box_area(BoxPtr box)
 {
 	return (int)(box->x2 - box->x1) * (int)(box->y2 - box->y1);
 }
@@ -1049,8 +1046,8 @@ static int i830_box_area(BoxPtr box)
  */
 
 xf86CrtcPtr
-i830_covering_crtc(ScrnInfoPtr scrn,
-		   BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret)
+intel_covering_crtc(ScrnInfoPtr scrn,
+		    BoxPtr box, xf86CrtcPtr desired, BoxPtr crtc_box_ret)
 {
 	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
 	xf86CrtcPtr crtc, best_crtc;
@@ -1068,12 +1065,12 @@ i830_covering_crtc(ScrnInfoPtr scrn,
 		crtc = xf86_config->crtc[c];
 
 		/* If the CRTC is off, treat it as not covering */
-		if (!i830_crtc_on(crtc))
+		if (!intel_crtc_on(crtc))
 			continue;
 
-		i830_crtc_box(crtc, &crtc_box);
-		i830_box_intersect(&cover_box, &crtc_box, box);
-		coverage = i830_box_area(&cover_box);
+		intel_crtc_box(crtc, &crtc_box);
+		intel_box_intersect(&cover_box, &crtc_box, box);
+		coverage = intel_box_area(&cover_box);
 		if (coverage && crtc == desired) {
 			*crtc_box_ret = crtc_box;
 			return crtc;
@@ -1088,8 +1085,8 @@ i830_covering_crtc(ScrnInfoPtr scrn,
 }
 
 static void
-i830_update_dst_box_to_crtc_coords(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
-				   BoxPtr dstBox)
+intel_update_dst_box_to_crtc_coords(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
+				    BoxPtr dstBox)
 {
 	int tmp;
 
@@ -1167,12 +1164,13 @@ static int xvmc_passthrough(int id)
 }
 
 static Bool
-i830_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
-		     int id, short width, short height,
-		     int dstPitch, int dstPitch2,
-		     BoxPtr dstBox, short src_w, short src_h, short drw_w,
-		     short drw_h)
+intel_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
+		      int id, short width, short height,
+		      int dstPitch, int dstPitch2,
+		      BoxPtr dstBox, short src_w, short src_h, short drw_w,
+		      short drw_h)
 {
+	intel_screen_private *intel = intel_get_screen_private(scrn);
 	int tmp;
 
 	OVERLAY_DEBUG("I830DisplayVideo: %dx%d (pitch %d)\n", width, height,
@@ -1182,12 +1180,12 @@ i830_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
 	 * If the video isn't visible on any CRTC, turn it off
 	 */
 	if (!crtc) {
-		drmmode_overlay_off(scrn);
+		drmmode_overlay_off(intel);
 
 		return TRUE;
 	}
 
-	i830_update_dst_box_to_crtc_coords(scrn, crtc, dstBox);
+	intel_update_dst_box_to_crtc_coords(scrn, crtc, dstBox);
 
 	if (crtc->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
 		tmp = width;
@@ -1201,23 +1199,24 @@ i830_display_overlay(ScrnInfoPtr scrn, xf86CrtcPtr crtc,
 		src_h = tmp;
 	}
 
-	return drmmode_overlay_put_image(scrn, crtc, id, width, height,
+	return drmmode_overlay_put_image(intel, crtc, id,
+					 width, height,
 					 dstPitch, dstPitch2, dstBox,
 					 src_w, src_h, drw_w, drw_h);
 }
 
 static Bool
-i830_clip_video_helper(ScrnInfoPtr scrn,
-		       intel_adaptor_private *adaptor_priv,
-		       xf86CrtcPtr * crtc_ret,
-		       BoxPtr dst,
-		       short src_x, short src_y,
-		       short drw_x, short drw_y,
-		       short src_w, short src_h,
-		       short drw_w, short drw_h,
-		       int id,
-		       int *top, int* left, int* npixels, int *nlines,
-		       RegionPtr reg, INT32 width, INT32 height)
+intel_clip_video_helper(ScrnInfoPtr scrn,
+			intel_adaptor_private *adaptor_priv,
+			xf86CrtcPtr * crtc_ret,
+			BoxPtr dst,
+			short src_x, short src_y,
+			short drw_x, short drw_y,
+			short src_w, short src_h,
+			short drw_w, short drw_h,
+			int id,
+			int *top, int* left, int* npixels, int *nlines,
+			RegionPtr reg, INT32 width, INT32 height)
 {
 	Bool ret;
 	RegionRec crtc_region_local;
@@ -1240,8 +1239,8 @@ i830_clip_video_helper(ScrnInfoPtr scrn,
 	 * For overlay video, compute the relevant CRTC and
 	 * clip video to that
 	 */
-	crtc = i830_covering_crtc(scrn, dst, adaptor_priv->desired_crtc,
-					      &crtc_box);
+	crtc = intel_covering_crtc(scrn, dst, adaptor_priv->desired_crtc,
+				   &crtc_box);
 
 	/* For textured video, we don't actually want to clip at all. */
 	if (crtc && !adaptor_priv->textured) {
@@ -1270,8 +1269,8 @@ i830_clip_video_helper(ScrnInfoPtr scrn,
 }
 
 static void
-i830_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
-		       xf86CrtcPtr crtc, RegionPtr clipBoxes)
+intel_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
+			xf86CrtcPtr crtc, RegionPtr clipBoxes)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	BoxPtr box;
@@ -1279,7 +1278,7 @@ i830_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
 	int pipe = -1, event, load_scan_lines_pipe;
 
 	if (pixmap_is_scanout(pixmap))
-		pipe = i830_crtc_to_pipe(crtc);
+		pipe = intel_crtc_to_pipe(crtc);
 
 	if (pipe >= 0) {
 		if (pipe == 0) {
@@ -1311,8 +1310,8 @@ i830_wait_for_scanline(ScrnInfoPtr scrn, PixmapPtr pixmap,
 }
 
 static Bool
-i830_setup_video_buffer(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
-			int alloc_size, int id, unsigned char *buf)
+intel_setup_video_buffer(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
+			 int alloc_size, int id, unsigned char *buf)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
@@ -1334,9 +1333,9 @@ i830_setup_video_buffer(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
 }
 
 static void
-i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width,
-			short height, int *dstPitch, int *dstPitch2, int *size,
-			int id)
+intel_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, short width,
+		       short height, int *dstPitch, int *dstPitch2, int *size,
+		       int id)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	int pitchAlignMask;
@@ -1412,7 +1411,7 @@ i830_setup_dst_params(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv, sho
 }
 
 static Bool
-i830_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
+intel_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
 		     short width, short height, int *dstPitch, int *dstPitch2,
 		     int top, int left, int npixels, int nlines,
 		     int id, unsigned char *buf)
@@ -1427,10 +1426,10 @@ i830_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
 		srcPitch = width << 1;
 	}
 
-	i830_setup_dst_params(scrn, adaptor_priv, width, height, dstPitch,
+	intel_setup_dst_params(scrn, adaptor_priv, width, height, dstPitch,
 				dstPitch2, &size, id);
 
-	if (!i830_setup_video_buffer(scrn, adaptor_priv, size, id, buf))
+	if (!intel_setup_video_buffer(scrn, adaptor_priv, size, id, buf))
 		return FALSE;
 
 	/* copy data */
@@ -1462,14 +1461,14 @@ i830_copy_video_data(ScrnInfoPtr scrn, intel_adaptor_private *adaptor_priv,
  */
 static int
 I830PutImageTextured(ScrnInfoPtr scrn,
-	     short src_x, short src_y,
-	     short drw_x, short drw_y,
-	     short src_w, short src_h,
-	     short drw_w, short drw_h,
-	     int id, unsigned char *buf,
-	     short width, short height,
-	     Bool sync, RegionPtr clipBoxes, pointer data,
-	     DrawablePtr drawable)
+		     short src_x, short src_y,
+		     short drw_x, short drw_y,
+		     short src_w, short src_h,
+		     short drw_w, short drw_h,
+		     int id, unsigned char *buf,
+		     short width, short height,
+		     Bool sync, RegionPtr clipBoxes, pointer data,
+		     DrawablePtr drawable)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 	intel_adaptor_private *adaptor_priv = (intel_adaptor_private *) data;
@@ -1485,7 +1484,7 @@ I830PutImageTextured(ScrnInfoPtr scrn,
 	       drw_y, drw_w, drw_h, width, height);
 #endif
 
-	if (!i830_clip_video_helper(scrn,
+	if (!intel_clip_video_helper(scrn,
 				    adaptor_priv,
 				    &crtc,
 				    &dstBox,
@@ -1500,9 +1499,9 @@ I830PutImageTextured(ScrnInfoPtr scrn,
 		int size;
 		uint32_t *gem_handle = (uint32_t *)buf;
 
-		i830_free_video_buffers(adaptor_priv);
+		intel_free_video_buffers(adaptor_priv);
 
-		i830_setup_dst_params(scrn, adaptor_priv, width, height,
+		intel_setup_dst_params(scrn, adaptor_priv, width, height,
 				&dstPitch, &dstPitch2, &size, id);
 
 		if (IS_I915G(intel) || IS_I915GM(intel)) {
@@ -1516,14 +1515,14 @@ I830PutImageTextured(ScrnInfoPtr scrn,
 							  "xvmc surface",
 							  *gem_handle);
 	} else {
-		if (!i830_copy_video_data(scrn, adaptor_priv, width, height,
+		if (!intel_copy_video_data(scrn, adaptor_priv, width, height,
 					  &dstPitch, &dstPitch2,
 					  top, left, npixels, nlines, id, buf))
 			return BadAlloc;
 	}
 
 	if (crtc && adaptor_priv->SyncToVblank != 0) {
-		i830_wait_for_scanline(scrn, pixmap, crtc, clipBoxes);
+		intel_wait_for_scanline(scrn, pixmap, crtc, clipBoxes);
 	}
 
 	if (IS_I965G(intel)) {
@@ -1575,7 +1574,7 @@ I830PutImageOverlay(ScrnInfoPtr scrn,
 	if (src_h >= (drw_h * 8))
 		drw_h = src_h / 7;
 
-	if (!i830_clip_video_helper(scrn,
+	if (!intel_clip_video_helper(scrn,
 				    adaptor_priv,
 				    &crtc,
 				    &dstBox,
@@ -1595,12 +1594,12 @@ I830PutImageOverlay(ScrnInfoPtr scrn,
 		return Success;
 	}
 
-	if (!i830_copy_video_data(scrn, adaptor_priv, width, height,
+	if (!intel_copy_video_data(scrn, adaptor_priv, width, height,
 				  &dstPitch, &dstPitch2,
 				  top, left, npixels, nlines, id, buf))
 		return BadAlloc;
 
-	if (!i830_display_overlay
+	if (!intel_display_overlay
 	    (scrn, crtc, id, width, height, dstPitch, dstPitch2,
 	     &dstBox, src_w, src_h, drw_w, drw_h))
 		return BadAlloc;
@@ -1705,18 +1704,15 @@ I830QueryImageAttributes(ScrnInfoPtr scrn,
 }
 
 void
-I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
-		      pointer pReadmask)
+intel_video_block_handler(intel_screen_private *intel)
 {
-	ScrnInfoPtr scrn = xf86Screens[i];
-	intel_screen_private *intel = intel_get_screen_private(scrn);
 	intel_adaptor_private *adaptor_priv;
 
 	/* no overlay */
 	if (intel->adaptor == NULL)
 		return;
 
-	adaptor_priv = intel_get_adaptor_private(scrn);
+	adaptor_priv = intel_get_adaptor_private(intel);
 
 	if (adaptor_priv->videoStatus & TIMER_MASK) {
 #if 1
@@ -1729,14 +1725,14 @@ I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
 				/* Turn off the overlay */
 				OVERLAY_DEBUG("BLOCKHANDLER\n");
 
-				drmmode_overlay_off(scrn);
+				drmmode_overlay_off(intel);
 
 				adaptor_priv->videoStatus = FREE_TIMER;
 				adaptor_priv->freeTime = now + FREE_DELAY;
 			}
 		} else {	/* FREE_TIMER */
 			if (adaptor_priv->freeTime < now) {
-				i830_free_video_buffers(adaptor_priv);
+				intel_free_video_buffers(adaptor_priv);
 				adaptor_priv->videoStatus = 0;
 			}
 		}
diff --git a/src/i830_video.h b/src/intel_video.h
index b5753bf1..e1ba09af 100644
--- a/src/i830_video.h
+++ b/src/intel_video.h
@@ -61,9 +61,9 @@ typedef struct {
 } intel_adaptor_private;
 
 static inline intel_adaptor_private *
-intel_get_adaptor_private(ScrnInfoPtr scrn)
+intel_get_adaptor_private(intel_screen_private *intel)
 {
-	return intel_get_screen_private(scrn)->adaptor->pPortPrivates[0].ptr;
+	return intel->adaptor->pPortPrivates[0].ptr;
 }
 
 void I915DisplayVideoTextured(ScrnInfoPtr scrn,
@@ -80,8 +80,8 @@ void I965DisplayVideoTextured(ScrnInfoPtr scrn,
 			      short src_w, short src_h,
 			      short drw_w, short drw_h, PixmapPtr pixmap);
 
-void I830VideoBlockHandler(int i, pointer blockData, pointer pTimeout,
-			   pointer pReadmask);
 void i965_free_video(ScrnInfoPtr scrn);
 
 int is_planar_fourcc(int id);
+
+void intel_video_block_handler(intel_screen_private *intel);
diff --git a/src/xvmc/i915_xvmc.h b/src/xvmc/i915_xvmc.h
index 96dd3ce8..852e3eab 100644
--- a/src/xvmc/i915_xvmc.h
+++ b/src/xvmc/i915_xvmc.h
@@ -29,7 +29,7 @@
 #define _I915XVMC_H
 
 #include "intel_xvmc.h"
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 
 #define I915_SUBPIC_PALETTE_SIZE        16
 #define MAX_SUBCONTEXT_LEN              1024
diff --git a/src/xvmc/i965_xvmc.c b/src/xvmc/i965_xvmc.c
index 76cd289b..210cf731 100644
--- a/src/xvmc/i965_xvmc.c
+++ b/src/xvmc/i965_xvmc.c
@@ -30,7 +30,7 @@
 #include "brw_defines.h"
 #include "brw_structs.h"
 #include "intel_batchbuffer.h"
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 #define BATCH_STRUCT(x) intelBatchbufferData(&x, sizeof(x), 0)
 #define URB_SIZE     256	/* XXX */
 
diff --git a/src/xvmc/intel_xvmc.h b/src/xvmc/intel_xvmc.h
index d67065ed..7fdfd062 100644
--- a/src/xvmc/intel_xvmc.h
+++ b/src/xvmc/intel_xvmc.h
@@ -41,7 +41,7 @@
 #include <stdint.h>
 
 #include <xf86drm.h>
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 #include <X11/X.h>
 #include <X11/Xlibint.h>
 #include <X11/Xutil.h>
diff --git a/src/xvmc/xvmc_vld.c b/src/xvmc/xvmc_vld.c
index 0eb2e2f9..addc7c98 100644
--- a/src/xvmc/xvmc_vld.c
+++ b/src/xvmc/xvmc_vld.c
@@ -24,7 +24,7 @@
  *    Zou Nan hai <nanhai.zou@intel.com>
  */
 #include "intel_xvmc.h"
-#include "i830_hwmc.h"
+#include "intel_hwmc.h"
 #include "i830_reg.h"
 #include "i965_reg.h"
 #include "brw_defines.h"