Remove all code that pretends to work if we lack drm and gem.

It doesn't work, and just adds extra complexity for no real gain by this
point.

7 files changed, 43 insertions, 387 deletions

diff --git a/src/i830.h b/src/i830.h
index e535537e..32792836 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -276,15 +276,6 @@ struct _i830_memory {
 	Bool lifetime_fixed_offset;
 };
 
-typedef struct {
-	int tail_mask;
-	i830_memory *mem;
-	unsigned char *virtual_start;
-	int head;
-	int tail;
-	int space;
-} I830RingBuffer;
-
 /* store information about an Ixxx DVO */
 /* The i830->i865 use multiple DVOs with multiple i2cs */
 /* the i915, i945 have a single sDVO i2c bus - which is different */
@@ -469,18 +460,6 @@ typedef struct intel_screen_private {
 	i830_memory *cursor_mem_classic[2];
 	/* One big buffer for all cursors for kernels that support this */
 	i830_memory *cursor_mem_argb[2];
-	i830_memory *fake_bufmgr_mem;
-
-	/* Regions allocated either from the above pools, or from agpgart. */
-	I830RingBuffer ring;
-
-	/** Number of bytes being emitted in the current BEGIN_LP_RING */
-	unsigned int ring_emitting;
-	/** Number of bytes that have been emitted in the current BEGIN_LP_RING */
-	unsigned int ring_used;
-	/** Offset in the ring for the next DWORD emit */
-	uint32_t ring_next;
-
 
 	dri_bufmgr *bufmgr;
 
@@ -518,8 +497,6 @@ typedef struct intel_screen_private {
 
 	i830_memory *memory_manager;	/**< DRI memory manager aperture */
 
-	Bool have_gem;
-
 	Bool need_mi_flush;
 
 	Bool tiling;
@@ -660,8 +637,6 @@ typedef struct intel_screen_private {
 
 	unsigned int SaveGeneration;
 
-	OsTimerPtr devicesTimer;
-
 	int ddc2;
 
 	enum backlight_control backlight_control_method;
@@ -791,7 +766,6 @@ unsigned long intel_get_pixmap_pitch(PixmapPtr pixmap);
 #include "i830_batchbuffer.h"
 
 /* I830 specific functions */
-extern int I830WaitLpRing(ScrnInfoPtr scrn, int n, int timeout_millis);
 extern void I830SetPIOAccess(intel_screen_private *intel);
 extern void I830SetMMIOAccess(intel_screen_private *intel);
 extern void I830InitHWCursor(ScrnInfoPtr scrn);
@@ -988,14 +962,6 @@ void i830_enter_render(ScrnInfoPtr);
 
 extern void intel_sync(ScrnInfoPtr scrn);
 
-static inline void
-i830_wait_ring_idle(ScrnInfoPtr scrn)
-{
-   intel_screen_private *intel = intel_get_screen_private(scrn);
-
-   I830WaitLpRing(scrn, intel->ring.mem->size - 8, 0);
-}
-
 static inline int i830_fb_compression_supported(intel_screen_private *intel)
 {
     if (!IS_MOBILE(intel))
diff --git a/src/i830_accel.c b/src/i830_accel.c
index 0b9195f3..74808fd8 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -46,80 +46,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "i830_ring.h"
 #include "i915_drm.h"
 
-unsigned long intel_get_pixmap_offset(PixmapPtr pixmap)
-{
-	ScreenPtr pScreen = pixmap->drawable.pScreen;
-	ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	return (unsigned long)pixmap->devPrivate.ptr -
-	    (unsigned long)intel->FbBase;
-}
-
 unsigned long intel_get_pixmap_pitch(PixmapPtr pixmap)
 {
 	return (unsigned long)pixmap->devKind;
 }
 
-int
-I830WaitLpRing(ScrnInfoPtr scrn, int n, int timeout_millis)
-{
-   intel_screen_private *intel = intel_get_screen_private(scrn);
-   I830RingBuffer *ring = &intel->ring;
-   int iters = 0;
-   unsigned int start = 0;
-   unsigned int now = 0;
-   int last_head = 0;
-   unsigned int first = 0;
-
-   /* If your system hasn't moved the head pointer in 2 seconds, I'm going to
-    * call it crashed.
-    */
-   if (timeout_millis == 0)
-      timeout_millis = 2000;
-
-   if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) {
-      ErrorF("I830WaitLpRing %d\n", n);
-      first = GetTimeInMillis();
-   }
-
-   while (ring->space < n) {
-      ring->head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-      ring->space = ring->head - (ring->tail + 8);
-
-      if (ring->space < 0)
-	 ring->space += ring->mem->size;
-
-      iters++;
-      now = GetTimeInMillis();
-      if (start == 0 || now < start || ring->head != last_head) {
-	 if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
-	    if (now > start)
-	       ErrorF("space: %d wanted %d\n", ring->space, n);
-	 start = now;
-	 last_head = ring->head;
-      } else if (now - start > timeout_millis) {
-	 ErrorF("Error in I830WaitLpRing(), timeout for %d seconds\n",
-		timeout_millis/1000);
-	 ErrorF("space: %d wanted %d\n", ring->space, n);
-	 intel->uxa_driver = NULL;
-	 FatalError("lockup\n");
-      }
-
-      DELAY(10);
-   }
-
-   if (I810_DEBUG & DEBUG_VERBOSE_ACCEL) {
-      now = GetTimeInMillis();
-      if (now - first) {
-	 ErrorF("Elapsed %u ms\n", now - first);
-	 ErrorF("space: %d wanted %d\n", ring->space, n);
-      }
-   }
-
-   return iters;
-}
-
 void i830_debug_flush(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
diff --git a/src/i830_batchbuffer.c b/src/i830_batchbuffer.c
index 1449e013..cafcf8b3 100644
--- a/src/i830_batchbuffer.c
+++ b/src/i830_batchbuffer.c
@@ -40,68 +40,6 @@
 
 #define DUMP_BATCHBUFFERS NULL /* "/tmp/i915-batchbuffers.dump" */
 
-static int
-intel_nondrm_exec(dri_bo *bo, unsigned int used, void *priv)
-{
-    ScrnInfoPtr scrn = priv;
-    intel_screen_private *intel = intel_get_screen_private(scrn);
-
-    BEGIN_LP_RING(4);
-    OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
-    OUT_RING(bo->offset);
-    OUT_RING(MI_NOOP);
-    OUT_RING(MI_NOOP);
-    ADVANCE_LP_RING();
-
-    return 0;
-}
-
-static int
-intel_nondrm_exec_i830(dri_bo *bo, unsigned int used, void *priv)
-{
-    ScrnInfoPtr scrn = priv;
-    intel_screen_private *intel = intel_get_screen_private(scrn);
-
-    BEGIN_LP_RING(4);
-    OUT_RING(MI_BATCH_BUFFER);
-    OUT_RING(bo->offset);
-    OUT_RING(bo->offset + intel->batch_used - 4);
-    OUT_RING(MI_NOOP);
-    ADVANCE_LP_RING();
-
-    return 0;
-}
-
-/**
- * Creates a fence value representing a request to be passed.
- *
- * Stub implementation that should be avoided when DRM functions are available.
- */
-static unsigned int
-intel_nondrm_emit(void *priv)
-{
-    static unsigned int fence = 0;
-
-    /* Match DRM in not using half the range. The fake bufmgr relies on this. */
-    if (++fence >= 0x8000000)
-	fence = 1;
-
-    return fence;
-}
-
-/**
- * Waits on a fence representing a request to be passed.
- *
- * Stub implementation that should be avoided when DRM functions are available.
- */
-static void
-intel_nondrm_wait(unsigned int fence, void *priv)
-{
-    ScrnInfoPtr scrn = priv;
-
-    i830_wait_ring_idle(scrn);
-}
-
 static void intel_end_vertex(intel_screen_private *intel)
 {
 	if (intel->vertex_bo) {
@@ -150,18 +88,6 @@ void intel_batch_init(ScrnInfoPtr scrn)
 	intel->batch_emitting = 0;
 
 	intel_next_batch(scrn);
-
-	if (!intel->have_gem) {
-		if (IS_I830(intel) || IS_845G(intel)) {
-			intel_bufmgr_fake_set_exec_callback(intel->bufmgr,
-			    intel_nondrm_exec_i830, scrn);
-		} else {
-			intel_bufmgr_fake_set_exec_callback(intel->bufmgr,
-			    intel_nondrm_exec, scrn);
-		}
-		intel_bufmgr_fake_set_fence_callback(intel->bufmgr,
-		    intel_nondrm_emit, intel_nondrm_wait, scrn);
-	}
 }
 
 void intel_batch_teardown(ScrnInfoPtr scrn)
diff --git a/src/i830_batchbuffer.h b/src/i830_batchbuffer.h
index 12fa0ada..17c223f6 100644
--- a/src/i830_batchbuffer.h
+++ b/src/i830_batchbuffer.h
@@ -141,20 +141,12 @@ intel_batch_emit_reloc_pixmap(intel_screen_private *intel, PixmapPtr pixmap,
 			      uint32_t read_domains, uint32_t write_domain,
 			      uint32_t delta, int needs_fence)
 {
-	dri_bo *bo = i830_get_pixmap_bo(pixmap);
-	uint32_t offset;
-
-	if (bo) {
-		struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
-		intel_batch_mark_pixmap_domains(intel, priv, read_domains,
-		    write_domain);
-		intel_batch_emit_reloc(intel, priv->bo, read_domains,
-		    write_domain, delta, needs_fence);
-		return;
-	}
-	offset = intel_get_pixmap_offset(pixmap);
-	*(uint32_t *)(intel->batch_ptr + intel->batch_used) = offset + delta;
-	intel->batch_used += 4;
+	struct intel_pixmap *priv = i830_get_pixmap_intel(pixmap);
+
+	intel_batch_mark_pixmap_domains(intel, priv, read_domains,
+	    write_domain);
+	intel_batch_emit_reloc(intel, priv->bo, read_domains,
+	    write_domain, delta, needs_fence);
 }
 
 #define ALIGN_BATCH(align) intel_batch_align(intel, align);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 1a69b535..16444ce1 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -499,10 +499,6 @@ I830MapMem(ScrnInfoPtr scrn)
     if (err)
 	return FALSE;
 
-   if (intel->ring.mem != NULL) {
-      intel->ring.virtual_start = intel->FbBase + intel->ring.mem->offset;
-   }
-
    return TRUE;
 }
 
@@ -1488,8 +1484,6 @@ static Bool I830DrmModeInit(ScrnInfoPtr scrn)
 		return FALSE;
 	}
 
-	intel->have_gem = TRUE;
-
 	i830_init_bufmgr(scrn);
 
 	return TRUE;
@@ -1703,81 +1697,6 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
 	return TRUE;
 }
 
-/*
- * Reset registers that it doesn't make sense to save/restore to a sane state.
- * This is basically the ring buffer and fence registers.  Restoring these
- * doesn't make sense without restoring GTT mappings.  This is something that
- * whoever gets control next should do.
- */
-static void i830_stop_ring(ScrnInfoPtr scrn, Bool flush)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-	unsigned long temp;
-
-	DPRINTF(PFX, "ResetState: flush is %s\n", BOOLTOSTRING(flush));
-
-	/* Flush the ring buffer, then disable it. */
-	temp = INREG(LP_RING + RING_LEN);
-	if (temp & RING_VALID) {
-		i830_refresh_ring(scrn);
-		i830_wait_ring_idle(scrn);
-	}
-
-	OUTREG(LP_RING + RING_LEN, 0);
-	OUTREG(LP_RING + RING_HEAD, 0);
-	OUTREG(LP_RING + RING_TAIL, 0);
-	OUTREG(LP_RING + RING_START, 0);
-}
-
-static void i830_start_ring(ScrnInfoPtr scrn)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-	unsigned int itemp;
-
-	DPRINTF(PFX, "SetRingRegs\n");
-
-	OUTREG(LP_RING + RING_LEN, 0);
-	OUTREG(LP_RING + RING_TAIL, 0);
-	OUTREG(LP_RING + RING_HEAD, 0);
-
-	assert((intel->ring.mem->offset & I830_RING_START_MASK) ==
-	    intel->ring.mem->offset);
-
-	/* Don't care about the old value. Reserved bits must be zero anyway. */
-	itemp = intel->ring.mem->offset;
-	OUTREG(LP_RING + RING_START, itemp);
-
-	if (((intel->ring.mem->size - 4096) & I830_RING_NR_PAGES) !=
-	    intel->ring.mem->size - 4096) {
-		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		    "I830SetRingRegs: Ring buffer size - 4096 (%lx) violates "
-		    "its mask (%x)\n", intel->ring.mem->size - 4096,
-		    I830_RING_NR_PAGES);
-	}
-	/* Don't care about the old value. Reserved bits must be zero anyway. */
-	itemp = (intel->ring.mem->size - 4096) & I830_RING_NR_PAGES;
-	itemp |= (RING_NO_REPORT | RING_VALID);
-	OUTREG(LP_RING + RING_LEN, itemp);
-	i830_refresh_ring(scrn);
-}
-
-void i830_refresh_ring(ScrnInfoPtr scrn)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	/* If we're reaching RefreshRing as a result of grabbing the DRI lock
-	 * before we've set up the ringbuffer, don't bother.
-	 */
-	if (intel->ring.mem == NULL)
-		return;
-
-	intel->ring.head = INREG(LP_RING + RING_HEAD) & I830_HEAD_MASK;
-	intel->ring.tail = INREG(LP_RING + RING_TAIL);
-	intel->ring.space = intel->ring.head - (intel->ring.tail + 8);
-	if (intel->ring.space < 0)
-		intel->ring.space += intel->ring.mem->size;
-}
-
 enum pipe {
 	PIPE_A = 0,
 	PIPE_B,
@@ -2379,24 +2298,16 @@ void i830_init_bufmgr(ScrnInfoPtr scrn)
 	if (intel->bufmgr)
 		return;
 
-	if (intel->have_gem) {
+	batch_size = 4096 * 4;
 
-		batch_size = 4096 * 4;
+	/* The 865 has issues with larger-than-page-sized batch buffers. */
+	if (IS_I865G(intel))
+		batch_size = 4096;
 
-		/* The 865 has issues with larger-than-page-sized batch buffers. */
-		if (IS_I865G(intel))
-			batch_size = 4096;
+	intel->bufmgr = intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
+	intel_bufmgr_gem_enable_reuse(intel->bufmgr);
+	drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
 
-		intel->bufmgr = intel_bufmgr_gem_init(intel->drmSubFD, batch_size);
-		intel_bufmgr_gem_enable_reuse(intel->bufmgr);
-		drm_intel_bufmgr_gem_enable_fenced_relocs(intel->bufmgr);
-	} else {
-		assert(intel->FbBase != NULL);
-		intel->bufmgr = intel_bufmgr_fake_init(intel->drmSubFD,
-		    intel->fake_bufmgr_mem->offset, intel->FbBase +
-		        intel->fake_bufmgr_mem->offset,
-		        intel->fake_bufmgr_mem->size, NULL);
-	}
 	list_init(&intel->batch_pixmaps);
 	list_init(&intel->flush_pixmaps);
 	list_init(&intel->in_flight);
@@ -2903,27 +2814,14 @@ static void I830LeaveVT(int scrnIndex, int flags)
 
 	intel->leaving = TRUE;
 
-	if (intel->devicesTimer)
-		TimerFree(intel->devicesTimer);
-	intel->devicesTimer = NULL;
-
 	i830SetHotkeyControl(scrn, HOTKEY_BIOS_SWITCH);
 
 	xf86RotateFreeShadow(scrn);
 
 	xf86_hide_cursors(scrn);
 
-	intel_sync(scrn);
-
 	if (!intel->use_drm_mode) {
 		RestoreHWState(scrn);
-		/* Evict everything from the bufmgr, as we're about to lose
-		 * ownership of the graphics memory.
-		 */
-		if (!intel->have_gem) {
-			intel_bufmgr_fake_evict_all(intel->bufmgr);
-			i830_stop_ring(scrn, TRUE);
-		}
 
 		/* console restore hack */
 		if (IS_IGDNG(intel) && intel->int10 && intel->int10Mode) {
@@ -2943,7 +2841,7 @@ static void I830LeaveVT(int scrnIndex, int flags)
 
 	i830_unbind_all_memory(scrn);
 
-	if (intel->have_gem && !intel->use_drm_mode) {
+	if (!intel->use_drm_mode) {
 		int ret;
 
 		/* Tell the kernel to evict all buffer objects and block GTT
@@ -3021,12 +2919,11 @@ static Bool I830EnterVT(int scrnIndex, int flags)
 
 	intel->leaving = FALSE;
 
-	if (!intel->use_drm_mode)
-		i830_disable_render_standby(scrn);
-
-	if (intel->have_gem && !intel->use_drm_mode) {
+	if (!intel->use_drm_mode) {
 		int ret;
 
+		i830_disable_render_standby(scrn);
+
 		/* Tell the kernel that we're back in control and ready for GTT
 		 * usage.
 		 */
@@ -3047,11 +2944,6 @@ static Bool I830EnterVT(int scrnIndex, int flags)
 		gen4_render_state_init(scrn);
 
 	if (!intel->use_drm_mode) {
-		/* Re-set up the ring. */
-		if (!intel->have_gem) {
-			i830_stop_ring(scrn, FALSE);
-			i830_start_ring(scrn);
-		}
 		I830InitHWCursor(scrn);
 
 		/* Tell the BIOS that we're in control of mode setting now. */
@@ -3103,10 +2995,6 @@ static Bool I830CloseScreen(int scrnIndex, ScreenPtr screen)
 		I830LeaveVT(scrnIndex, 0);
 	}
 
-	if (intel->devicesTimer)
-		TimerFree(intel->devicesTimer);
-	intel->devicesTimer = NULL;
-
 	if (!intel->use_drm_mode) {
 		DPRINTF(PFX, "\nUnmapping memory\n");
 		I830UnmapMem(scrn);
diff --git a/src/i830_memory.c b/src/i830_memory.c
index de0c1cde..f26ec6dd 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -198,7 +198,7 @@ static Bool i830_bind_memory(ScrnInfoPtr scrn, i830_memory *mem)
 	if (mem == NULL || mem->bound || intel->use_drm_mode)
 		return TRUE;
 
-	if (intel->have_gem && mem->bo != NULL) {
+	if (mem->bo != NULL) {
 
 		if (dri_bo_pin(mem->bo, mem->alignment) != 0) {
 			xf86DrvMsg(scrn->scrnIndex, X_ERROR,
@@ -332,8 +332,6 @@ void i830_reset_allocations(ScrnInfoPtr scrn)
 	intel->front_buffer = NULL;
 	intel->overlay_regs = NULL;
 	intel->power_context = NULL;
-	intel->ring.mem = NULL;
-	intel->fake_bufmgr_mem = NULL;
 }
 
 /**
@@ -442,15 +440,14 @@ Bool i830_allocator_init(ScrnInfoPtr scrn, unsigned long size)
 			/* Tell the kernel to manage it */
 			ret = ioctl(intel->drmSubFD, DRM_IOCTL_I915_GEM_INIT,
 			    &init);
-			if (ret == 0) {
-				intel->have_gem = TRUE;
-				i830_init_bufmgr(scrn);
-			} else {
+			if (ret != 0) {
 				xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 				    "Failed to initialize kernel memory manager\n");
 				i830_free_memory(scrn, intel->memory_manager);
 				intel->memory_manager = NULL;
+				return FALSE;
 			}
+			i830_init_bufmgr(scrn);
 		} else {
 			xf86DrvMsg(scrn->scrnIndex, X_ERROR,
 			    "Failed to allocate space for kernel memory manager\n");
@@ -464,8 +461,8 @@ void i830_allocator_fini(ScrnInfoPtr scrn)
 {
 	intel_screen_private *intel = intel_get_screen_private(scrn);
 
-	/* The memory manager is more special */ if
-	(intel->memory_manager) {
+	/* The memory manager is more special */
+	if (intel->memory_manager) {
 		i830_free_memory(scrn, intel->memory_manager);
 		intel->memory_manager = NULL;
 	}
@@ -829,7 +826,7 @@ i830_memory *i830_allocate_memory(ScrnInfoPtr scrn, const char *name,
 	 * kernel. Under UMS, we separately reserve space for
 	 *  a few objects (overlays, power context, cursors, etc).
 	 */
-	if (intel->have_gem && (intel->use_drm_mode ||
+	if ((intel->use_drm_mode ||
 	    !(flags & (NEED_PHYSICAL_ADDR|NEED_LIFETIME_FIXED)))) {
 		return i830_allocate_memory_bo(scrn, name, size, pitch,
 		    alignment, flags, tile_format);
@@ -934,31 +931,6 @@ i830_describe_allocations(ScrnInfoPtr scrn, int verbosity, const char *prefix)
 	}
 }
 
-static Bool i830_allocate_ringbuffer(ScrnInfoPtr scrn)
-{
-	intel_screen_private *intel = intel_get_screen_private(scrn);
-
-	if (intel->have_gem || intel->ring.mem != NULL)
-		return TRUE;
-
-	/* We don't have any mechanism in the DRM yet to alert it that we've
-	 * moved the ringbuffer since init time, so allocate it fixed for its
-	 * lifetime.
-	 */
-	intel->ring.mem = i830_allocate_memory(scrn, "ring buffer",
-	    PRIMARY_RINGBUFFER_SIZE, PITCH_NONE, GTT_PAGE_SIZE,
-	    NEED_LIFETIME_FIXED, TILE_NONE);
-	if (intel->ring.mem == NULL) {
-		xf86DrvMsg(scrn->scrnIndex, X_ERROR,
-		    "Failed to allocate Ring Buffer space\n");
-		return FALSE;
-	}
-
-	intel->ring.tail_mask = intel->ring.mem->size - 1;
-	intel->ring.virtual_start = intel->FbBase + intel->ring.mem->offset;
-	return TRUE;
-}
-
 /**
  * Allocate space for overlay registers.
  */
@@ -1238,10 +1210,6 @@ Bool i830_allocate_2d_memory(ScrnInfoPtr scrn)
 			    "\tthe agpgart module loaded.\n");
 			return FALSE;
 		}
-
-		/* Allocate the ring buffer first, so it ends up in stolen mem. */
-		if (!i830_allocate_ringbuffer(scrn))
-			return FALSE;
 	}
 
 	if (intel->fb_compression)
@@ -1254,18 +1222,6 @@ Bool i830_allocate_2d_memory(ScrnInfoPtr scrn)
 		return FALSE;
 	}
 
-	if (!intel->have_gem) {
-		intel->fake_bufmgr_mem = i830_allocate_memory(scrn,
-		    "fake bufmgr", MB(8), PITCH_NONE, GTT_PAGE_SIZE, 0,
-		    TILE_NONE);
-		if (intel->fake_bufmgr_mem == NULL) {
-			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
-			    "Failed to allocate fake bufmgr space.\n");
-			return FALSE;
-		}
-		i830_init_bufmgr(scrn);
-	    }
-
 	if (!intel->use_drm_mode)
 		i830_allocate_overlay(scrn);
 
diff --git a/src/i830_uxa.c b/src/i830_uxa.c
index c05c817f..a0ce2e11 100644
--- a/src/i830_uxa.c
+++ b/src/i830_uxa.c
@@ -656,29 +656,26 @@ static Bool i830_uxa_prepare_access(PixmapPtr pixmap, uxa_access_t access)
 	    (access == UXA_ACCESS_RW || priv->batch_write_domain))
 		intel_batch_submit(scrn);
 
-	if (bo) {
-		if (bo->size > intel->max_gtt_map_size || !intel->have_gem) {
-			ret = dri_bo_map(bo, access == UXA_ACCESS_RW);
-			if (ret != 0) {
-				xf86DrvMsg(scrn->scrnIndex, X_WARNING,
-					   "%s: bo map failed: %s\n",
-					   __FUNCTION__,
-					   strerror(-ret));
-				return FALSE;
-			}
-		} else {
-			ret = drm_intel_gem_bo_map_gtt(bo);
-			if (ret != 0) {
-				xf86DrvMsg(scrn->scrnIndex, X_WARNING,
-					   "%s: gtt bo map failed: %s\n",
-					   __FUNCTION__,
-					   strerror(-ret));
-				return FALSE;
-			}
+	if (bo->size > intel->max_gtt_map_size) {
+		ret = dri_bo_map(bo, access == UXA_ACCESS_RW);
+		if (ret != 0) {
+			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+				   "%s: bo map failed: %s\n",
+				   __FUNCTION__,
+				   strerror(-ret));
+			return FALSE;
 		}
-		pixmap->devPrivate.ptr = bo->virtual;
-	} else
-		i830_wait_ring_idle(scrn);
+	} else {
+		ret = drm_intel_gem_bo_map_gtt(bo);
+		if (ret != 0) {
+			xf86DrvMsg(scrn->scrnIndex, X_WARNING,
+				   "%s: gtt bo map failed: %s\n",
+				   __FUNCTION__,
+				   strerror(-ret));
+			return FALSE;
+		}
+	}
+	pixmap->devPrivate.ptr = bo->virtual;
 
 	return TRUE;
 }