diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-11-06 08:56:01 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2013-11-06 09:01:17 +0000 |
| commit | ef842d2ceee4d1ccf8a0f8a81530dc8be8e18b44 (patch) | |
| tree | 4202c226fe62ca81cfe7208e2271576e3077c261 /src | |
| parent | f2f9019bae5f6f03b5e23da759d3871fc18dd9f4 (diff) | |
sna: Be more pessimistic for tiling sizes on older gen
On the older generation, we have severe alignment penalties for fenced
regions which dramatically reduce the amount of space we can effectively
use in a batch. To accommodate this, reduce the tiling step size.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'src')
| -rw-r--r-- | src/sna/sna_tiling.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/sna/sna_tiling.c b/src/sna/sna_tiling.c index b0a48dd3..d23fb00e 100644 --- a/src/sna/sna_tiling.c +++ b/src/sna/sna_tiling.c @@ -718,8 +718,6 @@ bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, } if (max_size > sna->kgem.max_copy_tile_size) max_size = sna->kgem.max_copy_tile_size; - if (sna->kgem.gen < 033) - max_size /= 2; /* accommodate fence alignment */ pixman_region_init_rects(®ion, box, nbox); @@ -729,6 +727,8 @@ bool sna_tiling_blt_copy_boxes(struct sna *sna, uint8_t alu, step /= 2; while (step * step * 4 > max_size) step /= 2; + if (sna->kgem.gen < 033) + step /= 2; /* accommodate severe fence restrictions */ if (step == 0) { DBG(("%s: tiles cannot fit into aperture\n", __FUNCTION__)); return false; |