sna/gen4+: Prefer GPU spans if the destination is active

Trying to avoid using the inplace scanline rasteriser for large shapes.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

4 files changed, 71 insertions, 22 deletions

diff --git a/src/sna/gen4_render.c b/src/sna/gen4_render.c
index 292018fe..9d95bae8 100644
--- a/src/sna/gen4_render.c
+++ b/src/sna/gen4_render.c
@@ -2610,17 +2610,36 @@ gen4_check_composite_spans(struct sna *sna,
 			   int16_t width, int16_t height,
 			   unsigned flags)
 {
-	if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0)
-		return false;
+	DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n",
+	     __FUNCTION__, op, width, height, flags));
 
 	if (op >= ARRAY_SIZE(gen4_blend_op))
 		return false;
 
-	if (gen4_composite_fallback(sna, src, NULL, dst))
+	if (gen4_composite_fallback(sna, src, NULL, dst)) {
+		DBG(("%s: operation would fallback\n", __FUNCTION__));
+		return false;
+	}
+
+	if (need_tiling(sna, width, height) && !is_gpu(dst->pDrawable)) {
+		DBG(("%s: fallback, tiled operation not on GPU\n",
+		     __FUNCTION__));
 		return false;
+	}
 
-	if (need_tiling(sna, width, height) && !is_gpu(dst->pDrawable))
+	if ((flags & (COMPOSITE_SPANS_RECTILINEAR | COMPOSITE_SPANS_INPLACE_HINT)) == 0) {
+		struct sna_pixmap *priv = sna_pixmap_from_drawable(dst->pDrawable);
+		assert(priv);
+
+		if ((priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) ||
+		    (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo))) {
+			return true;
+		}
+
+		DBG(("%s: fallback, non-rectilinear spans to idle bo\n",
+		     __FUNCTION__));
 		return false;
+	}
 
 	return true;
 }
@@ -2692,7 +2711,7 @@ gen4_render_composite_spans(struct sna *sna,
 	tmp->base.floats_per_vertex = 5 + 2*!tmp->base.is_affine;
 	tmp->base.floats_per_rect = 3 * tmp->base.floats_per_vertex;
 
-	tmp->base.u.gen5.wm_kernel = WM_KERNEL_OPACITY | !tmp->base.is_affine;
+	tmp->base.u.gen4.wm_kernel = WM_KERNEL_OPACITY | !tmp->base.is_affine;
 	tmp->base.u.gen4.ve_id = 1 << 1 | tmp->base.is_affine;
 
 	tmp->box   = gen4_render_composite_spans_box;
diff --git a/src/sna/gen5_render.c b/src/sna/gen5_render.c
index 79431c4b..95ff30f8 100644
--- a/src/sna/gen5_render.c
+++ b/src/sna/gen5_render.c
@@ -2631,21 +2631,35 @@ gen5_check_composite_spans(struct sna *sna,
 			   int16_t width, int16_t height,
 			   unsigned flags)
 {
-	if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0)
-		return false;
+	DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n",
+	     __FUNCTION__, op, width, height, flags));
 
 	if (op >= ARRAY_SIZE(gen5_blend_op))
 		return false;
 
-	if (gen5_composite_fallback(sna, src, NULL, dst))
+	if (gen5_composite_fallback(sna, src, NULL, dst)) {
+		DBG(("%s: operation would fallback\n", __FUNCTION__));
 		return false;
+	}
 
-	if (need_tiling(sna, width, height)) {
-		if (!is_gpu(dst->pDrawable)) {
-			DBG(("%s: fallback, tiled operation not on GPU\n",
-			     __FUNCTION__));
-			return false;
+	if (need_tiling(sna, width, height) && !is_gpu(dst->pDrawable)) {
+		DBG(("%s: fallback, tiled operation not on GPU\n",
+		     __FUNCTION__));
+		return false;
+	}
+
+	if ((flags & (COMPOSITE_SPANS_RECTILINEAR | COMPOSITE_SPANS_INPLACE_HINT)) == 0) {
+		struct sna_pixmap *priv = sna_pixmap_from_drawable(dst->pDrawable);
+		assert(priv);
+
+		if ((priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) ||
+		    (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo))) {
+			return true;
 		}
+
+		DBG(("%s: fallback, non-rectilinear spans to idle bo\n",
+		     __FUNCTION__));
+		return false;
 	}
 
 	return true;
diff --git a/src/sna/gen6_render.c b/src/sna/gen6_render.c
index a2487496..97c61a8c 100644
--- a/src/sna/gen6_render.c
+++ b/src/sna/gen6_render.c
@@ -3066,23 +3066,38 @@ gen6_render_composite_spans_done(struct sna *sna,
 static bool
 gen6_check_composite_spans(struct sna *sna,
 			   uint8_t op, PicturePtr src, PicturePtr dst,
-			   int16_t width, int16_t height, unsigned flags)
+			   int16_t width, int16_t height,
+			   unsigned flags)
 {
-	if ((flags & COMPOSITE_SPANS_RECTILINEAR) == 0)
-		return false;
+	DBG(("%s: op=%d, width=%d, height=%d, flags=%x\n",
+	     __FUNCTION__, op, width, height, flags));
 
 	if (op >= ARRAY_SIZE(gen6_blend_op))
 		return false;
 
-	if (gen6_composite_fallback(sna, src, NULL, dst))
+	if (gen6_composite_fallback(sna, src, NULL, dst)) {
+		DBG(("%s: operation would fallback\n", __FUNCTION__));
 		return false;
+	}
 
-	if (need_tiling(sna, width, height)) {
-		if (!is_gpu(dst->pDrawable)) {
-			DBG(("%s: fallback, tiled operation not on GPU\n",
-			     __FUNCTION__));
-			return false;
+	if (need_tiling(sna, width, height) && !is_gpu(dst->pDrawable)) {
+		DBG(("%s: fallback, tiled operation not on GPU\n",
+		     __FUNCTION__));
+		return false;
+	}
+
+	if ((flags & (COMPOSITE_SPANS_RECTILINEAR | COMPOSITE_SPANS_INPLACE_HINT)) == 0) {
+		struct sna_pixmap *priv = sna_pixmap_from_drawable(dst->pDrawable);
+		assert(priv);
+
+		if ((priv->cpu_bo && kgem_bo_is_busy(priv->cpu_bo)) ||
+		    (priv->gpu_bo && kgem_bo_is_busy(priv->gpu_bo))) {
+			return true;
 		}
+
+		DBG(("%s: fallback, non-rectilinear spans to idle bo\n",
+		     __FUNCTION__));
+		return false;
 	}
 
 	return true;
diff --git a/src/sna/sna_damage.c b/src/sna/sna_damage.c
index a870cbf5..73d94e1b 100644
--- a/src/sna/sna_damage.c
+++ b/src/sna/sna_damage.c
@@ -507,6 +507,7 @@ static void __sna_damage_reduce(struct sna_damage *damage)
 	} else {
 		pixman_region16_t tmp;
 
+		assert(n == nboxes);
 		pixman_region_init_rects(&tmp, boxes, nboxes);
 		pixman_region_subtract(region, region, &tmp);
 		pixman_region_fini(&tmp);