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authorWang Zhenyu <zhenyu.z.wang@intel.com>2007-07-11 11:42:56 +0800
committerWang Zhenyu <zhenyu.z.wang@intel.com>2007-07-11 11:42:56 +0800
commit04130ac6b705aa49161fb6dae83ad0bdd76e89d9 (patch)
tree501aa39674dd43e25d4ee22d41ba25d56006df0d /src
parent88f8b688e2316ae4a1f7485f0010ce90de54783a (diff)
Fix i915 rendering for tiled buffer
Make it to check fence register for dest buffer.
Diffstat (limited to 'src')
-rw-r--r--src/i915_render.c7
1 files changed, 2 insertions, 5 deletions
diff --git a/src/i915_render.c b/src/i915_render.c
index 2148883a..9d5bc0a6 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -373,12 +373,9 @@ i915_prepare_composite(int op, PicturePtr pSrcPicture,
CARD32 ss2;
BEGIN_LP_RING(16);
- /* color buffer
- * XXX: Need to add USE_FENCE if we ever tile the X Server's pixmaps or
- * visible screen.
- */
OUT_RING(_3DSTATE_BUF_INFO_CMD);
- OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_PITCH(dst_pitch));
+ OUT_RING(BUF_3D_ID_COLOR_BACK| BUF_3D_USE_FENCE|
+ BUF_3D_PITCH(dst_pitch));
OUT_RING(BUF_3D_ADDR(dst_offset));
OUT_RING(_3DSTATE_DST_BUF_VARS_CMD);