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authorJesse Barnes <jbarnes@nietzche.virtuousgeek.org>2007-07-05 12:21:31 -0700
committerJesse Barnes <jbarnes@nietzche.virtuousgeek.org>2007-07-05 12:21:31 -0700
commit8798ef11321ee6957919279076758d47ad956cf3 (patch)
tree6d2696e95b9d4ddeea09bdf9983dbe6b2d16d0b7 /src
parent8919b2292147add41a1c1c6e5e673257cb6c6c6e (diff)
parent3c552af65d28fafec1d09484a8914b690b961349 (diff)
Merge branch 'master' into fbc
Diffstat (limited to 'src')
-rw-r--r--src/i830_display.c4
-rw-r--r--src/i830_lvds.c18
2 files changed, 14 insertions, 8 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index db02402a..0befef9d 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1119,9 +1119,9 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
if (IS_I965G(pI830))
{
if ((lvds & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
- lvds |= LVDS_DITHER_ENABLE;
- else
lvds &= ~LVDS_DITHER_ENABLE;
+ else
+ lvds |= LVDS_DITHER_ENABLE;
}
OUTREG(LVDS, lvds);
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index d4698151..e2c6e3ce 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -261,17 +261,23 @@ i830_lvds_mode_set(xf86OutputPtr output, DisplayModePtr mode,
I830CrtcPrivatePtr intel_crtc = output->crtc->driver_private;
CARD32 pfit_control;
- /* The LVDS pin pair will already have been turned on in the
+ /* The LVDS pin pair will already have been turned on in
* i830_crtc_mode_set since it has a large impact on the DPLL settings.
*/
- /* Enable automatic panel scaling so that non-native modes fill the
- * screen. Should be enabled before the pipe is enabled, according to
+ /* Enable automatic panel scaling for non-native modes so that they fill
+ * the screen. Should be enabled before the pipe is enabled, according to
* register description and PRM.
*/
- pfit_control = (PFIT_ENABLE |
- VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
- VERT_INTERP_BILINEAR | HORIZ_INTERP_BILINEAR);
+ if (mode->HDisplay != adjusted_mode->HDisplay ||
+ mode->VDisplay != adjusted_mode->VDisplay)
+ {
+ pfit_control = PFIT_ENABLE |
+ VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
+ VERT_INTERP_BILINEAR | HORIZ_INTERP_BILINEAR;
+ } else {
+ pfit_control = 0;
+ }
if (!IS_I965G(pI830)) {
if (dev_priv->panel_wants_dither)