diff options
author | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-02-15 11:00:06 +0800 |
---|---|---|
committer | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-02-15 11:00:06 +0800 |
commit | c010d28f0a91a9831d366ea490878ef3d958021f (patch) | |
tree | 6e7c2dca576dd9810c4b773da5adaadf78998fa9 /src | |
parent | ec55dd16c4c5f7612d33ae22a6249b3b1c60e2b6 (diff) |
EXA: mask componentAlpha support
we're getting load of multiple sf/wm programs for i965, might
need to be cleanup in future.
Diffstat (limited to 'src')
-rw-r--r-- | src/exa_wm_maskca.g4a | 202 | ||||
-rw-r--r-- | src/exa_wm_maskca_prog.h | 95 | ||||
-rw-r--r-- | src/exa_wm_maskca_srcalpha.g4a | 202 | ||||
-rw-r--r-- | src/exa_wm_maskca_srcalpha_prog.h | 95 | ||||
-rw-r--r-- | src/i965_render.c | 52 |
5 files changed, 626 insertions, 20 deletions
diff --git a/src/exa_wm_maskca.g4a b/src/exa_wm_maskca.g4a new file mode 100644 index 00000000..fa923f6c --- /dev/null +++ b/src/exa_wm_maskca.g4a @@ -0,0 +1,202 @@ +/* + * This's for exa composite operation in no mask picture case. + * The simplest case is just sending what src picture has to dst picture. + * XXX: This is still experimental, and should be fixed to support multiple texture + * map, and conditional mul actions. + */ + +/* I think this should be same as in g4a program for texture video, + as we also use 16-pixel dispatch. and SF scale in g3 is useful for us. */ + +/* The initial payload of the thread is always g0. + * WM_URB (incoming URB entries) is g3 + As mask texture coeffient needs extra setup urb starting from g4, we should + shift this location. + + * X0_R is g4->g6 + * X1_R is g5->g7 + * Y0_R is g6->g8 + * Y1_R is g7->g9 + + * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y} + * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1} + * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y} + * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1} + */ + +/* multitexture program with src and mask texture */ +/* - load src texture */ +/* - load mask texture */ +/* - mul src.X with mask's alpha */ +/* - write out src.X */ + + /* Set up ss0.x coordinates*/ +mov (1) g6<1>F g1.8<0,1,0>UW { align1 }; +add (1) g6.4<1>F g1.8<0,1,0>UW 1UB { align1 }; +mov (1) g6.8<1>F g1.8<0,1,0>UW { align1 }; +add (1) g6.12<1>F g1.8<0,1,0>UW 1UB { align1 }; + /* Set up ss0.y coordinates */ +mov (1) g8<1>F g1.10<0,1,0>UW { align1 }; +mov (1) g8.4<1>F g1.10<0,1,0>UW { align1 }; +add (1) g8.8<1>F g1.10<0,1,0>UW 1UB { align1 }; +add (1) g8.12<1>F g1.10<0,1,0>UW 1UB { align1 }; + /* set up ss1.x coordinates */ +mov (1) g6.16<1>F g1.12<0,1,0>UW { align1 }; +add (1) g6.20<1>F g1.12<0,1,0>UW 1UB { align1 }; +mov (1) g6.24<1>F g1.12<0,1,0>UW { align1 }; +add (1) g6.28<1>F g1.12<0,1,0>UW 1UB { align1 }; + /* set up ss1.y coordinates */ +mov (1) g8.16<1>F g1.14<0,1,0>UW { align1 }; +mov (1) g8.20<1>F g1.14<0,1,0>UW { align1 }; +add (1) g8.24<1>F g1.14<0,1,0>UW 1UB { align1 }; +add (1) g8.28<1>F g1.14<0,1,0>UW 1UB { align1 }; + /* Set up ss2.x coordinates */ +mov (1) g7<1>F g1.16<0,1,0>UW { align1 }; +add (1) g7.4<1>F g1.16<0,1,0>UW 1UB { align1 }; +mov (1) g7.8<1>F g1.16<0,1,0>UW { align1 }; +add (1) g7.12<1>F g1.16<0,1,0>UW 1UB { align1 }; + /* Set up ss2.y coordinates */ +mov (1) g9<1>F g1.18<0,1,0>UW { align1 }; +mov (1) g9.4<1>F g1.18<0,1,0>UW { align1 }; +add (1) g9.8<1>F g1.18<0,1,0>UW 1UB { align1 }; +add (1) g9.12<1>F g1.18<0,1,0>UW 1UB { align1 }; + /* Set up ss3.x coordinates */ +mov (1) g7.16<1>F g1.20<0,1,0>UW { align1 }; +add (1) g7.20<1>F g1.20<0,1,0>UW 1UB { align1 }; +mov (1) g7.24<1>F g1.20<0,1,0>UW { align1 }; +add (1) g7.28<1>F g1.20<0,1,0>UW 1UB { align1 }; + /* Set up ss3.y coordinates */ +mov (1) g9.16<1>F g1.22<0,1,0>UW { align1 }; +mov (1) g9.20<1>F g1.22<0,1,0>UW { align1 }; +add (1) g9.24<1>F g1.22<0,1,0>UW 1UB { align1 }; +add (1) g9.28<1>F g1.22<0,1,0>UW 1UB { align1 }; + + /* Now, map these screen space coordinates into texture coordinates. */ +/* This is for src texture */ +/* I don't want to change origin ssX coords, as it will be used later in mask */ +/* so store tex coords in g10, g11, g12, g13 */ + + /* subtract screen-space X origin of vertex 0. */ +add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 }; +add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 }; + /* scale by texture X increment */ +/* Cx[0] */ +mul (8) g10<1>F g10<8,8,1>F g3<0,1,0>F { align1 }; +mul (8) g11<1>F g11<8,8,1>F g3<0,1,0>F { align1 }; + /* add in texture X offset */ +/* Co[0] */ +add (8) g10<1>F g10<8,8,1>F g3.12<0,1,0>F { align1 }; +add (8) g11<1>F g11<8,8,1>F g3.12<0,1,0>F { align1 }; + /* subtract screen-space Y origin of vertex 0. */ +add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 }; +add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 }; + /* scale by texture Y increment */ +/* Cy[0] */ +mul (8) g12<1>F g12<8,8,1>F g3.4<0,1,0>F { align1 }; +mul (8) g13<1>F g13<8,8,1>F g3.4<0,1,0>F { align1 }; + /* add in texture Y offset */ +/* Co[1] */ +add (8) g12<1>F g12<8,8,1>F g3.28<0,1,0>F { align1 }; +add (8) g13<1>F g13<8,8,1>F g3.28<0,1,0>F { align1 }; + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +mov (8) m1<1>F g10<8,8,1>F { align1 }; +mov (8) m2<1>F g11<8,8,1>F { align1 }; /* param 0 u in m1, m2 */ +mov (8) m3<1>F g12<8,8,1>F { align1 }; +mov (8) m4<1>F g13<8,8,1>F { align1 }; /* param 1 v in m3, m4 */ + +/* m0 will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* src texture readback: g14-g21 */ +send (16) 0 /* msg reg index */ + g14<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (1,0,F) /* sampler message description, + (binding_table,sampler_index,datatype). + here(src->dst) we should use src_sampler and + src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mov (8) g21<1>UD g21<8,8,1>UD { align1 }; /* wait sampler return */ + +/* sampler mask texture, use g10, g11, g12, g13 */ + /* subtract screen-space X origin of vertex 0. */ +add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 }; +add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 }; + /* scale by texture X increment */ +/* Cx[2] */ +mul (8) g10<1>F g10<8,8,1>F g4<0,1,0>F { align1 }; +mul (8) g11<1>F g11<8,8,1>F g4<0,1,0>F { align1 }; + /* add in texture X offset */ +/* Co[2] */ +add (8) g10<1>F g10<8,8,1>F g4.12<0,1,0>F { align1 }; +add (8) g11<1>F g11<8,8,1>F g4.12<0,1,0>F { align1 }; + /* subtract screen-space Y origin of vertex 0. */ +add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 }; +add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 }; + /* scale by texture Y increment */ +/* Cy[2] */ +mul (8) g12<1>F g12<8,8,1>F g4.4<0,1,0>F { align1 }; +mul (8) g13<1>F g13<8,8,1>F g4.4<0,1,0>F { align1 }; + /* add in texture Y offset */ +/* Co[3] */ +add (8) g12<1>F g12<8,8,1>F g4.28<0,1,0>F { align1 }; +add (8) g13<1>F g13<8,8,1>F g4.28<0,1,0>F { align1 }; + +mov (8) m1<1>F g10<8,8,1>F { align1 }; +mov (8) m2<1>F g11<8,8,1>F { align1 }; +mov (8) m3<1>F g12<8,8,1>F { align1 }; +mov (8) m4<1>F g13<8,8,1>F { align1 }; + +/* mask sampler g22-g29 */ +/* binding_table (2), sampler (1) */ +send (16) 0 g22<1>UW g0<8,8,1>UW sampler (2,1,F) mlen 5 rlen 8 { align1 }; +mov (8) g29<1>UD g29<8,8,1>UD { align1 }; /* wait sampler return */ + +/* mul mask's channel to src, then write out src */ +mul (8) g14<1>F g14<8,8,1>F g22<8,8,1>F { align1 }; +mul (8) g15<1>F g15<8,8,1>F g23<8,8,1>F { align1 }; +mul (8) g16<1>F g16<8,8,1>F g24<8,8,1>F { align1 }; +mul (8) g17<1>F g17<8,8,1>F g25<8,8,1>F { align1 }; +mul (8) g18<1>F g18<8,8,1>F g26<8,8,1>F { align1 }; +mul (8) g19<1>F g19<8,8,1>F g27<8,8,1>F { align1 }; +mul (8) g20<1>F g20<8,8,1>F g28<8,8,1>F { align1 }; +mul (8) g21<1>F g21<8,8,1>F g29<8,8,1>F { align1 }; + +/* prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), then it's ready to write */ +mov (8) m2<1>F g14<8,8,1>F { align1 }; +mov (8) m3<1>F g16<8,8,1>F { align1 }; +mov (8) m4<1>F g18<8,8,1>F { align1 }; +mov (8) m5<1>F g20<8,8,1>F { align1 }; +mov (8) m6<1>F g15<8,8,1>F { align1 }; +mov (8) m7<1>F g17<8,8,1>F { align1 }; +mov (8) m8<1>F g19<8,8,1>F { align1 }; +mov (8) m9<1>F g21<8,8,1>F { align1 }; + +/* m0, m1 are all direct passed by PS thread payload */ +mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable }; + +/* write */ +send (16) 0 acc0<1>UW g0<8,8,1>UW write ( + 0, /* binding_table */ + 8, /* pixel scordboard clear, msg type simd16 single source */ + 4, /* render target write */ + 0 /* no write commit message */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; diff --git a/src/exa_wm_maskca_prog.h b/src/exa_wm_maskca_prog.h new file mode 100644 index 00000000..d936412c --- /dev/null +++ b/src/exa_wm_maskca_prog.h @@ -0,0 +1,95 @@ + { 0x00000001, 0x20c0013d, 0x00000028, 0x00000000 }, + { 0x00000040, 0x20c40d3d, 0x00000028, 0x00000001 }, + { 0x00000001, 0x20c8013d, 0x00000028, 0x00000000 }, + { 0x00000040, 0x20cc0d3d, 0x00000028, 0x00000001 }, + { 0x00000001, 0x2100013d, 0x0000002a, 0x00000000 }, + { 0x00000001, 0x2104013d, 0x0000002a, 0x00000000 }, + { 0x00000040, 0x21080d3d, 0x0000002a, 0x00000001 }, + { 0x00000040, 0x210c0d3d, 0x0000002a, 0x00000001 }, + { 0x00000001, 0x20d0013d, 0x0000002c, 0x00000000 }, + { 0x00000040, 0x20d40d3d, 0x0000002c, 0x00000001 }, + { 0x00000001, 0x20d8013d, 0x0000002c, 0x00000000 }, + { 0x00000040, 0x20dc0d3d, 0x0000002c, 0x00000001 }, + { 0x00000001, 0x2110013d, 0x0000002e, 0x00000000 }, + { 0x00000001, 0x2114013d, 0x0000002e, 0x00000000 }, + { 0x00000040, 0x21180d3d, 0x0000002e, 0x00000001 }, + { 0x00000040, 0x211c0d3d, 0x0000002e, 0x00000001 }, + { 0x00000001, 0x20e0013d, 0x00000030, 0x00000000 }, + { 0x00000040, 0x20e40d3d, 0x00000030, 0x00000001 }, + { 0x00000001, 0x20e8013d, 0x00000030, 0x00000000 }, + { 0x00000040, 0x20ec0d3d, 0x00000030, 0x00000001 }, + { 0x00000001, 0x2120013d, 0x00000032, 0x00000000 }, + { 0x00000001, 0x2124013d, 0x00000032, 0x00000000 }, + { 0x00000040, 0x21280d3d, 0x00000032, 0x00000001 }, + { 0x00000040, 0x212c0d3d, 0x00000032, 0x00000001 }, + { 0x00000001, 0x20f0013d, 0x00000034, 0x00000000 }, + { 0x00000040, 0x20f40d3d, 0x00000034, 0x00000001 }, + { 0x00000001, 0x20f8013d, 0x00000034, 0x00000000 }, + { 0x00000040, 0x20fc0d3d, 0x00000034, 0x00000001 }, + { 0x00000001, 0x2130013d, 0x00000036, 0x00000000 }, + { 0x00000001, 0x2134013d, 0x00000036, 0x00000000 }, + { 0x00000040, 0x21380d3d, 0x00000036, 0x00000001 }, + { 0x00000040, 0x213c0d3d, 0x00000036, 0x00000001 }, + { 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 }, + { 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 }, + { 0x00600041, 0x214077bd, 0x008d0140, 0x00000060 }, + { 0x00600041, 0x216077bd, 0x008d0160, 0x00000060 }, + { 0x00600040, 0x214077bd, 0x008d0140, 0x0000006c }, + { 0x00600040, 0x216077bd, 0x008d0160, 0x0000006c }, + { 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 }, + { 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 }, + { 0x00600041, 0x218077bd, 0x008d0180, 0x00000064 }, + { 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000064 }, + { 0x00600040, 0x218077bd, 0x008d0180, 0x0000007c }, + { 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000007c }, + { 0x00600001, 0x202003be, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 }, + { 0x00800031, 0x21c01d29, 0x008d0000, 0x02580001 }, + { 0x00600001, 0x22a00021, 0x008d02a0, 0x00000000 }, + { 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 }, + { 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 }, + { 0x00600041, 0x214077bd, 0x008d0140, 0x00000080 }, + { 0x00600041, 0x216077bd, 0x008d0160, 0x00000080 }, + { 0x00600040, 0x214077bd, 0x008d0140, 0x0000008c }, + { 0x00600040, 0x216077bd, 0x008d0160, 0x0000008c }, + { 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 }, + { 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 }, + { 0x00600041, 0x218077bd, 0x008d0180, 0x00000084 }, + { 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000084 }, + { 0x00600040, 0x218077bd, 0x008d0180, 0x0000009c }, + { 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000009c }, + { 0x00600001, 0x202003be, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 }, + { 0x00800031, 0x22c01d29, 0x008d0000, 0x02580102 }, + { 0x00600001, 0x23a00021, 0x008d03a0, 0x00000000 }, + { 0x00600041, 0x21c077bd, 0x008d01c0, 0x008d02c0 }, + { 0x00600041, 0x21e077bd, 0x008d01e0, 0x008d02e0 }, + { 0x00600041, 0x220077bd, 0x008d0200, 0x008d0300 }, + { 0x00600041, 0x222077bd, 0x008d0220, 0x008d0320 }, + { 0x00600041, 0x224077bd, 0x008d0240, 0x008d0340 }, + { 0x00600041, 0x226077bd, 0x008d0260, 0x008d0360 }, + { 0x00600041, 0x228077bd, 0x008d0280, 0x008d0380 }, + { 0x00600041, 0x22a077bd, 0x008d02a0, 0x008d03a0 }, + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/exa_wm_maskca_srcalpha.g4a b/src/exa_wm_maskca_srcalpha.g4a new file mode 100644 index 00000000..e233968c --- /dev/null +++ b/src/exa_wm_maskca_srcalpha.g4a @@ -0,0 +1,202 @@ +/* + * This's for exa composite operation in no mask picture case. + * The simplest case is just sending what src picture has to dst picture. + * XXX: This is still experimental, and should be fixed to support multiple texture + * map, and conditional mul actions. + */ + +/* I think this should be same as in g4a program for texture video, + as we also use 16-pixel dispatch. and SF scale in g3 is useful for us. */ + +/* The initial payload of the thread is always g0. + * WM_URB (incoming URB entries) is g3 + As mask texture coeffient needs extra setup urb starting from g4, we should + shift this location. + + * X0_R is g4->g6 + * X1_R is g5->g7 + * Y0_R is g6->g8 + * Y1_R is g7->g9 + + * X0: {ss0.x, ss0.x+1, ss0.x, ss0.x+1, ss1.x, ss1.x+1, ss1.x, ss1.x+y} + * Y0: {ss0.y, ss0.y, ss0.y+1, ss0.y+1, ss1.y, ss1.y, ss1.y+1, ss1.y+1} + * X1: {ss2.x, ss2.x+1, ss2.x, ss2.x+1, ss3.x, ss3.x+1, ss3.x, ss3.x+y} + * Y1: {ss2.y, ss2.y, ss2.y+1, ss2.y+1, ss3.y, ss3.y, ss3.y+1, ss3.y+1} + */ + +/* multitexture program with src and mask texture */ +/* - load src texture */ +/* - load mask texture */ +/* - mul src.X with mask's alpha */ +/* - write out src.X */ + + /* Set up ss0.x coordinates*/ +mov (1) g6<1>F g1.8<0,1,0>UW { align1 }; +add (1) g6.4<1>F g1.8<0,1,0>UW 1UB { align1 }; +mov (1) g6.8<1>F g1.8<0,1,0>UW { align1 }; +add (1) g6.12<1>F g1.8<0,1,0>UW 1UB { align1 }; + /* Set up ss0.y coordinates */ +mov (1) g8<1>F g1.10<0,1,0>UW { align1 }; +mov (1) g8.4<1>F g1.10<0,1,0>UW { align1 }; +add (1) g8.8<1>F g1.10<0,1,0>UW 1UB { align1 }; +add (1) g8.12<1>F g1.10<0,1,0>UW 1UB { align1 }; + /* set up ss1.x coordinates */ +mov (1) g6.16<1>F g1.12<0,1,0>UW { align1 }; +add (1) g6.20<1>F g1.12<0,1,0>UW 1UB { align1 }; +mov (1) g6.24<1>F g1.12<0,1,0>UW { align1 }; +add (1) g6.28<1>F g1.12<0,1,0>UW 1UB { align1 }; + /* set up ss1.y coordinates */ +mov (1) g8.16<1>F g1.14<0,1,0>UW { align1 }; +mov (1) g8.20<1>F g1.14<0,1,0>UW { align1 }; +add (1) g8.24<1>F g1.14<0,1,0>UW 1UB { align1 }; +add (1) g8.28<1>F g1.14<0,1,0>UW 1UB { align1 }; + /* Set up ss2.x coordinates */ +mov (1) g7<1>F g1.16<0,1,0>UW { align1 }; +add (1) g7.4<1>F g1.16<0,1,0>UW 1UB { align1 }; +mov (1) g7.8<1>F g1.16<0,1,0>UW { align1 }; +add (1) g7.12<1>F g1.16<0,1,0>UW 1UB { align1 }; + /* Set up ss2.y coordinates */ +mov (1) g9<1>F g1.18<0,1,0>UW { align1 }; +mov (1) g9.4<1>F g1.18<0,1,0>UW { align1 }; +add (1) g9.8<1>F g1.18<0,1,0>UW 1UB { align1 }; +add (1) g9.12<1>F g1.18<0,1,0>UW 1UB { align1 }; + /* Set up ss3.x coordinates */ +mov (1) g7.16<1>F g1.20<0,1,0>UW { align1 }; +add (1) g7.20<1>F g1.20<0,1,0>UW 1UB { align1 }; +mov (1) g7.24<1>F g1.20<0,1,0>UW { align1 }; +add (1) g7.28<1>F g1.20<0,1,0>UW 1UB { align1 }; + /* Set up ss3.y coordinates */ +mov (1) g9.16<1>F g1.22<0,1,0>UW { align1 }; +mov (1) g9.20<1>F g1.22<0,1,0>UW { align1 }; +add (1) g9.24<1>F g1.22<0,1,0>UW 1UB { align1 }; +add (1) g9.28<1>F g1.22<0,1,0>UW 1UB { align1 }; + + /* Now, map these screen space coordinates into texture coordinates. */ +/* This is for src texture */ +/* I don't want to change origin ssX coords, as it will be used later in mask */ +/* so store tex coords in g10, g11, g12, g13 */ + + /* subtract screen-space X origin of vertex 0. */ +add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 }; +add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 }; + /* scale by texture X increment */ +/* Cx[0] */ +mul (8) g10<1>F g10<8,8,1>F g3<0,1,0>F { align1 }; +mul (8) g11<1>F g11<8,8,1>F g3<0,1,0>F { align1 }; + /* add in texture X offset */ +/* Co[0] */ +add (8) g10<1>F g10<8,8,1>F g3.12<0,1,0>F { align1 }; +add (8) g11<1>F g11<8,8,1>F g3.12<0,1,0>F { align1 }; + /* subtract screen-space Y origin of vertex 0. */ +add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 }; +add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 }; + /* scale by texture Y increment */ +/* Cy[0] */ +mul (8) g12<1>F g12<8,8,1>F g3.4<0,1,0>F { align1 }; +mul (8) g13<1>F g13<8,8,1>F g3.4<0,1,0>F { align1 }; + /* add in texture Y offset */ +/* Co[1] */ +add (8) g12<1>F g12<8,8,1>F g3.28<0,1,0>F { align1 }; +add (8) g13<1>F g13<8,8,1>F g3.28<0,1,0>F { align1 }; + +/* prepare sampler read back gX register, which would be written back to output */ + +/* use simd16 sampler, param 0 is u, param 1 is v. */ +/* 'payload' loading, assuming tex coord start from g4 */ +mov (8) m1<1>F g10<8,8,1>F { align1 }; +mov (8) m2<1>F g11<8,8,1>F { align1 }; /* param 0 u in m1, m2 */ +mov (8) m3<1>F g12<8,8,1>F { align1 }; +mov (8) m4<1>F g13<8,8,1>F { align1 }; /* param 1 v in m3, m4 */ + +/* m0 will be copied with g0, as it contains send desc */ +/* emit sampler 'send' cmd */ + +/* src texture readback: g14-g21 */ +send (16) 0 /* msg reg index */ + g14<1>UW /* readback */ + g0<8,8,1>UW /* copy to msg start reg*/ + sampler (1,0,F) /* sampler message description, + (binding_table,sampler_index,datatype). + here(src->dst) we should use src_sampler and + src_surface */ + mlen 5 rlen 8 { align1 }; /* required message len 5, readback len 8 */ + +mov (8) g21<1>UD g21<8,8,1>UD { align1 }; /* wait sampler return */ + +/* sampler mask texture, use g10, g11, g12, g13 */ + /* subtract screen-space X origin of vertex 0. */ +add (8) g10<1>F g6<8,8,1>F -g1<0,1,0>F { align1 }; +add (8) g11<1>F g7<8,8,1>F -g1<0,1,0>F { align1 }; + /* scale by texture X increment */ +/* Cx[2] */ +mul (8) g10<1>F g10<8,8,1>F g4<0,1,0>F { align1 }; +mul (8) g11<1>F g11<8,8,1>F g4<0,1,0>F { align1 }; + /* add in texture X offset */ +/* Co[2] */ +add (8) g10<1>F g10<8,8,1>F g4.12<0,1,0>F { align1 }; +add (8) g11<1>F g11<8,8,1>F g4.12<0,1,0>F { align1 }; + /* subtract screen-space Y origin of vertex 0. */ +add (8) g12<1>F g8<8,8,1>F -g1.4<0,1,0>F { align1 }; +add (8) g13<1>F g9<8,8,1>F -g1.4<0,1,0>F { align1 }; + /* scale by texture Y increment */ +/* Cy[2] */ +mul (8) g12<1>F g12<8,8,1>F g4.4<0,1,0>F { align1 }; +mul (8) g13<1>F g13<8,8,1>F g4.4<0,1,0>F { align1 }; + /* add in texture Y offset */ +/* Co[3] */ +add (8) g12<1>F g12<8,8,1>F g4.28<0,1,0>F { align1 }; +add (8) g13<1>F g13<8,8,1>F g4.28<0,1,0>F { align1 }; + +mov (8) m1<1>F g10<8,8,1>F { align1 }; +mov (8) m2<1>F g11<8,8,1>F { align1 }; +mov (8) m3<1>F g12<8,8,1>F { align1 }; +mov (8) m4<1>F g13<8,8,1>F { align1 }; + +/* mask sampler g22-g29 */ +/* binding_table (2), sampler (1) */ +send (16) 0 g22<1>UW g0<8,8,1>UW sampler (2,1,F) mlen 5 rlen 8 { align1 }; +mov (8) g29<1>UD g29<8,8,1>UD { align1 }; /* wait sampler return */ + +/* src channel has no more use, src.A * mask.C */ +mul (8) g14<1>F g22<8,8,1>F g20<8,8,1>F { align1 }; +mul (8) g15<1>F g23<8,8,1>F g21<8,8,1>F { align1 }; +mul (8) g16<1>F g24<8,8,1>F g20<8,8,1>F { align1 }; +mul (8) g17<1>F g25<8,8,1>F g21<8,8,1>F { align1 }; +mul (8) g18<1>F g26<8,8,1>F g20<8,8,1>F { align1 }; +mul (8) g19<1>F g27<8,8,1>F g21<8,8,1>F { align1 }; +mul (8) g20<1>F g28<8,8,1>F g20<8,8,1>F { align1 }; +mul (8) g21<1>F g29<8,8,1>F g21<8,8,1>F { align1 }; + +/* prepare data in m2-m5 for subspan(1,0), m6-m9 for subspan(3,2), then it's ready to write */ +mov (8) m2<1>F g14<8,8,1>F { align1 }; +mov (8) m3<1>F g16<8,8,1>F { align1 }; +mov (8) m4<1>F g18<8,8,1>F { align1 }; +mov (8) m5<1>F g20<8,8,1>F { align1 }; +mov (8) m6<1>F g15<8,8,1>F { align1 }; +mov (8) m7<1>F g17<8,8,1>F { align1 }; +mov (8) m8<1>F g19<8,8,1>F { align1 }; +mov (8) m9<1>F g21<8,8,1>F { align1 }; + +/* m0, m1 are all direct passed by PS thread payload */ +mov (8) m1<1>UD g1<8,8,1>UD { align1 mask_disable }; + +/* write */ +send (16) 0 acc0<1>UW g0<8,8,1>UW write ( + 0, /* binding_table */ + 8, /* pixel scordboard clear, msg type simd16 single source */ + 4, /* render target write */ + 0 /* no write commit message */ + ) + mlen 10 + rlen 0 + { align1 EOT }; + +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; +nop; diff --git a/src/exa_wm_maskca_srcalpha_prog.h b/src/exa_wm_maskca_srcalpha_prog.h new file mode 100644 index 00000000..d83b119f --- /dev/null +++ b/src/exa_wm_maskca_srcalpha_prog.h @@ -0,0 +1,95 @@ + { 0x00000001, 0x20c0013d, 0x00000028, 0x00000000 }, + { 0x00000040, 0x20c40d3d, 0x00000028, 0x00000001 }, + { 0x00000001, 0x20c8013d, 0x00000028, 0x00000000 }, + { 0x00000040, 0x20cc0d3d, 0x00000028, 0x00000001 }, + { 0x00000001, 0x2100013d, 0x0000002a, 0x00000000 }, + { 0x00000001, 0x2104013d, 0x0000002a, 0x00000000 }, + { 0x00000040, 0x21080d3d, 0x0000002a, 0x00000001 }, + { 0x00000040, 0x210c0d3d, 0x0000002a, 0x00000001 }, + { 0x00000001, 0x20d0013d, 0x0000002c, 0x00000000 }, + { 0x00000040, 0x20d40d3d, 0x0000002c, 0x00000001 }, + { 0x00000001, 0x20d8013d, 0x0000002c, 0x00000000 }, + { 0x00000040, 0x20dc0d3d, 0x0000002c, 0x00000001 }, + { 0x00000001, 0x2110013d, 0x0000002e, 0x00000000 }, + { 0x00000001, 0x2114013d, 0x0000002e, 0x00000000 }, + { 0x00000040, 0x21180d3d, 0x0000002e, 0x00000001 }, + { 0x00000040, 0x211c0d3d, 0x0000002e, 0x00000001 }, + { 0x00000001, 0x20e0013d, 0x00000030, 0x00000000 }, + { 0x00000040, 0x20e40d3d, 0x00000030, 0x00000001 }, + { 0x00000001, 0x20e8013d, 0x00000030, 0x00000000 }, + { 0x00000040, 0x20ec0d3d, 0x00000030, 0x00000001 }, + { 0x00000001, 0x2120013d, 0x00000032, 0x00000000 }, + { 0x00000001, 0x2124013d, 0x00000032, 0x00000000 }, + { 0x00000040, 0x21280d3d, 0x00000032, 0x00000001 }, + { 0x00000040, 0x212c0d3d, 0x00000032, 0x00000001 }, + { 0x00000001, 0x20f0013d, 0x00000034, 0x00000000 }, + { 0x00000040, 0x20f40d3d, 0x00000034, 0x00000001 }, + { 0x00000001, 0x20f8013d, 0x00000034, 0x00000000 }, + { 0x00000040, 0x20fc0d3d, 0x00000034, 0x00000001 }, + { 0x00000001, 0x2130013d, 0x00000036, 0x00000000 }, + { 0x00000001, 0x2134013d, 0x00000036, 0x00000000 }, + { 0x00000040, 0x21380d3d, 0x00000036, 0x00000001 }, + { 0x00000040, 0x213c0d3d, 0x00000036, 0x00000001 }, + { 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 }, + { 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 }, + { 0x00600041, 0x214077bd, 0x008d0140, 0x00000060 }, + { 0x00600041, 0x216077bd, 0x008d0160, 0x00000060 }, + { 0x00600040, 0x214077bd, 0x008d0140, 0x0000006c }, + { 0x00600040, 0x216077bd, 0x008d0160, 0x0000006c }, + { 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 }, + { 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 }, + { 0x00600041, 0x218077bd, 0x008d0180, 0x00000064 }, + { 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000064 }, + { 0x00600040, 0x218077bd, 0x008d0180, 0x0000007c }, + { 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000007c }, + { 0x00600001, 0x202003be, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 }, + { 0x00800031, 0x21c01d29, 0x008d0000, 0x02580001 }, + { 0x00600001, 0x22a00021, 0x008d02a0, 0x00000000 }, + { 0x00600040, 0x214077bd, 0x008d00c0, 0x00004020 }, + { 0x00600040, 0x216077bd, 0x008d00e0, 0x00004020 }, + { 0x00600041, 0x214077bd, 0x008d0140, 0x00000080 }, + { 0x00600041, 0x216077bd, 0x008d0160, 0x00000080 }, + { 0x00600040, 0x214077bd, 0x008d0140, 0x0000008c }, + { 0x00600040, 0x216077bd, 0x008d0160, 0x0000008c }, + { 0x00600040, 0x218077bd, 0x008d0100, 0x00004024 }, + { 0x00600040, 0x21a077bd, 0x008d0120, 0x00004024 }, + { 0x00600041, 0x218077bd, 0x008d0180, 0x00000084 }, + { 0x00600041, 0x21a077bd, 0x008d01a0, 0x00000084 }, + { 0x00600040, 0x218077bd, 0x008d0180, 0x0000009c }, + { 0x00600040, 0x21a077bd, 0x008d01a0, 0x0000009c }, + { 0x00600001, 0x202003be, 0x008d0140, 0x00000000 }, + { 0x00600001, 0x204003be, 0x008d0160, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0180, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d01a0, 0x00000000 }, + { 0x00800031, 0x22c01d29, 0x008d0000, 0x02580102 }, + { 0x00600001, 0x23a00021, 0x008d03a0, 0x00000000 }, + { 0x00600041, 0x21c077bd, 0x008d02c0, 0x008d0280 }, + { 0x00600041, 0x21e077bd, 0x008d02e0, 0x008d02a0 }, + { 0x00600041, 0x220077bd, 0x008d0300, 0x008d0280 }, + { 0x00600041, 0x222077bd, 0x008d0320, 0x008d02a0 }, + { 0x00600041, 0x224077bd, 0x008d0340, 0x008d0280 }, + { 0x00600041, 0x226077bd, 0x008d0360, 0x008d02a0 }, + { 0x00600041, 0x228077bd, 0x008d0380, 0x008d0280 }, + { 0x00600041, 0x22a077bd, 0x008d03a0, 0x008d02a0 }, + { 0x00600001, 0x204003be, 0x008d01c0, 0x00000000 }, + { 0x00600001, 0x206003be, 0x008d0200, 0x00000000 }, + { 0x00600001, 0x208003be, 0x008d0240, 0x00000000 }, + { 0x00600001, 0x20a003be, 0x008d0280, 0x00000000 }, + { 0x00600001, 0x20c003be, 0x008d01e0, 0x00000000 }, + { 0x00600001, 0x20e003be, 0x008d0220, 0x00000000 }, + { 0x00600001, 0x210003be, 0x008d0260, 0x00000000 }, + { 0x00600001, 0x212003be, 0x008d02a0, 0x00000000 }, + { 0x00600201, 0x20200022, 0x008d0020, 0x00000000 }, + { 0x00800031, 0x24001d28, 0x008d0000, 0x85a04800 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, + { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 }, diff --git a/src/i965_render.c b/src/i965_render.c index a2b21db1..8474c483 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -133,7 +133,8 @@ static void i965_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format, * the source blend factor is 0, and the source blend value is the mask * channels multiplied by the source picture's alpha. */ - if (pMask && pMask->componentAlpha && i965_blend_op[op].src_alpha) { + if (pMask && pMask->componentAlpha && PICT_FORMAT_RGB(pMask->format) + && i965_blend_op[op].src_alpha) { if (*dblend == BRW_BLENDFACTOR_SRC_ALPHA) { *dblend = BRW_BLENDFACTOR_SRC_COLOR; } else if (*dblend == BRW_BLENDFACTOR_INV_SRC_ALPHA) { @@ -223,7 +224,8 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0])) I830FALLBACK("Unsupported Composite op 0x%x\n", op); - if (pMaskPicture != NULL && pMaskPicture->componentAlpha) { + if (pMaskPicture && pMaskPicture->componentAlpha && + PICT_FORMAT_RGB(pMaskPicture->format)) { /* Check if it's component alpha that relies on a source alpha and on * the source value. We can only get one of those into the single * source value that we get to blend with. @@ -234,9 +236,7 @@ i965_check_composite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture, I830FALLBACK("Component alpha not supported with source " "alpha and source value blending.\n"); } - /* XXX: fallback now for mask with componentAlpha */ - I830FALLBACK("mask componentAlpha not ready.\n"); - } + } if (!i965_check_composite_texture(pSrcPicture, 0)) I830FALLBACK("Check Src picture texture\n"); @@ -337,17 +337,19 @@ static const CARD32 sf_kernel_static_mask[][4] = { /* ps kernels */ #define PS_KERNEL_NUM_GRF 32 #define PS_MAX_THREADS 32 -/* 1: no mask */ + static const CARD32 ps_kernel_static_nomask [][4] = { #include "exa_wm_nomask_prog.h" }; -/* 2: mask with componentAlpha, src * mask color, XXX: later */ static const CARD32 ps_kernel_static_maskca [][4] = { -/*#include "i965_composite_wm_maskca.h" */ +#include "exa_wm_maskca_prog.h" +}; + +static const CARD32 ps_kernel_static_maskca_srcalpha [][4] = { +#include "exa_wm_maskca_srcalpha_prog.h" }; -/* 3: mask without componentAlpha, src * mask alpha */ static const CARD32 ps_kernel_static_masknoca [][4] = { #include "exa_wm_masknoca_prog.h" }; @@ -442,13 +444,20 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, else next_offset = sf_kernel_offset + sizeof (sf_kernel_static); - /* XXX: ps_kernel may be seperated, fix with offset */ ps_kernel_offset = ALIGN(next_offset, 64); if (pMask) { - if (pMaskPicture->componentAlpha) - next_offset = ps_kernel_offset + sizeof(ps_kernel_static_maskca); - else - next_offset = ps_kernel_offset + sizeof(ps_kernel_static_masknoca); + if (pMaskPicture->componentAlpha && + PICT_FORMAT_RGB(pMaskPicture->format)) { + if (i965_blend_op[op].src_alpha) { + next_offset = ps_kernel_offset + + sizeof(ps_kernel_static_maskca_srcalpha); + } else { + next_offset = ps_kernel_offset + + sizeof(ps_kernel_static_maskca); + } + } else + next_offset = ps_kernel_offset + + sizeof(ps_kernel_static_masknoca); } else { next_offset = ps_kernel_offset + sizeof (ps_kernel_static_nomask); } @@ -746,7 +755,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, vs_state->vs6.vs_enable = 0; vs_state->vs6.vert_cache_disable = 1; - /* XXX: sf_kernel? keep it as now */ /* Set up the SF kernel to do coord interp: for each attribute, * calculate dA/dx and dA/dy. Hand these interpolation coefficients * back to SF which then hands pixels off to WM. @@ -788,10 +796,15 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, /* Set up the PS kernel (dispatched by WM) */ if (pMask) { - if (pMaskPicture->componentAlpha) - memcpy(ps_kernel, ps_kernel_static_maskca, - sizeof (ps_kernel_static_maskca)); - else + if (pMaskPicture->componentAlpha && + PICT_FORMAT_RGB(pMaskPicture->format)) { + if (i965_blend_op[op].src_alpha) + memcpy(ps_kernel, ps_kernel_static_maskca_srcalpha, + sizeof (ps_kernel_static_maskca_srcalpha)); + else + memcpy(ps_kernel, ps_kernel_static_maskca, + sizeof (ps_kernel_static_maskca)); + } else memcpy(ps_kernel, ps_kernel_static_masknoca, sizeof (ps_kernel_static_masknoca)); } else { @@ -812,7 +825,6 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture, wm_state->thread2.scratch_space_base_pointer = (state_base_offset + wm_scratch_offset)>>10; wm_state->thread2.per_thread_scratch_space = 0; - // XXX: urb allocation wm_state->thread3.const_urb_entry_read_length = 0; wm_state->thread3.const_urb_entry_read_offset = 0; /* Each pair of attributes (src/mask coords) is one URB entry */ |