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authorEric Anholt <eric@anholt.net>2006-12-12 16:02:47 -0800
committerEric Anholt <eric@anholt.net>2006-12-12 16:02:47 -0800
commit9776f6c68b3cdd5585e58e677c1b1318d9aedaf4 (patch)
treef95def69478e76a170bf5c2111d111c9cc9895b1 /src
parent54823ac39ce9666099d69196694643f04123cb4d (diff)
Flush the plane changes in i830_crtc_dpms()
Otherwise, the changes may not have taken effect.
Diffstat (limited to 'src')
-rw-r--r--src/i830_display.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index f05b5c73..f0aac15c 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -487,6 +487,7 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
int pipe = intel_crtc->pipe;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
+ int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE;
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
CARD32 temp;
@@ -512,6 +513,9 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
temp = INREG(dspcntr_reg);
OUTREG(dspcntr_reg, temp | DISPLAY_PLANE_ENABLE);
+ /* Flush the plane changes */
+ OUTREG(dspbase_reg, INREG(dspbase_reg));
+
/* Give the overlay scaler a chance to enable if it's on this pipe */
i830_crtc_dpms_video(crtc, TRUE);
break;
@@ -526,6 +530,9 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
/* Disable the VGA plane that we never use */
OUTREG(VGACNTRL, VGA_DISP_DISABLE);
+ /* Flush the plane changes */
+ OUTREG(dspbase_reg, INREG(dspbase_reg));
+
if (!IS_I9XX(pI830)) {
/* Wait for vblank for the disable to take effect */
i830WaitForVblank(pScrn);