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authorZhenyu Wang <zhenyuw@linux.intel.com>2010-08-23 09:48:22 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2010-08-23 09:48:22 +0800
commit104cd0554bde1d109a54db7a93700d5edfabd914 (patch)
tree41118fb929d3b7fdec2940b3966038e6d66b4852 /src
parent271dda84be2f81b32dbe5947e64f5558a89e385e (diff)
Add sandybridge D0 support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'src')
-rw-r--r--src/intel_driver.h4
-rw-r--r--src/intel_module.c1
2 files changed, 4 insertions, 1 deletions
diff --git a/src/intel_driver.h b/src/intel_driver.h
index c0b1c579..00e8488a 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -172,6 +172,7 @@
#define PCI_CHIP_SANDYBRIDGE 0x0102
#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100
#define PCI_CHIP_SANDYBRIDGE_M 0x0106
+#define PCI_CHIP_SANDYBRIDGE_M_D0 0x0126
#define PCI_CHIP_SANDYBRIDGE_BRIDGE_M 0x0104
#endif
@@ -242,7 +243,8 @@
#define IS_I915(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_G33CLASS(pI810))
#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE || \
- (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M)
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M ||\
+ (pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE_M_D0)
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_GM45(pI810) || IS_IGD(pI810) || IS_IGDNG_M(pI810))
/* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
diff --git a/src/intel_module.c b/src/intel_module.c
index 5e649894..55e19d19 100644
--- a/src/intel_module.c
+++ b/src/intel_module.c
@@ -116,6 +116,7 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DEVICE_MATCH (PCI_CHIP_IGDNG_M_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_D0, 0 ),
{ 0, 0, 0 },
};