a fix for 945G/945GM

3 files changed, 122 insertions, 15 deletions

diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c
index bc5b7286..0f57a5fb 100644
--- a/src/i915_hwmc.c
+++ b/src/i915_hwmc.c
@@ -380,7 +380,7 @@ static void i915_unmap_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxp
 static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *ctxpriv)
 {
     I830Ptr pI830 = I830PTR(pScrn);
-    int flags = (IS_I915G(pI830) || IS_I915GM(pI830)) ? 
+    int flags = (IS_I915G(pI830) || IS_I915GM(pI830) || IS_I945G(pI830) || IS_I945GM(pI830)) ? 
         (ALIGN_BOTH_ENDS | NEED_PHYSICAL_ADDR) : ALIGN_BOTH_ENDS;
     
     if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Static Indirect State",
diff --git a/src/xvmc/I915XvMC.c b/src/xvmc/I915XvMC.c
index 3df6ebe9..bc25a4ce 100644
--- a/src/xvmc/I915XvMC.c
+++ b/src/xvmc/I915XvMC.c
@@ -214,6 +214,46 @@ _STATIC_ void i915_flush_with_flush_bit_clear(i915XvMCContext *pI915XvMC)
     i915_flush(pI915XvMC, 1, 0);
 }
 
+_STATIC_ void i915_3d_initialization(XvMCContext *context)
+{
+    i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData;
+    struct i915_3dstate_coord_set_bindings coord_set_bindings;
+    struct i915_3dstate_drawing_rectangle drawing_rectangle;
+    struct i915_3dstate_modes_5 modes_5;
+    i915_flush_with_flush_bit_clear(pI915XvMC);
+
+    memset(&coord_set_bindings, 0, sizeof(coord_set_bindings));
+    coord_set_bindings.dw0.type = CMD_3D;
+    coord_set_bindings.dw0.opcode = OPC_3DSTATE_COORD_SET_BINDINGS;
+    coord_set_bindings.dw0.itcs7_src = 7;
+    coord_set_bindings.dw0.itcs6_src = 6;
+    coord_set_bindings.dw0.itcs5_src = 5;
+    coord_set_bindings.dw0.itcs4_src = 4;
+    coord_set_bindings.dw0.itcs3_src = 3;
+    coord_set_bindings.dw0.itcs2_src = 2;
+    coord_set_bindings.dw0.itcs1_src = 1;
+    coord_set_bindings.dw0.itcs0_src = 0;
+    intelBatchbufferData(pI915XvMC, &coord_set_bindings, sizeof(coord_set_bindings), 0);
+
+    memset(&drawing_rectangle, 0, sizeof(drawing_rectangle));
+    drawing_rectangle.dw0.type = CMD_3D;
+    drawing_rectangle.dw0.opcode = OPC_3DSTATE_DRAWING_RECTANGLE;
+    drawing_rectangle.dw0.length = 3;
+    drawing_rectangle.dw2.x_min = 0;
+    drawing_rectangle.dw2.y_min = 0;
+    drawing_rectangle.dw3.x_max = 2047;
+    drawing_rectangle.dw3.y_max = 2047;
+    intelBatchbufferData(pI915XvMC, &drawing_rectangle, sizeof(drawing_rectangle), 0);
+
+    memset(&modes_5, 0, sizeof(modes_5));
+    modes_5.dw0.type = CMD_3D;
+    modes_5.dw0.opcode = OPC_3DSTATE_MODES_5;
+    modes_5.dw0.prc_op = 1;
+    modes_5.dw0.ptc_op = 1;
+    intelBatchbufferData(pI915XvMC, &modes_5, sizeof(modes_5), 0);
+}
+
+
 /* for MC picture rendering */
 _STATIC_ void i915_mc_static_indirect_state_buffer(XvMCContext *context, 
                                                    XvMCSurface *surface,
@@ -513,7 +553,9 @@ _STATIC_ void i915_mc_load_sis_msb_buffers(XvMCContext *context)
     load_indirect->dw0.length = (size >> 2) - 2;
 
     if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM)
+        pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_G ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_GM)
         mem_select = 0;
 
     load_indirect->dw0.mem_select = mem_select;
@@ -529,7 +571,6 @@ _STATIC_ void i915_mc_load_sis_msb_buffers(XvMCContext *context)
     else
         sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2);
 
-
     /* MSB */
     msb = (msb_state *)(++sis);
     msb->dw0.valid = 1;
@@ -633,12 +674,6 @@ _STATIC_ void i915_mc_mpeg_macroblock_1fbmv(XvMCContext *context, XvMCMacroBlock
     macroblock_1fbmv.header.dw1.coded_block_pattern = mb->coded_block_pattern; 
     macroblock_1fbmv.header.dw1.skipped_macroblocks = 0;      
 
-/*
-    fmv.s[0] = mb->PMV[0][0][1];
-    fmv.s[1] = mb->PMV[0][0][0];
-    bmv.s[0] = mb->PMV[0][1][1];
-    bmv.s[1] = mb->PMV[0][1][0];
-*/
     fmv.s[0] = mb->PMV[0][0][0];
     fmv.s[1] = mb->PMV[0][0][1];
     bmv.s[0] = mb->PMV[0][1][0];
@@ -1008,12 +1043,12 @@ _STATIC_ void i915_mc_one_time_state_initialization(XvMCContext *context)
     s6->alpha_test_enable = 0;
     s6->alpha_test_function = 0;
     s6->alpha_reference_value = 0;
-    s6->depth_test_enable = 1;
+    s6->depth_test_enable = 0;
     s6->depth_test_function = 0;
     s6->color_buffer_blend = 0;
     s6->color_blend_function = 0;
-    s6->src_blend_factor = 1;
-    s6->dest_blend_factor = 1;
+    s6->src_blend_factor = 0;
+    s6->dest_blend_factor = 0;
     s6->depth_buffer_write = 0;
     s6->color_buffer_write = 1;
     s6->triangle_pv = 0;
@@ -1034,7 +1069,9 @@ _STATIC_ void i915_mc_one_time_state_initialization(XvMCContext *context)
     load_indirect->dw0.length = (size >> 2) - 2;
 
     if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM)
+        pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_G ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_GM)
         mem_select = 0;
 
     load_indirect->dw0.mem_select = mem_select;
@@ -1121,7 +1158,9 @@ _STATIC_ void i915_mc_invalidate_subcontext_buffers(XvMCContext *context, unsign
     load_indirect->dw0.opcode = OPC_3DSTATE_LOAD_INDIRECT;
 
     if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM)
+        pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_G ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_GM)
         load_indirect->dw0.mem_select = 0;
     else
         load_indirect->dw0.mem_select = 1;
@@ -1880,7 +1919,9 @@ Status XvMCCreateContext(Display *display, XvPortID port,
     pI915XvMC->psc.size = tmpComm->psc.size;
 
     if (pI915XvMC->deviceID == PCI_CHIP_I915_G ||
-        pI915XvMC->deviceID == PCI_CHIP_I915_GM) {
+        pI915XvMC->deviceID == PCI_CHIP_I915_GM ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_G ||
+        pI915XvMC->deviceID == PCI_CHIP_I945_GM) {
         pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr;
         pI915XvMC->ssb.bus_addr = tmpComm->ssb.bus_addr;
         pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr;
@@ -2356,6 +2397,7 @@ Status XvMCRenderSurface(Display *display, XvMCContext *context,
 
     LOCK_HARDWARE(pI915XvMC);
     // if (!pI915XvMC->inited_mc) {
+    i915_3d_initialization(context);
     i915_mc_invalidate_subcontext_buffers(context, BLOCK_SIS | BLOCK_SSB 
                                           | BLOCK_MSB | BLOCK_PSP | BLOCK_PSC);
     i915_mc_sampler_state_buffer(context);
diff --git a/src/xvmc/i915_structs.h b/src/xvmc/i915_structs.h
index 05a23aa5..24f215b5 100644
--- a/src/xvmc/i915_structs.h
+++ b/src/xvmc/i915_structs.h
@@ -36,8 +36,11 @@ struct i915_mi_flush
 #define OPC_3DSTATE_PIXEL_SHADER_CONSTANTS      (0x06 + (0x1d << 8))
 #define OPC_3DSTATE_LOAD_INDIRECT               (0x07 + (0x1d << 8))
 
+#define OPC_3DSTATE_MODES_5                     (0x0c)
+#define OPC_3DSTATE_COORD_SET_BINDINGS          (0x16)
 #define OPC_3DPRIMITIVE                         (0x1f)
 
+#define OPC_3DSTATE_DRAWING_RECTANGLE           (0x80 + (0x1d << 8))
 #define OPC_3DSTATE_SCISSOR_RECTANGLE           (0x81 + (0x1d << 8))
 #define OPC_3DSTATE_DEST_BUFFER_VARIABLES       (0x85 + (0x1d << 8))
 #define OPC_3DSTATE_DEST_BUFFER_VARIABLES_MPEG  (0x87 + (0x1d << 8))
@@ -902,4 +905,66 @@ struct i915_3dprimitive
     } dw0;
 };
 
+struct i915_3dstate_coord_set_bindings
+{
+    struct {
+        unsigned itcs0_src : 3;
+        unsigned itcs1_src : 3;
+        unsigned itcs2_src : 3;
+        unsigned itcs3_src : 3;
+        unsigned itcs4_src : 3;
+        unsigned itcs5_src : 3;
+        unsigned itcs6_src : 3;
+        unsigned itcs7_src : 3;
+        unsigned opcode : 5;
+        unsigned type : 3;
+    } dw0;
+};
+
+struct i915_3dstate_drawing_rectangle
+{
+    struct {
+        unsigned length : 16;
+        unsigned opcode : 13;
+        unsigned type : 3;
+    } dw0;
+
+    struct {
+        unsigned pad0 : 24;
+        unsigned y_dither_offset : 2;
+        unsigned x_dither_offset : 2;
+        unsigned pad1 : 2;
+        unsigned dbco_disable : 1;
+        unsigned fsc_disable : 1;
+    } dw1;
+
+    struct {
+        unsigned x_min : 16;
+        unsigned y_min : 16;
+    } dw2;
+
+    struct {
+        unsigned x_max : 16;
+        unsigned y_max : 16;
+    } dw3;
+
+    struct {
+        unsigned x_origin : 16;
+        unsigned y_origin : 16;
+    } dw4;
+};
+
+struct i915_3dstate_modes_5
+{
+    struct {
+        unsigned pad0 : 16;
+        unsigned ptc_op : 1;
+        unsigned tc_disable : 1;
+        unsigned prc_op : 1;
+        unsigned pad1 : 5;
+        unsigned opcode : 5;
+        unsigned type : 3;
+    } dw0;
+};
+
 #endif /*_I915_STRUCTS_H */