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authorJesse Barnes <jesse.barnes@intel.com>2007-08-03 21:27:52 -0700
committerJesse Barnes <jesse.barnes@intel.com>2007-08-03 21:27:52 -0700
commitffbab2ee5dc227b2a8a5ffd1717ae00e8e37f956 (patch)
tree3bc43bf558eaa099b516dc42e2e58b4cd4e34399 /src
parent019dbfda294aaafb28d8bea0fe2f5dadc2ea3e0b (diff)
Limit Solid & Copy offsets to 4k when rendering to tiled targets
Diffstat (limited to 'src')
-rw-r--r--src/i830_exa.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 5da153e0..88853a75 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -147,6 +147,8 @@ I830EXAPrepareSolid(PixmapPtr pPixmap, int alu, Pixel planemask, Pixel fg)
I830FALLBACK("pixmap offset not aligned");
if ( pitch % pI830->EXADriverPtr->pixmapPitchAlign != 0)
I830FALLBACK("pixmap pitch not aligned");
+ if ( pI830->tiling && offset > 4096)
+ I830FALLBACK("offset limited to 4k for tiled targets");
pI830->BR[13] = (pitch & 0xffff);
switch (pPixmap->drawable.bitsPerPixel) {
@@ -231,6 +233,12 @@ I830EXAPrepareCopy(PixmapPtr pSrcPixmap, PixmapPtr pDstPixmap, int xdir,
pI830->copy_src_tiled = (pI830->tiling &&
exaPixmapInFrontbuffer(pSrcPixmap));
+ if (pI830->copy_src_tiled && pI830->copy_src_off > 4096)
+ I830FALLBACK("offset limited to 4k for tiled targets");
+ if (pI830->tiling && exaPixmapInFrontbuffer(pDstPixmap) &&
+ exaGetPixmapOffset(pDstPixmap) > 4096)
+ I830FALLBACK("offset limited to 4k for tiled targets");
+
pI830->BR[13] = exaGetPixmapPitch(pDstPixmap);
pI830->BR[13] |= I830CopyROP[alu] << 16;