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-rw-r--r--src/i830_crt.c3
-rw-r--r--src/i830_debug.c2
-rw-r--r--src/i830_display.c4
-rw-r--r--src/i830_memory.c5
-rw-r--r--src/i830_sdvo.c2
-rw-r--r--src/i830_xaa.c2
6 files changed, 10 insertions, 8 deletions
diff --git a/src/i830_crt.c b/src/i830_crt.c
index bbb4a830..d9f4ee60 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -310,7 +310,8 @@ i830_crt_detect(xf86OutputPtr output)
I830Ptr pI830 = I830PTR(pScrn);
xf86CrtcPtr crtc;
- if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830)) {
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_I965G(pI830) ||
+ IS_G33CLASS(pI830)) {
if (i830_crt_detect_hotplug(output))
return XF86OutputStatusConnected;
else
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 93549585..bda263cd 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -224,7 +224,7 @@ DEBUGSTRING(i830_debug_dpll)
break;
}
- if (IS_I945G(pI830) || IS_I945GM(pI830)) {
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
sprintf(sdvoextra, ", SDVO mult %d",
(int)((val & SDVO_MULTIPLIER_MASK) >>
SDVO_MULTIPLIER_SHIFT_HIRES) + 1);
diff --git a/src/i830_display.c b/src/i830_display.c
index 69653377..2df1fcca 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -706,7 +706,7 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
/* Core clock values taken from the published datasheets.
* The 830 may go up to 166 Mhz, which we should check.
*/
- if (IS_I945G(pI830))
+ if (IS_I945G(pI830) || IS_G33CLASS(pI830))
return 400000;
else if (IS_I915G(pI830))
return 333000;
@@ -869,7 +869,7 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
if (is_sdvo)
{
dpll |= DPLL_DVO_HIGH_SPEED;
- if (IS_I945G(pI830) || IS_I945GM(pI830))
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
{
int sdvo_pixel_multiply = adjusted_mode->Clock / mode->Clock;
dpll |= (sdvo_pixel_multiply - 1) << SDVO_MULTIPLIER_SHIFT_HIRES;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 17d4c4ef..afdd93d7 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -790,7 +790,7 @@ IsTileable(ScrnInfoPtr pScrn, int pitch)
switch (pitch) {
case 128:
case 256:
- if (IS_I945G(pI830) || IS_I945GM(pI830))
+ if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
return TRUE;
else
return FALSE;
@@ -1528,7 +1528,8 @@ i830_set_fence(ScrnInfoPtr pScrn, int nr, unsigned int offset,
}
}
- if ((IS_I945G(pI830) || IS_I945GM(pI830)) && tile_format == TILING_YMAJOR)
+ if ((IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
+ && tile_format == TILING_YMAJOR)
fence_pitch = pitch / 128;
else if (IS_I9XX(pI830))
fence_pitch = pitch / 512;
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index 3916dba8..27677152 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -747,7 +747,7 @@ i830_sdvo_mode_set(xf86OutputPtr output, DisplayModePtr mode,
sdvo_pixel_multiply = i830_sdvo_get_pixel_multiplier(mode);
if (IS_I965G(pI830)) {
/* done in crtc_mode_set as the dpll_md reg must be written early */
- } else if (IS_I945G(pI830) || IS_I945GM(pI830)) {
+ } else if (IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830)) {
/* done in crtc_mode_set as it lives inside the dpll register */
} else {
sdvox |= (sdvo_pixel_multiply - 1) << SDVO_PORT_MULTIPLY_SHIFT;
diff --git a/src/i830_xaa.c b/src/i830_xaa.c
index 790299c6..ec8a8794 100644
--- a/src/i830_xaa.c
+++ b/src/i830_xaa.c
@@ -249,7 +249,7 @@ I830XAAInit(ScreenPtr pScreen)
pI830->xaa_composite = i830_composite;
pI830->xaa_done_composite = i830_done_composite;
} else if (IS_I915G(pI830) || IS_I915GM(pI830) ||
- IS_I945G(pI830) || IS_I945GM(pI830))
+ IS_I945G(pI830) || IS_I945GM(pI830) || IS_G33CLASS(pI830))
{
pI830->xaa_check_composite = i915_check_composite;
pI830->xaa_prepare_composite = i915_prepare_composite;