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-rw-r--r--src/i830_display.c37
1 files changed, 10 insertions, 27 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index 7bb352d3..bdf0191e 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -767,11 +767,9 @@ i830PipeHasType (xf86CrtcPtr crtc, int type)
return FALSE;
}
-#if 0
#if 1
#define i830PllInvalid(s) { /* ErrorF (s) */; return FALSE; }
#endif
-#endif
#define i830PllInvalid(s) { ErrorF (s) ; return FALSE; }
/**
* Returns whether the given set of divisors are valid for a given refclk with
@@ -1575,34 +1573,19 @@ static void igdng_crtc_dpms(xf86CrtcPtr crtc, int mode)
usleep(100);
}
-#if 0
- ErrorF("PFIT enable\n");
- /* Enable panel fitting for LVDS */
- for (i = 0; i < xf86_config->num_output; i++) {
- extern DisplayModePtr i830_lvds_panel_fixed_mode(xf86OutputPtr output);
- xf86OutputPtr output = xf86_config->output[i];
- if (output->crtc == crtc) {
- I830OutputPrivatePtr iout = output->driver_private;
- if (iout->type == I830_OUTPUT_LVDS) {
- DisplayModePtr mode = i830_lvds_panel_fixed_mode(output);
- temp = INREG(pf_ctl_reg);
-
- /* filter force */
- temp &= ~0x00c00000;
- temp |= 0x00800000;
-
- OUTREG(pf_ctl_reg, temp | PF_ENABLE);
- /* currently full aspect */
- OUTREG(pf_win_pos, 0);
- OUTREG(pf_win_size, (mode->HDisplay << 16) |
- (mode->VDisplay));
- break;
- }
- }
+#define PF_FILTER_MASK (3<<23)
+#define PF_FILTER_MED_3x3 (1<<23)
+ if (i830PipeHasType(crtc, I830_OUTPUT_LVDS)) {
+ temp = INREG(pf_ctl_reg);
+ temp &= ~PF_FILTER_MASK;
+ OUTREG(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
+ /* currently full aspect */
+ OUTREG(pf_win_pos, 0);
+ OUTREG(pf_win_size, (intel->lvds_fixed_mode->HDisplay << 16) |
+ (intel->lvds_fixed_mode->VDisplay));
}
-#endif
ErrorF("Pipe enable\n");
/* Enable CPU pipe */