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-rw-r--r--src/i965_reg.h1
-rw-r--r--src/intel_batchbuffer.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/i965_reg.h b/src/i965_reg.h
index 3953dab5..df41fba4 100644
--- a/src/i965_reg.h
+++ b/src/i965_reg.h
@@ -169,6 +169,7 @@
#define BRW_PIPE_CONTROL_DEPTH_STALL (1 << 13)
#define BRW_PIPE_CONTROL_WC_FLUSH (1 << 12)
#define BRW_PIPE_CONTROL_IS_FLUSH (1 << 11)
+#define BRW_PIPE_CONTROL_TC_FLUSH (1 << 10)
#define BRW_PIPE_CONTROL_NOTIFY_ENABLE (1 << 8)
#define BRW_PIPE_CONTROL_GLOBAL_GTT (1 << 2)
#define BRW_PIPE_CONTROL_LOCAL_PGTT (0 << 2)
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c
index 2e1b7d96..282d8ab1 100644
--- a/src/intel_batchbuffer.c
+++ b/src/intel_batchbuffer.c
@@ -157,6 +157,7 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn)
BEGIN_BATCH(4);
OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2));
OUT_BATCH(BRW_PIPE_CONTROL_WC_FLUSH |
+ BRW_PIPE_CONTROL_TC_FLUSH |
BRW_PIPE_CONTROL_NOWRITE);
OUT_BATCH(0); /* write address */
OUT_BATCH(0); /* write data */