diff options
| -rw-r--r-- | src/intel_driver.c | 15 | ||||
| -rw-r--r-- | src/intel_options.c | 1 | ||||
| -rw-r--r-- | src/intel_options.h | 1 | ||||
| -rw-r--r-- | src/sna/kgem.c | 6 | ||||
| -rw-r--r-- | src/sna/sna_driver.c | 7 |
5 files changed, 16 insertions, 14 deletions
diff --git a/src/intel_driver.c b/src/intel_driver.c index 8cb098a1..0e27c48f 100644 --- a/src/intel_driver.c +++ b/src/intel_driver.c @@ -390,18 +390,9 @@ static Bool can_accelerate_blt(struct intel_screen_private *intel) if (INTEL_INFO(intel)->gen == -1) return FALSE; - if (0 && (IS_I830(intel) || IS_845G(intel))) { - /* These pair of i8xx chipsets have a crippling erratum - * that prevents the use of a PTE entry by the BLT - * engine immediately following updating that - * entry in the GATT. - * - * As the BLT is fundamental to our 2D acceleration, - * and the workaround is lost in the midst of time, - * fallback. - * - * XXX disabled for release as causes regressions in GL. - */ + if (xf86ReturnOptValBool(intel->Options, OPTION_ACCEL_DISABLE, FALSE)) { + xf86DrvMsg(intel->scrn->scrnIndex, X_CONFIG, + "Disabling hardware acceleration.\n"); return FALSE; } diff --git a/src/intel_options.c b/src/intel_options.c index 77832aad..7dbbc7ed 100644 --- a/src/intel_options.c +++ b/src/intel_options.c @@ -5,6 +5,7 @@ #include "intel_options.h" const OptionInfoRec intel_options[] = { + {OPTION_ACCEL_DISABLE, "NoAccel", OPTV_BOOLEAN, {0}, 0}, {OPTION_ACCEL_METHOD, "AccelMethod", OPTV_STRING, {0}, 0}, {OPTION_DRI, "DRI", OPTV_BOOLEAN, {0}, 1}, {OPTION_COLOR_KEY, "ColorKey", OPTV_INTEGER, {0}, 0}, diff --git a/src/intel_options.h b/src/intel_options.h index 233908c3..6c16a070 100644 --- a/src/intel_options.h +++ b/src/intel_options.h @@ -11,6 +11,7 @@ */ enum intel_options { + OPTION_ACCEL_DISABLE, OPTION_ACCEL_METHOD, OPTION_DRI, OPTION_VIDEO_KEY, diff --git a/src/sna/kgem.c b/src/sna/kgem.c index 19ebdeff..204b40f3 100644 --- a/src/sna/kgem.c +++ b/src/sna/kgem.c @@ -652,8 +652,10 @@ static bool is_hw_supported(struct kgem *kgem, if (kgem->gen == (unsigned)-1) /* unknown chipset, assume future gen */ return kgem->has_blt; - if (kgem->gen <= 20) /* dynamic GTT is fubar */ - return false; + /* Although pre-855gm the GMCH is fubar, it works mostly. So + * let the user decide through "NoAccel" whether or not to risk + * hw acceleration. + */ if (kgem->gen == 60 && dev->revision < 8) { /* pre-production SNB with dysfunctional BLT */ diff --git a/src/sna/sna_driver.c b/src/sna/sna_driver.c index 3f2ff2ed..bd31996b 100644 --- a/src/sna/sna_driver.c +++ b/src/sna/sna_driver.c @@ -439,7 +439,14 @@ static Bool sna_pre_init(ScrnInfoPtr scrn, int flags) return FALSE; sna->info = intel_detect_chipset(scrn, sna->pEnt, sna->PciInfo); + kgem_init(&sna->kgem, fd, sna->PciInfo, sna->info->gen); + if (xf86ReturnOptValBool(sna->Options, OPTION_ACCEL_DISABLE, FALSE)) { + xf86DrvMsg(sna->scrn->scrnIndex, X_CONFIG, + "Disabling hardware acceleration.\n"); + sna->kgem.wedged = true; + } + if (!xf86ReturnOptValBool(sna->Options, OPTION_RELAXED_FENCING, sna->kgem.has_relaxed_fencing)) { |