diff options
| -rw-r--r-- | src/i830_reg.h | 2 | ||||
| -rw-r--r-- | src/intel.h | 4 | ||||
| -rw-r--r-- | src/intel_batchbuffer.c | 51 | ||||
| -rw-r--r-- | src/intel_batchbuffer.h | 10 |
4 files changed, 45 insertions, 22 deletions
diff --git a/src/i830_reg.h b/src/i830_reg.h index 40808962..93d03cf3 100644 --- a/src/i830_reg.h +++ b/src/i830_reg.h @@ -32,6 +32,8 @@ /* Flush */ #define MI_FLUSH (0x04<<23) +#define MI_FLUSH_DW (0x26<<23) + #define MI_WRITE_DIRTY_STATE (1<<4) #define MI_END_SCENE (1<<3) #define MI_GLOBAL_SNAPSHOT_COUNT_RESET (1<<3) diff --git a/src/intel.h b/src/intel.h index 87678979..fa79a2f9 100644 --- a/src/intel.h +++ b/src/intel.h @@ -289,6 +289,10 @@ typedef struct intel_screen_private { unsigned char *MMIOBase; int cpp; +#define RENDER_BATCH I915_EXEC_RENDER +#define BLT_BATCH I915_EXEC_BLT + unsigned int current_batch; + unsigned int bufferOffset; /* for I830SelectBuffer */ /* These are set in PreInit and never changed. */ diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c index d2653d48..fec52819 100644 --- a/src/intel_batchbuffer.c +++ b/src/intel_batchbuffer.c @@ -147,27 +147,33 @@ void intel_batch_emit_flush(ScrnInfoPtr scrn) assert (!intel->in_batch_atomic); - if ((INTEL_INFO(intel)->gen >= 60)) { - BEGIN_BATCH(4); - OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); /* Mesa does so */ - OUT_BATCH(BRW_PIPE_CONTROL_IS_FLUSH | - BRW_PIPE_CONTROL_WC_FLUSH | - BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH | - BRW_PIPE_CONTROL_NOWRITE); - OUT_BATCH(0); /* write address */ - OUT_BATCH(0); /* write data */ - ADVANCE_BATCH(); + /* Big hammer, look to the pipelined flushes in future. */ + if (intel->current_batch == BLT_BATCH) { + BEGIN_BATCH_BLT(4); + OUT_BATCH(MI_FLUSH_DW | 2); + OUT_BATCH(0); + OUT_BATCH(0); + OUT_BATCH(0); + ADVANCE_BATCH(); + } else if ((INTEL_INFO(intel)->gen >= 60)) { + BEGIN_BATCH(4); + OUT_BATCH(BRW_PIPE_CONTROL | (4 - 2)); /* Mesa does so */ + OUT_BATCH(BRW_PIPE_CONTROL_IS_FLUSH | + BRW_PIPE_CONTROL_WC_FLUSH | + BRW_PIPE_CONTROL_DEPTH_CACHE_FLUSH | + BRW_PIPE_CONTROL_NOWRITE); + OUT_BATCH(0); /* write address */ + OUT_BATCH(0); /* write data */ + ADVANCE_BATCH(); } else { - /* Big hammer, look to the pipelined flushes in future. */ - flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; - if (INTEL_INFO(intel)->gen >= 40) - flags = 0; - - BEGIN_BATCH(1); - OUT_BATCH(MI_FLUSH | flags); - ADVANCE_BATCH(); - } + flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE; + if (INTEL_INFO(intel)->gen >= 40) + flags = 0; + BEGIN_BATCH(1); + OUT_BATCH(MI_FLUSH | flags); + ADVANCE_BATCH(); + } intel_batch_do_flush(scrn); } @@ -204,8 +210,11 @@ void intel_batch_submit(ScrnInfoPtr scrn, int flush) ret = dri_bo_subdata(intel->batch_bo, 0, intel->batch_used*4, intel->batch_ptr); if (ret == 0) - ret = dri_bo_exec(intel->batch_bo, intel->batch_used*4, - NULL, 0, 0xffffffff); + ret = drm_intel_bo_mrb_exec(intel->batch_bo, + intel->batch_used*4, + NULL, 0, 0xffffffff, + intel->current_batch); + if (ret != 0) { if (ret == -EIO) { static int once; diff --git a/src/intel_batchbuffer.h b/src/intel_batchbuffer.h index bf7a5d90..5863561d 100644 --- a/src/intel_batchbuffer.h +++ b/src/intel_batchbuffer.h @@ -63,7 +63,9 @@ static inline void intel_batch_start_atomic(ScrnInfoPtr scrn, unsigned int sz) intel_screen_private *intel = intel_get_screen_private(scrn); assert(!intel->in_batch_atomic); + intel_batch_require_space(scrn, intel, sz * 4); + intel->current_batch = RENDER_BATCH; \ intel->in_batch_atomic = TRUE; intel->batch_atomic_limit = intel->batch_used + sz; @@ -173,17 +175,23 @@ union intfloat { OUT_BATCH(tmp.ui); \ } while(0) -#define BEGIN_BATCH(n) \ +#define __BEGIN_BATCH(n,batch_idx) \ do { \ if (intel->batch_emitting != 0) \ FatalError("%s: BEGIN_BATCH called without closing " \ "ADVANCE_BATCH\n", __FUNCTION__); \ assert(!intel->in_batch_atomic); \ + if (intel->current_batch != batch_idx) \ + intel_batch_submit(scrn, FALSE); \ intel_batch_require_space(scrn, intel, (n) * 4); \ + intel->current_batch = batch_idx; \ intel->batch_emitting = (n); \ intel->batch_emit_start = intel->batch_used; \ } while (0) +#define BEGIN_BATCH(n) __BEGIN_BATCH(n,RENDER_BATCH) +#define BEGIN_BATCH_BLT(n) __BEGIN_BATCH(n,BLT_BATCH) + #define ADVANCE_BATCH() do { \ if (intel->batch_emitting == 0) \ FatalError("%s: ADVANCE_BATCH called with no matching " \ |