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-rw-r--r--src/common.h23
-rw-r--r--src/i810_driver.c12
-rw-r--r--src/i810_reg.h75
-rw-r--r--src/i830.h11
-rw-r--r--src/i830_accel.c75
-rw-r--r--src/i830_common.h8
-rw-r--r--src/i830_cursor.c104
-rw-r--r--src/i830_dri.c39
-rw-r--r--src/i830_dri.h30
-rw-r--r--src/i830_driver.c312
-rw-r--r--src/i830_memory.c79
-rw-r--r--src/i830_video.c122
12 files changed, 705 insertions, 185 deletions
diff --git a/src/common.h b/src/common.h
index 31e67b90..1e3327c6 100644
--- a/src/common.h
+++ b/src/common.h
@@ -277,6 +277,26 @@ extern int I810_DEBUG;
#define PCI_CHIP_I945_GM_BRIDGE 0x27A0
#endif
+#ifndef PCI_CHIP_I965_G_1
+#define PCI_CHIP_I965_G_1 0x2982
+#define PCI_CHIP_I965_G_1_BRIDGE 0x2980
+#endif
+
+#ifndef PCI_CHIP_I965_Q
+#define PCI_CHIP_I965_Q 0x2992
+#define PCI_CHIP_I965_Q_BRIDGE 0x2990
+#endif
+
+#ifndef PCI_CHIP_I965_G
+#define PCI_CHIP_I965_G 0x29A2
+#define PCI_CHIP_I965_G_BRIDGE 0x29A0
+#endif
+
+#ifndef PCI_CHIP_I946_GZ
+#define PCI_CHIP_I946_GZ 0x2972
+#define PCI_CHIP_I946_GZ_BRIDGE 0x2970
+#endif
+
#define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \
pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
pI810->PciInfo->chipType == PCI_CHIP_I810_E)
@@ -292,7 +312,8 @@ extern int I810_DEBUG;
#define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM)
#define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G)
#define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM)
-#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810))
+#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ)
+#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810))
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810))
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 7d854df2..cef6d180 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -140,6 +140,10 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_I915_GM, "915GM"},
{PCI_CHIP_I945_G, "945G"},
{PCI_CHIP_I945_GM, "945GM"},
+ {PCI_CHIP_I965_G, "965G"},
+ {PCI_CHIP_I965_G_1, "965G"},
+ {PCI_CHIP_I965_Q, "965Q"},
+ {PCI_CHIP_I946_GZ, "946GZ"},
{-1, NULL}
};
@@ -159,6 +163,10 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA},
{PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA},
{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
+ {PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
+ {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
+ {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
+ {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED }
};
@@ -578,6 +586,10 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_I915_GM:
case PCI_CHIP_I945_G:
case PCI_CHIP_I945_GM:
+ case PCI_CHIP_I965_G:
+ case PCI_CHIP_I965_G_1:
+ case PCI_CHIP_I965_Q:
+ case PCI_CHIP_I946_GZ:
xf86SetEntitySharable(usedChips[i]);
/* Allocate an entity private if necessary */
diff --git a/src/i810_reg.h b/src/i810_reg.h
index e52375f8..ffa53d3a 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -293,8 +293,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define STATE_VAR_UPDATE_DISABLE 0x02
#define PAL_STIP_DISABLE 0x01
-#define INST_DONE 0x2090
-#define INST_PS 0x20c4
#define MEMMODE 0x20dc
@@ -303,6 +301,66 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#define IPEIR 0x2088
#define IPEHR 0x208C
+#define INST_DONE 0x2090
+#define INST_PS 0x20c4
+#define IPEIR_I965 0x2064 /* i965 */
+#define IPEHR_I965 0x2068 /* i965 */
+#define INST_DONE_I965 0x206c
+#define INST_PS_I965 0x2070
+#define ACTHD 0x2074
+#define DMA_FADD_P 0x2078
+#define INST_DONE_1 0x207c
+
+#define CACHE_MODE_0 0x2120
+#define CACHE_MODE_1 0x2124
+#define MI_ARB_STATE 0x20e4
+
+#define WIZ_CTL 0x7c00
+#define WIZ_CTL_SINGLE_SUBSPAN (1<<6)
+#define WIZ_CTL_IGNORE_STALLS (1<<5)
+
+#define SVG_WORK_CTL 0x7408
+
+#define TS_CTL 0x7e00
+#define TS_MUX_ERR_CODE (0<<8)
+#define TS_MUX_URB_0 (1<<8)
+#define TS_MUX_DISPATCH_ID_0 (10<<8)
+#define TS_MUX_ERR_CODE_VALID (15<<8)
+#define TS_MUX_TID_0 (16<<8)
+#define TS_MUX_EUID_0 (18<<8)
+#define TS_MUX_FFID_0 (22<<8)
+#define TS_MUX_EOT (26<<8)
+#define TS_MUX_SIDEBAND_0 (27<<8)
+#define TS_SNAP_ALL_CHILD (1<<2)
+#define TS_SNAP_ALL_ROOT (1<<1)
+#define TS_SNAP_ENABLE (1<<0)
+
+#define TS_DEBUG_DATA 0x7e0c
+
+#define TD_CTL 0x8000
+#define TD_CTL2 0x8004
+
+
+#define ECOSKPD 0x21d0
+#define EXCC 0x2028
+
+/* I965 debug regs:
+ */
+#define IA_VERTICES_COUNT_QW 0x2310
+#define IA_PRIMITIVES_COUNT_QW 0x2318
+#define VS_INVOCATION_COUNT_QW 0x2320
+#define GS_INVOCATION_COUNT_QW 0x2328
+#define GS_PRIMITIVES_COUNT_QW 0x2330
+#define CL_INVOCATION_COUNT_QW 0x2338
+#define CL_PRIMITIVES_COUNT_QW 0x2340
+#define PS_INVOCATION_COUNT_QW 0x2348
+#define PS_DEPTH_COUNT_QW 0x2350
+#define TIMESTAMP_QW 0x2358
+#define CLKCMP_QW 0x2360
+
+
+
+
/* General error reporting regs, p296
@@ -366,6 +424,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define FENCE 0x2000
#define FENCE_NR 8
+#define FENCE_NEW 0x3000
+#define FENCE_NEW_NR 16
+
+#define FENCE_LINEAR 0
+#define FENCE_XMAJOR 1
+#define FENCE_YMAJOR 2
+
#define I915G_FENCE_START_MASK 0x0ff00000
#define I830_FENCE_START_MASK 0x07f80000
@@ -772,6 +837,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DSPBPOS 0x7118C
#define DSPBSIZE 0x71190
+#define DSPASURF 0x7019C
+#define DSPATILEOFF 0x701A4
+
+#define DSPBSURF 0x7119C
+#define DSPBTILEOFF 0x711A4
+
/* Various masks for reserved bits, etc. */
#define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \
(1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \
diff --git a/src/i830.h b/src/i830.h
index 14e921d1..0234ff55 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -141,7 +141,7 @@ typedef struct {
} I830RingBuffer;
typedef struct {
- unsigned int Fence[8];
+ unsigned int Fence[FENCE_NEW_NR * 2];
} I830RegRec, *I830RegPtr;
typedef struct {
@@ -238,6 +238,12 @@ typedef struct _I830Rec {
int TexGranularity;
int drmMinor;
Bool have3DWindows;
+
+ unsigned int front_tiled;
+ unsigned int back_tiled;
+ unsigned int depth_tiled;
+ unsigned int rotated_tiled;
+ unsigned int rotated2_tiled;
#endif
Bool NeedRingBufferLow;
@@ -377,6 +383,9 @@ typedef struct _I830Rec {
Bool devicePresence;
OsTimerPtr devicesTimer;
+
+ CARD32 savedAsurf;
+ CARD32 savedBsurf;
} I830Rec;
#define I830PTR(p) ((I830Ptr)((p)->driverPrivate))
diff --git a/src/i830_accel.c b/src/i830_accel.c
index a11f64b9..aa43cbec 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -133,6 +133,7 @@ void
I830Sync(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+ int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC))
ErrorF("I830Sync\n");
@@ -147,13 +148,17 @@ I830Sync(ScrnInfoPtr pScrn)
if (pI830->entityPrivate && !pI830->entityPrivate->RingRunning) return;
+ if (IS_I965G(pI830))
+ flags = 0;
+
/* Send a flush instruction and then wait till the ring is empty.
* This is stronger than waiting for the blitter to finish as it also
* flushes the internal graphics caches.
*/
+
{
BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_FLUSH | flags);
OUT_RING(MI_NOOP); /* pad to quadword */
ADVANCE_LP_RING();
}
@@ -168,9 +173,13 @@ void
I830EmitFlush(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+ int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
+
+ if (IS_I965G(pI830))
+ flags = 0;
BEGIN_LP_RING(2);
- OUT_RING(MI_FLUSH | MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE);
+ OUT_RING(MI_FLUSH | flags);
OUT_RING(MI_NOOP); /* pad to quadword */
ADVANCE_LP_RING();
}
@@ -386,6 +395,28 @@ I830AccelInit(ScreenPtr pScreen)
return XAAInit(pScreen, infoPtr);
}
+static unsigned int
+CheckTiling(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ unsigned int tiled = 0;
+
+ /* Check tiling */
+ if (IS_I965G(pI830)) {
+ if (pI830->bufferOffset == pScrn->fbOffset && pI830->front_tiled == FENCE_XMAJOR)
+ tiled = 1;
+ if (pI830->bufferOffset == pI830->RotatedMem.Start && pI830->rotated_tiled == FENCE_XMAJOR)
+ tiled = 1;
+ if (pI830->bufferOffset == pI830->BackBuffer.Start && pI830->back_tiled == FENCE_XMAJOR)
+ tiled = 1;
+ /* not really supported as it's always YMajor tiled */
+ if (pI830->bufferOffset == pI830->DepthBuffer.Start && pI830->depth_tiled == FENCE_XMAJOR)
+ tiled = 1;
+ }
+
+ return tiled;
+}
+
void
I830SetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop,
unsigned int planemask)
@@ -439,6 +470,9 @@ I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y, int w, int h)
ADVANCE_LP_RING();
}
+
+ if (IS_I965G(pI830))
+ I830EmitFlush(pScrn);
}
void
@@ -473,6 +507,7 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
{
I830Ptr pI830 = I830PTR(pScrn);
int dst_x2, dst_y2;
+ unsigned int tiled = CheckTiling(pScrn);
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentScreenToScreenCopy %d,%d - %d,%d %dx%d\n",
@@ -481,14 +516,18 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
dst_x2 = dst_x1 + w;
dst_y2 = dst_y1 + h;
+ if (tiled)
+ pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
+ (pI830->BR[13] & 0xFFFF0000);
+
{
BEGIN_LP_RING(8);
if (pScrn->bitsPerPixel == 32) {
OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB);
+ XY_SRC_COPY_BLT_WRITE_RGB | tiled << 15 | tiled << 11);
} else {
- OUT_RING(XY_SRC_COPY_BLT_CMD);
+ OUT_RING(XY_SRC_COPY_BLT_CMD | tiled << 15 | tiled << 11);
}
OUT_RING(pI830->BR[13]);
OUT_RING((dst_y1 << 16) | (dst_x1 & 0xffff));
@@ -500,6 +539,9 @@ I830SubsequentScreenToScreenCopy(ScrnInfoPtr pScrn, int src_x1, int src_y1,
ADVANCE_LP_RING();
}
+
+ if (IS_I965G(pI830))
+ I830EmitFlush(pScrn);
}
static void
@@ -541,6 +583,7 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
{
I830Ptr pI830 = I830PTR(pScrn);
int x1, x2, y1, y2;
+ unsigned int tiled = CheckTiling(pScrn);
x1 = x;
x2 = x + w;
@@ -550,16 +593,22 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
if (I810_DEBUG & DEBUG_VERBOSE_ACCEL)
ErrorF("I830SubsequentMono8x8PatternFillRect\n");
+ if (tiled)
+ pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
+ (pI830->BR[13] & 0xFFFF0000);
+
{
BEGIN_LP_RING(10);
if (pScrn->bitsPerPixel == 32) {
OUT_RING(XY_MONO_PAT_BLT_CMD | XY_MONO_PAT_BLT_WRITE_ALPHA |
XY_MONO_PAT_BLT_WRITE_RGB |
+ tiled << 11 |
((patty << 8) & XY_MONO_PAT_VERT_SEED) |
((pattx << 12) & XY_MONO_PAT_HORT_SEED));
} else {
OUT_RING(XY_MONO_PAT_BLT_CMD |
+ tiled << 11 |
((patty << 8) & XY_MONO_PAT_VERT_SEED) |
((pattx << 12) & XY_MONO_PAT_HORT_SEED));
}
@@ -574,6 +623,9 @@ I830SubsequentMono8x8PatternFillRect(ScrnInfoPtr pScrn, int pattx, int patty,
OUT_RING(0);
ADVANCE_LP_RING();
}
+
+ if (IS_I965G(pI830))
+ I830EmitFlush(pScrn);
}
static void
@@ -649,6 +701,7 @@ static void
I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
+ unsigned int tiled = CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
@@ -666,14 +719,19 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
ErrorF("I830SubsequentColorExpandScanline %d (addr %x)\n",
bufno, pI830->BR[12]);
+ if (tiled)
+ pI830->BR[13] = ((pI830->BR[13] & 0xFFFF) >> 2) |
+ (pI830->BR[13] & 0xFFFF0000);
+
{
BEGIN_LP_RING(8);
if (pScrn->bitsPerPixel == 32) {
OUT_RING(XY_MONO_SRC_BLT_CMD | XY_MONO_SRC_BLT_WRITE_ALPHA |
+ tiled << 11 |
XY_MONO_SRC_BLT_WRITE_RGB);
} else {
- OUT_RING(XY_MONO_SRC_BLT_CMD);
+ OUT_RING(XY_MONO_SRC_BLT_CMD | tiled << 11);
}
OUT_RING(pI830->BR[13]);
OUT_RING(0); /* x1 = 0, y1 = 0 */
@@ -690,6 +748,9 @@ I830SubsequentColorExpandScanline(ScrnInfoPtr pScrn, int bufno)
*/
pI830->BR[9] += pScrn->displayWidth * pI830->cpp;
I830GetNextScanlineColorExpandBuffer(pScrn);
+
+ if (IS_I965G(pI830))
+ I830EmitFlush(pScrn);
}
#if DO_SCANLINE_IMAGE_WRITE
@@ -741,6 +802,7 @@ static void
I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
{
I830Ptr pI830 = I830PTR(pScrn);
+ unsigned int tiled = CheckTiling(pScrn);
if (pI830->init == 0) {
pI830->BR[12] = (pI830->AccelInfoRec->ScanlineColorExpandBuffers[0] -
@@ -763,9 +825,10 @@ I830SubsequentImageWriteScanline(ScrnInfoPtr pScrn, int bufno)
if (pScrn->bitsPerPixel == 32) {
OUT_RING(XY_SRC_COPY_BLT_CMD | XY_SRC_COPY_BLT_WRITE_ALPHA |
+ tiled << 11 |
XY_SRC_COPY_BLT_WRITE_RGB);
} else {
- OUT_RING(XY_SRC_COPY_BLT_CMD);
+ OUT_RING(XY_SRC_COPY_BLT_CMD | tiled << 11);
}
OUT_RING(pI830->BR[13]);
OUT_RING(0); /* x1 = 0, y1 = 0 */
diff --git a/src/i830_common.h b/src/i830_common.h
index a27bc011..c3ef4cde 100644
--- a/src/i830_common.h
+++ b/src/i830_common.h
@@ -84,7 +84,7 @@ typedef struct {
drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
int last_upload; /* last time texture was uploaded */
int last_enqueue; /* last time a buffer was enqueued */
- int last_dispatch; /* age of the most recently dispatched buffer */
+ volatile int last_dispatch; /* age of the most recently dispatched buffer */
int ctxOwner; /* last context to upload state */
int texAge;
int pf_enabled; /* is pageflipping allowed? */
@@ -115,6 +115,12 @@ typedef struct {
int rotated_size;
int rotated_pitch;
int virtualX, virtualY;
+
+ unsigned int front_tiled;
+ unsigned int back_tiled;
+ unsigned int depth_tiled;
+ unsigned int rotated_tiled;
+ unsigned int rotated2_tiled;
} drmI830Sarea;
/* Flags for perf_boxes
diff --git a/src/i830_cursor.c b/src/i830_cursor.c
index e465b98c..9f22a664 100644
--- a/src/i830_cursor.c
+++ b/src/i830_cursor.c
@@ -91,32 +91,46 @@ I830InitHWCursor(ScrnInfoPtr pScrn)
temp = INREG(CURSOR_A_CONTROL);
temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_MEM_TYPE_LOCAL |
MCURSOR_PIPE_SELECT);
+ if(pI830->CursorIsARGB)
+ temp |= MCURSOR_GAMMA_ENABLE;
temp |= CURSOR_MODE_DISABLE;
temp |= (pI830->pipe << 28);
- if(pI830->CursorIsARGB)
- temp |= MCURSOR_GAMMA_ENABLE;
/* Need to set control, then address. */
OUTREG(CURSOR_A_CONTROL, temp);
- if (pI830->CursorIsARGB)
- OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
- else
- OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
+ if (pI830->CursorNeedsPhysical) {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
+ else
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start);
+ }
if (pI830->Clone) {
temp &= ~MCURSOR_PIPE_SELECT;
temp |= (!pI830->pipe << 28);
OUTREG(CURSOR_B_CONTROL, temp);
- if (pI830->CursorIsARGB)
- OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
- else
- OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ if (pI830->CursorNeedsPhysical) {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start);
+ }
}
} else {
temp = INREG(CURSOR_CONTROL);
temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE |
CURSOR_ENABLE | CURSOR_STRIDE_MASK);
temp |= (CURSOR_FORMAT_3C);
- if (pI830->CursorIsARGB)
- temp |= CURSOR_GAMMA_ENABLE;
+ if(pI830->CursorIsARGB)
+ temp |= CURSOR_GAMMA_ENABLE;
/* This initialises the format and leave the cursor disabled. */
OUTREG(CURSOR_CONTROL, temp);
/* Need to set address and size after disabling. */
@@ -451,15 +465,29 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
/* have to upload the base for the new position */
if (IS_I9XX(pI830)) {
- if (pI830->CursorIsARGB)
- OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
- else
- OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
- if (pI830->Clone) {
+ if (pI830->CursorNeedsPhysical) {
if (pI830->CursorIsARGB)
- OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
else
- OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start);
+ }
+ if (pI830->Clone) {
+ if (pI830->CursorNeedsPhysical) {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start);
+ }
}
}
}
@@ -483,7 +511,7 @@ I830ShowCursor(ScrnInfoPtr pScrn)
pI830->cursorOn = TRUE;
if (IS_MOBILE(pI830) || IS_I9XX(pI830)) {
temp = INREG(CURSOR_A_CONTROL);
- temp &= ~(CURSOR_MODE | MCURSOR_PIPE_SELECT);
+ temp &= ~(CURSOR_MODE | MCURSOR_GAMMA_ENABLE | MCURSOR_PIPE_SELECT);
if (pI830->CursorIsARGB)
temp |= CURSOR_MODE_64_ARGB_AX | MCURSOR_GAMMA_ENABLE;
else
@@ -491,22 +519,36 @@ I830ShowCursor(ScrnInfoPtr pScrn)
temp |= (pI830->pipe << 28); /* Connect to correct pipe */
/* Need to set mode, then address. */
OUTREG(CURSOR_A_CONTROL, temp);
- if (pI830->CursorIsARGB)
- OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
- else
- OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
+ if (pI830->CursorNeedsPhysical) {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Physical);
+ else
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_A_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_A_BASE, pI830->CursorMem->Start);
+ }
if (pI830->Clone) {
temp &= ~MCURSOR_PIPE_SELECT;
temp |= (!pI830->pipe << 28);
OUTREG(CURSOR_B_CONTROL, temp);
- if (pI830->CursorIsARGB)
- OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
- else
- OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ if (pI830->CursorNeedsPhysical) {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Physical);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Physical);
+ } else {
+ if (pI830->CursorIsARGB)
+ OUTREG(CURSOR_B_BASE, pI830->CursorMemARGB->Start);
+ else
+ OUTREG(CURSOR_B_BASE, pI830->CursorMem->Start);
+ }
}
} else {
temp = INREG(CURSOR_CONTROL);
- temp &= ~(CURSOR_FORMAT_MASK);
+ temp &= ~(CURSOR_FORMAT_MASK | CURSOR_GAMMA_ENABLE);
temp |= CURSOR_ENABLE;
if (pI830->CursorIsARGB)
temp |= CURSOR_FORMAT_ARGB | CURSOR_GAMMA_ENABLE;
@@ -531,7 +573,7 @@ I830HideCursor(ScrnInfoPtr pScrn)
pI830->cursorOn = FALSE;
if (IS_MOBILE(pI830) || IS_I9XX(pI830)) {
temp = INREG(CURSOR_A_CONTROL);
- temp &= ~(CURSOR_MODE|MCURSOR_GAMMA_ENABLE);
+ temp &= ~CURSOR_MODE;
temp |= CURSOR_MODE_DISABLE;
OUTREG(CURSOR_A_CONTROL, temp);
/* This is needed to flush the above change. */
@@ -548,7 +590,7 @@ I830HideCursor(ScrnInfoPtr pScrn)
}
} else {
temp = INREG(CURSOR_CONTROL);
- temp &= ~(CURSOR_ENABLE|CURSOR_GAMMA_ENABLE);
+ temp &= ~CURSOR_ENABLE;
OUTREG(CURSOR_CONTROL, temp);
}
}
diff --git a/src/i830_dri.c b/src/i830_dri.c
index 7c5f7956..5c472899 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -83,6 +83,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
static char I830KernelDriverName[] = "i915";
static char I830ClientDriverName[] = "i915";
+static char I965ClientDriverName[] = "i965";
static Bool I830InitVisualConfigs(ScreenPtr pScreen);
static Bool I830CreateContext(ScreenPtr pScreen, VisualPtr visual,
@@ -475,7 +476,11 @@ I830DRIScreenInit(ScreenPtr pScreen)
pI830->LockHeld = 0;
pDRIInfo->drmDriverName = I830KernelDriverName;
- pDRIInfo->clientDriverName = I830ClientDriverName;
+ if (IS_I965G(pI830))
+ pDRIInfo->clientDriverName = I965ClientDriverName;
+ else
+ pDRIInfo->clientDriverName = I830ClientDriverName;
+
if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
pDRIInfo->busIdString = DRICreatePCIBusID(pI830->PciInfo);
} else {
@@ -488,7 +493,7 @@ I830DRIScreenInit(ScreenPtr pScreen)
pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION;
pDRIInfo->ddxDriverPatchVersion = I830_PATCHLEVEL;
-#if 1 /* temporary until this gets removed from the libdri layer */
+#if 1 /* Remove this soon - see bug 5714 */
pDRIInfo->frameBufferPhysicalAddress = (char *) pI830->LinearAddr +
pI830->FrontBuffer.Start;
pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth *
@@ -623,12 +628,17 @@ I830DRIMapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
+#if 1 /* Remove this soon - see bug 5714 */
+ pI830->pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth *
+ pScrn->virtualY * pI830->cpp);
+#endif
+
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] Mapping front buffer\n");
if (drmAddMap(pI830->drmSubFD,
(drm_handle_t)(sarea->front_offset + pI830->LinearAddr),
sarea->front_size,
- DRM_FRAME_BUFFER, /*DRM_AGP,*/
+ DRM_AGP,
0,
(drmAddress) &sarea->front_handle) < 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -684,12 +694,10 @@ I830DRIUnmapScreenRegions(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
{
I830Ptr pI830 = I830PTR(pScrn);
-#if 1
if (sarea->front_handle) {
drmRmMap(pI830->drmSubFD, sarea->front_handle);
sarea->front_handle = 0;
}
-#endif
if (sarea->back_handle) {
drmRmMap(pI830->drmSubFD, sarea->back_handle);
sarea->back_handle = 0;
@@ -785,7 +793,6 @@ I830DRIDoMappings(ScreenPtr pScreen)
/* screen mappings probably failed */
xf86DrvMsg(pScreen->myNum, X_ERROR,
"[drm] drmAddMap(screen mappings) failed. Disabling DRI\n");
- DRICloseScreen(pScreen);
return FALSE;
}
@@ -824,9 +831,6 @@ I830DRIDoMappings(ScreenPtr pScreen)
pI830DRI->mem = pScrn->videoRam * 1024;
pI830DRI->cpp = pI830->cpp;
- pI830DRI->fbOffset = pI830->FrontBuffer.Start;
- pI830DRI->fbStride = pI830->backPitch;
-
pI830DRI->bitsPerPixel = pScrn->bitsPerPixel;
pI830DRI->sarea_priv_offset = sizeof(XF86DRISAREARec);
@@ -1166,8 +1170,10 @@ I830DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg,
I830SelectBuffer(pScrn, I830_SELECT_BACK);
I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
- I830SelectBuffer(pScrn, I830_SELECT_DEPTH);
- I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
+ if (!IS_I965G(pI830)) {
+ I830SelectBuffer(pScrn, I830_SELECT_DEPTH);
+ I830SubsequentScreenToScreenCopy(pScrn, x1, y1, destx, desty, w, h);
+ }
}
I830SelectBuffer(pScrn, I830_SELECT_FRONT);
I830EmitFlush(pScrn);
@@ -1362,6 +1368,14 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
I830DRIUnmapScreenRegions(pScrn, sarea);
+ sarea->front_tiled = pI830->front_tiled;
+ sarea->back_tiled = pI830->back_tiled;
+ sarea->depth_tiled = pI830->depth_tiled;
+ sarea->rotated_tiled = pI830->rotated_tiled;
+#if 0
+ sarea->rotated2_tiled = pI830->rotated2_tiled;
+#endif
+
if (pI830->rotation == RR_Rotate_0) {
sarea->front_offset = pI830->FrontBuffer.Start;
/* Don't use FrontBuffer.Size here as it includes the pixmap cache area
@@ -1421,7 +1435,8 @@ I830UpdateDRIBuffers(ScrnInfoPtr pScrn, drmI830Sarea *sarea)
success = I830DRIMapScreenRegions(pScrn, sarea);
- I830InitTextureHeap(pScrn, sarea);
+ if (success)
+ I830InitTextureHeap(pScrn, sarea);
return success;
}
diff --git a/src/i830_dri.h b/src/i830_dri.h
index 31232b80..11987d1d 100644
--- a/src/i830_dri.h
+++ b/src/i830_dri.h
@@ -18,21 +18,6 @@ typedef struct _I830DRIRec {
drm_handle_t regs;
drmSize regsSize;
- drmSize backbufferSize;
- drm_handle_t backbuffer;
-
- drmSize depthbufferSize;
- drm_handle_t depthbuffer;
-
- drmSize rotatedSize;
- drm_handle_t rotatedbuffer;
-
- drm_handle_t textures;
- int textureSize;
-
- drm_handle_t agp_buffers;
- drmSize agp_buf_size;
-
int deviceID;
int width;
int height;
@@ -40,21 +25,6 @@ typedef struct _I830DRIRec {
int cpp;
int bitsPerPixel;
- int fbOffset;
- int fbStride;
-
- int backOffset;
- int backPitch;
-
- int depthOffset;
- int depthPitch;
-
- int rotatedOffset;
- int rotatedPitch;
-
- int logTextureGranularity;
- int textureOffset;
-
int irq;
int sarea_priv_offset;
} I830DRIRec, *I830DRIPtr;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 5ce88e14..d49e027d 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -150,6 +150,11 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
* 09/2005 Alan Hourihane
* - Add Intel(R) 945GM support.
*
+ * 10/2005 Alan Hourihane, Keith Whitwell, Brian Paul
+ * - Added Rotation support
+ *
+ * 12/2005 Alan Hourihane, Keith Whitwell
+ * - Add Intel(R) 965G support.
*/
#ifdef HAVE_CONFIG_H
@@ -204,6 +209,10 @@ static SymTabRec I830BIOSChipsets[] = {
{PCI_CHIP_I915_GM, "915GM"},
{PCI_CHIP_I945_G, "945G"},
{PCI_CHIP_I945_GM, "945GM"},
+ {PCI_CHIP_I965_G, "965G"},
+ {PCI_CHIP_I965_G_1, "965G"},
+ {PCI_CHIP_I965_Q, "965Q"},
+ {PCI_CHIP_I946_GZ, "946GZ"},
{-1, NULL}
};
@@ -217,6 +226,10 @@ static PciChipsets I830BIOSPciChipsets[] = {
{PCI_CHIP_I915_GM, PCI_CHIP_I915_GM, RES_SHARED_VGA},
{PCI_CHIP_I945_G, PCI_CHIP_I945_G, RES_SHARED_VGA},
{PCI_CHIP_I945_GM, PCI_CHIP_I945_GM, RES_SHARED_VGA},
+ {PCI_CHIP_I965_G, PCI_CHIP_I965_G, RES_SHARED_VGA},
+ {PCI_CHIP_I965_G_1, PCI_CHIP_I965_G_1, RES_SHARED_VGA},
+ {PCI_CHIP_I965_Q, PCI_CHIP_I965_Q, RES_SHARED_VGA},
+ {PCI_CHIP_I946_GZ, PCI_CHIP_I946_GZ, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};
@@ -272,7 +285,7 @@ static OptionInfoRec I830BIOSOptions[] = {
static void I830DisplayPowerManagementSet(ScrnInfoPtr pScrn,
int PowerManagementMode, int flags);
-static void I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags);
+static void I830AdjustFrame(int scrnIndex, int x, int y, int flags);
static Bool I830BIOSCloseScreen(int scrnIndex, ScreenPtr pScreen);
static Bool I830BIOSSaveScreen(ScreenPtr pScreen, int unblack);
static Bool I830BIOSEnterVT(int scrnIndex, int flags);
@@ -1441,8 +1454,11 @@ I830DetectMemory(ScrnInfoPtr pScrn)
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
/* We need to reduce the stolen size, by the GTT and the popup.
- * The GTT varying according the the FbMapSize and the popup is 4KB */
- range = (pI830->FbMapSize / (1024*1024)) + 4;
+ * The GTT varying according the the FbMapSize and the popup is 4KB. */
+ if (IS_I965G(pI830))
+ range = 512 + 4; /* Fixed 512KB size for i965 */
+ else
+ range = (pI830->FbMapSize / MB(1)) + 4;
if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
@@ -1859,7 +1875,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
unsigned char r, g, b;
CARD32 val, temp;
int palreg;
- int dspreg, dspbase;
+ int dspreg, dspbase, dspsurf;
DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors);
pI830 = I830PTR(pScrn);
@@ -1868,10 +1884,12 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
palreg = PALETTE_A;
dspreg = DSPACNTR;
dspbase = DSPABASE;
+ dspsurf = DSPASURF;
} else {
palreg = PALETTE_B;
dspreg = DSPBCNTR;
dspbase = DSPBBASE;
+ dspsurf = DSPBSURF;
}
/* To ensure gamma is enabled we need to turn off and on the plane */
@@ -1880,6 +1898,8 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
OUTREG(dspbase, INREG(dspbase));
OUTREG(dspreg, temp | DISPPLANE_GAMMA_ENABLE);
OUTREG(dspbase, INREG(dspbase));
+ if (IS_I965G(pI830))
+ OUTREG(dspsurf, INREG(dspsurf));
/* It seems that an initial read is needed. */
temp = INREG(palreg);
@@ -2287,6 +2307,16 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
case PCI_CHIP_I945_GM:
chipname = "945GM";
break;
+ case PCI_CHIP_I965_G:
+ case PCI_CHIP_I965_G_1:
+ chipname = "965G";
+ break;
+ case PCI_CHIP_I965_Q:
+ chipname = "965Q";
+ break;
+ case PCI_CHIP_I946_GZ:
+ chipname = "946GZ";
+ break;
default:
chipname = "unknown chipset";
break;
@@ -3054,6 +3084,9 @@ I830BIOSPreInit(ScrnInfoPtr pScrn, int flags)
else
pI830->CursorNeedsPhysical = FALSE;
+ if (IS_I965G(pI830))
+ pI830->CursorNeedsPhysical = FALSE;
+
/* Force ring buffer to be in low memory for all chipsets */
pI830->NeedRingBufferLow = TRUE;
@@ -3608,8 +3641,12 @@ CheckInheritedState(ScrnInfoPtr pScrn)
}
#if 0
- if (errors)
- I830PrintErrorState(pScrn);
+ if (errors) {
+ if (IS_I965G(pI830))
+ I965PrintErrorState(pScrn);
+ else
+ I830PrintErrorState(pScrn);
+ }
#endif
if (fatal)
@@ -3639,8 +3676,15 @@ ResetState(ScrnInfoPtr pScrn, Bool flush)
pI830->entityPrivate->RingRunning = 0;
/* Reset the fence registers to 0 */
- for (i = 0; i < 8; i++)
- OUTREG(FENCE + i * 4, 0);
+ if (IS_I965G(pI830)) {
+ for (i = 0; i < FENCE_NEW_NR; i++) {
+ OUTREG(FENCE_NEW + i * 8, 0);
+ OUTREG(FENCE_NEW + 4 + i * 8, 0);
+ }
+ } else {
+ for (i = 0; i < FENCE_NR; i++)
+ OUTREG(FENCE + i * 4, 0);
+ }
/* Flush the ring buffer (if enabled), then disable it. */
if (pI830->AccelInfoRec != NULL && flush) {
@@ -3670,10 +3714,21 @@ SetFenceRegs(ScrnInfoPtr pScrn)
if (!I830IsPrimary(pScrn)) return;
- for (i = 0; i < 8; i++) {
- OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]);
- if (I810_DEBUG & DEBUG_VERBOSE_VGA)
- ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]);
+ if (IS_I965G(pI830)) {
+ for (i = 0; i < FENCE_NEW_NR; i++) {
+ OUTREG(FENCE_NEW + i * 8, pI830->ModeReg.Fence[i]);
+ OUTREG(FENCE_NEW + 4 + i * 8, pI830->ModeReg.Fence[i+FENCE_NEW_NR]);
+ if (I810_DEBUG & DEBUG_VERBOSE_VGA) {
+ ErrorF("Fence Start Register : %x\n", pI830->ModeReg.Fence[i]);
+ ErrorF("Fence End Register : %x\n", pI830->ModeReg.Fence[i+FENCE_NEW_NR]);
+ }
+ }
+ } else {
+ for (i = 0; i < FENCE_NR; i++) {
+ OUTREG(FENCE + i * 4, pI830->ModeReg.Fence[i]);
+ if (I810_DEBUG & DEBUG_VERBOSE_VGA)
+ ErrorF("Fence Register : %x\n", pI830->ModeReg.Fence[i]);
+ }
}
}
@@ -3774,6 +3829,12 @@ SaveHWState(ScrnInfoPtr pScrn)
vgaHWSave(pScrn, vgaReg, VGA_SR_FONTS);
pVesa = pI830->vesa;
+
+ if (IS_I965G(pI830)) {
+ pI830->savedAsurf = INREG(DSPASURF);
+ pI830->savedBsurf = INREG(DSPBSURF);
+ }
+
/*
* This save/restore method doesn't work for 845G BIOS, or for some
* other platforms. Enable it in all cases.
@@ -3826,9 +3887,6 @@ RestoreHWState(ScrnInfoPtr pScrn)
DPRINTF(PFX, "RestoreHWState\n");
-#ifdef XF86DRI
- I830DRISetVBlankInterrupt (pScrn, FALSE);
-#endif
if (I830IsPrimary(pScrn) && pI830->pipe != pI830->origPipe)
SetBIOSPipe(pScrn, pI830->origPipe);
else
@@ -3887,6 +3945,11 @@ RestoreHWState(ScrnInfoPtr pScrn)
VBESetDisplayStart(pVbe, pVesa->x, pVesa->y, TRUE);
+ if (IS_I965G(pI830)) {
+ OUTREG(DSPASURF, pI830->savedAsurf);
+ OUTREG(DSPBSURF, pI830->savedBsurf);
+ }
+
vgaHWRestore(pScrn, vgaReg, VGA_SR_FONTS);
vgaHWLock(hwp);
@@ -4118,6 +4181,25 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
SetPipeAccess(pScrn);
+#if 0
+ { /* I965G ENABLE TILING */
+ planeA = INREG(DSPACNTR) | 1<<10;
+ OUTREG(DSPACNTR, planeA);
+ /* flush the change. */
+ temp = INREG(DSPABASE);
+ OUTREG(DSPABASE, temp);
+ }
+#else
+ { /* I965G DISABLE TILING */
+ planeA = INREG(DSPACNTR) & ~1<<10;
+ OUTREG(DSPACNTR, planeA);
+ /* flush the change. */
+ temp = INREG(DSPABASE);
+ OUTREG(DSPABASE, temp);
+ OUTREG(DSPASURF, INREG(DSPASURF));
+ }
+#endif
+
if (I830VESASetVBEMode(pScrn, mode, data->block) == FALSE) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Set VBE Mode failed!\n");
return FALSE;
@@ -4182,6 +4264,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* flush the change. */
temp = INREG(DSPABASE);
OUTREG(DSPABASE, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(DSPASURF);
+ OUTREG(DSPASURF, temp);
+ }
}
if (pI830->planeEnabled[1]) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Enabling plane B.\n");
@@ -4192,6 +4278,10 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* flush the change. */
temp = INREG(DSPBADDR);
OUTREG(DSPBADDR, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(DSPBSURF);
+ OUTREG(DSPBSURF, temp);
+ }
}
planeA = INREG(DSPACNTR);
@@ -4224,6 +4314,7 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
CARD32 stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE;
CARD32 basereg = !pI830->pipe ? DSPABASE : DSPBBASE;
CARD32 sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE;
+ CARD32 surfreg = !pI830->pipe ? DSPASURF : DSPBSURF;
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
temp = INREG(stridereg);
@@ -4237,12 +4328,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surfreg);
+ OUTREG(surfreg, temp);
+ }
if (pI830->entityPrivate && pI830->entityPrivate->pScrn_2) {
I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2);
stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE;
basereg = pI830->pipe ? DSPABASE : DSPBBASE;
sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE;
+ surfreg = pI830->pipe ? DSPASURF : DSPBSURF;
temp = INREG(stridereg);
if (temp / pI8302->cpp != (CARD32)(pI8302->displayWidth)) {
@@ -4255,11 +4351,16 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surfreg);
+ OUTREG(surfreg, temp);
+ }
}
} else {
CARD32 stridereg = pI830->pipe ? DSPASTRIDE : DSPBSTRIDE;
CARD32 basereg = pI830->pipe ? DSPABASE : DSPBBASE;
CARD32 sizereg = pI830->pipe ? DSPASIZE : DSPBSIZE;
+ CARD32 surfreg = pI830->pipe ? DSPASURF : DSPBSURF;
I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
I830Ptr pI8302 = I830PTR(pI830->entityPrivate->pScrn_2);
@@ -4274,10 +4375,15 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surfreg);
+ OUTREG(surfreg, temp);
+ }
stridereg = !pI830->pipe ? DSPASTRIDE : DSPBSTRIDE;
basereg = !pI830->pipe ? DSPABASE : DSPBBASE;
sizereg = !pI830->pipe ? DSPASIZE : DSPBSIZE;
+ surfreg = !pI830->pipe ? DSPASURF : DSPBSURF;
temp = INREG(stridereg);
if (temp / pI8302->cpp != ((CARD32)pI8302->displayWidth)) {
@@ -4290,12 +4396,17 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
/* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surfreg);
+ OUTREG(surfreg, temp);
+ }
}
} else {
for (i = 0; i < pI830->availablePipes; i++) {
CARD32 stridereg = i ? DSPBSTRIDE : DSPASTRIDE;
CARD32 basereg = i ? DSPBBASE : DSPABASE;
CARD32 sizereg = i ? DSPBSIZE : DSPASIZE;
+ CARD32 surfreg = i ? DSPBSURF : DSPASURF;
if (!pI830->planeEnabled[i])
continue;
@@ -4308,9 +4419,12 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
OUTREG(stridereg, pI830->displayWidth * pI830->cpp);
}
OUTREG(sizereg, (pMode->HDisplay - 1) | ((pMode->VDisplay - 1) << 16));
- /* Trigger update */
temp = INREG(basereg);
OUTREG(basereg, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surfreg);
+ OUTREG(surfreg, temp);
+ }
}
}
@@ -4413,9 +4527,13 @@ I830VESASetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
SetHWOperatingState(pScrn);
#endif
-#ifdef XF86DRI
- I830DRISetVBlankInterrupt (pScrn, TRUE);
+#if 0
+ if (IS_I965G(pI830))
+ I965PrintErrorState(pScrn);
+ else
+ I830PrintErrorState(pScrn);
#endif
+
#ifdef XF86DRI
if (didLock)
I830DRIUnlock(pScrn);
@@ -4469,6 +4587,59 @@ I830PrintErrorState(ScrnInfoPtr pScrn)
INREG16(HWSTAM), INREG16(IER), INREG16(IMR), INREG16(IIR));
}
+void
+I965PrintErrorState(ScrnInfoPtr pScrn)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ ErrorF("pgetbl_ctl: 0x%lx pgetbl_err: 0x%lx\n",
+ INREG(PGETBL_CTL), INREG(PGE_ERR));
+
+ ErrorF("ipeir: %lx iphdr: %lx\n", INREG(IPEIR_I965), INREG(IPEHR_I965));
+
+ ErrorF("LP ring tail: %lx head: %lx len: %lx start %lx\n",
+ INREG(LP_RING + RING_TAIL),
+ INREG(LP_RING + RING_HEAD) & HEAD_ADDR,
+ INREG(LP_RING + RING_LEN), INREG(LP_RING + RING_START));
+
+ ErrorF("Err ID (eir): %x Err Status (esr): %x Err Mask (emr): %x\n",
+ INREG(EIR), INREG(ESR), INREG(EMR));
+
+ ErrorF("instdone: %x instdone_1: %x\n", INREG(INST_DONE_I965), INREG(INST_DONE_1));
+ ErrorF("instpm: %x\n", INREG(INST_PM));
+
+ ErrorF("memmode: %lx instps: %lx\n", INREG(MEMMODE), INREG(INST_PS_I965));
+
+ ErrorF("HW Status mask (hwstam): %x\nIRQ enable (ier): %x imr: %x iir: %x\n",
+ INREG(HWSTAM), INREG(IER), INREG(IMR), INREG(IIR));
+
+ ErrorF("acthd: %lx dma_fadd_p: %lx\n", INREG(ACTHD), INREG(DMA_FADD_P));
+ ErrorF("ecoskpd: %lx excc: %lx\n", INREG(ECOSKPD), INREG(EXCC));
+
+ ErrorF("cache_mode: %x/%x\n", INREG(CACHE_MODE_0), INREG(CACHE_MODE_1));
+ ErrorF("mi_arb_state: %x\n", INREG(MI_ARB_STATE));
+
+ ErrorF("IA_VERTICES_COUNT_QW %x/%x\n", INREG(IA_VERTICES_COUNT_QW), INREG(IA_VERTICES_COUNT_QW+4));
+ ErrorF("IA_PRIMITIVES_COUNT_QW %x/%x\n", INREG(IA_PRIMITIVES_COUNT_QW), INREG(IA_PRIMITIVES_COUNT_QW+4));
+
+ ErrorF("VS_INVOCATION_COUNT_QW %x/%x\n", INREG(VS_INVOCATION_COUNT_QW), INREG(VS_INVOCATION_COUNT_QW+4));
+
+ ErrorF("GS_INVOCATION_COUNT_QW %x/%x\n", INREG(GS_INVOCATION_COUNT_QW), INREG(GS_INVOCATION_COUNT_QW+4));
+ ErrorF("GS_PRIMITIVES_COUNT_QW %x/%x\n", INREG(GS_PRIMITIVES_COUNT_QW), INREG(GS_PRIMITIVES_COUNT_QW+4));
+
+ ErrorF("CL_INVOCATION_COUNT_QW %x/%x\n", INREG(CL_INVOCATION_COUNT_QW), INREG(CL_INVOCATION_COUNT_QW+4));
+ ErrorF("CL_PRIMITIVES_COUNT_QW %x/%x\n", INREG(CL_PRIMITIVES_COUNT_QW), INREG(CL_PRIMITIVES_COUNT_QW+4));
+
+ ErrorF("PS_INVOCATION_COUNT_QW %x/%x\n", INREG(PS_INVOCATION_COUNT_QW), INREG(PS_INVOCATION_COUNT_QW+4));
+ ErrorF("PS_DEPTH_COUNT_QW %x/%x\n", INREG(PS_DEPTH_COUNT_QW), INREG(PS_DEPTH_COUNT_QW+4));
+
+ ErrorF("WIZ_CTL %x\n", INREG(WIZ_CTL));
+ ErrorF("TS_CTL %x TS_DEBUG_DATA %x\n", INREG(TS_CTL), INREG(TS_DEBUG_DATA));
+ ErrorF("TD_CTL %x / %x\n", INREG(TD_CTL), INREG(TD_CTL2));
+
+
+}
+
#ifdef I830DEBUG
static void
dump_DSPACNTR(ScrnInfoPtr pScrn)
@@ -4762,6 +4933,9 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn)
I830Ptr pI830 = I830PTR(pScrn);
CARD32 ctx_addr;
+ if (pI830->noAccel)
+ return;
+
ctx_addr = pI830->ContextMem.Start;
/* Align to a 2k boundry */
ctx_addr = ((ctx_addr + 2048 - 1) / 2048) * 2048;
@@ -4775,10 +4949,13 @@ IntelEmitInvarientState(ScrnInfoPtr pScrn)
ADVANCE_LP_RING();
}
- if (IS_I9XX(pI830))
- I915EmitInvarientState(pScrn);
- else
- I830EmitInvarientState(pScrn);
+ if (!IS_I965G(pI830))
+ {
+ if (IS_I9XX(pI830))
+ I915EmitInvarientState(pScrn);
+ else
+ I830EmitInvarientState(pScrn);
+ }
}
static Bool
@@ -5183,6 +5360,20 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
I830_dump_registers(pScrn);
#endif
+ if (IS_I965G(pI830)) {
+ /* turn off clock gating */
+#if 0
+ OUTREG(0x6204, 0x70804000);
+ OUTREG(0x6208, 0x00000001);
+#else
+ OUTREG(0x6204, 0x70000000);
+#endif
+ /* Enable DAP stateless accesses.
+ * Required for all i965 steppings.
+ */
+ OUTREG(SVG_WORK_CTL, 0x00000010);
+ }
+
pI830->starting = FALSE;
pI830->closing = FALSE;
pI830->suspended = FALSE;
@@ -5214,7 +5405,7 @@ I830BIOSScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
}
static void
-I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags)
+I830AdjustFrame(int scrnIndex, int x, int y, int flags)
{
ScrnInfoPtr pScrn;
I830Ptr pI830;
@@ -5225,7 +5416,7 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags)
pI830 = I830PTR(pScrn);
pVbe = pI830->pVbe;
- DPRINTF(PFX, "I830BIOSAdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",
+ DPRINTF(PFX, "I830AdjustFrame: y = %d (+ %d), x = %d (+ %d)\n",
x, pI830->xoffset, y, pI830->yoffset);
/* Sync the engine before adjust frame */
@@ -5248,16 +5439,36 @@ I830BIOSAdjustFrame(int scrnIndex, int x, int y, int flags)
if (pI830->Clone) {
if (!pI830->pipe == 0) {
- OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ if (!IS_I965G(pI830)) {
+ OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ } else {
+ OUTREG(DSPABASE, 0);
+ OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ }
} else {
- OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ if (!IS_I965G(pI830)) {
+ OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ } else {
+ OUTREG(DSPBBASE, 0);
+ OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ }
}
}
if (pI830->pipe == 0) {
- OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ if (!IS_I965G(pI830)) {
+ OUTREG(DSPABASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ } else {
+ OUTREG(DSPABASE, 0);
+ OUTREG(DSPASURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ }
} else {
- OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ if (!IS_I965G(pI830)) {
+ OUTREG(DSPBBASE, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ } else {
+ OUTREG(DSPBBASE, 0);
+ OUTREG(DSPBSURF, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ }
}
}
@@ -5332,6 +5543,8 @@ I830BIOSLeaveVT(int scrnIndex, int flags)
#ifdef XF86DRI
if (pI830->directRenderingOpen) {
DRILock(screenInfo.screens[pScrn->scrnIndex], 0);
+
+ I830DRISetVBlankInterrupt (pScrn, FALSE);
drmCtlUninstHandler(pI830->drmSubFD);
}
@@ -5653,12 +5866,21 @@ I830BIOSEnterVT(int scrnIndex, int flags)
#ifdef XF86DRI
if (pI830->directRenderingEnabled) {
if (!pI830->starting) {
+ ScreenPtr pScreen = pScrn->pScreen;
+ drmI830Sarea *sarea = (drmI830Sarea *) DRIGetSAREAPrivate(pScreen);
+ int i;
+
I830DRIResume(screenInfo.screens[scrnIndex]);
+ I830DRISetVBlankInterrupt (pScrn, TRUE);
I830RefreshRing(pScrn);
I830Sync(pScrn);
DO_RING_IDLE();
+ sarea->texAge++;
+ for(i = 0; i < I830_NR_TEX_REGIONS+1 ; i++)
+ sarea->texList[i].age = sarea->texAge;
+
DPRINTF(PFX, "calling dri unlock\n");
DRIUnlock(screenInfo.screens[pScrn->scrnIndex]);
}
@@ -5718,7 +5940,8 @@ I830BIOSSwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
* The extra WindowTable check detects a rotation at startup.
*/
if ( (!WindowTable[pScrn->scrnIndex] || pspix->devPrivate.ptr == NULL) &&
- !pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) ) {
+ !pI830->DGAactive && (pScrn->PointerMoved == I830PointerMoved) &&
+ !IS_I965G(pI830)) {
if (!I830Rotate(pScrn, mode))
ret = FALSE;
}
@@ -5754,7 +5977,7 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode)
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
I830Ptr pI830 = I830PTR(pScrn);
Bool on = xf86IsUnblank(mode);
- CARD32 temp, ctrl, base;
+ CARD32 temp, ctrl, base, surf;
DPRINTF(PFX, "I830BIOSSaveScreen: %d, on is %s\n", mode, BOOLTOSTRING(on));
@@ -5762,9 +5985,11 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode)
if (pI830->pipe == 0) {
ctrl = DSPACNTR;
base = DSPABASE;
+ surf = DSPASURF;
} else {
ctrl = DSPBCNTR;
base = DSPBADDR;
+ surf = DSPBSURF;
}
if (pI830->planeEnabled[pI830->pipe]) {
temp = INREG(ctrl);
@@ -5776,6 +6001,10 @@ I830BIOSSaveScreen(ScreenPtr pScreen, int mode)
/* Flush changes */
temp = INREG(base);
OUTREG(base, temp);
+ if (IS_I965G(pI830)) {
+ temp = INREG(surf);
+ OUTREG(surf, temp);
+ }
}
if (pI830->CursorInfoRec && !pI830->SWCursor && pI830->cursorOn) {
@@ -6240,16 +6469,23 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg)
offset = pI8301->FrontBuffer2.Start + ((pScrn->frameY0 * pI830->displayWidth + pScrn->frameX0) * pI830->cpp);
}
- if (pI830->pipe == 0)
- adjust = INREG(DSPABASE);
- else
- adjust = INREG(DSPBBASE);
+ if (IS_I965G(pI830)) {
+ if (pI830->pipe == 0)
+ adjust = INREG(DSPASURF);
+ else
+ adjust = INREG(DSPBSURF);
+ } else {
+ if (pI830->pipe == 0)
+ adjust = INREG(DSPABASE);
+ else
+ adjust = INREG(DSPBBASE);
+ }
if (adjust != offset) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Fixing display offsets.\n");
- I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0);
+ I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0);
}
}
@@ -6274,7 +6510,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg)
pI830->currentMode = NULL;
I830BIOSSwitchMode(pScrn->pScreen->myNum, pScrn->currentMode, 0);
- I830BIOSAdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0);
+ I830AdjustFrame(pScrn->pScreen->myNum, pScrn->frameX0, pScrn->frameY0, 0);
if (xf86IsEntityShared(pScrn->entityList[0])) {
ScrnInfoPtr pScrn2;
@@ -6293,7 +6529,7 @@ I830CheckDevicesTimer(OsTimerPtr timer, CARD32 now, pointer arg)
pI8302->currentMode = NULL;
I830BIOSSwitchMode(pScrn2->pScreen->myNum, pScrn2->currentMode, 0);
- I830BIOSAdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0);
+ I830AdjustFrame(pScrn2->pScreen->myNum, pScrn2->frameX0, pScrn2->frameY0, 0);
(*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, FALSE);
(*pScrn2->EnableDisableFBAccess) (pScrn2->pScreen->myNum, TRUE);
@@ -6342,7 +6578,7 @@ I830InitpScrn(ScrnInfoPtr pScrn)
pScrn->PreInit = I830BIOSPreInit;
pScrn->ScreenInit = I830BIOSScreenInit;
pScrn->SwitchMode = I830BIOSSwitchMode;
- pScrn->AdjustFrame = I830BIOSAdjustFrame;
+ pScrn->AdjustFrame = I830AdjustFrame;
pScrn->EnterVT = I830BIOSEnterVT;
pScrn->LeaveVT = I830BIOSLeaveVT;
pScrn->FreeScreen = I830BIOSFreeScreen;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 433aa47d..f4a6325c 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -498,7 +498,7 @@ I830AllocateRotatedBuffer(ScrnInfoPtr pScrn, int flags)
alloced = 0;
if (tileable) {
align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) {
+ for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem),
&(pI830->StolenPool), size, align,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
@@ -563,7 +563,7 @@ I830AllocateRotated2Buffer(ScrnInfoPtr pScrn, int flags)
alloced = 0;
if (tileable) {
align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) {
+ for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
alloced = I830AllocVidMem(pScrn, &(pI830->RotatedMem2),
&(pI830->StolenPool), size, align,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
@@ -731,7 +731,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
tileable = !(flags & ALLOC_NO_TILING) && pI8302->allowPageFlip &&
IsTileable(pI830Ent->pScrn_2->displayWidth * pI8302->cpp);
if (tileable) {
- align = KB(512);
+ if (IS_I9XX(pI830))
+ align = MB(1);
+ else
+ align = KB(512);
alignflags = ALIGN_BOTH_ENDS;
} else {
align = KB(64);
@@ -823,7 +826,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
IsTileable(pScrn->displayWidth * pI830->cpp);
if (tileable) {
- align = KB(512);
+ if (IS_I9XX(pI830))
+ align = MB(1);
+ else
+ align = KB(512);
alignflags = ALIGN_BOTH_ENDS;
} else {
align = KB(64);
@@ -909,7 +915,10 @@ I830Allocate2DMemory(ScrnInfoPtr pScrn, const int flags)
tileable = !(flags & ALLOC_NO_TILING) && pI830->allowPageFlip &&
IsTileable(pScrn->displayWidth * pI830->cpp);
if (tileable) {
- align = KB(512);
+ if (IS_I9XX(pI830))
+ align = MB(1);
+ else
+ align = KB(512);
alignflags = ALIGN_BOTH_ENDS;
} else {
align = KB(64);
@@ -1147,7 +1156,7 @@ I830AllocateBackBuffer(ScrnInfoPtr pScrn, const int flags)
alloced = 0;
if (tileable) {
align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) {
+ for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
alloced = I830AllocVidMem(pScrn, &(pI830->BackBuffer),
&(pI830->StolenPool), size, align,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
@@ -1210,7 +1219,7 @@ I830AllocateDepthBuffer(ScrnInfoPtr pScrn, const int flags)
alloced = 0;
if (tileable) {
align = GetBestTileAlignment(size);
- for (align = GetBestTileAlignment(size); align >= KB(512); align >>= 1) {
+ for (align = GetBestTileAlignment(size); align >= (IS_I9XX(pI830) ? MB(1) : KB(512)); align >>= 1) {
alloced = I830AllocVidMem(pScrn, &(pI830->DepthBuffer),
&(pI830->StolenPool), size, align,
flags | FROM_ANYWHERE | ALLOCATE_AT_TOP |
@@ -1644,7 +1653,7 @@ SetFence(ScrnInfoPtr pScrn, int nr, unsigned int start, unsigned int pitch,
}
static Bool
-MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem)
+MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem, unsigned int fence)
{
I830Ptr pI830 = I830PTR(pScrn);
int pitch, ntiles, i;
@@ -1662,6 +1671,31 @@ MakeTiles(ScrnInfoPtr pScrn, I830MemRange *pMem)
}
pitch = pScrn->displayWidth * pI830->cpp;
+
+ if (IS_I965G(pI830)) {
+ I830RegPtr i830Reg = &pI830->ModeReg;
+
+ switch (fence) {
+ case FENCE_XMAJOR:
+ i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1;
+ break;
+ case FENCE_YMAJOR:
+ /* YMajor can be 128B aligned but the current code dictates
+ * otherwise. This isn't a problem apart from memory waste.
+ * FIXME */
+ i830Reg->Fence[nextTile] = (((pitch / 128) - 1) << 2) | pMem->Start | 1;
+ i830Reg->Fence[nextTile] |= (1<<1);
+ break;
+ default:
+ case FENCE_LINEAR:
+ break;
+ }
+
+ i830Reg->Fence[nextTile+FENCE_NEW_NR] = pMem->End;
+ nextTile++;
+ return TRUE;
+ }
+
/*
* Simply try to break the region up into at most four pieces of size
* equal to the alignment.
@@ -1703,20 +1737,27 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
return;
}
+ pI830->front_tiled = FENCE_LINEAR;
+ pI830->back_tiled = FENCE_LINEAR;
+ pI830->depth_tiled = FENCE_LINEAR;
+ pI830->rotated_tiled = FENCE_LINEAR;
+ pI830->rotated2_tiled = FENCE_LINEAR;
+
if (pI830->allowPageFlip) {
if (pI830->allowPageFlip && pI830->FrontBuffer.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->FrontBuffer))) {
+ if (MakeTiles(pScrn, &(pI830->FrontBuffer), FENCE_XMAJOR)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Activating tiled memory for the FRONT buffer\n");
+ "Activating tiled memory for the front buffer\n");
+ pI830->front_tiled = FENCE_XMAJOR;
} else {
pI830->allowPageFlip = FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "MakeTiles failed for the FRONT buffer\n");
+ "MakeTiles failed for the front buffer\n");
}
} else {
pI830->allowPageFlip = FALSE;
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Alignment bad for the FRONT buffer\n");
+ "Alignment bad for the front buffer\n");
}
}
@@ -1727,9 +1768,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
* value.
*/
if (pI830->BackBuffer.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->BackBuffer))) {
+ if (MakeTiles(pScrn, &(pI830->BackBuffer), FENCE_XMAJOR)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Activating tiled memory for the back buffer.\n");
+ pI830->back_tiled = FENCE_XMAJOR;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"MakeTiles failed for the back buffer.\n");
@@ -1738,9 +1780,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
}
if (pI830->DepthBuffer.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->DepthBuffer))) {
+ if (MakeTiles(pScrn, &(pI830->DepthBuffer), FENCE_YMAJOR)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Activating tiled memory for the depth buffer.\n");
+ "Activating tiled memory for the depth buffer.\n");
+ pI830->depth_tiled = FENCE_YMAJOR;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"MakeTiles failed for the depth buffer.\n");
@@ -1748,9 +1791,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
}
if (pI830->RotatedMem.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->RotatedMem))) {
+ if (MakeTiles(pScrn, &(pI830->RotatedMem), FENCE_XMAJOR)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Activating tiled memory for the rotated buffer.\n");
+ pI830->rotated_tiled = FENCE_XMAJOR;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"MakeTiles failed for the rotated buffer.\n");
@@ -1759,9 +1803,10 @@ I830SetupMemoryTiling(ScrnInfoPtr pScrn)
#if 0
if (pI830->RotatedMem2.Alignment >= KB(512)) {
- if (MakeTiles(pScrn, &(pI830->RotatedMem2))) {
+ if (MakeTiles(pScrn, &(pI830->RotatedMem2), FENCE_XMAJOR)) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"Activating tiled memory for the rotated2 buffer.\n");
+ pI830->rotated2_tiled = FENCE_XMAJOR;
} else {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"MakeTiles failed for the rotated buffer.\n");
diff --git a/src/i830_video.c b/src/i830_video.c
index a608a7e3..300930d3 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -157,7 +157,10 @@ Edummy(const char *dummy, ...)
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
} \
- OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
+ if (IS_I965G(pI830)) \
+ OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
+ else \
+ OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
ADVANCE_LP_RING(); \
ErrorF("OVERLAY_UPDATE\n"); \
} while(0)
@@ -172,11 +175,17 @@ Edummy(const char *dummy, ...)
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_CONTINUE); \
- OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
+ if (IS_I965G(pI830)) \
+ OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
+ else \
+ OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
OUT_RING(MI_OVERLAY_FLIP | MI_OVERLAY_FLIP_OFF); \
- OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
+ if (IS_I965G(pI830)) \
+ OUT_RING(pI830->OverlayMem->Start | OFC_UPDATE); \
+ else \
+ OUT_RING(pI830->OverlayMem->Physical | OFC_UPDATE); \
OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_OVERLAY_FLIP); \
OUT_RING(MI_NOOP); \
ADVANCE_LP_RING(); \
@@ -334,18 +343,18 @@ typedef struct {
CARD32 OCONFIG;
CARD32 OCMD;
CARD32 RESERVED1; /* 0x6C */
- CARD32 AWINPOS;
- CARD32 AWINSZ;
- CARD32 RESERVED2; /* 0x78 */
- CARD32 RESERVED3; /* 0x7C */
- CARD32 RESERVED4; /* 0x80 */
- CARD32 RESERVED5; /* 0x84 */
- CARD32 RESERVED6; /* 0x88 */
- CARD32 RESERVED7; /* 0x8C */
- CARD32 RESERVED8; /* 0x90 */
- CARD32 RESERVED9; /* 0x94 */
- CARD32 RESERVEDA; /* 0x98 */
- CARD32 RESERVEDB; /* 0x9C */
+ CARD32 OSTART_0Y; /* for i965 */
+ CARD32 OSTART_1Y; /* for i965 */
+ CARD32 OSTART_0U;
+ CARD32 OSTART_0V;
+ CARD32 OSTART_1U;
+ CARD32 OSTART_1V;
+ CARD32 OTILEOFF_0Y;
+ CARD32 OTILEOFF_1Y;
+ CARD32 OTILEOFF_0U;
+ CARD32 OTILEOFF_0V;
+ CARD32 OTILEOFF_1U;
+ CARD32 OTILEOFF_1V;
CARD32 FASTHSCALE; /* 0xA0 */
CARD32 UVSCALEV; /* 0xA4 */
@@ -501,8 +510,10 @@ I830ResetVideo(ScrnInfoPtr pScrn)
overlay->SHEIGHT = 0;
overlay->OCLRC0 = (pPriv->contrast << 18) | (pPriv->brightness & 0xff);
overlay->OCLRC1 = 0x00000080; /* saturation: bypass */
+#if 0
overlay->AWINPOS = 0;
overlay->AWINSZ = 0;
+#endif
overlay->FASTHSCALE = 0;
/*
@@ -1647,14 +1658,31 @@ I830DisplayVideo(ScrnInfoPtr pScrn, int id, short width, short height,
dstBox->x2, dstBox->y2);
/* buffer locations */
- overlay->OBUF_0Y = pPriv->YBuf0offset;
- overlay->OBUF_0U = pPriv->UBuf0offset;
- overlay->OBUF_0V = pPriv->VBuf0offset;
-
- if(pPriv->doubleBuffer) {
- overlay->OBUF_1Y = pPriv->YBuf1offset;
- overlay->OBUF_1U = pPriv->UBuf1offset;
- overlay->OBUF_1V = pPriv->VBuf1offset;
+ if (IS_I965G(pI830))
+ {
+ overlay->OBUF_0Y = 0;
+ overlay->OBUF_0U = 0;
+ overlay->OBUF_0V = 0;
+ overlay->OSTART_0Y = pPriv->YBuf0offset;
+ overlay->OSTART_0U = pPriv->UBuf0offset;
+ overlay->OSTART_0V = pPriv->VBuf0offset;
+ if(pPriv->doubleBuffer) {
+ overlay->OBUF_1Y = 0;
+ overlay->OBUF_1U = 0;
+ overlay->OBUF_1V = 0;
+ overlay->OSTART_1Y = pPriv->YBuf1offset;
+ overlay->OSTART_1U = pPriv->UBuf1offset;
+ overlay->OSTART_1V = pPriv->VBuf1offset;
+ }
+ } else {
+ overlay->OBUF_0Y = pPriv->YBuf0offset;
+ overlay->OBUF_0U = pPriv->UBuf0offset;
+ overlay->OBUF_0V = pPriv->VBuf0offset;
+ if(pPriv->doubleBuffer) {
+ overlay->OBUF_1Y = pPriv->YBuf1offset;
+ overlay->OBUF_1U = pPriv->UBuf1offset;
+ overlay->OBUF_1V = pPriv->VBuf1offset;
+ }
}
ErrorF("Buffers: Y0: 0x%lx, U0: 0x%lx, V0: 0x%lx\n", overlay->OBUF_0Y,
@@ -1967,10 +1995,10 @@ I830PutImage(ScrnInfoPtr pScrn,
}
#else
if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
- dstPitch = ((height / 2) + 511) & ~511;
+ dstPitch = ((height / 2) + 255) & ~255;
size = dstPitch * width * 3;
} else {
- dstPitch = ((width / 2) + 511) & ~511; /* of chroma */
+ dstPitch = ((width / 2) + 255) & ~255; /* of chroma */
size = dstPitch * height * 3;
}
#endif
@@ -1989,10 +2017,10 @@ I830PutImage(ScrnInfoPtr pScrn,
}
#else
if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
- dstPitch = ((height << 1) + 511) & ~511;
+ dstPitch = ((height << 1) + 255) & ~255;
size = dstPitch * width;
} else {
- dstPitch = ((width << 1) + 511) & ~511; /* of chroma */
+ dstPitch = ((width << 1) + 255) & ~255; /* of chroma */
size = dstPitch * height;
}
#endif
@@ -2526,27 +2554,29 @@ I830VideoSwitchModeAfter(ScrnInfoPtr pScrn, DisplayModePtr mode)
}
}
- if (pPriv->pipe == 0) {
- if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Disabling XVideo output because Pipe A is in double-wide mode.\n");
- pPriv->overlayOK = FALSE;
- } else if (!pPriv->overlayOK) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n");
- pPriv->overlayOK = TRUE;
+ if (!IS_I965G(pI830)) {
+ if (pPriv->pipe == 0) {
+ if (INREG(PIPEACONF) & PIPEACONF_DOUBLE_WIDE) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Disabling XVideo output because Pipe A is in double-wide mode.\n");
+ pPriv->overlayOK = FALSE;
+ } else if (!pPriv->overlayOK) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Re-enabling XVideo output because Pipe A is now in single-wide mode.\n");
+ pPriv->overlayOK = TRUE;
+ }
}
- }
- if (pPriv->pipe == 1) {
- if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Disabling XVideo output because Pipe B is in double-wide mode.\n");
- pPriv->overlayOK = FALSE;
- } else if (!pPriv->overlayOK) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n");
- pPriv->overlayOK = TRUE;
+ if (pPriv->pipe == 1) {
+ if (INREG(PIPEBCONF) & PIPEBCONF_DOUBLE_WIDE) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Disabling XVideo output because Pipe B is in double-wide mode.\n");
+ pPriv->overlayOK = FALSE;
+ } else if (!pPriv->overlayOK) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Re-enabling XVideo output because Pipe B is now in single-wide mode.\n");
+ pPriv->overlayOK = TRUE;
+ }
}
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-25 11:49:45 +0000