diff options
| -rw-r--r-- | src/common.h | 26 | ||||
| -rw-r--r-- | src/i810_driver.c | 1 | ||||
| -rw-r--r-- | src/i830_uxa.c | 12 | ||||
| -rw-r--r-- | src/i965_render.c | 6 |
4 files changed, 43 insertions, 2 deletions
diff --git a/src/common.h b/src/common.h index 3169cdfa..fc51cdef 100644 --- a/src/common.h +++ b/src/common.h @@ -325,6 +325,11 @@ extern int I810_DEBUG; #define PCI_CHIP_IGDNG_M_G_BRIDGE 0x0044 #endif +#ifndef PCI_CHIP_SANDYBRIDGE +#define PCI_CHIP_SANDYBRIDGE 0x0102 +#define PCI_CHIP_SANDYBRIDGE_BRIDGE 0x0100 +#endif + #define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr #define VENDOR_ID(p) (p)->vendor_id #define DEVICE_ID(p) (p)->device_id @@ -357,14 +362,31 @@ extern int I810_DEBUG; #define IS_IGDNG_D(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGDNG_D_G) #define IS_IGDNG_M(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGDNG_M_G) #define IS_IGDNG(pI810) (IS_IGDNG_D(pI810) || IS_IGDNG_M(pI810)) -#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || IS_G4X(pI810) || IS_IGDNG(pI810)) +#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G35_G || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME || \ + IS_G4X(pI810) || \ + IS_IGDNG(pI810) || \ + IS_GEN6(pI810)) #define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G || \ IS_IGD(pI810)) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810)) + +#define IS_I9XX(pI810) (IS_I915G(pI810) || \ + IS_I915GM(pI810) || \ + IS_I945G(pI810) || \ + IS_I945GM(pI810) || \ + IS_I965G(pI810) || \ + IS_G33CLASS(pI810)) + #define IS_I915(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_G33CLASS(pI810)) +#define IS_GEN6(pI810) ((pI810)->PciInfo->device_id == PCI_CHIP_SANDYBRIDGE) + #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_GM45(pI810) || IS_IGD(pI810) || IS_IGDNG_M(pI810)) /* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */ #define SUPPORTS_YTILING(pI810) (IS_I965G(intel)) diff --git a/src/i810_driver.c b/src/i810_driver.c index 3bec0929..ba1ded73 100644 --- a/src/i810_driver.c +++ b/src/i810_driver.c @@ -140,6 +140,7 @@ static const struct pci_id_match intel_device_match[] = { INTEL_DEVICE_MATCH (PCI_CHIP_B43_G, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_IGDNG_D_G, 0 ), INTEL_DEVICE_MATCH (PCI_CHIP_IGDNG_M_G, 0 ), + INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE, 0 ), { 0, 0, 0 }, }; diff --git a/src/i830_uxa.c b/src/i830_uxa.c index f489f4f0..50835db5 100644 --- a/src/i830_uxa.c +++ b/src/i830_uxa.c @@ -194,6 +194,12 @@ i830_uxa_prepare_solid(PixmapPtr pixmap, int alu, Pixel planemask, Pixel fg) i830_get_pixmap_bo(pixmap), }; + if (IS_GEN6(intel)) { + intel_debug_fallback(scrn, + "Sandybridge BLT engine not supported\n"); + return FALSE; + } + if (!UXA_PM_IS_SOLID(&pixmap->drawable, planemask)) { intel_debug_fallback(scrn, "planemask is not solid\n"); return FALSE; @@ -296,6 +302,12 @@ i830_uxa_prepare_copy(PixmapPtr source, PixmapPtr dest, int xdir, i830_get_pixmap_bo(dest), }; + if (IS_GEN6(intel)) { + intel_debug_fallback(scrn, + "Sandybridge BLT engine not supported\n"); + return FALSE; + } + if (!UXA_PM_IS_SOLID(&source->drawable, planemask)) { intel_debug_fallback(scrn, "planemask is not solid"); return FALSE; diff --git a/src/i965_render.c b/src/i965_render.c index 7866dd75..36235499 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -236,8 +236,14 @@ i965_check_composite(int op, PicturePtr source_picture, PicturePtr mask_picture, PicturePtr dest_picture) { ScrnInfoPtr scrn = xf86Screens[dest_picture->pDrawable->pScreen->myNum]; + intel_screen_private *intel = intel_get_screen_private(scrn); uint32_t tmp1; + if (IS_GEN6(intel)) { + intel_debug_fallback(scrn, "Unsupported hardware\n"); + return FALSE; + } + /* Check for unsupported compositing operations. */ if (op >= sizeof(i965_blend_op) / sizeof(i965_blend_op[0])) { intel_debug_fallback(scrn, |