diff options
| -rw-r--r-- | src/common.h | 59 |
1 files changed, 39 insertions, 20 deletions
diff --git a/src/common.h b/src/common.h index fa96a5d0..cfe00fc7 100644 --- a/src/common.h +++ b/src/common.h @@ -384,26 +384,42 @@ extern int I810_DEBUG; #define PCI_CHIP_Q33_G_BRIDGE 0x29D0 #endif -#define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ - pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ - pI810->PciInfo->chipType == PCI_CHIP_I810_E) -#define IS_I815(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I815) -#define IS_I830(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I830_M) -#define IS_845G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_845_G) -#define IS_I85X(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM) -#define IS_I852(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME)) -#define IS_I855(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME)) -#define IS_I865G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I865_G) - -#define IS_I915G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_G || pI810->PciInfo->chipType == PCI_CHIP_E7221_G) -#define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM) -#define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G) -#define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM || pI810->PciInfo->chipType == PCI_CHIP_I945_GME) -#define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) -#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) -#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G ||\ - pI810->PciInfo->chipType == PCI_CHIP_Q35_G ||\ - pI810->PciInfo->chipType == PCI_CHIP_Q33_G) +#if XSERVER_LIBPCIACCESS +#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr +#define VENDOR_ID(p) (p)->vendor_id +#define DEVICE_ID(p) (p)->device_id +#define SUBVENDOR_ID(p) (p)->subvendor_id +#define SUBSYS_ID(p) (p)->subdevice_id +#define CHIP_REVISION(p) (p)->revision +#else +#define I810_MEMBASE(p,n) (p)->memBase[n] +#define VENDOR_ID(p) (p)->vendor +#define DEVICE_ID(p) (p)->chipType +#define SUBVENDOR_ID(p) (p)->subsysVendor +#define SUBSYS_ID(p) (p)->subsysCard +#define CHIP_REVISION(p) (p)->chipRev +#endif + +#define IS_I810(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810 || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_DC100 || \ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_E) +#define IS_I815(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I815) +#define IS_I830(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I830_M) +#define IS_845G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_845_G) +#define IS_I85X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM) +#define IS_I852(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME)) +#define IS_I855(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME)) +#define IS_I865G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I865_G) + +#define IS_I915G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_E7221_G) +#define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM) +#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G) +#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME) +#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME) +#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G_1 || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME) +#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\ + DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G) #define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810)) @@ -428,4 +444,7 @@ extern int I810_DEBUG; #define PIPE_NAME(n) ('A' + (n)) +struct pci_device * +intel_host_bridge (void); + #endif /* _INTEL_COMMON_H_ */ |