diff options
Diffstat (limited to 'src/i830.h')
| -rw-r--r-- | src/i830.h | 75 |
1 files changed, 62 insertions, 13 deletions
@@ -78,6 +78,16 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * Paulo César Pereira de Andrade <pcpa@conectiva.com.br>. */ +#define PIPE_NONE 0<<0 +#define PIPE_CRT 1<<0 +#define PIPE_TV 1<<1 +#define PIPE_DFP 1<<2 +#define PIPE_LFP 1<<3 +#define PIPE_CRT2 1<<4 +#define PIPE_TV2 1<<5 +#define PIPE_DFP2 1<<6 +#define PIPE_LFP2 1<<7 + typedef struct _VESARec { /* SVGA state */ pointer state, pstate; @@ -87,6 +97,8 @@ typedef struct _VESARec { xf86MonPtr monitor; /* Don't try to set the refresh rate for any modes. */ Bool useDefaultRefresh; + /* display start */ + int x, y; } VESARec, *VESAPtr; @@ -133,13 +145,38 @@ typedef struct { unsigned int Fence[8]; } I830RegRec, *I830RegPtr; +typedef struct { + int lastInstance; + int refCount; + ScrnInfoPtr pScrn_1; + ScrnInfoPtr pScrn_2; + int RingRunning; +#ifdef I830_XV + int XvInUse; +#endif +} I830EntRec, *I830EntPtr; + typedef struct _I830Rec { unsigned char *MMIOBase; unsigned char *FbBase; int cpp; + unsigned int bios_version; + + Bool newPipeSwitch; + + Bool Clone; + int CloneRefresh; + int CloneHDisplay; + int CloneVDisplay; + + I830EntPtr entityPrivate; + int pipe; + int init; + unsigned int bufferOffset; /* for I830SelectBuffer */ BoxRec FbMemBox; + BoxRec FbMemBox2; int CacheLines; /* These are set in PreInit and never changed. */ @@ -156,10 +193,16 @@ typedef struct _I830Rec { unsigned long allocatedMemory; /* Regions allocated either from the above pools, or from agpgart. */ + /* for single and dual head configurations */ I830MemRange FrontBuffer; - I830MemRange CursorMem; - I830RingBuffer LpRing; + I830MemRange FrontBuffer2; I830MemRange Scratch; + I830MemRange Scratch2; + + /* Regions allocated either from the above pools, or from agpgart. */ + I830MemRange *CursorMem; + I830MemRange *CursorMemARGB; + I830RingBuffer *LpRing; #if REMAP_RESERVED I830MemRange Dummy; @@ -167,14 +210,13 @@ typedef struct _I830Rec { #ifdef I830_XV /* For Xvideo */ - I830MemRange OverlayMem; + I830MemRange *OverlayMem; #endif #ifdef XF86DRI I830MemRange BackBuffer; I830MemRange DepthBuffer; I830MemRange TexMem; - I830MemRange BufferMem; I830MemRange ContextMem; int TexGranularity; int drmMinor; @@ -185,10 +227,13 @@ typedef struct _I830Rec { Bool allowPageFlip; Bool disableTiling; - int auxPitch; - int auxPitchBits; + int backPitch; Bool CursorNeedsPhysical; + Bool CursorIsARGB; + + int MonType1; + int MonType2; DGAModePtr DGAModes; int numDGAModes; @@ -221,7 +266,6 @@ typedef struct _I830Rec { XAAInfoRecPtr AccelInfoRec; xf86CursorInfoPtr CursorInfoRec; CloseScreenProcPtr CloseScreen; - ScreenBlockHandlerProcPtr BlockHandler; I830WriteIndexedByteFunc writeControl; I830ReadIndexedByteFunc readControl; @@ -234,7 +278,8 @@ typedef struct _I830Rec { #ifdef I830_XV int colorKey; XF86VideoAdaptorPtr adaptor; - Bool overlayOn; + ScreenBlockHandlerProcPtr BlockHandler; + Bool *overlayOn; #endif Bool directRenderingDisabled; /* DRI disabled in PreInit. */ @@ -272,12 +317,13 @@ typedef struct _I830Rec { CARD32 saveSWF0; CARD32 saveSWF4; - /* Use BIOS call 0x5f64 to explicitly enable displays. */ - Bool enableDisplays; /* Use BIOS call 0x5f05 to set the refresh rate. */ Bool useExtendedRefresh; - int configuredDevices; + Bool checkLid; + int monitorSwitch; + int operatingDevices; + int savedDevices; /* These are indexed by the display types */ Bool displayAttached[NumDisplayTypes]; @@ -293,6 +339,7 @@ typedef struct _I830Rec { int planeEnabled[MAX_DISPLAY_PIPES]; /* Driver phase/state information */ + Bool preinit; Bool starting; Bool closing; Bool suspended; @@ -304,6 +351,9 @@ typedef struct _I830Rec { int SaveGeneration; Bool vbeRestoreWorkaround; Bool displayInfo; + Bool devicePresence; + + OsTimerPtr lidTimer; } I830Rec; #define I830PTR(p) ((I830Ptr)((p)->driverPrivate)) @@ -401,8 +451,7 @@ extern void I830ChangeFrontbuffer(ScrnInfoPtr pScrn,int buffer); #define ALLOCATE_DRY_RUN 0x80000000 /* Chipset registers for VIDEO BIOS memory RW access */ -#define _855_DRAM_RW_CONTROL 0x58 -#define _845_DRAM_RW_CONTROL 0x90 +#define DRAM_RW_CONTROL 0x58 #define DRAM_WRITE 0x33330000 #endif /* _I830_H_ */ |