diff options
Diffstat (limited to 'src/intel_module.c')
| -rw-r--r-- | src/intel_module.c | 107 |
1 files changed, 59 insertions, 48 deletions
diff --git a/src/intel_module.c b/src/intel_module.c index df8ae146..875ba443 100644 --- a/src/intel_module.c +++ b/src/intel_module.c @@ -72,55 +72,59 @@ static const struct intel_device_info intel_sandybridge_info = { .gen = 60, }; +static const struct intel_device_info intel_ivybridge_info = { + .gen = 70, +}; + static const SymTabRec _intel_chipsets[] = { - {PCI_CHIP_I810, "i810"}, - {PCI_CHIP_I810_DC100, "i810-dc100"}, - {PCI_CHIP_I810_E, "i810e"}, - {PCI_CHIP_I815, "i815"}, - {PCI_CHIP_I830_M, "i830M"}, - {PCI_CHIP_845_G, "845G"}, - {PCI_CHIP_I854, "854"}, - {PCI_CHIP_I855_GM, "852GM/855GM"}, - {PCI_CHIP_I865_G, "865G"}, - {PCI_CHIP_I915_G, "915G"}, - {PCI_CHIP_E7221_G, "E7221 (i915)"}, - {PCI_CHIP_I915_GM, "915GM"}, - {PCI_CHIP_I945_G, "945G"}, - {PCI_CHIP_I945_GM, "945GM"}, - {PCI_CHIP_I945_GME, "945GME"}, - {PCI_CHIP_PINEVIEW_M, "Pineview GM"}, - {PCI_CHIP_PINEVIEW_G, "Pineview G"}, - {PCI_CHIP_I965_G, "965G"}, - {PCI_CHIP_G35_G, "G35"}, - {PCI_CHIP_I965_Q, "965Q"}, - {PCI_CHIP_I946_GZ, "946GZ"}, - {PCI_CHIP_I965_GM, "965GM"}, - {PCI_CHIP_I965_GME, "965GME/GLE"}, - {PCI_CHIP_G33_G, "G33"}, - {PCI_CHIP_Q35_G, "Q35"}, - {PCI_CHIP_Q33_G, "Q33"}, - {PCI_CHIP_GM45_GM, "GM45"}, - {PCI_CHIP_G45_E_G, "4 Series"}, - {PCI_CHIP_G45_G, "G45/G43"}, - {PCI_CHIP_Q45_G, "Q45/Q43"}, - {PCI_CHIP_G41_G, "G41"}, - {PCI_CHIP_B43_G, "B43"}, - {PCI_CHIP_B43_G1, "B43"}, - {PCI_CHIP_IRONLAKE_D_G, "Clarkdale"}, - {PCI_CHIP_IRONLAKE_M_G, "Arrandale"}, - {PCI_CHIP_SANDYBRIDGE_GT1, "Sandybridge Desktop (GT1)" }, - {PCI_CHIP_SANDYBRIDGE_GT2, "Sandybridge Desktop (GT2)" }, - {PCI_CHIP_SANDYBRIDGE_GT2_PLUS, "Sandybridge Desktop (GT2+)" }, - {PCI_CHIP_SANDYBRIDGE_M_GT1, "Sandybridge Mobile (GT1)" }, - {PCI_CHIP_SANDYBRIDGE_M_GT2, "Sandybridge Mobile (GT2)" }, - {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, "Sandybridge Mobile (GT2+)" }, - {PCI_CHIP_SANDYBRIDGE_S_GT, "Sandybridge Server" }, - {PCI_CHIP_IVYBRIDGE_M_GT1, "Ivybridge Mobile (GT1)" }, - {PCI_CHIP_IVYBRIDGE_M_GT2, "Ivybridge Mobile (GT2)" }, - {PCI_CHIP_IVYBRIDGE_D_GT1, "Ivybridge Desktop (GT1)" }, - {PCI_CHIP_IVYBRIDGE_D_GT2, "Ivybridge Desktop (GT2)" }, - {PCI_CHIP_IVYBRIDGE_S_GT1, "Ivybridge Server" }, - {-1, NULL} + {PCI_CHIP_I810, "i810"}, + {PCI_CHIP_I810_DC100, "i810-dc100"}, + {PCI_CHIP_I810_E, "i810e"}, + {PCI_CHIP_I815, "i815"}, + {PCI_CHIP_I830_M, "i830M"}, + {PCI_CHIP_845_G, "845G"}, + {PCI_CHIP_I854, "854"}, + {PCI_CHIP_I855_GM, "852GM/855GM"}, + {PCI_CHIP_I865_G, "865G"}, + {PCI_CHIP_I915_G, "915G"}, + {PCI_CHIP_E7221_G, "E7221 (i915)"}, + {PCI_CHIP_I915_GM, "915GM"}, + {PCI_CHIP_I945_G, "945G"}, + {PCI_CHIP_I945_GM, "945GM"}, + {PCI_CHIP_I945_GME, "945GME"}, + {PCI_CHIP_PINEVIEW_M, "Pineview GM"}, + {PCI_CHIP_PINEVIEW_G, "Pineview G"}, + {PCI_CHIP_I965_G, "965G"}, + {PCI_CHIP_G35_G, "G35"}, + {PCI_CHIP_I965_Q, "965Q"}, + {PCI_CHIP_I946_GZ, "946GZ"}, + {PCI_CHIP_I965_GM, "965GM"}, + {PCI_CHIP_I965_GME, "965GME/GLE"}, + {PCI_CHIP_G33_G, "G33"}, + {PCI_CHIP_Q35_G, "Q35"}, + {PCI_CHIP_Q33_G, "Q33"}, + {PCI_CHIP_GM45_GM, "GM45"}, + {PCI_CHIP_G45_E_G, "4 Series"}, + {PCI_CHIP_G45_G, "G45/G43"}, + {PCI_CHIP_Q45_G, "Q45/Q43"}, + {PCI_CHIP_G41_G, "G41"}, + {PCI_CHIP_B43_G, "B43"}, + {PCI_CHIP_B43_G1, "B43"}, + {PCI_CHIP_IRONLAKE_D_G, "Clarkdale"}, + {PCI_CHIP_IRONLAKE_M_G, "Arrandale"}, + {PCI_CHIP_SANDYBRIDGE_GT1, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_GT2, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_GT2_PLUS, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_M_GT1, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_M_GT2, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, "Sandybridge" }, + {PCI_CHIP_SANDYBRIDGE_S_GT, "Sandybridge" }, + {PCI_CHIP_IVYBRIDGE_M_GT1, "Ivybridge Mobile GT1" }, + {PCI_CHIP_IVYBRIDGE_M_GT2, "Ivybridge Mobile GT2" }, + {PCI_CHIP_IVYBRIDGE_D_GT1, "Ivybridge Desktop GT1" }, + {PCI_CHIP_IVYBRIDGE_D_GT2, "Ivybridge Desktop GT2" }, + {PCI_CHIP_IVYBRIDGE_S_GT1, "Ivybridge Server GT1" }, + {-1, NULL} }; SymTabRec *intel_chipsets = (SymTabRec *) _intel_chipsets; @@ -177,6 +181,13 @@ static const struct pci_id_match intel_device_match[] = { INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS, &intel_sandybridge_info ), INTEL_DEVICE_MATCH (PCI_CHIP_SANDYBRIDGE_S_GT, &intel_sandybridge_info ), + + INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT1, &intel_ivybridge_info ), + INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_M_GT2, &intel_ivybridge_info ), + INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT1, &intel_ivybridge_info ), + INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_D_GT2, &intel_ivybridge_info ), + INTEL_DEVICE_MATCH (PCI_CHIP_IVYBRIDGE_S_GT1, &intel_ivybridge_info ), + { 0, 0, 0 }, }; |