diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/Makefile.am | 2 | ||||
| -rw-r--r-- | src/exa_wm_yuv_rgb.g4a | 102 | ||||
| -rw-r--r-- | src/exa_wm_yuv_rgb.g4b | 20 | ||||
| -rw-r--r-- | src/i965_video.c | 8 |
4 files changed, 130 insertions, 2 deletions
diff --git a/src/Makefile.am b/src/Makefile.am index 9b5d653a..f50d1d4c 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -135,6 +135,7 @@ INTEL_G4A = \ exa_wm_src_projective.g4a \ exa_wm_src_sample_argb.g4a \ exa_wm_src_sample_a.g4a \ + exa_wm_src_data.g4a \ exa_wm_mask_affine.g4a \ exa_wm_mask_projective.g4a \ exa_wm_mask_sample_argb.g4a \ @@ -160,6 +161,7 @@ INTEL_G4B = \ exa_wm_src_projective.g4b \ exa_wm_src_sample_argb.g4b \ exa_wm_src_sample_a.g4b \ + exa_wm_src_data.g4b \ exa_wm_mask_affine.g4b \ exa_wm_mask_projective.g4b \ exa_wm_mask_sample_argb.g4b \ diff --git a/src/exa_wm_yuv_rgb.g4a b/src/exa_wm_yuv_rgb.g4a new file mode 100644 index 00000000..0c7525d1 --- /dev/null +++ b/src/exa_wm_yuv_rgb.g4a @@ -0,0 +1,102 @@ +/* + * Copyright © 2006 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Keith Packard <keithp@keithp.com> + * Eric Anholt <eric@anholt.net> + * + */ + +include(`exa_wm.g4i') + +define(`YCbCr_base', `src_sample_base') + +define(`Cr', `src_sample_r') +define(`Cr_01', `src_sample_r_01') +define(`Cr_23', `src_sample_r_23') + +define(`Y', `src_sample_g') +define(`Y_01', `src_sample_g_01') +define(`Y_23', `src_sample_g_23') + +define(`Cb', `src_sample_b') +define(`Cb_01', `src_sample_b_01') +define(`Cb_23', `src_sample_b_23') + + /* color space conversion function: + * R = Clamp ( 1.164(Y-16/255) + 1.596(Cr-128/255), 0, 1) + * G = Clamp ( 1.164(Y-16/255) - 0.813(Cr-128/255) - 0.392(Cb-128/255), 0, 1) + * B = Clamp ( 1.164(Y-16/255) + 2.017(Cb-128/255), 0, 1) + * + * Y is g14, g15. + * Cr is g12, g13. + * Cb is g16, g17. + * + * R is g2, g6. + * G is g3, g7. + * B is g4, g8. + */ + + /* Normalize Y, Cb and Cr: + * + * Y = (Y - 16/255) * 1.164 + * Cr = Cr - 128 / 255 + * Cb = Cb - 128 / 255 + */ +add (16) Y<1>F Y<8,8,1>F -0.0627451F { compr align1 }; +mul (16) Y<1>F Y<8,8,1>F 1.164F { compr align1 }; + +add (16) Cr<1>F Cr<8,8,1>F -0.501961F { compr align1 }; + +add (16) Cb<1>F Cb<8,8,1>F -0.501961F { compr align1 }; + + /* + * R = Y + Cr * 1.596 + */ +mul (8) null Cr_01<8,8,1>F 1.596F { align1 }; +mac.sat (8) data_port_r_01<1>F Y_01<8,8,1>F 1F { align1 }; +mul (8) null Cr_23<8,8,1>F 1.596F { align1 }; +mac.sat (8) data_port_r_23<1>F Y_23<8,8,1>F 1F { align1 }; + + /* + * G = Cr * -0.813 + Cb * -0.392 + Y + */ +mul (8) null Cr_01<8,8,1>F -0.813F { align1 }; +mac (8) null Cb_01<8,8,1>F -0.392F { align1 }; +mac.sat (8) data_port_g_01<1>F Y_01<8,8,1>F 1F { align1 }; +mul (8) null Cr_23<8,8,1>F -0.813F { align1 }; +mac (8) null Cb_23<8,8,1>F -0.392F { align1 }; +mac.sat (8) data_port_g_23<1>F Y_23<8,8,1>F 1F { align1 }; + + /* + * B = Cb * 2.017 + Y + */ +mul (8) null Cb_01<8,8,1>F 2.017F { align1 }; +mac.sat (8) data_port_b_01<1>F Y_01<8,8,1>F 1F { align1 }; +mul (8) null Cb_23<8,8,1>F 2.017F { align1 }; +mac.sat (8) data_port_b_23<1>F Y_23<8,8,1>F 1F { align1 }; + + /* + * A = 1.0 + */ +mov (8) data_port_a_01<1>F 1.0F { align1 }; +mov (8) data_port_a_23<1>F 1.0F { align1 }; diff --git a/src/exa_wm_yuv_rgb.g4b b/src/exa_wm_yuv_rgb.g4b new file mode 100644 index 00000000..017186a6 --- /dev/null +++ b/src/exa_wm_yuv_rgb.g4b @@ -0,0 +1,20 @@ + { 0x00802040, 0x22007fbd, 0x008d0200, 0xbd808081 }, + { 0x00802041, 0x22007fbd, 0x008d0200, 0x3f94fdf4 }, + { 0x00802040, 0x21c07fbd, 0x008d01c0, 0xbf008084 }, + { 0x00802040, 0x22407fbd, 0x008d0240, 0xbf008084 }, + { 0x00600041, 0x20007fbc, 0x008d01c0, 0x3fcc49ba }, + { 0x80600048, 0x20407fbe, 0x008d0200, 0x3f800000 }, + { 0x00600041, 0x20007fbc, 0x008d01e0, 0x3fcc49ba }, + { 0x80600048, 0x20c07fbe, 0x008d0220, 0x3f800000 }, + { 0x00600041, 0x20007fbc, 0x008d01c0, 0xbf5020c5 }, + { 0x00600048, 0x20007fbc, 0x008d0240, 0xbec8b439 }, + { 0x80600048, 0x20607fbe, 0x008d0200, 0x3f800000 }, + { 0x00600041, 0x20007fbc, 0x008d01e0, 0xbf5020c5 }, + { 0x00600048, 0x20007fbc, 0x008d0260, 0xbec8b439 }, + { 0x80600048, 0x20e07fbe, 0x008d0220, 0x3f800000 }, + { 0x00600041, 0x20007fbc, 0x008d0240, 0x40011687 }, + { 0x80600048, 0x20807fbe, 0x008d0200, 0x3f800000 }, + { 0x00600041, 0x20007fbc, 0x008d0260, 0x40011687 }, + { 0x80600048, 0x21007fbe, 0x008d0220, 0x3f800000 }, + { 0x00600001, 0x20a003fe, 0x00000000, 0x3f800000 }, + { 0x00600001, 0x212003fe, 0x00000000, 0x3f800000 }, diff --git a/src/i965_video.c b/src/i965_video.c index 1d2c3f54..68337e7e 100644 --- a/src/i965_video.c +++ b/src/i965_video.c @@ -78,7 +78,7 @@ static const uint32_t sip_kernel_static[][4] = { #define SF_MAX_THREADS 1 static const uint32_t sf_kernel_static[][4] = { -#include "packed_yuv_sf.g4b" +#include "exa_sf.g4b" }; /* @@ -94,7 +94,11 @@ static const uint32_t sf_kernel_static[][4] = { #define BRW_GRF_BLOCKS(nreg) ((nreg + 15) / 16 - 1) static const uint32_t ps_kernel_static[][4] = { -#include "packed_yuv_wm.g4b" +#include "exa_wm_xy.g4b" +#include "exa_wm_src_affine.g4b" +#include "exa_wm_src_sample_argb.g4b" +#include "exa_wm_yuv_rgb.g4b" +#include "exa_wm_write.g4b" }; #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) |