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-rw-r--r--src/i830_display.c8
-rw-r--r--src/i830_reg.h4
2 files changed, 6 insertions, 6 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index dc52c0b1..853f4e40 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -661,13 +661,13 @@ i830_use_fb_compression(xf86CrtcPtr crtc)
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
- int plane = (pipe == 0 ? FBC_CTL_PIPEA : FBC_CTL_PIPEB);
+ int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
if (!pI830->fb_compression)
return FALSE;
- /* Pre-965 only supports plane A, which is synonymous with pipe A for now */
- if (!IS_I965GM(pI830) && plane != FBC_CTL_PIPEA)
+ /* Pre-965 only supports plane A */
+ if (!IS_I965GM(pI830) && plane != FBC_CTL_PLANEA)
return FALSE;
/* Need 15, 16, or 32 (w/alpha) pixel format */
@@ -704,7 +704,7 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
uint32_t fbc_ctl;
unsigned long compressed_stride;
int pipe = intel_crtc->pipe;
- int plane = (pipe == 0 ? FBC_CTL_PIPEA : FBC_CTL_PIPEB);
+ int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp;
unsigned long interval = 1000;
diff --git a/src/i830_reg.h b/src/i830_reg.h
index d1670c3e..8a2a98ac 100644
--- a/src/i830_reg.h
+++ b/src/i830_reg.h
@@ -47,8 +47,8 @@
#define FBC_STAT_CURRENT_LINE (1<<0)
#define FBC_CONTROL2 0x03214
#define FBC_CTL_CPU_FENCE (1<<1)
-#define FBC_CTL_PIPEA (0<<0)
-#define FBC_CTL_PIPEB (1<<0)
+#define FBC_CTL_PLANEA (0<<0)
+#define FBC_CTL_PLANEB (1<<0)
#define FBC_LL_SIZE (1536)
#define FBC_LL_PAD (32)