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-rw-r--r--src/Makefile.am2
-rw-r--r--src/bios_reader/Makefile.am2
-rw-r--r--src/ch7xxx/ch7xxx.c1
-rw-r--r--src/common.h61
-rw-r--r--src/i810.h9
-rw-r--r--src/i810_dri.c20
-rw-r--r--src/i810_driver.c252
-rw-r--r--src/i810_reg.h14
-rw-r--r--src/i830.h34
-rw-r--r--src/i830_bios.c4
-rw-r--r--src/i830_common.h16
-rw-r--r--src/i830_display.c162
-rw-r--r--src/i830_dri.c58
-rw-r--r--src/i830_driver.c234
-rw-r--r--src/i830_exa.c29
-rw-r--r--src/i830_lvds.c4
-rw-r--r--src/i830_memory.c46
-rw-r--r--src/i830_quirks.c28
-rw-r--r--src/i830_tv.c72
-rw-r--r--src/i830_video.c179
-rw-r--r--src/i830_video.h14
-rw-r--r--src/i915_render.c11
-rw-r--r--src/reg_dumper/main.c10
-rw-r--r--src/xvmc/I810XvMC.h1
24 files changed, 837 insertions, 426 deletions
diff --git a/src/Makefile.am b/src/Makefile.am
index 50e913ee..13cbf913 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -18,7 +18,7 @@
# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-if HAVE_PCIACCESS
+if XSERVER_LIBPCIACCESS
REGDUMPER = reg_dumper
endif
diff --git a/src/bios_reader/Makefile.am b/src/bios_reader/Makefile.am
index 8e036939..a4adecb1 100644
--- a/src/bios_reader/Makefile.am
+++ b/src/bios_reader/Makefile.am
@@ -2,7 +2,7 @@ AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@ @XMODES_CFLAGS@
noinst_PROGRAMS = bios_reader $(BIOS_DUMPER)
-if HAVE_PCIACCESS
+if XSERVER_LIBPCIACCESS
BIOS_DUMPER = bios_dumper
bios_dumper_SOURCES = bios_dumper.c
diff --git a/src/ch7xxx/ch7xxx.c b/src/ch7xxx/ch7xxx.c
index 09a96271..3ef9612a 100644
--- a/src/ch7xxx/ch7xxx.c
+++ b/src/ch7xxx/ch7xxx.c
@@ -56,6 +56,7 @@ static struct ch7xxx_id_struct {
{ CH7011_VID, "CH7011" },
{ CH7009A_VID, "CH7009A" },
{ CH7009B_VID, "CH7009B" },
+ { CH7301_VID, "CH7301" },
};
#define ID_ARRAY_SIZE (sizeof(ch7xxx_ids) / sizeof(ch7xxx_ids[0]))
diff --git a/src/common.h b/src/common.h
index fa96a5d0..40ea038e 100644
--- a/src/common.h
+++ b/src/common.h
@@ -384,26 +384,42 @@ extern int I810_DEBUG;
#define PCI_CHIP_Q33_G_BRIDGE 0x29D0
#endif
-#define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \
- pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \
- pI810->PciInfo->chipType == PCI_CHIP_I810_E)
-#define IS_I815(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I815)
-#define IS_I830(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I830_M)
-#define IS_845G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_845_G)
-#define IS_I85X(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM)
-#define IS_I852(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
-#define IS_I855(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
-#define IS_I865G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I865_G)
-
-#define IS_I915G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_G || pI810->PciInfo->chipType == PCI_CHIP_E7221_G)
-#define IS_I915GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I915_GM)
-#define IS_I945G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_G)
-#define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM || pI810->PciInfo->chipType == PCI_CHIP_I945_GME)
-#define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME)
-#define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME)
-#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G ||\
- pI810->PciInfo->chipType == PCI_CHIP_Q35_G ||\
- pI810->PciInfo->chipType == PCI_CHIP_Q33_G)
+#if XSERVER_LIBPCIACCESS
+#define I810_MEMBASE(p,n) (p)->regions[(n)].base_addr
+#define VENDOR_ID(p) (p)->vendor_id
+#define DEVICE_ID(p) (p)->device_id
+#define SUBVENDOR_ID(p) (p)->subvendor_id
+#define SUBSYS_ID(p) (p)->subdevice_id
+#define CHIP_REVISION(p) (p)->revision
+#else
+#define I810_MEMBASE(p,n) (p)->memBase[n]
+#define VENDOR_ID(p) (p)->vendor
+#define DEVICE_ID(p) (p)->chipType
+#define SUBVENDOR_ID(p) (p)->subsysVendor
+#define SUBSYS_ID(p) (p)->subsysCard
+#define CHIP_REVISION(p) (p)->chipRev
+#endif
+
+#define IS_I810(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810 || \
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_DC100 || \
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I810_E)
+#define IS_I815(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I815)
+#define IS_I830(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I830_M)
+#define IS_845G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_845_G)
+#define IS_I85X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM)
+#define IS_I852(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I852_GM || pI810->variant == I852_GME))
+#define IS_I855(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I855_GM && (pI810->variant == I855_GM || pI810->variant == I855_GME))
+#define IS_I865G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I865_G)
+
+#define IS_I915G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_E7221_G)
+#define IS_I915GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I915_GM)
+#define IS_I945G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_G)
+#define IS_I945GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I945_GME)
+#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
+#define IS_I965G(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_G_1 || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I946_GZ || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
+#define IS_G33CLASS(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G33_G ||\
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q35_G ||\
+ DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q33_G)
#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810))
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810))
@@ -428,4 +444,9 @@ extern int I810_DEBUG;
#define PIPE_NAME(n) ('A' + (n))
+#if XSERVER_LIBPCIACCESS
+struct pci_device *
+intel_host_bridge (void);
+#endif
+
#endif /* _INTEL_COMMON_H_ */
diff --git a/src/i810.h b/src/i810.h
index ff9134ea..8023c385 100644
--- a/src/i810.h
+++ b/src/i810.h
@@ -50,6 +50,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "vbe.h"
#include "vgaHW.h"
+#include "xorg-server.h"
+#ifdef XSERVER_LIBPCIACCESS
+#include <pciaccess.h>
+#endif
+
#ifdef XF86DRI
#include "xf86drm.h"
#include "sarea.h"
@@ -184,8 +189,12 @@ typedef struct _I810Rec {
unsigned long MMIOAddr;
IOADDRESS ioBase;
EntityInfoPtr pEnt;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *PciInfo;
+#else
pciVideoPtr PciInfo;
PCITAG PciTag;
+#endif
I810RingBuffer *LpRing;
unsigned int BR[20];
diff --git a/src/i810_dri.c b/src/i810_dri.c
index 72718d34..e5e15651 100644
--- a/src/i810_dri.c
+++ b/src/i810_dri.c
@@ -354,9 +354,15 @@ I810DRIScreenInit(ScreenPtr pScreen)
} else {
pDRIInfo->busIdString = xalloc(64);
sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
+#if XSERVER_LIBPCIACCESS
+ ((pI810->PciInfo->domain << 8) | pI810->PciInfo->bus),
+ pI810->PciInfo->dev, pI810->PciInfo->func
+#else
((pciConfigPtr) pI810->PciInfo->thisCard)->busnum,
((pciConfigPtr) pI810->PciInfo->thisCard)->devnum,
- ((pciConfigPtr) pI810->PciInfo->thisCard)->funcnum);
+ ((pciConfigPtr) pI810->PciInfo->thisCard)->funcnum
+#endif
+ );
}
pDRIInfo->ddxDriverMajorVersion = I810_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I810_MINOR_VERSION;
@@ -972,12 +978,20 @@ I810DRIScreenInit(ScreenPtr pScreen)
if (!pI810DRI->irq) {
pI810DRI->irq = drmGetInterruptFromBusID(pI810->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI810->PciInfo->domain << 8) |
+ pI810->PciInfo->bus),
+ pI810->PciInfo->dev,
+ pI810->PciInfo->func
+#else
((pciConfigPtr) pI810->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI810->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI810->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if ((drmCtlInstHandler(pI810->drmSubFD, pI810DRI->irq)) != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] failure adding irq handler, there is a device "
@@ -991,7 +1005,7 @@ I810DRIScreenInit(ScreenPtr pScreen)
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"[drm] dma control initialized, using IRQ %d\n", pI810DRI->irq);
- pI810DRI->deviceID = pI810->PciInfo->chipType;
+ pI810DRI->deviceID = DEVICE_ID(pI810->PciInfo);
pI810DRI->width = pScrn->virtualX;
pI810DRI->height = pScrn->virtualY;
pI810DRI->mem = pScrn->videoRam * 1024;
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 972b6d50..a6c13ed7 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -94,7 +94,16 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/* Required Functions: */
static void I810Identify(int flags);
+
+#if XSERVER_LIBPCIACCESS
+static Bool intel_pci_probe (DriverPtr drv,
+ int entity_num,
+ struct pci_device *dev,
+ intptr_t match_data);
+#else
static Bool I810Probe(DriverPtr drv, int flags);
+#endif
+
#ifndef I830_ONLY
static Bool I810PreInit(ScrnInfoPtr pScrn, int flags);
static Bool I810ScreenInit(int Index, ScreenPtr pScreen, int argc,
@@ -112,14 +121,59 @@ static ModeStatus I810ValidMode(int scrnIndex, DisplayModePtr mode,
#endif /* I830_ONLY */
+#if XSERVER_LIBPCIACCESS
+
+#define INTEL_DEVICE_MATCH(d,i) \
+ { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
+
+static const struct pci_id_match intel_device_match[] = {
+#ifndef I830_ONLY
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810_DC100, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I810_E, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I815, 0 ),
+#endif
+ INTEL_DEVICE_MATCH (PCI_CHIP_I830_M, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_845_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I855_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I865_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I915_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_E7221_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I915_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I945_GME, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_G_1, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_Q, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I946_GZ, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_GM, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_I965_GME, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G33_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_Q35_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_Q33_G, 0 ),
+ { 0, 0, 0 },
+};
+
+#endif /* XSERVER_LIBPCIACCESS */
+
_X_EXPORT DriverRec I810 = {
I810_VERSION,
I810_DRIVER_NAME,
I810Identify,
+#if XSERVER_LIBPCIACCESS
+ NULL,
+#else
I810Probe,
+#endif
I810AvailableOptions,
NULL,
- 0
+ 0,
+ NULL,
+#if XSERVER_LIBPCIACCESS
+ intel_device_match,
+ intel_pci_probe
+#endif
};
/* *INDENT-OFF* */
@@ -429,7 +483,13 @@ i810Setup(pointer module, pointer opts, int *errmaj, int *errmin)
*/
if (!setupDone) {
setupDone = 1;
- xf86AddDriver(&I810, module, 0);
+ xf86AddDriver(&I810, module,
+#if XSERVER_LIBPCIACCESS
+ HaveDriverFuncs
+#else
+ 0
+#endif
+ );
/*
* Tell the loader about symbols from other modules that this module
@@ -517,6 +577,113 @@ I810AvailableOptions(int chipid, int busid)
#endif
}
+#if XSERVER_LIBPCIACCESS
+struct pci_device *
+intel_host_bridge (void)
+{
+ static const struct pci_slot_match bridge_match = {
+ 0, 0, 0, PCI_MATCH_ANY, 0
+ };
+ struct pci_device_iterator *slot_iterator;
+ struct pci_device *bridge;
+
+ slot_iterator = pci_slot_match_iterator_create (&bridge_match);
+ bridge = pci_device_next (slot_iterator);
+ pci_iterator_destroy (slot_iterator);
+ return bridge;
+}
+
+/*
+ * intel_pci_probe --
+ *
+ * Look through the PCI bus to find cards that are intel boards.
+ * Setup the dispatch table for the rest of the driver functions.
+ *
+ */
+static Bool intel_pci_probe (DriverPtr driver,
+ int entity_num,
+ struct pci_device *device,
+ intptr_t match_data)
+{
+ ScrnInfoPtr scrn = NULL;
+ EntityInfoPtr entity;
+ I830EntPtr i830_ent = NULL;
+ DevUnion *private;
+
+ scrn = xf86ConfigPciEntity (scrn, 0, entity_num, I810PciChipsets,
+ NULL,
+ NULL, NULL, NULL, NULL);
+ if (scrn != NULL)
+ {
+ scrn->driverVersion = I810_VERSION;
+ scrn->driverName = I810_DRIVER_NAME;
+ scrn->name = I810_NAME;
+ scrn->Probe = NULL;
+
+ entity = xf86GetEntityInfo (entity_num);
+
+ switch (DEVICE_ID(device)) {
+#ifndef I830_ONLY
+ case PCI_CHIP_I810:
+ case PCI_CHIP_I810_DC100:
+ case PCI_CHIP_I810_E:
+ case PCI_CHIP_I815:
+ scrn->PreInit = I810PreInit;
+ scrn->ScreenInit = I810ScreenInit;
+ scrn->SwitchMode = I810SwitchMode;
+ scrn->AdjustFrame = I810AdjustFrame;
+ scrn->EnterVT = I810EnterVT;
+ scrn->LeaveVT = I810LeaveVT;
+ scrn->FreeScreen = I810FreeScreen;
+ scrn->ValidMode = I810ValidMode;
+ break;
+#endif
+ case PCI_CHIP_845_G:
+ case PCI_CHIP_I865_G:
+ /*
+ * These two chips have only one pipe, and
+ * cannot do dual-head
+ */
+ I830InitpScrn(scrn);
+ break;
+ default:
+ /*
+ * Everything else is an i830-ish dual-pipe chip
+ */
+ xf86SetEntitySharable(entity_num);
+
+ /* Allocate an entity private if necessary */
+ if (I830EntityIndex < 0)
+ I830EntityIndex = xf86AllocateEntityPrivateIndex();
+
+ private = xf86GetEntityPrivate(scrn->entityList[0],
+ I830EntityIndex);
+ i830_ent = private->ptr;
+ if (!i830_ent)
+ {
+ private->ptr = xnfcalloc(sizeof(I830EntRec), 1);
+ i830_ent = private->ptr;
+ i830_ent->lastInstance = -1;
+ }
+
+ /*
+ * Set the entity instance for this instance of the driver.
+ * For dual head per card, instance 0 is the "master"
+ * instance, driving the primary head, and instance 1 is
+ * the "slave".
+ */
+ i830_ent->lastInstance++;
+ xf86SetEntityInstanceForScreen(scrn,
+ scrn->entityList[0],
+ i830_ent->lastInstance);
+ I830InitpScrn(scrn);
+ break;
+ }
+ }
+ return scrn != NULL;
+}
+#else /* XSERVER_LIBPCIACCESS */
+
/*
* I810Probe --
*
@@ -678,6 +845,7 @@ I810Probe(DriverPtr drv, int flags)
return foundScreen;
}
+#endif /* else XSERVER_LIBPCIACCESS */
#ifndef I830_ONLY
static void
@@ -769,8 +937,10 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
pI810->ioBase = hwp->PIOOffset;
pI810->PciInfo = xf86GetPciInfoForEntity(pI810->pEnt->index);
+#if !XSERVER_LIBPCIACCESS
pI810->PciTag = pciTag(pI810->PciInfo->bus, pI810->PciInfo->device,
pI810->PciInfo->func);
+#endif
if (xf86RegisterResources(pI810->pEnt->index, NULL, ResNone))
return FALSE;
@@ -899,7 +1069,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
} else {
from = X_PROBED;
pScrn->chipset = (char *)xf86TokenToString(I810Chipsets,
- pI810->PciInfo->chipType);
+ DEVICE_ID(pI810->PciInfo));
}
if (pI810->pEnt->device->chipRev >= 0) {
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
@@ -909,6 +1079,9 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
(pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i810");
+#if XSERVER_LIBPCIACCESS
+ pI810->LinearAddr = pI810->PciInfo->regions[0].base_addr;
+#else
if (pI810->pEnt->device->MemBase != 0) {
pI810->LinearAddr = pI810->pEnt->device->MemBase;
from = X_CONFIG;
@@ -923,9 +1096,13 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "Linear framebuffer at 0x%lX\n",
(unsigned long)pI810->LinearAddr);
+#if XSERVER_LIBPCIACCESS
+ pI810->MMIOAddr = pI810->PciInfo->regions[1].base_addr;
+#else
if (pI810->pEnt->device->IOBase != 0) {
pI810->MMIOAddr = pI810->pEnt->device->IOBase;
from = X_CONFIG;
@@ -940,6 +1117,7 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
return FALSE;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, from, "IO registers at addr 0x%lX\n",
(unsigned long)pI810->MMIOAddr);
@@ -956,8 +1134,13 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
/* Find out memory bus frequency.
*/
{
- unsigned long whtcfg_pamr_drp = pciReadLong(pI810->PciTag,
- WHTCFG_PAMR_DRP);
+ uint32_t whtcfg_pamr_drp;
+
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u32(pI810->PciInfo, & whtcfg_pamr_drp, WHTCFG_PAMR_DRP);
+#else
+ whtcfg_pamr_drp = pciReadLong(pI810->PciTag, WHTCFG_PAMR_DRP);
+#endif
/* Need this for choosing watermarks.
*/
@@ -1010,11 +1193,19 @@ I810PreInit(ScrnInfoPtr pScrn, int flags)
/* Calculate Fixed Offsets depending on graphics aperture size */
{
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ uint32_t smram_miscc;
+
+ pci_device_cfg_read_u32 (bridge, & smram_miscc, SMRAM_MISCC);
+#else
PCITAG bridge;
long smram_miscc;
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
smram_miscc = pciReadLong(bridge, SMRAM_MISCC);
+#endif
+
if ((smram_miscc & GFX_MEM_WIN_SIZE) == GFX_MEM_WIN_32M) {
pI810->FbMapSize = 0x1000000;
pI810->DepthOffset = 0x1000000;
@@ -1204,6 +1395,10 @@ I810MapMMIO(ScrnInfoPtr pScrn)
{
int mmioFlags;
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI810->PciInfo;
+ int err;
+#endif
#if !defined(__alpha__)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
@@ -1211,11 +1406,26 @@ I810MapMMIO(ScrnInfoPtr pScrn)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT | VIDMEM_SPARSE;
#endif
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_range (device,
+ pI810->MMIOAddr,
+ I810_REG_SIZE,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ (void **) &pI810->MMIOBase);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map mmio BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+#else
pI810->MMIOBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
pI810->PciTag,
pI810->MMIOAddr, I810_REG_SIZE);
if (!pI810->MMIOBase)
return FALSE;
+#endif
return TRUE;
}
@@ -1223,18 +1433,38 @@ static Bool
I810MapMem(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI810->PciInfo;
+ int err;
+#else
long i;
-
- for (i = 2; i < pI810->FbMapSize; i <<= 1) ;
+#endif
if (!I810MapMMIO(pScrn))
return FALSE;
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_range (device,
+ pI810->LinearAddr,
+ pI810->FbMapSize,
+ PCI_DEV_MAP_FLAG_WRITABLE | PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+ (void **) &pI810->FbBase);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map frame buffer BAR. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+#else
+ for (i = 2; i < pI810->FbMapSize; i <<= 1) ;
+
pI810->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI810->PciTag,
pI810->LinearAddr, i);
if (!pI810->FbBase)
return FALSE;
+#endif
pI810->LpRing->virtual_start = pI810->FbBase + pI810->LpRing->mem.Start;
@@ -1246,8 +1476,12 @@ I810UnmapMMIO(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_range (pI810->PciInfo, pI810->MMIOBase, I810_REG_SIZE);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI810->MMIOBase,
I810_REG_SIZE);
+#endif
pI810->MMIOBase = NULL;
}
@@ -1256,8 +1490,12 @@ I810UnmapMem(ScrnInfoPtr pScrn)
{
I810Ptr pI810 = I810PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_range (pI810->PciInfo, pI810->FbBase, pI810->FbMapSize);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI810->FbBase,
pI810->FbMapSize);
+#endif
pI810->FbBase = NULL;
I810UnmapMMIO(pScrn);
return TRUE;
diff --git a/src/i810_reg.h b/src/i810_reg.h
index 03e10d64..598fc8c0 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -346,19 +346,33 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define IPEIR 0x2088
#define IPEHR 0x208C
#define INST_DONE 0x2090
+#define SCPD0 0x209c /* debug */
#define INST_PS 0x20c4
#define IPEIR_I965 0x2064 /* i965 */
#define IPEHR_I965 0x2068 /* i965 */
#define INST_DONE_I965 0x206c
#define INST_PS_I965 0x2070
+
+/* Current active ring head address:
+ */
#define ACTHD 0x2074
+
+/* Current primary/secondary DMA fetch addresses:
+ */
#define DMA_FADD_P 0x2078
+#define DMA_FADD_S 0x20d4
#define INST_DONE_1 0x207c
#define CACHE_MODE_0 0x2120
#define CACHE_MODE_1 0x2124
#define MI_ARB_STATE 0x20e4
+/* Start addresses for each of the primary rings:
+ */
+#define PR0_STR 0x20f0
+#define PR1_STR 0x20f4
+#define PR2_STR 0x20f8
+
#define WIZ_CTL 0x7c00
#define WIZ_CTL_SINGLE_SUBSPAN (1<<6)
#define WIZ_CTL_IGNORE_STALLS (1<<5)
diff --git a/src/i830.h b/src/i830.h
index a39514bd..b1f1f68f 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -61,6 +61,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "xf86Crtc.h"
#include "xf86RandR12.h"
+#include "xorg-server.h"
+#ifdef XSERVER_LIBPCIACCESS
+#include <pciaccess.h>
+#endif
+
#ifdef XF86DRI
#include "xf86drm.h"
#include "sarea.h"
@@ -229,6 +234,7 @@ extern const char *i830_output_type_names[];
typedef struct _I830CrtcPrivateRec {
int pipe;
+ int plane;
Bool enabled;
@@ -237,12 +243,7 @@ typedef struct _I830CrtcPrivateRec {
/* Lookup table values to be set when the CRTC is enabled */
CARD8 lut_r[256], lut_g[256], lut_b[256];
-#ifdef I830_USE_XAA
- FBLinearPtr rotate_mem_xaa;
-#endif
-#ifdef I830_USE_EXA
- ExaOffscreenArea *rotate_mem_exa;
-#endif
+ i830_memory *rotate_mem;
/* Card virtual address of the cursor */
unsigned long cursor_offset;
unsigned long cursor_argb_offset;
@@ -294,6 +295,7 @@ typedef struct _I830Rec {
/* These are set in PreInit and never changed. */
long FbMapSize;
+ long GTTMapSize;
/**
* Linked list of video memory allocations. The head and tail are
@@ -373,8 +375,12 @@ typedef struct _I830Rec {
unsigned long MMIOAddr;
IOADDRESS ioBase;
EntityInfoPtr pEnt;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *PciInfo;
+#else
pciVideoPtr PciInfo;
PCITAG PciTag;
+#endif
CARD8 variant;
unsigned int BR[20];
@@ -650,6 +656,14 @@ extern void I830SubsequentSolidFillRect(ScrnInfoPtr pScrn, int x, int y,
Bool i830_allocator_init(ScrnInfoPtr pScrn, unsigned long offset,
unsigned long size);
void i830_allocator_fini(ScrnInfoPtr pScrn);
+i830_memory * i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
+ unsigned long size, unsigned long alignment,
+ int flags);
+i830_memory *i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
+ unsigned long size,
+ unsigned long pitch,
+ unsigned long alignment, int flags,
+ enum tile_format tile_format);
void i830_describe_allocations(ScrnInfoPtr pScrn, int verbosity,
const char *prefix);
void i830_reset_allocations(ScrnInfoPtr pScrn);
@@ -690,14 +704,6 @@ Bool i830_unbind_all_memory(ScrnInfoPtr pScrn);
Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);
-#ifdef I830_USE_XAA
-FBLinearPtr
-i830_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length,
- int granularity,
- MoveLinearCallbackProcPtr moveCB,
- RemoveLinearCallbackProcPtr removeCB,
- pointer privData);
-#endif /* I830_USE_EXA */
/* i830_modes.c */
DisplayModePtr i830_ddc_get_modes(xf86OutputPtr output);
diff --git a/src/i830_bios.c b/src/i830_bios.c
index 7703c806..7ed791e6 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -97,7 +97,11 @@ i830_bios_get (ScrnInfoPtr pScrn)
INTEL_VBIOS_SIZE);
vbeFree (pVbe);
} else {
+#if XSERVER_LIBPCIACCESS
+ pci_device_read_rom (pI830->PciInfo, bios);
+#else
xf86ReadPciBIOS(0, pI830->PciTag, 0, bios, INTEL_VBIOS_SIZE);
+#endif
}
if (0)
diff --git a/src/i830_common.h b/src/i830_common.h
index 1ca26422..a4c3b5a9 100644
--- a/src/i830_common.h
+++ b/src/i830_common.h
@@ -124,14 +124,14 @@ typedef struct {
unsigned int rotated_tiled;
unsigned int rotated2_tiled;
- int pipeA_x;
- int pipeA_y;
- int pipeA_w;
- int pipeA_h;
- int pipeB_x;
- int pipeB_y;
- int pipeB_w;
- int pipeB_h;
+ int planeA_x;
+ int planeA_y;
+ int planeA_w;
+ int planeA_h;
+ int planeB_x;
+ int planeB_y;
+ int planeB_w;
+ int planeB_h;
/* Triple buffering */
drm_handle_t third_handle;
diff --git a/src/i830_display.c b/src/i830_display.c
index 706b9ba8..92e52ed2 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -372,10 +372,11 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
unsigned long Start, Offset;
- int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE);
- int dspsurf = (pipe == 0 ? DSPASURF : DSPBSURF);
- int dsptileoff = (pipe == 0 ? DSPATILEOFF : DSPBTILEOFF);
+ int dspbase = (plane == 0 ? DSPABASE : DSPBBASE);
+ int dspsurf = (plane == 0 ? DSPASURF : DSPBSURF);
+ int dsptileoff = (plane == 0 ? DSPATILEOFF : DSPBTILEOFF);
Offset = ((y * pScrn->displayWidth + x) * pI830->cpp);
if (pI830->front_buffer == NULL) {
@@ -413,14 +414,14 @@ i830PipeSetBase(xf86CrtcPtr crtc, int x, int y)
if (!sPriv)
return;
- switch (pipe) {
+ switch (plane) {
case 0:
- sPriv->pipeA_x = x;
- sPriv->pipeA_y = y;
+ sPriv->planeA_x = x;
+ sPriv->planeA_y = y;
break;
case 1:
- sPriv->pipeB_x = x;
- sPriv->pipeB_y = y;
+ sPriv->planeB_x = x;
+ sPriv->planeB_y = y;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -523,8 +524,7 @@ i830_use_fb_compression(xf86CrtcPtr crtc)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
- int pipe = intel_crtc->pipe;
- int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+ int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
if (!pI830->fb_compression)
return FALSE;
@@ -569,17 +569,15 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
uint32_t fbc_ctl = 0;
unsigned long compressed_stride;
- int pipe = intel_crtc->pipe;
- /* FIXME: plane & pipe might not always be equal */
- int plane = (pipe == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
+ int plane = (intel_crtc->plane == 0 ? FBC_CTL_PLANEA : FBC_CTL_PLANEB);
unsigned long uncompressed_stride = pScrn->displayWidth * pI830->cpp;
unsigned long interval = 1000;
if (INREG(FBC_CONTROL) & FBC_CTL_EN) {
- char cur_pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+ char cur_plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "fbc already enabled on "
- "pipe %c, not enabling on pipe %c\n", cur_pipe, pipe ? 'b' :
- 'a');
+ "plane %c, not enabling on plane %c\n", cur_plane,
+ plane ? 'b' : 'a');
return;
}
@@ -615,7 +613,7 @@ i830_enable_fb_compression(xf86CrtcPtr crtc)
fbc_ctl |= FBC_CTL_UNCOMPRESSIBLE;
OUTREG(FBC_CONTROL, fbc_ctl);
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", pipe ?
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc enabled on plane %c\n", plane ?
'b' : 'a');
}
@@ -625,7 +623,7 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
ScrnInfoPtr pScrn = crtc->scrn;
I830Ptr pI830 = I830PTR(pScrn);
uint32_t fbc_ctl;
- char pipe = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
+ char plane = (INREG(FBC_CONTROL2) & 1) ? 'b' : 'a';
/* Disable compression */
fbc_ctl = INREG(FBC_CONTROL);
@@ -635,7 +633,7 @@ i830_disable_fb_compression(xf86CrtcPtr crtc)
/* Wait for compressing bit to clear */
while (INREG(FBC_STATUS) & FBC_STAT_COMPRESSING)
; /* nothing */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", pipe);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "fbc disabled on pipe %c\n", plane);
}
/**
@@ -651,10 +649,11 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
- int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
- int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE;
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
+ int dspbase_reg = (plane == 0) ? DSPABASE : DSPBBASE;
CARD32 temp;
/* XXX: When our outputs are all unaware of DPMS modes other than off and
@@ -764,14 +763,14 @@ i830_crtc_dpms(xf86CrtcPtr crtc, int mode)
if (!sPriv)
return;
- switch (pipe) {
+ switch (plane) {
case 0:
- sPriv->pipeA_w = enabled ? crtc->mode.HDisplay : 0;
- sPriv->pipeA_h = enabled ? crtc->mode.VDisplay : 0;
+ sPriv->planeA_w = enabled ? crtc->mode.HDisplay : 0;
+ sPriv->planeA_h = enabled ? crtc->mode.VDisplay : 0;
break;
case 1:
- sPriv->pipeB_w = enabled ? crtc->mode.HDisplay : 0;
- sPriv->pipeB_h = enabled ? crtc->mode.VDisplay : 0;
+ sPriv->planeB_w = enabled ? crtc->mode.HDisplay : 0;
+ sPriv->planeB_h = enabled ? crtc->mode.VDisplay : 0;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -869,9 +868,14 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
else if (IS_I945GM(pI830) || IS_845G(pI830))
return 200000;
else if (IS_I915GM(pI830)) {
- CARD16 gcfgc = pciReadWord(pI830->PciTag, I915_GCFGC);
+ uint16_t gcfgc;
- if (gcfgc & I915_LOW_FREQUENCY_ENABLE)
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u16 (pI830->PciInfo, &gcfgc, I915_GCFGC);
+#else
+ gcfgc = pciReadWord(pI830->PciTag, I915_GCFGC);
+#endif
+ if (gcfgc & I915_LOW_FREQUENCY_ENABLE)
return 133000;
else {
switch (gcfgc & I915_DISPLAY_CLOCK_MASK) {
@@ -885,8 +889,14 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
} else if (IS_I865G(pI830))
return 266000;
else if (IS_I855(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ uint16_t hpllcc;
+ pci_device_cfg_read_u16 (bridge, &hpllcc, I855_HPLLCC);
+#else
PCITAG bridge = pciTag(0, 0, 0); /* This is always the host bridge */
CARD16 hpllcc = pciReadWord(bridge, I855_HPLLCC);
+#endif
/* Assume that the hardware is in the high speed state. This
* should be the default.
@@ -951,10 +961,10 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
int pipe = intel_crtc->pipe;
+ int plane = intel_crtc->plane;
int fp_reg = (pipe == 0) ? FPA0 : FPB0;
int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
- int dpll_md_reg = (intel_crtc->pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
- int dspcntr_reg = (pipe == 0) ? DSPACNTR : DSPBCNTR;
+ int dpll_md_reg = (pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
int htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;
int hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;
@@ -962,10 +972,11 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
int vtot_reg = (pipe == 0) ? VTOTAL_A : VTOTAL_B;
int vblank_reg = (pipe == 0) ? VBLANK_A : VBLANK_B;
int vsync_reg = (pipe == 0) ? VSYNC_A : VSYNC_B;
- int dspsize_reg = (pipe == 0) ? DSPASIZE : DSPBSIZE;
- int dspstride_reg = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
- int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;
int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
+ int dspcntr_reg = (plane == 0) ? DSPACNTR : DSPBCNTR;
+ int dspstride_reg = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE;
+ int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS;
+ int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE;
int i;
int refclk;
intel_clock_t clock;
@@ -1291,59 +1302,24 @@ static void *
i830_crtc_shadow_allocate (xf86CrtcPtr crtc, int width, int height)
{
ScrnInfoPtr pScrn = crtc->scrn;
- ScreenPtr pScreen = pScrn->pScreen;
I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
unsigned long rotate_pitch;
- unsigned long rotate_offset;
int align = KB(4), size;
rotate_pitch = pScrn->displayWidth * pI830->cpp;
size = rotate_pitch * height;
-#ifdef I830_USE_EXA
- /* We could get close to what we want here by just creating a pixmap like
- * normal, but we have to lock it down in framebuffer, and there is no
- * setter for offscreen area locking in EXA currently. So, we just
- * allocate offscreen memory and fake up a pixmap header for it.
- */
- if (pI830->useEXA) {
- assert(intel_crtc->rotate_mem_exa == NULL);
-
- intel_crtc->rotate_mem_exa = exaOffscreenAlloc(pScreen, size, align,
- TRUE, NULL, NULL);
- if (intel_crtc->rotate_mem_exa == NULL) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't allocate shadow memory for rotated CRTC\n");
- return NULL;
- }
- rotate_offset = intel_crtc->rotate_mem_exa->offset;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- /* The XFree86 linear allocator operates in units of screen pixels,
- * sadly.
- */
- size = (size + pI830->cpp - 1) / pI830->cpp;
- align = (align + pI830->cpp - 1) / pI830->cpp;
-
- assert(intel_crtc->rotate_mem_xaa == NULL);
-
- intel_crtc->rotate_mem_xaa =
- i830_xf86AllocateOffscreenLinear(pScreen, size, align,
- NULL, NULL, NULL);
- if (intel_crtc->rotate_mem_xaa == NULL) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Couldn't allocate shadow memory for rotated CRTC\n");
- return NULL;
- }
- rotate_offset = pI830->front_buffer->offset +
- intel_crtc->rotate_mem_xaa->offset * pI830->cpp;
+ assert(intel_crtc->rotate_mem == NULL);
+ intel_crtc->rotate_mem = i830_allocate_memory(pScrn, "rotated crtc",
+ size, align, 0);
+ if (intel_crtc->rotate_mem == NULL) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Couldn't allocate shadow memory for rotated CRTC\n");
+ return NULL;
}
-#endif /* I830_USE_XAA */
- return pI830->FbBase + rotate_offset;
+ return pI830->FbBase + intel_crtc->rotate_mem->offset;
}
/**
@@ -1380,26 +1356,16 @@ static void
i830_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *data)
{
ScrnInfoPtr pScrn = crtc->scrn;
- I830Ptr pI830 = I830PTR(pScrn);
I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
if (rotate_pixmap)
FreeScratchPixmapHeader(rotate_pixmap);
-
- if (data)
- {
-#ifdef I830_USE_EXA
- if (pI830->useEXA && intel_crtc->rotate_mem_exa != NULL) {
- exaOffscreenFree(pScrn->pScreen, intel_crtc->rotate_mem_exa);
- intel_crtc->rotate_mem_exa = NULL;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- xf86FreeOffscreenLinear(intel_crtc->rotate_mem_xaa);
- intel_crtc->rotate_mem_xaa = NULL;
- }
-#endif /* I830_USE_XAA */
+
+ if (data) {
+ /* Be sure to sync acceleration before the memory gets unbound. */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, intel_crtc->rotate_mem);
+ intel_crtc->rotate_mem = NULL;
}
}
@@ -1415,8 +1381,11 @@ i830DescribeOutputConfiguration(ScrnInfoPtr pScrn)
for (i = 0; i < xf86_config->num_crtc; i++) {
xf86CrtcPtr crtc = xf86_config->crtc[i];
- CARD32 dspcntr = INREG(DSPACNTR + (DSPBCNTR - DSPACNTR) * i);
- CARD32 pipeconf = INREG(PIPEACONF + (PIPEBCONF - PIPEACONF) * i);
+ I830CrtcPrivatePtr intel_crtc = crtc ? crtc->driver_private : NULL;
+ CARD32 dspcntr = intel_crtc->plane == 0 ? INREG(DSPACNTR) :
+ INREG(DSPBCNTR);
+ CARD32 pipeconf = i == 0 ? INREG(PIPEACONF) :
+ INREG(PIPEBCONF);
Bool hw_plane_enable = (dspcntr & DISPLAY_PLANE_ENABLE) != 0;
Bool hw_pipe_enable = (pipeconf & PIPEACONF_ENABLE) != 0;
@@ -1425,8 +1394,8 @@ i830DescribeOutputConfiguration(ScrnInfoPtr pScrn)
'A' + i, crtc->enabled ? "on" : "off");
xf86DrvMsg(pScrn->scrnIndex, X_INFO,
" Display plane %c is now %s and connected to pipe %c.\n",
- 'A' + i,
- crtc->enabled ? "enabled" : "disabled",
+ 'A' + intel_crtc->plane,
+ hw_plane_enable ? "enabled" : "disabled",
dspcntr & DISPPLANE_SEL_PIPE_MASK ? 'B' : 'A');
if (hw_pipe_enable != crtc->enabled) {
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
@@ -1730,6 +1699,7 @@ i830_crtc_init(ScrnInfoPtr pScrn, int pipe)
intel_crtc = xnfcalloc (sizeof (I830CrtcPrivateRec), 1);
intel_crtc->pipe = pipe;
intel_crtc->dpms_mode = DPMSModeOff;
+ intel_crtc->plane = pipe;
/* Initialize the LUTs for when we turn on the CRTC. */
for (i = 0; i < 256; i++) {
diff --git a/src/i830_dri.c b/src/i830_dri.c
index c25a0843..bff885eb 100644
--- a/src/i830_dri.c
+++ b/src/i830_dri.c
@@ -91,7 +91,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DRM_VBLANK_FLIP 0x8000000
typedef struct drm_i915_flip {
- int pipes;
+ int planes;
} drm_i915_flip_t;
#undef DRM_IOCTL_I915_FLIP
@@ -549,9 +549,15 @@ I830DRIScreenInit(ScreenPtr pScreen)
} else {
pDRIInfo->busIdString = xalloc(64);
sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) | pI830->PciInfo->bus),
+ pI830->PciInfo->dev, pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->PciInfo->thisCard)->devnum,
- ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum);
+ ((pciConfigPtr) pI830->PciInfo->thisCard)->funcnum
+#endif
+ );
}
pDRIInfo->ddxDriverMajorVersion = I830_MAJOR_VERSION;
pDRIInfo->ddxDriverMinorVersion = I830_MINOR_VERSION;
@@ -954,13 +960,13 @@ I830DRIDoMappings(ScreenPtr pScreen)
return FALSE;
}
- if (pI830->PciInfo->chipType != PCI_CHIP_845_G &&
- pI830->PciInfo->chipType != PCI_CHIP_I830_M) {
+ if (DEVICE_ID(pI830->PciInfo) != PCI_CHIP_845_G &&
+ DEVICE_ID(pI830->PciInfo) != PCI_CHIP_I830_M) {
I830SetParam(pScrn, I830_SETPARAM_USE_MI_BATCHBUFFER_START, 1 );
}
pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
- pI830DRI->deviceID = pI830->PciInfo->chipType;
+ pI830DRI->deviceID = DEVICE_ID(pI830->PciInfo);
pI830DRI->width = pScrn->virtualX;
pI830DRI->height = pScrn->virtualY;
pI830DRI->mem = pScrn->videoRam * 1024;
@@ -996,12 +1002,20 @@ I830DRIResume(ScreenPtr pScreen)
{
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) |
+ pI830->PciInfo->bus),
+ pI830->PciInfo->dev,
+ pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1084,12 +1098,20 @@ I830DRIFinishScreenInit(ScreenPtr pScreen)
I830DRIPtr pI830DRI = (I830DRIPtr) pI830->pDRIInfo->devPrivate;
pI830DRI->irq = drmGetInterruptFromBusID(pI830->drmSubFD,
+#if XSERVER_LIBPCIACCESS
+ ((pI830->PciInfo->domain << 8) |
+ pI830->PciInfo->bus),
+ pI830->PciInfo->dev,
+ pI830->PciInfo->func
+#else
((pciConfigPtr) pI830->
PciInfo->thisCard)->busnum,
((pciConfigPtr) pI830->
PciInfo->thisCard)->devnum,
((pciConfigPtr) pI830->
- PciInfo->thisCard)->funcnum);
+ PciInfo->thisCard)->funcnum
+#endif
+ );
if (drmCtlInstHandler(pI830->drmSubFD, pI830DRI->irq)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1242,20 +1264,20 @@ I830DRISwapContext(ScreenPtr pScreen, DRISyncType syncType,
#ifdef DAMAGE
/* Try flipping back to the front page if necessary */
if (sPriv && !sPriv->pf_enabled && sPriv->pf_current_page != 0) {
- drm_i915_flip_t flip = { .pipes = 0 };
+ drm_i915_flip_t flip = { .planes = 0 };
if (sPriv->pf_current_page & (0x3 << 2)) {
sPriv->pf_current_page = sPriv->pf_current_page & 0x3;
sPriv->pf_current_page |= (sPriv->third_handle ? 2 : 1) << 2;
- flip.pipes |= 0x2;
+ flip.planes |= 0x2;
}
if (sPriv->pf_current_page & 0x3) {
sPriv->pf_current_page = sPriv->pf_current_page & (0x3 << 2);
sPriv->pf_current_page |= sPriv->third_handle ? 2 : 1;
- flip.pipes |= 0x1;
+ flip.planes |= 0x1;
}
drmCommandWrite(pI830->drmSubFD, DRM_I915_FLIP, &flip, sizeof(flip));
@@ -1590,14 +1612,14 @@ I830DRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num)
unsigned numvisible[2] = { 0, 0 };
int i, j;
- crtcBox[0].x1 = sPriv->pipeA_x;
- crtcBox[0].y1 = sPriv->pipeA_y;
- crtcBox[0].x2 = crtcBox[0].x1 + sPriv->pipeA_w;
- crtcBox[0].y2 = crtcBox[0].y1 + sPriv->pipeA_h;
- crtcBox[1].x1 = sPriv->pipeB_x;
- crtcBox[1].y1 = sPriv->pipeB_y;
- crtcBox[1].x2 = crtcBox[1].x1 + sPriv->pipeB_w;
- crtcBox[1].y2 = crtcBox[1].y1 + sPriv->pipeB_h;
+ crtcBox[0].x1 = sPriv->planeA_x;
+ crtcBox[0].y1 = sPriv->planeA_y;
+ crtcBox[0].x2 = crtcBox[0].x1 + sPriv->planeA_w;
+ crtcBox[0].y2 = crtcBox[0].y1 + sPriv->planeA_h;
+ crtcBox[1].x1 = sPriv->planeB_x;
+ crtcBox[1].y1 = sPriv->planeB_y;
+ crtcBox[1].x2 = crtcBox[1].x1 + sPriv->planeB_w;
+ crtcBox[1].y2 = crtcBox[1].y1 + sPriv->planeB_h;
for (i = 0; i < 2; i++) {
for (j = 0; j < num; j++) {
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 1fbf9d56..dc271700 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -201,6 +201,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "dri.h"
#include <sys/ioctl.h>
#include <errno.h>
+#ifdef XF86DRI_MM
+#include "xf86mm.h"
+#endif
#endif
#ifdef I830_USE_EXA
@@ -416,16 +419,23 @@ static int
I830DetectMemory(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+#if !XSERVER_LIBPCIACCESS
PCITAG bridge;
- CARD16 gmch_ctrl;
+#endif
+ uint16_t gmch_ctrl;
int memsize = 0, gtt_size;
int range;
#if 0
VbeInfoBlock *vbeInfo;
#endif
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *bridge = intel_host_bridge ();
+ pci_device_cfg_read_u16(bridge, & gmch_ctrl, I830_GMCH_CTRL);
+#else
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
+#endif
if (IS_I965G(pI830)) {
/* The 965 may have a GTT that is actually larger than is necessary
@@ -471,6 +481,9 @@ I830DetectMemory(ScrnInfoPtr pScrn)
range = gtt_size + 4;
if (IS_I85X(pI830) || IS_I865G(pI830) || IS_I9XX(pI830)) {
+ /* G33 has seperate GTT stolen mem */
+ if (IS_G33CLASS(pI830))
+ range = 0;
switch (gmch_ctrl & I830_GMCH_GMS_MASK) {
case I855_GMCH_GMS_STOLEN_1M:
memsize = MB(1) - KB(range);
@@ -541,9 +554,30 @@ I830DetectMemory(ScrnInfoPtr pScrn)
static Bool
I830MapMMIO(ScrnInfoPtr pScrn)
{
+#if XSERVER_LIBPCIACCESS
+ int err;
+ struct pci_device *device;
+#else
int mmioFlags;
+#endif
I830Ptr pI830 = I830PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ device = pI830->PciInfo;
+ err = pci_device_map_range (device,
+ pI830->MMIOAddr,
+ I810_REG_SIZE,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ (void **) &pI830->MMIOBase);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map mmio range. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+#else
+
#if !defined(__alpha__)
mmioFlags = VIDMEM_MMIO | VIDMEM_READSIDEEFFECT;
#else
@@ -555,33 +589,49 @@ I830MapMMIO(ScrnInfoPtr pScrn)
pI830->MMIOAddr, I810_REG_SIZE);
if (!pI830->MMIOBase)
return FALSE;
+#endif
/* Set up the GTT mapping for the various places it has been moved over
* time.
*/
if (IS_I9XX(pI830)) {
- if (IS_I965G(pI830)) {
- pI830->GTTBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pI830->PciTag,
- pI830->MMIOAddr + (512 * 1024),
- 512 * 1024);
- if (pI830->GTTBase == NULL)
- return FALSE;
- } else {
- CARD32 gttaddr = pI830->PciInfo->memBase[3] & 0xFFFFFF00;
-
- pI830->GTTBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
- pI830->PciTag,
- gttaddr,
- pI830->FbMapSize / 1024);
- if (pI830->GTTBase == NULL)
- return FALSE;
+ CARD32 gttaddr;
+
+ if (IS_I965G(pI830))
+ {
+ gttaddr = pI830->MMIOAddr + (512 * 1024);
+ pI830->GTTMapSize = 512 * 1024;
}
+ else
+ {
+ gttaddr = I810_MEMBASE(pI830->PciInfo, 3) & 0xFFFFFF00;
+ pI830->GTTMapSize = pI830->FbMapSize / 1024;
+ }
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_range (device,
+ gttaddr, pI830->GTTMapSize,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ (void **) &pI830->GTTBase);
+ if (err)
+ {
+ xf86DrvMsg (pScrn->scrnIndex, X_ERROR,
+ "Unable to map GTT range. %s (%d)\n",
+ strerror (err), err);
+ return FALSE;
+ }
+#else
+ pI830->GTTBase = xf86MapPciMem(pScrn->scrnIndex, mmioFlags,
+ pI830->PciTag,
+ gttaddr, pI830->GTTMapSize);
+ if (pI830->GTTBase == NULL)
+ return FALSE;
+#endif
} else {
/* The GTT aperture on i830 is write-only. We could probably map the
* actual physical pages that back it, but leave it alone for now.
*/
pI830->GTTBase = NULL;
+ pI830->GTTMapSize = 0;
}
return TRUE;
@@ -592,6 +642,10 @@ I830MapMem(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
long i;
+#if XSERVER_LIBPCIACCESS
+ struct pci_device *const device = pI830->PciInfo;
+ int err;
+#endif
for (i = 2; i < pI830->FbMapSize; i <<= 1) ;
pI830->FbMapSize = i;
@@ -599,11 +653,17 @@ I830MapMem(ScrnInfoPtr pScrn)
if (!I830MapMMIO(pScrn))
return FALSE;
+#if XSERVER_LIBPCIACCESS
+ err = pci_device_map_range (device, pI830->LinearAddr, pI830->FbMapSize,
+ PCI_DEV_MAP_FLAG_WRITABLE | PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+ (void **) &pI830->FbBase);
+#else
pI830->FbBase = xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
pI830->PciTag,
pI830->LinearAddr, pI830->FbMapSize);
if (!pI830->FbBase)
return FALSE;
+#endif
if (I830IsPrimary(pScrn) && pI830->LpRing->mem != NULL) {
pI830->LpRing->virtual_start =
@@ -618,17 +678,21 @@ I830UnmapMMIO(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_range (pI830->PciInfo, pI830->MMIOBase, I810_REG_SIZE);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI830->MMIOBase,
I810_REG_SIZE);
+#endif
pI830->MMIOBase = NULL;
if (IS_I9XX(pI830)) {
- if (IS_I965G(pI830))
- xf86UnMapVidMem(pScrn->scrnIndex, pI830->GTTBase, 512 * 1024);
- else {
- xf86UnMapVidMem(pScrn->scrnIndex, pI830->GTTBase,
- pI830->FbMapSize / 1024);
- }
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_range (pI830->PciInfo, pI830->GTTBase, pI830->GTTMapSize);
+#else
+ xf86UnMapVidMem(pScrn->scrnIndex, pI830->GTTBase, pI830->GTTMapSize);
+#endif
+ pI830->GTTBase = NULL;
}
}
@@ -637,8 +701,12 @@ I830UnmapMem(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
+#if XSERVER_LIBPCIACCESS
+ pci_device_unmap_range (pI830->PciInfo, pI830->FbBase, pI830->FbMapSize);
+#else
xf86UnMapVidMem(pScrn->scrnIndex, (pointer) pI830->FbBase,
pI830->FbMapSize);
+#endif
pI830->FbBase = NULL;
I830UnmapMMIO(pScrn);
return TRUE;
@@ -789,7 +857,8 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
{
xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
I830Ptr pI830 = I830PTR(pScrn);
- int o;
+ int o, c;
+ Bool lvds_detected = FALSE;
/* everyone has at least a single analog output */
i830_crt_init(pScrn);
@@ -812,7 +881,9 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
xf86OutputPtr output = config->output[o];
I830OutputPrivatePtr intel_output = output->driver_private;
int crtc_mask;
- int c;
+
+ if (intel_output->type == I830_OUTPUT_LVDS)
+ lvds_detected = TRUE;
crtc_mask = 0;
for (c = 0; c < config->num_crtc; c++)
@@ -828,6 +899,22 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
}
}
+static int
+I830LVDSPresent(ScrnInfoPtr pScrn)
+{
+ xf86CrtcConfigPtr config = XF86_CRTC_CONFIG_PTR (pScrn);
+ int o, lvds_detected = FALSE;
+
+ for (o = 0; o < config->num_output; o++) {
+ xf86OutputPtr output = config->output[o];
+ I830OutputPrivatePtr intel_output = output->driver_private;
+
+ if (intel_output->type == I830_OUTPUT_LVDS)
+ lvds_detected = TRUE;
+ }
+
+ return lvds_detected;
+}
/**
* Setup the CRTCs
*/
@@ -953,6 +1040,8 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
const char *chipname;
int num_pipe;
int max_width, max_height;
+ uint32_t capid;
+ int fb_bar, mmio_bar;
if (pScrn->numEntities != 1)
return FALSE;
@@ -997,8 +1086,10 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
return FALSE;
pI830->PciInfo = xf86GetPciInfoForEntity(pI830->pEnt->index);
+#if !XSERVER_LIBPCIACCESS
pI830->PciTag = pciTag(pI830->PciInfo->bus, pI830->PciInfo->device,
pI830->PciInfo->func);
+#endif
/* Allocate an entity private if necessary */
if (xf86IsEntityShared(pScrn->entityList[0])) {
@@ -1087,7 +1178,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
/* We have to use PIO to probe, because we haven't mapped yet. */
I830SetPIOAccess(pI830);
- switch (pI830->PciInfo->chipType) {
+ switch (DEVICE_ID(pI830->PciInfo)) {
case PCI_CHIP_I830_M:
chipname = "830M";
break;
@@ -1096,8 +1187,12 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
break;
case PCI_CHIP_I855_GM:
/* Check capid register to find the chipset variant */
- pI830->variant = (pciReadLong(pI830->PciTag, I85X_CAPID)
- >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_read_u32 (pI830->PciInfo, &capid, I85X_CAPID);
+#else
+ capid = pciReadLong (pI830->PciTag, I85X_CAPID);
+#endif
+ pI830->variant = (capid >> I85X_VARIANT_SHIFT) & I85X_VARIANT_MASK;
switch (pI830->variant) {
case I855_GM:
chipname = "855GM";
@@ -1181,11 +1276,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
from = X_CONFIG;
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipID override: 0x%04X\n",
pI830->pEnt->device->chipID);
- pI830->PciInfo->chipType = pI830->pEnt->device->chipID;
+ DEVICE_ID(pI830->PciInfo) = pI830->pEnt->device->chipID;
} else {
from = X_PROBED;
pScrn->chipset = (char *)xf86TokenToString(I830Chipsets,
- pI830->PciInfo->chipType);
+ DEVICE_ID(pI830->PciInfo));
}
if (pI830->pEnt->device->chipRev >= 0) {
@@ -1196,18 +1291,23 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n",
(pScrn->chipset != NULL) ? pScrn->chipset : "Unknown i8xx");
+ if (IS_I9XX(pI830))
+ {
+ fb_bar = 2;
+ mmio_bar = 0;
+ }
+ else
+ {
+ fb_bar = 0;
+ mmio_bar = 1;
+ }
+
if (pI830->pEnt->device->MemBase != 0) {
pI830->LinearAddr = pI830->pEnt->device->MemBase;
from = X_CONFIG;
} else {
- if (IS_I9XX(pI830)) {
- pI830->LinearAddr = pI830->PciInfo->memBase[2] & 0xFF000000;
- from = X_PROBED;
- } else if (pI830->PciInfo->memBase[1] != 0) {
- /* XXX Check mask. */
- pI830->LinearAddr = pI830->PciInfo->memBase[0] & 0xFF000000;
- from = X_PROBED;
- } else {
+ pI830->LinearAddr = I810_MEMBASE (pI830->PciInfo, fb_bar);
+ if (pI830->LinearAddr == 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid FB address in PCI config space\n");
PreInitCleanup(pScrn);
@@ -1222,13 +1322,8 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
pI830->MMIOAddr = pI830->pEnt->device->IOBase;
from = X_CONFIG;
} else {
- if (IS_I9XX(pI830)) {
- pI830->MMIOAddr = pI830->PciInfo->memBase[0] & 0xFFF80000;
- from = X_PROBED;
- } else if (pI830->PciInfo->memBase[1]) {
- pI830->MMIOAddr = pI830->PciInfo->memBase[1] & 0xFFF80000;
- from = X_PROBED;
- } else {
+ pI830->MMIOAddr = I810_MEMBASE (pI830->PciInfo, mmio_bar);
+ if (pI830->MMIOAddr == 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"No valid MMIO address in PCI config space\n");
PreInitCleanup(pScrn);
@@ -1258,11 +1353,19 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
xf86CrtcSetSizeRange (pScrn, 320, 200, max_width, max_height);
if (IS_I830(pI830) || IS_845G(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ uint16_t gmch_ctrl;
+ struct pci_device *bridge;
+
+ bridge = intel_host_bridge ();
+ pci_device_cfg_read_u16 (bridge, &gmch_ctrl, I830_GMCH_CTRL);
+#else
PCITAG bridge;
CARD16 gmch_ctrl;
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
+#endif
if ((gmch_ctrl & I830_GMCH_MEM_MASK) == I830_GMCH_MEM_128M) {
pI830->FbMapSize = 0x8000000;
} else {
@@ -1270,8 +1373,12 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
}
} else {
if (IS_I9XX(pI830)) {
+#if XSERVER_LIBPCIACCESS
+ pI830->FbMapSize = pI830->PciInfo->regions[fb_bar].size;
+#else
pI830->FbMapSize = 1UL << pciGetBaseSize(pI830->PciTag, 2, TRUE,
NULL);
+#endif
} else {
/* 128MB aperture for later i8xx series. */
pI830->FbMapSize = 0x8000000;
@@ -1301,7 +1408,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
(1 << 23) | (2 << 16));
#endif
- if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G)
+ if (DEVICE_ID(pI830->PciInfo) == PCI_CHIP_E7221_G)
num_pipe = 1;
else
if (IS_MOBILE(pI830) || IS_I9XX(pI830))
@@ -1560,7 +1667,11 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
memset(&req, 0, sizeof(req));
req.majorversion = 2;
+#if EXA_VERSION_MINOR >= 2
+ req.minorversion = 2;
+#else
req.minorversion = 1;
+#endif
if (!LoadSubModule(pScrn->module, "exa", NULL, NULL, NULL, &req,
&errmaj, &errmin)) {
LoaderErrorMsg(NULL, "exa", errmaj, errmin);
@@ -2155,9 +2266,13 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
VisualPtr visual;
I830Ptr pI8301 = NULL;
unsigned long sys_mem;
- int i;
+ int i, c;
Bool allocation_done = FALSE;
MessageType from;
+#ifdef XF86DRI
+ Bool driDisabled;
+ xf86CrtcConfigPtr config;
+#endif
pScrn = xf86Screens[pScreen->myNum];
pI830 = I830PTR(pScrn);
@@ -2580,6 +2695,31 @@ I830ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv)
if (!pI830->directRenderingEnabled)
i830_free_3d_memory(pScrn);
+ config = XF86_CRTC_CONFIG_PTR(pScrn);
+
+ /*
+ * If an LVDS display is present, swap the plane/pipe mappings so we can
+ * use FBC on the builtin display.
+ * Note: 965+ chips can compress either plane, so we leave the mapping
+ * alone in that case.
+ * Also make sure the DRM can handle the swap.
+ */
+ if (I830LVDSPresent(pScrn) && !IS_I965GM(pI830) &&
+ (!pI830->directRenderingEnabled ||
+ (pI830->directRenderingEnabled && pI830->drmMinor >= 10))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "adjusting plane->pipe mappings "
+ "to allow for framebuffer compression\n");
+ for (c = 0; c < config->num_crtc; c++) {
+ xf86CrtcPtr crtc = config->crtc[c];
+ I830CrtcPrivatePtr intel_crtc = crtc->driver_private;
+
+ if (intel_crtc->pipe == 0)
+ intel_crtc->plane = 1;
+ else if (intel_crtc->pipe == 1)
+ intel_crtc->plane = 0;
+ }
+ }
+
#else
pI830->directRenderingEnabled = FALSE;
#endif
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 353ab8f2..c97e514d 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -124,6 +124,22 @@ i830_pixmap_tiled(PixmapPtr pPixmap)
return FALSE;
}
+static Bool
+i830_exa_pixmap_is_offscreen(PixmapPtr pPixmap)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pPixmap->drawable.pScreen->myNum];
+ I830Ptr pI830 = I830PTR(pScrn);
+
+ if ((void *)pPixmap->devPrivate.ptr >= (void *)pI830->FbBase &&
+ (void *)pPixmap->devPrivate.ptr <
+ (void *)(pI830->FbBase + pI830->FbMapSize))
+ {
+ return TRUE;
+ } else {
+ return FALSE;
+ }
+}
+
/**
* I830EXASync - wait for a command to finish
* @pScreen: current screen
@@ -456,7 +472,17 @@ I830EXAInit(ScreenPtr pScreen)
pI830->bufferOffset = 0;
pI830->EXADriverPtr->exa_major = 2;
+ /* If compiled against EXA 2.2, require 2.2 so we can use the
+ * PixmapIsOffscreen hook.
+ */
+#if EXA_VERSION_MINOR >= 2
+ pI830->EXADriverPtr->exa_minor = 2;
+#else
pI830->EXADriverPtr->exa_minor = 1;
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "EXA compatibility mode. Output rotation rendering "
+ "performance may suffer\n");
+#endif
pI830->EXADriverPtr->memoryBase = pI830->FbBase;
if (pI830->exa_offscreen) {
pI830->EXADriverPtr->offScreenBase = pI830->exa_offscreen->offset;
@@ -557,6 +583,9 @@ I830EXAInit(ScreenPtr pScreen)
pI830->EXADriverPtr->Composite = i965_composite;
pI830->EXADriverPtr->DoneComposite = i830_done_composite;
}
+#if EXA_VERSION_MINOR >= 2
+ pI830->EXADriverPtr->PixmapIsOffscreen = i830_exa_pixmap_is_offscreen;
+#endif
/* UploadToScreen/DownloadFromScreen */
if (0)
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 18e5c2b3..0b6b1922 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -84,7 +84,11 @@ i830_lvds_set_backlight(xf86OutputPtr output, int level)
CARD32 blc_pwm_ctl;
if (i830_lvds_backlight_legacy(pI830))
+#if XSERVER_LIBPCIACCESS
+ pci_device_cfg_write_u8 (pI830->PciInfo, 0xfe, LEGACY_BACKLIGHT_BRIGHTNESS);
+#else
pciWriteByte(pI830->PciTag, LEGACY_BACKLIGHT_BRIGHTNESS, 0xfe);
+#endif
blc_pwm_ctl = INREG(BLC_PWM_CTL);
blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
diff --git a/src/i830_memory.c b/src/i830_memory.c
index 902ca2dd..42e88a69 100644
--- a/src/i830_memory.c
+++ b/src/i830_memory.c
@@ -740,7 +740,7 @@ i830_allocate_memory_bo(ScrnInfoPtr pScrn, const char *name,
* the entire Screen lifetime. This means not using buffer objects, which
* get their offsets chosen at each EnterVT time.
*/
-static i830_memory *
+i830_memory *
i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long alignment, int flags)
{
@@ -774,7 +774,7 @@ i830_allocate_memory(ScrnInfoPtr pScrn, const char *name,
* some search across all allocation options to fix this, probably, but that
* would be another rewrite.
*/
-static i830_memory *
+i830_memory *
i830_allocate_memory_tiled(ScrnInfoPtr pScrn, const char *name,
unsigned long size, unsigned long pitch,
unsigned long alignment, int flags,
@@ -1126,7 +1126,6 @@ i830_allocate_framebuffer(ScrnInfoPtr pScrn, I830Ptr pI830, BoxPtr FbMemBox,
int size;
size = 3 * pitch * pScrn->virtualY;
- size += 1920 * 1088 * 2 * 2;
size = ROUND_TO_PAGE(size);
cacheLines = (size + pitch - 1) / pitch;
@@ -1417,14 +1416,13 @@ i830_allocate_2d_memory(ScrnInfoPtr pScrn)
if (pI830->useEXA) {
if (pI830->exa_offscreen == NULL) {
/* Default EXA to having 3 screens worth of offscreen memory space
- * (for pixmaps), plus a double-buffered, 1920x1088 video's worth.
+ * (for pixmaps).
*
* XXX: It would be nice to auto-size it larger if the user
* specified a larger size, or to fit along with texture and FB
* memory if a low videoRam is specified.
*/
size = 3 * pitch * pScrn->virtualY;
- size += 1920 * 1088 * 2 * 2;
size = ROUND_TO_PAGE(size);
/* EXA has no way to tell it that the offscreen memory manager has
@@ -1995,41 +1993,3 @@ I830CheckAvailableMemory(ScrnInfoPtr pScrn)
return maxPages * 4;
}
-
-#ifdef I830_USE_XAA
-/**
- * Allocates memory from the XF86 linear allocator, but also purges
- * memory if possible to cause the allocation to succeed.
- */
-FBLinearPtr
-i830_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length,
- int granularity,
- MoveLinearCallbackProcPtr moveCB,
- RemoveLinearCallbackProcPtr removeCB,
- pointer privData)
-{
- FBLinearPtr linear;
- int max_size;
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
- if (linear != NULL)
- return linear;
-
- /* The above allocation didn't succeed, so purge unlocked stuff and try
- * again.
- */
- xf86QueryLargestOffscreenLinear(pScreen, &max_size, granularity,
- PRIORITY_EXTREME);
-
- if (max_size < length)
- return NULL;
-
- xf86PurgeUnlockedOffscreenAreas(pScreen);
-
- linear = xf86AllocateOffscreenLinear(pScreen, length, granularity, moveCB,
- removeCB, privData);
-
- return linear;
-}
-#endif
diff --git a/src/i830_quirks.c b/src/i830_quirks.c
index b75baefd..28b8ff93 100644
--- a/src/i830_quirks.c
+++ b/src/i830_quirks.c
@@ -54,17 +54,27 @@ static void quirk_mac_mini (I830Ptr pI830)
pI830->quirk_flag |= QUIRK_IGNORE_MACMINI_LVDS;
}
+/* keep this list sorted by OEM, then by chip ID */
static i830_quirk i830_quirk_list[] = {
+ /* Aopen mini pc */
+ { PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
+
+ /* Apple Mac mini has no lvds, but macbook pro does */
+ { PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
+
+ /* Dell Latitude X1 */
+ { PCI_CHIP_I945_GM, 0x1028, 0x01a3, quirk_ignore_tv },
+
+ /* Lenovo X60s has no TV output */
+ { PCI_CHIP_I945_GM, 0x17aa, 0x201a, quirk_ignore_tv },
/* Lenovo T61 has no TV output */
{ PCI_CHIP_I965_GM, 0x17aa, 0x20b5, quirk_ignore_tv },
- /* Panasonic Toughbook CF-Y4 has no TV output */
- { PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
/* Lenovo 3000 v200 */
{ PCI_CHIP_I965_GM, 0x17aa, 0x3c18, quirk_ignore_tv },
- /* Aopen mini pc */
- { PCI_CHIP_I945_GM, 0xa0a0, SUBSYS_ANY, quirk_ignore_lvds },
- /* Mac mini has no lvds, but macbook pro does */
- { PCI_CHIP_I945_GM, 0x8086, 0x7270, quirk_mac_mini },
+
+ /* Panasonic Toughbook CF-Y4 has no TV output */
+ { PCI_CHIP_I915_GM, 0x10f7, 0x8338, quirk_ignore_tv },
+
{ 0, 0, 0, NULL },
};
@@ -74,9 +84,9 @@ void i830_fixup_devices(ScrnInfoPtr scrn)
i830_quirk_ptr p = i830_quirk_list;
while (p && p->chipType != 0) {
- if (pI830->PciInfo->chipType == p->chipType &&
- pI830->PciInfo->subsysVendor == p->subsysVendor &&
- (pI830->PciInfo->subsysCard == p->subsysCard ||
+ if (DEVICE_ID(pI830->PciInfo) == p->chipType &&
+ SUBVENDOR_ID(pI830->PciInfo) == p->subsysVendor &&
+ (SUBSYS_ID(pI830->PciInfo) == p->subsysCard ||
p->subsysCard == SUBSYS_ANY))
p->hook(pI830);
++p;
diff --git a/src/i830_tv.c b/src/i830_tv.c
index e3aeaf9c..940250e5 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -878,11 +878,11 @@ i830_tv_restore(xf86OutputPtr output)
OUTREG(TV_CLR_LEVEL, dev_priv->save_TV_CLR_LEVEL);
{
- int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
- int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+ int pipeconf_reg = (intel_crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (intel_crtc->plane == 0) ? DSPACNTR : DSPBCNTR;
int pipeconf = INREG(pipeconf_reg);
int dspcntr = INREG(dspcntr_reg);
- int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+ int dspbase_reg = (intel_crtc->plane == 0) ? DSPABASE : DSPBBASE;
/* Pipe must be off here */
OUTREG(dspcntr_reg, dspcntr & ~DISPLAY_PLANE_ENABLE);
/* Flush the plane changes */
@@ -1138,7 +1138,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
tv_mode->dda3_inc << TV_SCDDA3_INC_SHIFT;
/* Enable two fixes for the chips that need them. */
- if (pI830->PciInfo->chipType < PCI_CHIP_I945_G)
+ if (DEVICE_ID(pI830->PciInfo) < PCI_CHIP_I945_G)
tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
OUTREG(TV_H_CTL_1, hctl1);
@@ -1182,11 +1182,11 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
OUTREG(TV_CLR_LEVEL, ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
(video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
{
- int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
- int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+ int pipeconf_reg = (intel_crtc->pipe == 0) ? PIPEACONF : PIPEBCONF;
+ int dspcntr_reg = (intel_crtc->plane == 0) ? DSPACNTR : DSPBCNTR;
int pipeconf = INREG(pipeconf_reg);
int dspcntr = INREG(dspcntr_reg);
- int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+ int dspbase_reg = (intel_crtc->plane == 0) ? DSPABASE : DSPBBASE;
int xpos = 0x0, ypos = 0x0;
unsigned int xsize, ysize;
/* Pipe must be off here */
@@ -1264,14 +1264,13 @@ static const DisplayModeRec reported_modes[] = {
* \return TRUE if TV is connected.
* \return FALSE if TV is disconnected.
*/
-static void
+static int
i830_tv_detect_type (xf86CrtcPtr crtc,
xf86OutputPtr output)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
I830OutputPrivatePtr intel_output = output->driver_private;
- struct i830_tv_priv *dev_priv = intel_output->dev_priv;
CARD32 tv_ctl, save_tv_ctl;
CARD32 tv_dac, save_tv_dac;
int type = TV_TYPE_UNKNOWN;
@@ -1337,9 +1336,14 @@ i830_tv_detect_type (xf86CrtcPtr crtc,
type = TV_TYPE_NONE;
}
- dev_priv->type = type;
+ return type;
}
+#ifdef RANDR_12_INTERFACE
+static int
+i830_tv_format_configure_property (xf86OutputPtr output);
+#endif
+
/**
* Detect the TV connection.
*
@@ -1354,17 +1358,26 @@ i830_tv_detect(xf86OutputPtr output)
I830OutputPrivatePtr intel_output = output->driver_private;
struct i830_tv_priv *dev_priv = intel_output->dev_priv;
int dpms_mode;
+ int type = dev_priv->type;
mode = reported_modes[0];
xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
crtc = i830GetLoadDetectPipe (output, &mode, &dpms_mode);
if (crtc)
{
- i830_tv_detect_type (crtc, output);
+ type = i830_tv_detect_type (crtc, output);
i830ReleaseLoadDetectPipe (output, dpms_mode);
}
- switch (dev_priv->type) {
+ if (type != dev_priv->type)
+ {
+ dev_priv->type = type;
+#ifdef RANDR_12_INTERFACE
+ i830_tv_format_configure_property (output);
+#endif
+ }
+
+ switch (type) {
case TV_TYPE_NONE:
return XF86OutputStatusDisconnected;
case TV_TYPE_UNKNOWN:
@@ -1477,6 +1490,35 @@ i830_tv_format_set_property (xf86OutputPtr output)
return err == Success;
}
+
+/**
+ * Configure the TV_FORMAT property to list only supported formats
+ *
+ * Unless the connector is component, list only the formats supported by
+ * svideo and composite
+ */
+
+static int
+i830_tv_format_configure_property (xf86OutputPtr output)
+{
+ I830OutputPrivatePtr intel_output = output->driver_private;
+ struct i830_tv_priv *dev_priv = intel_output->dev_priv;
+ Atom current_atoms[NUM_TV_MODES];
+ int num_atoms = 0;
+ int i;
+
+ if (!output->randr_output)
+ return Success;
+
+ for (i = 0; i < NUM_TV_MODES; i++)
+ if (!tv_modes[i].component_only || dev_priv->type == TV_TYPE_COMPONENT)
+ current_atoms[num_atoms++] = tv_format_name_atoms[i];
+
+ return RRConfigureOutputProperty(output->randr_output, tv_format_atom,
+ TRUE, FALSE, FALSE,
+ num_atoms, (INT32 *) current_atoms);
+}
+
#endif /* RANDR_12_INTERFACE */
static void
@@ -1500,10 +1542,8 @@ i830_tv_create_resources(xf86OutputPtr output)
strlen (tv_modes[i].name),
TRUE);
- err = RRConfigureOutputProperty(output->randr_output, tv_format_atom,
- TRUE, FALSE, FALSE,
- NUM_TV_MODES, (INT32 *) tv_format_name_atoms);
-
+ err = i830_tv_format_configure_property (output);
+
if (err != 0) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"RRConfigureOutputProperty error, %d\n", err);
diff --git a/src/i830_video.c b/src/i830_video.c
index b4f9e746..2128eb88 100644
--- a/src/i830_video.c
+++ b/src/i830_video.c
@@ -107,9 +107,6 @@ static int I830QueryImageAttributesTextured(ScrnInfoPtr, int, unsigned short *,
static void I830BlockHandler(int, pointer, pointer, pointer);
-static void
-I830FreeMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear);
-
#define MAKE_ATOM(a) MakeAtom(a, sizeof(a) - 1, TRUE)
static Atom xvBrightness, xvContrast, xvSaturation, xvColorKey, xvPipe, xvDoubleBuffer;
@@ -841,7 +838,7 @@ I830SetupImageVideoOverlay(ScreenPtr pScreen)
pPriv->saturation = 128;
pPriv->current_crtc = NULL;
pPriv->desired_crtc = NULL;
- memset(&pPriv->linear, 0, sizeof(pPriv->linear));
+ pPriv->buf = NULL;
pPriv->currentBuf = 0;
pPriv->gamma5 = 0xc0c0c0;
pPriv->gamma4 = 0x808080;
@@ -955,7 +952,7 @@ I830SetupImageVideoTextured(ScreenPtr pScreen)
pPriv->textured = TRUE;
pPriv->videoStatus = 0;
- memset(&pPriv->linear, 0, sizeof(pPriv->linear));
+ pPriv->buf = NULL;
pPriv->currentBuf = 0;
pPriv->doubleBuffer = 0;
@@ -1015,7 +1012,10 @@ I830StopVideo(ScrnInfoPtr pScrn, pointer data, Bool shutdown)
if (pI830->entityPrivate)
pI830->entityPrivate->XvInUse = -1;
}
- I830FreeMemory(pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be unbound.
+ */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, pPriv->buf);
pPriv->videoStatus = 0;
} else {
if (pPriv->videoStatus & CLIENT_VIDEO_ON) {
@@ -1712,11 +1712,14 @@ i830_covering_crtc (ScrnInfoPtr pScrn,
i830_crtc_box (crtc, &crtc_box);
i830_box_intersect (&cover_box, &crtc_box, box);
coverage = i830_box_area (&cover_box);
+ if (coverage && crtc == desired)
+ {
+ *crtc_box_ret = crtc_box;
+ return crtc;
+ }
if (coverage > best_coverage)
{
*crtc_box_ret = crtc_box;
- if (crtc == desired)
- return crtc;
best_crtc = crtc;
best_coverage = coverage;
}
@@ -2075,112 +2078,6 @@ i830_display_video(ScrnInfoPtr pScrn, xf86CrtcPtr crtc,
i830_overlay_continue (pScrn, scaleChanged);
}
-#ifdef I830_USE_EXA
-static void
-I830VideoSave(ScreenPtr pScreen, ExaOffscreenArea *area)
-{
- struct linear_alloc *linear = area->privData;
-
- linear->exa = NULL;
- linear->offset = 0;
-}
-#endif /* I830_USE_EXA */
-
-/**
- * Allocates linear memory using the XFree86 (XAA) or EXA allocator.
- *
- * \param pPriv adaptor the memory is being allocated for.
- * \param size size of the allocation, in bytes.
- * \param alignment offset alignment of the allocation, in bytes.
- *
- * \return byte offset of the allocated memory from the start of framebuffer.
- */
-static void
-I830AllocateMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear, int size,
- int align)
-{
- ScreenPtr pScreen = pScrn->pScreen;
- I830Ptr pI830 = I830PTR(pScrn);
-
-#ifdef I830_USE_EXA
- if (pI830->useEXA) {
- if (linear->exa != NULL) {
- if (linear->exa->size >= size)
- return;
-
- exaOffscreenFree(pScreen, linear->exa);
- linear->offset = 0;
- }
-
- linear->exa = exaOffscreenAlloc(pScreen, size, align, TRUE,
- I830VideoSave, linear);
- if (linear->exa == NULL)
- return;
- linear->offset = linear->exa->offset;
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- /* Converts an offset from XAA's linear allocator to an offset from the
- * start of fb.
- */
-#define XAA_OFFSET_TO_OFFSET(x) \
- (pI830->front_buffer->offset + (x * pI830->cpp))
-
- /* The XFree86 linear allocator operates in units of screen pixels,
- * sadly.
- */
- size = (size + pI830->cpp - 1) / pI830->cpp;
- align = (align + pI830->cpp - 1) / pI830->cpp;
-
- if (linear->xaa != NULL) {
- if (linear->xaa->size >= size) {
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- return;
- }
-
- if (xf86ResizeOffscreenLinear(linear->xaa, size)) {
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- return;
- }
-
- xf86FreeOffscreenLinear(linear->xaa);
- }
-
- linear->xaa = i830_xf86AllocateOffscreenLinear(pScreen, size, align,
- NULL, NULL, NULL);
- if (linear->xaa == NULL)
- return;
-
- linear->offset = XAA_OFFSET_TO_OFFSET(linear->xaa->offset);
- }
-#endif /* I830_USE_XAA */
-}
-
-static void
-I830FreeMemory(ScrnInfoPtr pScrn, struct linear_alloc *linear)
-{
- I830Ptr pI830 = I830PTR(pScrn);
-
-#ifdef I830_USE_EXA
- if (pI830->useEXA) {
- if (linear->exa != NULL) {
- exaOffscreenFree(pScrn->pScreen, linear->exa);
- linear->exa = NULL;
- }
- }
-#endif /* I830_USE_EXA */
-#ifdef I830_USE_XAA
- if (!pI830->useEXA) {
- if (linear->xaa != NULL) {
- xf86FreeOffscreenLinear(linear->xaa);
- linear->xaa = NULL;
- }
- }
-#endif /* I830_USE_XAA */
- linear->offset = 0;
-}
-
static Bool
i830_clip_video_helper (ScrnInfoPtr pScrn,
xf86CrtcPtr *crtc_ret,
@@ -2293,7 +2190,7 @@ I830PutImage(ScrnInfoPtr pScrn,
int top, left, npixels, nlines, size;
BoxRec dstBox;
int pitchAlignMask;
- int extraLinear;
+ int alloc_size, extraLinear;
xf86CrtcPtr crtc;
if (pPriv->textured)
@@ -2410,19 +2307,38 @@ I830PutImage(ScrnInfoPtr pScrn,
else
extraLinear = 0;
- /* size is multiplied by 2 because we have two buffers that are flipping */
- I830AllocateMemory(pScrn, &pPriv->linear,
- extraLinear + (pPriv->doubleBuffer ? size * 2 : size),
- 16);
+ alloc_size = size;
+ if (pPriv->doubleBuffer)
+ alloc_size *= 2;
+ alloc_size += extraLinear;
- if (pPriv->linear.offset == 0)
+ if (pPriv->buf) {
+ /* Wait for any previous acceleration to the buffer to have completed.
+ * When we start using BOs for rendering, we won't have to worry
+ * because mapping or freeing will take care of it automatically.
+ */
+ I830Sync(pScrn);
+ }
+
+ /* Free the current buffer if we're going to have to reallocate */
+ if (pPriv->buf && pPriv->buf->size < alloc_size) {
+ i830_free_memory(pScrn, pPriv->buf);
+ pPriv->buf = NULL;
+ }
+
+ if (pPriv->buf == NULL) {
+ pPriv->buf = i830_allocate_memory(pScrn, "xv buffer", alloc_size, 16,
+ 0);
+ }
+
+ if (pPriv->buf == NULL)
return BadAlloc;
- pPriv->extra_offset = pPriv->linear.offset +
+ pPriv->extra_offset = pPriv->buf->offset +
(pPriv->doubleBuffer ? size * 2 : size);
/* fixup pointers */
- pPriv->YBuf0offset = pPriv->linear.offset;
+ pPriv->YBuf0offset = pPriv->buf->offset;
if (pI830->rotation & (RR_Rotate_90 | RR_Rotate_270)) {
pPriv->UBuf0offset = pPriv->YBuf0offset + (dstPitch * 2 * width);
pPriv->VBuf0offset = pPriv->UBuf0offset + (dstPitch * width / 2);
@@ -2654,7 +2570,11 @@ I830BlockHandler(int i,
}
} else { /* FREE_TIMER */
if (pPriv->freeTime < now) {
- I830FreeMemory(pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be
+ * unbound.
+ */
+ I830Sync(pScrn);
+ i830_free_memory(pScrn, pPriv->buf);
pPriv->videoStatus = 0;
}
}
@@ -2666,7 +2586,7 @@ I830BlockHandler(int i,
***************************************************************************/
typedef struct {
- struct linear_alloc linear;
+ i830_memory *buf;
Bool isOn;
} OffscreenPrivRec, *OffscreenPrivPtr;
@@ -2711,8 +2631,8 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
fbpitch = pI830->cpp * pScrn->displayWidth;
size = pitch * h;
- I830AllocateMemory(pScrn, &pPriv->linear, size, 16);
- if (pPriv->linear.offset == 0) {
+ pPriv->buf = i830_allocate_memory(pScrn, "xv surface buffer", size, 16, 0);
+ if (pPriv->buf == NULL) {
xfree(surface->pitches);
xfree(surface->offsets);
xfree(pPriv);
@@ -2727,7 +2647,7 @@ I830AllocateSurface(ScrnInfoPtr pScrn,
surface->pScrn = pScrn;
surface->id = id;
surface->pitches[0] = pitch;
- surface->offsets[0] = pPriv->linear.offset;
+ surface->offsets[0] = pPriv->buf->offset;
surface->devPrivate.ptr = (pointer) pPriv;
memset(pI830->FbBase + surface->offsets[0], 0, size);
@@ -2760,10 +2680,13 @@ I830StopSurface(XF86SurfacePtr surface)
static int
I830FreeSurface(XF86SurfacePtr surface)
{
+ ScrnInfoPtr pScrn = surface->pScrn;
OffscreenPrivPtr pPriv = (OffscreenPrivPtr) surface->devPrivate.ptr;
I830StopSurface(surface);
- I830FreeMemory(surface->pScrn, &pPriv->linear);
+ /* Sync before freeing the buffer, because the pages will be unbound. */
+ I830Sync(pScrn);
+ i830_free_memory(surface->pScrn, pPriv->buf);
xfree(surface->pitches);
xfree(surface->offsets);
xfree(surface->devPrivate.ptr);
diff --git a/src/i830_video.h b/src/i830_video.h
index 7e2d1498..23954e15 100644
--- a/src/i830_video.h
+++ b/src/i830_video.h
@@ -27,18 +27,6 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "xf86.h"
#include "xf86_OSproc.h"
-/* Ugly mess to support the old XF86 allocator or EXA using the same code.
- */
-struct linear_alloc {
-#ifdef I830_USE_XAA
- FBLinearPtr xaa;
-#endif
-#ifdef I830_USE_EXA
- ExaOffscreenArea *exa;
-#endif
- unsigned int offset;
-};
-
typedef struct {
CARD32 YBuf0offset;
CARD32 UBuf0offset;
@@ -70,7 +58,7 @@ typedef struct {
CARD32 videoStatus;
Time offTime;
Time freeTime;
- struct linear_alloc linear;
+ i830_memory *buf; /** YUV data buffer */
unsigned int extra_offset;
Bool overlayOK;
diff --git a/src/i915_render.c b/src/i915_render.c
index 7546dfd7..ca85bf73 100644
--- a/src/i915_render.c
+++ b/src/i915_render.c
@@ -123,6 +123,17 @@ static CARD32 i915_get_blend_cntl(int op, PicturePtr pMask, CARD32 dst_format)
sblend = BLENDFACT_ZERO;
}
+ /* i915 engine reads 8bit color buffer into green channel in cases
+ like color buffer blending .etc, and also writes back green channel.
+ So with dst_alpha blend we should use color factor. See spec on
+ "8-bit rendering" */
+ if ((dst_format == PICT_a8) && i915_blend_op[op].dst_alpha) {
+ if (sblend == BLENDFACT_DST_ALPHA)
+ sblend = BLENDFACT_DST_COLR;
+ else if (sblend == BLENDFACT_INV_DST_ALPHA)
+ sblend = BLENDFACT_INV_DST_COLR;
+ }
+
/* If the source alpha is being used, then we should only be in a case
* where the source blend factor is 0, and the source blend value is the
* mask channels multiplied by the source picture's alpha.
diff --git a/src/reg_dumper/main.c b/src/reg_dumper/main.c
index b3c50dee..5c8ef9ed 100644
--- a/src/reg_dumper/main.c
+++ b/src/reg_dumper/main.c
@@ -40,6 +40,7 @@ int main(int argc, char **argv)
I830Rec i830;
ScrnInfoRec scrn;
int err, mmio_bar;
+ void *mmio;
err = pci_system_init();
if (err != 0) {
@@ -68,12 +69,17 @@ int main(int argc, char **argv)
mmio_bar = IS_I9XX((&i830)) ? 0 : 1;
- err = pci_device_map_region(dev, mmio_bar, 1);
+ err = pci_device_map_range (dev,
+ dev->regions[mmio_bar].base_addr,
+ dev->regions[mmio_bar].size,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ &mmio);
+
if (err != 0) {
fprintf(stderr, "Couldn't map MMIO region: %s\n", strerror(err));
exit(1);
}
- i830.mmio = i830.pci_dev->regions[mmio_bar].memory;
+ i830.mmio = mmio;
scrn.scrnIndex = 0;
scrn.pI830 = &i830;
diff --git a/src/xvmc/I810XvMC.h b/src/xvmc/I810XvMC.h
index ba8c792d..dc2cab88 100644
--- a/src/xvmc/I810XvMC.h
+++ b/src/xvmc/I810XvMC.h
@@ -41,6 +41,7 @@ THE USE OR OTHER DEALINGS IN THE SOFTWARE.
/* #define XVMC_DEBUG(x) do {x; }while(0); */
#define XVMC_DEBUG(x)
+#include <stdint.h>
#include "xf86drm.h"
#include "i810_common.h"
#include <X11/Xlibint.h>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 03:56:42 +0000