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-rw-r--r--src/i810_reg.h17
-rw-r--r--src/i830.h5
-rw-r--r--src/i830_bios.c9
-rw-r--r--src/i830_crt.c8
-rw-r--r--src/i830_cursor.c12
-rw-r--r--src/i830_display.c114
-rw-r--r--src/i830_driver.c77
-rw-r--r--src/i830_randr.c6
-rw-r--r--src/i830_sdvo.c9
9 files changed, 132 insertions, 125 deletions
diff --git a/src/i810_reg.h b/src/i810_reg.h
index e126904f..0ece7ee8 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -800,11 +800,19 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
# define PLL_P1_DIVIDE_BY_TWO (1 << 21) /* i830 */
# define PLL_REF_INPUT_DREFCLK (0 << 13)
# define PLL_REF_INPUT_TVCLKINA (1 << 13) /* i830 */
-# define PLL_REF_INPUT_TVCLKINBC (2 << 13)
+# define PLL_REF_INPUT_TVCLKINBC (2 << 13) /* SDVO TVCLKIN */
# define PLLB_REF_INPUT_SPREADSPECTRUMIN (3 << 13)
+# define PLL_LOAD_PULSE_PHASE_SHIFT 9
+/*
+ * Parallel to Serial Load Pulse phase selection.
+ * Selects the phase for the 10X DPLL clock for the PCIe
+ * digital display port. The range is 4 to 13; 10 or more
+ * is just a flip delay. The default is 6
+ */
+# define PLL_LOAD_PULSE_PHASE_MASK (0xf << PLL_LOAD_PULSE_PHASE_SHIFT)
# define DISPLAY_RATE_SELECT_FPA1 (1 << 8)
/**
- * SDVO multiplier for 945G/GM.
+ * SDVO multiplier for 945G/GM. Not used on 965.
*
* \sa DPLL_MD_UDI_MULTIPLIER_MASK
*/
@@ -848,7 +856,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
# define DPLL_MD_UDI_MULTIPLIER_MASK 0x00003f00
# define DPLL_MD_UDI_MULTIPLIER_SHIFT 8
-/** SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK. */
+/** SDVO/UDI pixel multiplier for VGA, same as DPLL_MD_UDI_MULTIPLIER_MASK.
+ * This best be set to the default value (3) or the CRT won't work. No,
+ * I don't entirely understand what this does...
+ */
# define DPLL_MD_VGA_UDI_MULTIPLIER_MASK 0x0000003f
# define DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT 0
/** @} */
diff --git a/src/i830.h b/src/i830.h
index 6a8e36e8..ef46979f 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -445,9 +445,6 @@ typedef struct _I830Rec {
/* Stolen memory support */
Bool StolenOnly;
- /* Video BIOS support. */
- vbeInfoPtr pVbe;
-
Bool swfSaved;
CARD32 saveSWF0;
CARD32 saveSWF4;
@@ -455,7 +452,7 @@ typedef struct _I830Rec {
Bool checkDevices;
/* [0] is Pipe A, [1] is Pipe B. */
- int availablePipes;
+ int num_pipes;
/* [0] is display plane A, [1] is display plane B. */
I830PipeRec pipes[MAX_DISPLAY_PIPES];
diff --git a/src/i830_bios.c b/src/i830_bios.c
index 97fb7fc3..0821845a 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -84,15 +84,18 @@ i830GetBIOS(ScrnInfoPtr pScrn)
struct vbt_header *vbt;
int vbt_off;
unsigned char *bios;
+ vbeInfoPtr pVbe;
bios = xalloc(INTEL_VBIOS_SIZE);
if (bios == NULL)
return NULL;
- if (pI830->pVbe != NULL) {
- memcpy(bios, xf86int10Addr(pI830->pVbe->pInt10,
- pI830->pVbe->pInt10->BIOSseg << 4),
+ pVbe = VBEInit (NULL, pI830->pEnt->index);
+ if (pVbe != NULL) {
+ memcpy(bios, xf86int10Addr(pVbe->pInt10,
+ pVbe->pInt10->BIOSseg << 4),
INTEL_VBIOS_SIZE);
+ vbeFree (pVbe);
} else {
xf86ReadPciBIOS(0, pI830->PciTag, 0, bios, INTEL_VBIOS_SIZE);
}
diff --git a/src/i830_crt.c b/src/i830_crt.c
index 68006f99..46eb788f 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -102,8 +102,14 @@ i830_crt_post_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
DisplayModePtr pMode)
{
I830Ptr pI830 = I830PTR(pScrn);
+ int dpll_md_reg = (output->pipe == 0) ? DPLL_A_MD : DPLL_B_MD;
+ CARD32 adpa;
- CARD32 adpa;
+ /*
+ * Not quite sure precisely what this does...
+ */
+ if (IS_I965G(pI830))
+ OUTREG(dpll_md_reg, 0x3 << DPLL_MD_VGA_UDI_MULTIPLIER_SHIFT);
adpa = ADPA_DAC_ENABLE;
diff --git a/src/i830_cursor.c b/src/i830_cursor.c
index bf35d4e3..517bd3e0 100644
--- a/src/i830_cursor.c
+++ b/src/i830_cursor.c
@@ -86,7 +86,7 @@ I830SetPipeCursorBase (ScrnInfoPtr pScrn, int pipe)
int cursor_base = (pipe == 0 ? CURSOR_A_BASE : CURSOR_B_BASE);
I830MemRange *cursor_mem;
- if (pipe >= pI830->availablePipes)
+ if (pipe >= pI830->num_pipes)
FatalError("Bad pipe number for cursor base setting\n");
if (pI830->CursorIsARGB)
@@ -180,11 +180,11 @@ I830InitHWCursor(ScrnInfoPtr pScrn)
int i;
DPRINTF(PFX, "I830InitHWCursor\n");
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
pI830->pipes[i].cursorShown = FALSE;
/* Initialise the HW cursor registers, leaving the cursor hidden. */
if (IS_MOBILE(pI830) || IS_I9XX(pI830)) {
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
{
int cursor_control = i == 0 ? CURSOR_A_CONTROL : CURSOR_B_CONTROL;
temp = INREG(cursor_control);
@@ -484,7 +484,7 @@ I830SetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
x -= hotspotx;
y -= hotspoty;
- for (pipe = 0; pipe < pI830->availablePipes; pipe++)
+ for (pipe = 0; pipe < pI830->num_pipes; pipe++)
{
I830PipePtr pI830Pipe = &pI830->pipes[pipe];
DisplayModePtr mode = &pI830Pipe->curMode;
@@ -550,7 +550,7 @@ I830ShowCursor(ScrnInfoPtr pScrn)
pI830->CursorMemARGB->Physical, pI830->CursorMemARGB->Start);
pI830->cursorOn = TRUE;
- for (pipe = 0; pipe < pI830->availablePipes; pipe++)
+ for (pipe = 0; pipe < pI830->num_pipes; pipe++)
I830SetPipeCursor (pScrn, pipe, TRUE);
}
@@ -563,7 +563,7 @@ I830HideCursor(ScrnInfoPtr pScrn)
DPRINTF(PFX, "I830HideCursor\n");
pI830->cursorOn = FALSE;
- for (pipe = 0; pipe < pI830->availablePipes; pipe++)
+ for (pipe = 0; pipe < pI830->num_pipes; pipe++)
I830SetPipeCursor (pScrn, pipe, TRUE);
}
diff --git a/src/i830_display.c b/src/i830_display.c
index c81f4548..36036603 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -268,8 +268,8 @@ i830PipeSetBase(ScrnInfoPtr pScrn, int pipe, int x, int y)
}
if (IS_I965G(pI830)) {
- OUTREG(dspbase, 0);
- OUTREG(dspsurf, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
+ OUTREG(dspbase, ((y * pScrn->displayWidth + x) * pI830->cpp));
+ OUTREG(dspsurf, Start);
} else {
OUTREG(dspbase, Start + ((y * pScrn->displayWidth + x) * pI830->cpp));
}
@@ -375,6 +375,22 @@ i830PipeFindClosestMode(ScrnInfoPtr pScrn, int pipe, DisplayModePtr pMode)
}
/**
+ * Return whether any outputs are connected to the specified pipe
+ */
+
+Bool
+i830PipeInUse (ScrnInfoPtr pScrn, int pipe)
+{
+ I830Ptr pI830 = I830PTR(pScrn);
+ int i;
+
+ for (i = 0; i < pI830->num_outputs; i++)
+ if (pI830->output[i].enabled && pI830->output[i].pipe == pipe)
+ return TRUE;
+ return FALSE;
+}
+
+/**
* Sets the given video mode on the given pipe.
*
* Plane A is always output to pipe A, and plane B to pipe B. The plane
@@ -410,6 +426,10 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
int dspstride_reg = (pipe == 0) ? DSPASTRIDE : DSPBSTRIDE;
int dsppos_reg = (pipe == 0) ? DSPAPOS : DSPBPOS;
int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
+ Bool ret = FALSE;
+#ifdef XF86DRI
+ Bool didLock = FALSE;
+#endif
if (I830ModesEqual(&pI830Pipe->curMode, pMode))
return TRUE;
@@ -417,10 +437,21 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Requested pix clock: %d\n",
pMode->Clock);
+ pI830->pipes[pipe].enabled = i830PipeInUse (pScrn, pipe);
+
+ if (!pI830->pipes[pipe].enabled)
+ return TRUE;
+
+#ifdef XF86DRI
+ didLock = I830DRILock(pScrn);
+#endif
+
for (i = 0; i < pI830->num_outputs; i++) {
if (pI830->output[i].pipe != pipe || !pI830->output[i].enabled)
continue;
+ pI830->output[i].pre_set_mode(pScrn, &pI830->output[i], pMode);
+
switch (pI830->output[i].type) {
case I830_OUTPUT_LVDS:
is_lvds = TRUE;
@@ -443,18 +474,18 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
if (is_lvds && (is_sdvo || is_dvo || is_tv || is_crt)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't enable LVDS and non-LVDS on the same pipe\n");
- return FALSE;
+ goto done;
}
if (is_tv && (is_sdvo || is_dvo || is_crt || is_lvds)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't enable a TV and any other output on the same "
"pipe\n");
- return FALSE;
+ goto done;
}
if (pipe == 0 && is_lvds) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't support LVDS on pipe A\n");
- return FALSE;
+ goto done;
}
htot = (pMode->CrtcHDisplay - 1) | ((pMode->CrtcHTotal - 1) << 16);
@@ -520,7 +551,7 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
if (!ok) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Couldn't find PLL settings for mode!\n");
- return FALSE;
+ goto done;
}
dpll = DPLL_VCO_ENABLE | DPLL_VGA_MODE_DIS;
@@ -544,6 +575,8 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
dpll |= DPLLB_LVDS_P2_CLOCK_DIV_14;
break;
}
+ if (IS_I965G(pI830))
+ dpll |= (6 << PLL_LOAD_PULSE_PHASE_SHIFT);
} else {
dpll |= (p1 - 2) << 16;
if (p2 == 4)
@@ -659,27 +692,33 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe,
pI830Pipe->curMode = *pMode;
- return TRUE;
+ ret = TRUE;
+done:
+#ifdef XF86DRI
+ if (didLock)
+ I830DRIUnlock(pScrn);
+#endif
+ return ret;
}
void
i830DisableUnusedFunctions(ScrnInfoPtr pScrn)
{
I830Ptr pI830 = I830PTR(pScrn);
- int i, pipe;
+ int output, pipe;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Disabling unused functions\n");
- for (i = 0; i < pI830->num_outputs; i++) {
- if (!pI830->output[i].enabled)
- pI830->output[i].dpms(pScrn, &pI830->output[i], DPMSModeOff);
+ for (output = 0; output < pI830->num_outputs; output++) {
+ if (!pI830->output[output].enabled)
+ pI830->output[output].dpms(pScrn, &pI830->output[output], DPMSModeOff);
}
/* Now, any unused plane, pipe, and DPLL (FIXME: except for DVO, i915
* internal TV) should have no outputs trying to pull data out of it, so
* we're ready to turn those off.
*/
- for (pipe = 0; pipe < pI830->availablePipes; pipe++) {
+ for (pipe = 0; pipe < pI830->num_pipes; pipe++) {
I830PipePtr pI830Pipe = &pI830->pipes[pipe];
int dspcntr_reg = pipe == 0 ? DSPACNTR : DSPBCNTR;
int pipeconf_reg = pipe == 0 ? PIPEACONF : PIPEBCONF;
@@ -720,22 +759,6 @@ i830DisableUnusedFunctions(ScrnInfoPtr pScrn)
}
/**
- * Return whether any outputs are connected to the specified pipe
- */
-
-Bool
-i830PipeInUse (ScrnInfoPtr pScrn, int pipe)
-{
- I830Ptr pI830 = I830PTR(pScrn);
- int i;
-
- for (i = 0; i < pI830->num_outputs; i++)
- if (pI830->output[i].enabled && pI830->output[i].pipe == pipe)
- return TRUE;
- return FALSE;
-}
-
-/**
* This function configures the screens in clone mode on
* all active outputs using a mode similar to the specified mode.
*/
@@ -744,29 +767,15 @@ i830SetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
{
I830Ptr pI830 = I830PTR(pScrn);
Bool ok = TRUE;
-#ifdef XF86DRI
- Bool didLock = FALSE;
-#endif
int i;
DPRINTF(PFX, "i830SetMode\n");
-#ifdef XF86DRI
- didLock = I830DRILock(pScrn);
-#endif
-
- for (i = 0; i < pI830->availablePipes; i++)
- pI830->pipes[i].enabled = i830PipeInUse (pScrn, i);
-
- for (i = 0; i < pI830->num_outputs; i++)
- pI830->output[i].pre_set_mode(pScrn, &pI830->output[i], pMode);
-
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
{
- if (pI830->pipes[i].enabled)
- ok = i830PipeSetMode(pScrn, i830PipeFindClosestMode(pScrn, i,
- pMode),
- i, TRUE);
+ ok = i830PipeSetMode(pScrn,
+ i830PipeFindClosestMode(pScrn, i, pMode),
+ i, TRUE);
if (!ok)
goto done;
}
@@ -804,11 +813,6 @@ i830SetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
I830DRISetVBlankInterrupt (pScrn, TRUE);
#endif
done:
-#ifdef XF86DRI
- if (didLock)
- I830DRIUnlock(pScrn);
-#endif
-
i830DumpRegs (pScrn);
i830_sdvo_dump(pScrn);
return ok;
@@ -822,7 +826,7 @@ i830DescribeOutputConfiguration(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Output configuration:\n");
- for (i = 0; i < pI830->availablePipes; i++) {
+ for (i = 0; i < pI830->num_pipes; i++) {
CARD32 dspcntr = INREG(DSPACNTR + (DSPBCNTR - DSPACNTR) * i);
CARD32 pipeconf = INREG(PIPEACONF + (PIPEBCONF - PIPEACONF) * i);
Bool hw_plane_enable = (dspcntr & DISPLAY_PLANE_ENABLE) != 0;
@@ -936,15 +940,15 @@ i830GetLoadDetectPipe(ScrnInfoPtr pScrn, I830OutputPtr output)
}
}
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
pipe_available[i] = i830PipeInUse(pScrn, i);
- for (i = 0; i < pI830->availablePipes; i++) {
+ for (i = 0; i < pI830->num_pipes; i++) {
if (pipe_available[i])
break;
}
- if (i == pI830->availablePipes) {
+ if (i == pI830->num_pipes) {
return -1;
}
output->load_detect_temp = TRUE;
diff --git a/src/i830_driver.c b/src/i830_driver.c
index ab0af4e5..63c1fd2e 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -367,11 +367,6 @@ I830FreeRec(ScrnInfoPtr pScrn)
pI830 = I830PTR(pScrn);
- if (I830IsPrimary(pScrn)) {
- if (pI830->pVbe)
- vbeFree(pI830->pVbe);
- }
-
xfree(pScrn->driverPrivate);
pScrn->driverPrivate = NULL;
}
@@ -395,7 +390,9 @@ I830DetectMemory(ScrnInfoPtr pScrn)
CARD16 gmch_ctrl;
int memsize = 0;
int range;
+#if 0
VbeInfoBlock *vbeInfo;
+#endif
bridge = pciTag(0, 0, 0); /* This is always the host bridge */
gmch_ctrl = pciReadWord(bridge, I830_GMCH_CTRL);
@@ -461,18 +458,6 @@ I830DetectMemory(ScrnInfoPtr pScrn)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "no video memory detected.\n");
}
- /* Sanity check: compare with what the BIOS thinks. */
- vbeInfo = VBEGetVBEInfo(pI830->pVbe);
- if (vbeInfo != NULL && vbeInfo->TotalMemory != memsize / 1024 / 64) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Detected stolen memory (%d kB) doesn't match what the BIOS"
- " reports (%d kB)\n",
- ROUND_DOWN_TO(memsize / 1024, 64),
- vbeInfo->TotalMemory * 64);
- }
- if (vbeInfo != NULL)
- VBEFreeVBEInfo(vbeInfo);
-
return memsize;
}
@@ -557,7 +542,7 @@ I830LoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
DPRINTF(PFX, "I830LoadPalette: numColors: %d\n", numColors);
pI830 = I830PTR(pScrn);
- for(p=0; p < pI830->availablePipes; p++) {
+ for(p=0; p < pI830->num_pipes; p++) {
I830PipePtr pI830Pipe = &pI830->pipes[p];
if (p == 0) {
@@ -791,6 +776,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
pointer pVBEModule = NULL;
Bool enable;
const char *chipname;
+ int mem_skip;
if (pScrn->numEntities != 1)
return FALSE;
@@ -919,17 +905,6 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
/* We have to use PIO to probe, because we haven't mapped yet. */
I830SetPIOAccess(pI830);
- /* Initialize VBE record */
- if (I830IsPrimary(pScrn)) {
- if ((pI830->pVbe = VBEInit(NULL, pI830->pEnt->index)) == NULL) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "VBE initialization failed.\n");
- return FALSE;
- }
- } else {
- I830Ptr pI8301 = I830PTR(pI830->entityPrivate->pScrn_1);
- pI830->pVbe = pI8301->pVbe;
- }
-
switch (pI830->PciInfo->chipType) {
case PCI_CHIP_I830_M:
chipname = "830M";
@@ -1106,20 +1081,27 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
}
if (pI830->PciInfo->chipType == PCI_CHIP_E7221_G)
- pI830->availablePipes = 1;
+ pI830->num_pipes = 1;
else
if (IS_MOBILE(pI830) || IS_I9XX(pI830))
- pI830->availablePipes = 2;
+ pI830->num_pipes = 2;
else
- pI830->availablePipes = 1;
+ pI830->num_pipes = 1;
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "%d display pipe%s available.\n",
- pI830->availablePipes, pI830->availablePipes > 1 ? "s" : "");
+ pI830->num_pipes, pI830->num_pipes > 1 ? "s" : "");
/*
* Get the pre-allocated (stolen) memory size.
*/
- pI830->StolenMemory.Size = I830DetectMemory(pScrn);
- pI830->StolenMemory.Start = 0;
+
+ mem_skip = 0;
+
+ /* On 965, it looks like the GATT table is inside the aperture? */
+ if (IS_I965G(pI830))
+ mem_skip = pI830->FbMapSize >> 10;
+
+ pI830->StolenMemory.Size = I830DetectMemory(pScrn) - mem_skip;
+ pI830->StolenMemory.Start = mem_skip;
pI830->StolenMemory.End = pI830->StolenMemory.Size;
/* Find the maximum amount of agpgart memory available. */
@@ -1257,7 +1239,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
} while (sub);
}
- if (pI830->availablePipes == 1 && pI830->MonType2 != PIPE_NONE) {
+ if (pI830->num_pipes == 1 && pI830->MonType2 != PIPE_NONE) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Monitor 2 cannot be specified on single pipe devices\n");
return FALSE;
@@ -1334,7 +1316,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
#endif
if (xf86ReturnOptValBool(pI830->Options, OPTION_CLONE, FALSE)) {
- if (pI830->availablePipes == 1) {
+ if (pI830->num_pipes == 1) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Can't enable Clone Mode because this is a single pipe device\n");
PreInitCleanup(pScrn);
@@ -1359,9 +1341,8 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
switch (pI830->output[i].type) {
case I830_OUTPUT_LVDS:
- /* LVDS must always be on pipe B. */
- pI830->output[i].pipe = 1;
- pI830->output[i].enabled = TRUE;
+ /* LVDS must live on pipe B for two-pipe devices */
+ pI830->output[i].pipe = pI830->num_pipes - 1;
break;
case I830_OUTPUT_ANALOG:
case I830_OUTPUT_DVO:
@@ -1383,7 +1364,7 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
}
}
- for (i = 0; i < pI830->availablePipes; i++) {
+ for (i = 0; i < pI830->num_pipes; i++) {
pI830->pipes[i].enabled = i830PipeInUse(pScrn, i);
}
@@ -2129,7 +2110,7 @@ SaveHWState(ScrnInfoPtr pScrn)
temp = INREG(PIPEACONF);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PIPEACONF is 0x%08lx\n",
(unsigned long) temp);
- if (pI830->availablePipes == 2) {
+ if (pI830->num_pipes == 2) {
temp = INREG(PIPEBCONF);
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "PIPEBCONF is 0x%08lx\n",
(unsigned long) temp);
@@ -2161,7 +2142,7 @@ SaveHWState(ScrnInfoPtr pScrn)
pI830->savePaletteA[i] = INREG(PALETTE_A + (i << 2));
}
- if(pI830->availablePipes == 2) {
+ if(pI830->num_pipes == 2) {
pI830->savePIPEBCONF = INREG(PIPEBCONF);
pI830->savePIPEBSRC = INREG(PIPEBSRC);
pI830->saveDSPBCNTR = INREG(DSPBCNTR);
@@ -2272,7 +2253,7 @@ RestoreHWState(ScrnInfoPtr pScrn)
OUTREG(PALETTE_A + (i << 2), pI830->savePaletteA[i]);
}
- if(pI830->availablePipes == 2) {
+ if(pI830->num_pipes == 2) {
OUTREG(FPB0, pI830->saveFPB0);
OUTREG(FPB1, pI830->saveFPB1);
OUTREG(DPLL_B, pI830->saveDPLL_B);
@@ -3209,7 +3190,7 @@ i830AdjustFrame(int scrnIndex, int x, int y, int flags)
pI830->AccelInfoRec->NeedToSync = FALSE;
}
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
if (pI830->pipes[i].enabled)
i830PipeSetBase(pScrn, i, x, y);
}
@@ -3317,7 +3298,7 @@ I830EnterVT(int scrnIndex, int flags)
SetHWOperatingState(pScrn);
/* Mark that we'll need to re-set the mode for sure */
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
memset(&pI830->pipes[i].curMode, 0, sizeof(pI830->pipes[i].curMode));
if (!i830SetMode(pScrn, pScrn->currentMode))
@@ -3461,7 +3442,7 @@ I830SaveScreen(ScreenPtr pScreen, int mode)
DPRINTF(PFX, "I830SaveScreen: %d, on is %s\n", mode, BOOLTOSTRING(on));
if (pScrn->vtSema) {
- for (i = 0; i < pI830->availablePipes; i++) {
+ for (i = 0; i < pI830->num_pipes; i++) {
if (i == 0) {
ctrl = DSPACNTR;
base = DSPABASE;
@@ -3512,7 +3493,7 @@ I830DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
pI830->output[i].dpms(pScrn, &pI830->output[i], PowerManagementMode);
}
- for (i = 0; i < pI830->availablePipes; i++) {
+ for (i = 0; i < pI830->num_pipes; i++) {
if (i == 0) {
ctrl = DSPACNTR;
base = DSPABASE;
diff --git a/src/i830_randr.c b/src/i830_randr.c
index 184bf012..32cc8773 100644
--- a/src/i830_randr.c
+++ b/src/i830_randr.c
@@ -752,7 +752,7 @@ I830RandRSetInfo12 (ScreenPtr pScreen)
if (!RROutputSetClones (randrp->outputs[i], clones, nclone))
return FALSE;
}
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
I830RandRCrtcNotify (randrp->crtcs[i]);
return TRUE;
}
@@ -785,7 +785,7 @@ I830RandRCreateScreenResources12 (ScreenPtr pScreen)
/*
* Create RandR resources, then probe them
*/
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
{
randrp->crtcs[i] = RRCrtcCreate (pScreen, (void *) i);
RRCrtcGammaSetSize (randrp->crtcs[i], 256);
@@ -821,7 +821,7 @@ I830RandRCreateScreenResources12 (ScreenPtr pScreen)
mmHeight);
}
- for (i = 0; i < pI830->availablePipes; i++)
+ for (i = 0; i < pI830->num_pipes; i++)
i830PipeSetBase(pScrn, i, 0, 0);
return I830RandRSetInfo12 (pScreen);
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index da611590..4d4817a5 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -517,8 +517,8 @@ i830_sdvo_pre_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
{
I830Ptr pI830 = I830PTR(pScrn);
struct i830_sdvo_priv *dev_priv = output->dev_priv;
- CARD16 width = mode->CrtcHDisplay;
- CARD16 height = mode->CrtcVDisplay;
+ CARD16 width;
+ CARD16 height;
CARD16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
CARD16 h_sync_offset, v_sync_offset;
struct i830_sdvo_dtd output_dtd;
@@ -526,6 +526,11 @@ i830_sdvo_pre_set_mode(ScrnInfoPtr pScrn, I830OutputPtr output,
memset(&no_outputs, 0, sizeof(no_outputs));
+ if (!mode)
+ return;
+ width = mode->CrtcHDisplay;
+ height = mode->CrtcVDisplay;
+
/* do some mode translations */
h_blank_len = mode->CrtcHBlankEnd - mode->CrtcHBlankStart;
h_sync_len = mode->CrtcHSyncEnd - mode->CrtcHSyncStart;