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AgeCommit message (Collapse)Author
2010-12-06snb: Emit more invariants only onceChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05uxa: Prevent reading past the last byte on upload/downloadChris Wilson
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=29752 Reported-by: Sergey Samokhin <prikrutil@gmail.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05Don't use hardware acceleration on Sandybridge rev 07 hardware or earlier.Matthias Hopf
This is known to lock up the GPU even with the workaround in place. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31773 Signed-off-by: Matthias Hopf <mhopf@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05display: Flush any pending batches before changing modes.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05i965: Also flush the vertex buffer when restarting the array.Chris Wilson
As a corollary to filling one vertex array and beginning a new one is remembering to emit the old one before overwriting... Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05i965: Check for potential vertex array overflow every timeChris Wilson
There was a reason why we need to check at the start of every composite operation to see if we have enough space in the array to fit the vertices, which I promptly forgot when moving the code around to make it look pretty. * sigh. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03Wait on the current buffer to complete when running synchronously.Chris Wilson
And remove the vestigal wait upon changing crtc as this is more properly done in the kernel. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Amalgamate surface binding tablesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Upload an entire vbo in a single pwrite, rather than per-rectangleChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-03i965: Use reciprocal scale factors to avoid the divide per-vertex-elementChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-23Disable BLT for i830 and 845GChris Wilson
This pair of chipsets seem broken beyond repair, specifically the erratum that causes the wrong PTE entry to be invalidated, so disable our incorrect attempts to use the BLT on those devices. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-17Mark outputs as DPMSModeOn and restore backlight at mode setKeith Packard
The kernel always turns monitors on when doing mode setting, and so no further DPMS action is required. Note this in the mode setting code by marking the updated DPMS mode and restoring any saved backlight level. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Eric Anholt <eric@anholt.net>
2010-11-14uxa: Relax fencing some more for gen3Chris Wilson
Allow fenced allocations even for small pixmaps if the kernel supports relaxing fencing (where only the used pages are allocated). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09i915: Disable maximum state addressesChris Wilson
As the kernel controls the relocation of state buffers, we should not hard code the maximum permissible value for them. Fixes an eventual hang with full-gtt. Reported-by: Peter Clifton <pcjc2@cam.ac.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-09uxa: Fix crash after allocation failureChris Wilson
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31487 Reported-by: Thomas Fjellstrom <tfjellstrom@shaw.ca> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-05Update version number to 2.13.9012.13.901Carl Worth
In preparation for a snapshot.
2010-11-05NEWS: Add release notes for 2.13.901 snapshot.Carl Worth
An intermediate snapshot to capture recent developments.
2010-11-05Merge commit '2.13.0'Carl Worth
This changes the version number and adds the 2.13.0 release notes, (which were otherwise missing from the master branch).
2010-11-05Wait for any pending rendering before switching modes.Chris Wilson
A perennial problem we have is the accursed WAIT_FOR_EVENT hangs, which occur when we switch the framebuffer before the WAIT_FOR_EVENT completes and upsets the GPU. We have tried more subtle approaches to detected these and fix them up in the kernel, to no avail. What we need to do is to delay the framebuffer flip until the WAIT completes, which is quite tricky in the kernel without new ioctls and round-trips. Instead, apply the big hammer from userspace and synchronise all rendering before changing the framebuffer. I expect this not to cause noticeable latency on switching modes (far less than the actual modeswitch) and should stop these hangs once and for all. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31401 (...) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03Downgrade tiling allocation failure to a warningChris Wilson
We emitted this message as an error even though we fallback and attempt to allocate a non-tiled framebuffer before failing (with an appropriate error message). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-03Fallback to shadow for Sandybridge if we don't have access to the BLTChris Wilson
If we attempt to emit BLT batches without kernel support, we just end up with EINVAL and no rendering. Prevent this, and avoid uncached rendering, by restoring the shadow fallback paths if there is no BLT support. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-02Remove the intermittent GEM_THROTTLE call.Eric Anholt
This is a holdover from early GEM work when we weren't syncing on the DRI client side. It would keep clients from getting too far ahead and killing their interactivity, by bringing everyone to a halt when anyone was too far ahead. Now, GL clients throttle themselves to avoid the problem, and it turns out that in the case that they don't (long rendering to buffers with no swap), this actually reduces X Server interactivity: instead of lagging of X rendering behind input, you get no response for seconds at a time, then a burst of rendering, then nothing again. Reported by ajax. Tested with moving a window while running cairo-perf-trace on the GL backend (improvement) and X backend (no significant change in responsiveness).
2010-11-02render: use headerless render target writeXiang, Haihao
It is weird that some rendercheck cases only work fine with headerless write. Need to update intel-gen4asm to support headerless write Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: acceleration for composite on SandybridgeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: fragments for composite on SandybridgeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: fix send instruction used in sampling fragmentsXiang, Haihao
To prepare for composite on Sandybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-02render: set the surface state base addressXiang, Haihao
It is the same as commit 73d4c7d7 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Flush BLT batches before starting an atomic RENDER batchChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01Support BLT acceleration on gen6Zou Nan hai
Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01add BLT ring supportZou Nan hai
gen6+ platform has a BLT engine with seperate command streamer to support BLT commands. Signed-off-by: Zou Nan hai <nanhai.zou@intel.com> [ickle: merge trivial conflict] Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-11-01Xv: don't call intel_wait_for_scanline on SandybridgeXiang, Haihao
MI_LOAD_SCAN_LINE_INCL command is not available on sandybridge. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Xv: enable TextureAdaptor for SandybridgeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Xv: setup pipeline for Xv on SandybridgeXiang, Haihao
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Xv: fragments for xv on Sandybridge.Xiang, Haihao
Need to update intel-gen4asm to build these fragments Signed--off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Xv: Send instruction doesn't use implied move when sampling YUV surfaceXiang, Haihao
The two fragments will be reused for sampling YUV surface and send doesn't have implied move on Sandybridge Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-11-01Xv: set the surface state base addressXiang, Haihao
To prepare for Xv on Sandybridge. It is easy to fill the binding table without relocation and make sure that the pointer to binding table only uses bits[15:0]. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2010-10-29intel: don't pass a dangling pointer to GET_PARAMChris Wilson
I fail at cut'n'paste. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-29uxa: Enable reduced fence sizes for i915Chris Wilson
Depends on libdrm 362457715faacd3101929e5f0d8ae250d0ad09df (for HAS_RELAXED_FENCING define). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-22intel: Listen for hotplug uevents (V3)Adam Jackson
This connects the kernel uevent indicating monitor hotplugging to the RandR notification events so that X applications can be notified automatically when monitors are connected or disconnected. This also adds a configuration option to disable hotplug events. V2: missed a #ifdef HAVE_UDEV around some udev-specific declarations V3: document Hotplug option in man page Signed-off-by: Keith Packard <keithp@keithp.com>
2010-10-18Fix violation of gen6 requirements for depthbuffer tiling.Eric Anholt
In general, demoting of tiling of DRI2 buffers seems dubious, as we've got various bits of functionality that won't all work together unless buffers are tiled as expected. This just covers one instance of the problem, caught by assertions in Mesa. Fixes: fbo-1d fbo-d24s8. glean/readPixSanity glean/rgbTriStrip glean/scissor
2010-10-17display: do not report failure for setting unrecognised propertiesChris Wilson
We need to accept any changes to properties not handled by ourselves -- we can't validate the changes ourselves. Denying those changes breaks EDID reporting, for example. Reported-by: Elvis Pranskevichus <el@prans.net> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-13Fix driverName regression for i830 from 4083197aChris Wilson
Reported-by: Stefan Glasenhardt <stefan@glasen-hardt.de> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30808 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-13Move EDID_COMPLETE_RAWDATA define to intel.h to avoid redifinition warningChris Wilson
The compiler was simply warning that we defined the name prior to including the original definition, so reorder. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-12Make driver compile for 1.6 Xserver series again. Part deux.Stefan Dirsch
Signed-off-by: Matthias Hopf <mhopf@suse.de> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-08dri: Check for pixmap privates before dereferencing themChris Wilson
It is still possible for the pixmap allocator to return a software only pixmap (i.e. without an associated GEM buffer or intel_pixmap), so check before dereferencing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=30707 Reported-by: Matthias Hopf <mhopf@suse.de> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-07Include a chipset generation number to clarify device specific paths.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06dri+shadow: Only tweak the acceleration of CopyRegion if using shadow.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06dri: Reattach the fake pixmap for the shadow scanout to the drawable.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06uxa: Skip a pixmap lookup if there is no driver finish access functionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-10-06uxa: Re-enable acceleration.Chris Wilson
A side-effect of discriminating offscreen based on the devPrivate.ptr was that it broke uxa_finish_access and so after any fallback to s/w on a Pixmap, it remained in software for the reminder of its life. Introduce an explicit boolean to mark whether or not hardware acceleration is enabled for a pixmap (with a GEM buffer). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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